blob: 948872a419c192e8c66ab287b7128adcdebe365a [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * linux/arch/arm/mach-integrator/core.c
3 *
4 * Copyright (C) 2000-2003 Deep Blue Solutions Ltd
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2, as
8 * published by the Free Software Foundation.
9 */
10#include <linux/types.h>
11#include <linux/kernel.h>
12#include <linux/init.h>
13#include <linux/device.h>
Arnd Bergmannb434f5c2012-08-04 10:31:24 +000014#include <linux/export.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070015#include <linux/spinlock.h>
16#include <linux/interrupt.h>
Thomas Gleixnera03d4d22006-07-01 22:32:32 +010017#include <linux/irq.h>
Russell King8d717a52010-05-22 19:47:18 +010018#include <linux/memblock.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070019#include <linux/sched.h>
Russell King20cf33e2005-06-18 10:15:46 +010020#include <linux/smp.h>
Russell Kinga62c80e2006-01-07 13:52:45 +000021#include <linux/amba/bus.h>
Russell Kingfbb18a22006-03-26 23:13:39 +010022#include <linux/amba/serial.h>
Russell Kingfced80c2008-09-06 12:10:45 +010023#include <linux/io.h>
Linus Walleije67ae6b2012-11-02 01:31:10 +010024#include <linux/stat.h>
Linus Walleijbb4dbef2013-06-16 02:44:27 +020025#include <linux/of.h>
26#include <linux/of_address.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070027
Linus Walleijee358872011-12-20 11:55:19 +010028#include <asm/mach-types.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070029#include <asm/mach/time.h>
Russell King98c672c2010-05-22 18:18:57 +010030#include <asm/pgtable.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070031
Linus Walleij1b1ef752014-02-13 21:26:24 +010032#include "hardware.h"
Linus Walleijbb4dbef2013-06-16 02:44:27 +020033#include "cm.h"
Linus Walleij4672cdd2012-09-06 09:08:47 +010034#include "common.h"
35
Thomas Gleixnerbd31b852009-07-03 08:44:46 -050036static DEFINE_RAW_SPINLOCK(cm_lock);
Linus Walleijbb4dbef2013-06-16 02:44:27 +020037static void __iomem *cm_base;
Linus Torvalds1da177e2005-04-16 15:20:36 -070038
39/**
Linus Walleijfb61f862013-10-10 14:11:18 +020040 * cm_get - get the value from the CM_CTRL register
41 */
42u32 cm_get(void)
43{
44 return readl(cm_base + INTEGRATOR_HDR_CTRL_OFFSET);
45}
46
47/**
Linus Torvalds1da177e2005-04-16 15:20:36 -070048 * cm_control - update the CM_CTRL register.
49 * @mask: bits to change
50 * @set: bits to set
51 */
52void cm_control(u32 mask, u32 set)
53{
54 unsigned long flags;
55 u32 val;
56
Thomas Gleixnerbd31b852009-07-03 08:44:46 -050057 raw_spin_lock_irqsave(&cm_lock, flags);
Linus Walleijbb4dbef2013-06-16 02:44:27 +020058 val = readl(cm_base + INTEGRATOR_HDR_CTRL_OFFSET) & ~mask;
59 writel(val | set, cm_base + INTEGRATOR_HDR_CTRL_OFFSET);
Thomas Gleixnerbd31b852009-07-03 08:44:46 -050060 raw_spin_unlock_irqrestore(&cm_lock, flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -070061}
62
Linus Walleijbb4dbef2013-06-16 02:44:27 +020063void cm_clear_irqs(void)
64{
65 /* disable core module IRQs */
66 writel(0xffffffffU, cm_base + INTEGRATOR_HDR_IC_OFFSET +
67 IRQ_ENABLE_CLEAR);
68}
69
70static const struct of_device_id cm_match[] = {
71 { .compatible = "arm,core-module-integrator"},
72 { },
73};
74
75void cm_init(void)
76{
77 struct device_node *cm = of_find_matching_node(NULL, cm_match);
Linus Walleijbb4dbef2013-06-16 02:44:27 +020078
79 if (!cm) {
80 pr_crit("no core module node found in device tree\n");
81 return;
82 }
83 cm_base = of_iomap(cm, 0);
84 if (!cm_base) {
85 pr_crit("could not remap core module\n");
86 return;
87 }
88 cm_clear_irqs();
Linus Walleijbb4dbef2013-06-16 02:44:27 +020089}
Russell King98c672c2010-05-22 18:18:57 +010090
91/*
92 * We need to stop things allocating the low memory; ideally we need a
93 * better implementation of GFP_DMA which does not assume that DMA-able
94 * memory starts at zero.
95 */
96void __init integrator_reserve(void)
97{
Russell King8d717a52010-05-22 19:47:18 +010098 memblock_reserve(PHYS_OFFSET, __pa(swapper_pg_dir) - PHYS_OFFSET);
Russell King98c672c2010-05-22 18:18:57 +010099}