Blame - drivers/net/ethernet/stmicro/stmmac/Kconfig - kernel/msm-4.9

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Giuseppe Cavallaro	47dd7a5	2009-10-14 15:13:45 -0700	[diff] [blame]	1	config STMMAC_ETH
				2	tristate "STMicroelectronics 10/100/1000 Ethernet driver"
Jeff Kirsher	7ac6653	2011-05-16 00:05:19 -0700	[diff] [blame]	3	depends on HAS_IOMEM
Jeff Kirsher	aaba215	2011-09-14 21:23:14 +0000	[diff] [blame]	4	select NET_CORE
Giuseppe Cavallaro	47dd7a5	2009-10-14 15:13:45 -0700	[diff] [blame]	5	select MII
				6	select PHYLIB
Carmelo AMOROSO	7ba8a9b	2010-03-31 21:44:03 +0000	[diff] [blame]	7	select CRC32
Jeff Kirsher	7ac6653	2011-05-16 00:05:19 -0700	[diff] [blame]	8	---help---
Giuseppe CAVALLARO	7187c1a	2010-01-06 23:07:22 +0000	[diff] [blame]	9	This is the driver for the Ethernet IPs are built around a
Giuseppe CAVALLARO	ac75791	2010-08-23 20:40:41 +0000	[diff] [blame]	10	Synopsys IP Core and only tested on the STMicroelectronics
Giuseppe CAVALLARO	7187c1a	2010-01-06 23:07:22 +0000	[diff] [blame]	11	platforms.
Giuseppe Cavallaro	47dd7a5	2009-10-14 15:13:45 -0700	[diff] [blame]	12
				13	if STMMAC_ETH
				14
Giuseppe CAVALLARO	bfab27a	2011-12-21 03:58:19 +0000	[diff] [blame^]	15	config STMMAC_PLATFORM
				16	tristate "STMMAC platform bus support"
				17	depends on STMMAC_ETH
				18	default y
				19	---help---
				20	This selects the platform specific bus support for
				21	the stmmac device driver. This is the driver used
				22	on many embedded STM platforms based on ARM and SuperH
				23	processors.
				24	If you have a controller with this interface, say Y or M here.
				25
				26	If unsure, say N.
				27
				28	config STMMAC_PCI
				29	tristate "STMMAC support on PCI bus (EXPERIMENTAL)"
				30	depends on STMMAC_ETH && PCI && EXPERIMENTAL
				31	---help---
				32	This is to select the Synopsys DWMAC available on PCI devices,
				33	if you have a controller with this interface, say Y or M here.
				34
				35	This PCI support is tested on XLINX XC2V3000 FF1152AMT0221
				36	D1215994A VIRTEX FPGA board.
				37
				38	If unsure, say N.
				39
Giuseppe CAVALLARO	7ac2905	2011-09-01 21:51:39 +0000	[diff] [blame]	40	config STMMAC_DEBUG_FS
				41	bool "Enable monitoring via sysFS "
				42	default n
				43	depends on STMMAC_ETH && DEBUG_FS
Giuseppe CAVALLARO	bfab27a	2011-12-21 03:58:19 +0000	[diff] [blame^]	44	---help---
Giuseppe CAVALLARO	e743482	2011-09-01 21:51:41 +0000	[diff] [blame]	45	The stmmac entry in /sys reports DMA TX/RX rings
				46	or (if supported) the HW cap register.
Giuseppe CAVALLARO	7ac2905	2011-09-01 21:51:39 +0000	[diff] [blame]	47
Giuseppe Cavallaro	47dd7a5	2009-10-14 15:13:45 -0700	[diff] [blame]	48	config STMMAC_DA
				49	bool "STMMAC DMA arbitration scheme"
				50	default n
Jeff Kirsher	7ac6653	2011-05-16 00:05:19 -0700	[diff] [blame]	51	---help---
Giuseppe Cavallaro	47dd7a5	2009-10-14 15:13:45 -0700	[diff] [blame]	52	Selecting this option, rx has priority over Tx (only for Giga
				53	Ethernet device).
				54	By default, the DMA arbitration scheme is based on Round-robin
				55	(rx:tx priority is 1:1).
				56
Giuseppe Cavallaro	47dd7a5	2009-10-14 15:13:45 -0700	[diff] [blame]	57	config STMMAC_TIMER
				58	bool "STMMAC Timer optimisation"
				59	default n
David S. Miller	250ad8f	2010-08-26 20:32:02 -0700	[diff] [blame]	60	depends on RTC_HCTOSYS_DEVICE
Jeff Kirsher	7ac6653	2011-05-16 00:05:19 -0700	[diff] [blame]	61	---help---
Giuseppe Cavallaro	47dd7a5	2009-10-14 15:13:45 -0700	[diff] [blame]	62	Use an external timer for mitigating the number of network
Giuseppe CAVALLARO	7187c1a	2010-01-06 23:07:22 +0000	[diff] [blame]	63	interrupts. Currently, for SH architectures, it is possible
				64	to use the TMU channel 2 and the SH-RTC device.
Giuseppe Cavallaro	47dd7a5	2009-10-14 15:13:45 -0700	[diff] [blame]	65
				66	choice
				67	prompt "Select Timer device"
				68	depends on STMMAC_TIMER
				69
				70	config STMMAC_TMU_TIMER
				71	bool "TMU channel 2"
				72	depends on CPU_SH4
Jeff Kirsher	7ac6653	2011-05-16 00:05:19 -0700	[diff] [blame]	73	---help---
Giuseppe Cavallaro	47dd7a5	2009-10-14 15:13:45 -0700	[diff] [blame]	74
				75	config STMMAC_RTC_TIMER
				76	bool "Real time clock"
				77	depends on RTC_CLASS
Jeff Kirsher	7ac6653	2011-05-16 00:05:19 -0700	[diff] [blame]	78	---help---
Giuseppe Cavallaro	47dd7a5	2009-10-14 15:13:45 -0700	[diff] [blame]	79
				80	endchoice
				81
Giuseppe CAVALLARO	286a837	2011-10-18 00:01:24 +0000	[diff] [blame]	82	choice
				83	prompt "Select the DMA TX/RX descriptor operating modes"
				84	depends on STMMAC_ETH
				85	---help---
				86	This driver supports DMA descriptor to operate both in dual buffer
				87	(RING) and linked-list(CHAINED) mode. In RING mode each descriptor
				88	points to two data buffer pointers whereas in CHAINED mode they
				89	points to only one data buffer pointer.
				90
				91	config STMMAC_RING
				92	bool "Enable Descriptor Ring Mode"
				93
				94	config STMMAC_CHAINED
				95	bool "Enable Descriptor Chained Mode"
				96
				97	endchoice
				98
				99
Giuseppe Cavallaro	47dd7a5	2009-10-14 15:13:45 -0700	[diff] [blame]	100	endif