blob: 44af3188afb9c6e50e9e097e4c97c0ffb15f4023 [file] [log] [blame]
Steve Sakomancc175572008-10-30 21:35:26 -07001/*
2 * ALSA SoC TWL4030 codec driver
3 *
4 * Author: Steve Sakoman, <steve@sakoman.com>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * version 2 as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
18 * 02110-1301 USA
19 *
20 */
21
22#include <linux/module.h>
23#include <linux/moduleparam.h>
24#include <linux/init.h>
25#include <linux/delay.h>
26#include <linux/pm.h>
27#include <linux/i2c.h>
28#include <linux/platform_device.h>
Peter Ujfalusi2d6d6492012-09-10 13:46:32 +030029#include <linux/of.h>
30#include <linux/of_gpio.h>
Santosh Shilimkarb07682b2009-12-13 20:05:51 +010031#include <linux/i2c/twl.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090032#include <linux/slab.h>
Peter Ujfalusi281ecd12012-09-10 13:46:27 +030033#include <linux/gpio.h>
Steve Sakomancc175572008-10-30 21:35:26 -070034#include <sound/core.h>
35#include <sound/pcm.h>
36#include <sound/pcm_params.h>
37#include <sound/soc.h>
Steve Sakomancc175572008-10-30 21:35:26 -070038#include <sound/initval.h>
Peter Ujfalusic10b82c2008-11-24 13:49:35 +020039#include <sound/tlv.h>
Steve Sakomancc175572008-10-30 21:35:26 -070040
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +000041/* Register descriptions are here */
Peter Ujfalusi57fe7252011-05-31 12:02:49 +030042#include <linux/mfd/twl4030-audio.h>
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +000043
Peter Ujfalusi5712ded2012-12-31 11:51:46 +010044/* TWL4030 PMBR1 Register */
45#define TWL4030_PMBR1_REG 0x0D
46/* TWL4030 PMBR1 Register GPIO6 mux bits */
47#define TWL4030_GPIO6_PWM0_MUTE(value) ((value & 0x03) << 2)
48
Lars-Peter Clausen052901f42013-10-06 13:43:50 +020049#define TWL4030_CACHEREGNUM (TWL4030_REG_MISC_SET_2 + 1)
Steve Sakomancc175572008-10-30 21:35:26 -070050
Peter Ujfalusi73939582009-01-29 14:57:50 +020051/* codec private data */
52struct twl4030_priv {
Peter Ujfalusi73939582009-01-29 14:57:50 +020053 unsigned int codec_powered;
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +030054
55 /* reference counts of AIF/APLL users */
Peter Ujfalusi2845fa12009-10-28 10:57:05 +020056 unsigned int apll_enabled;
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +020057
58 struct snd_pcm_substream *master_substream;
59 struct snd_pcm_substream *slave_substream;
Peter Ujfalusi6b87a912009-04-17 15:55:08 +030060
61 unsigned int configured;
62 unsigned int rate;
63 unsigned int sample_bits;
64 unsigned int channels;
Peter Ujfalusi6943c922009-05-18 16:02:05 +030065
66 unsigned int sysclk;
67
Peter Ujfalusic96907f2010-03-22 17:46:37 +020068 /* Output (with associated amp) states */
69 u8 hsl_enabled, hsr_enabled;
70 u8 earpiece_enabled;
71 u8 predrivel_enabled, predriver_enabled;
72 u8 carkitl_enabled, carkitr_enabled;
Peter Ujfalusi8b3bca22014-01-03 15:27:52 +020073 u8 ctl_cache[TWL4030_REG_PRECKR_CTL - TWL4030_REG_EAR_CTL + 1];
Peter Ujfalusi01ea6ba2010-07-20 15:49:09 +030074
Peter Ujfalusi182f73f2012-09-10 13:46:31 +030075 struct twl4030_codec_data *pdata;
Peter Ujfalusi73939582009-01-29 14:57:50 +020076};
77
Peter Ujfalusi8b3bca22014-01-03 15:27:52 +020078static void tw4030_init_ctl_cache(struct twl4030_priv *twl4030)
79{
80 int i;
81 u8 byte;
82
83 for (i = TWL4030_REG_EAR_CTL; i <= TWL4030_REG_PRECKR_CTL; i++) {
84 twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &byte, i);
85 twl4030->ctl_cache[i - TWL4030_REG_EAR_CTL] = byte;
86 }
87}
88
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +020089static unsigned int twl4030_read(struct snd_soc_codec *codec, unsigned int reg)
90{
91 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
92 u8 value = 0;
Steve Sakomancc175572008-10-30 21:35:26 -070093
Ian Molton91432e92009-01-17 17:44:23 +000094 if (reg >= TWL4030_CACHEREGNUM)
95 return -EIO;
96
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +020097 switch (reg) {
98 case TWL4030_REG_EAR_CTL:
99 case TWL4030_REG_PREDL_CTL:
100 case TWL4030_REG_PREDR_CTL:
101 case TWL4030_REG_PRECKL_CTL:
102 case TWL4030_REG_PRECKR_CTL:
103 case TWL4030_REG_HS_GAIN_SET:
104 value = twl4030->ctl_cache[reg - TWL4030_REG_EAR_CTL];
105 break;
106 default:
107 twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &value, reg);
108 break;
109 }
Steve Sakomancc175572008-10-30 21:35:26 -0700110
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +0200111 return value;
Steve Sakomancc175572008-10-30 21:35:26 -0700112}
113
Peter Ujfalusib703b502014-01-03 15:27:56 +0200114static bool twl4030_can_write_to_chip(struct twl4030_priv *twl4030,
Peter Ujfalusia8fc4152014-01-03 15:27:49 +0200115 unsigned int reg)
Steve Sakomancc175572008-10-30 21:35:26 -0700116{
Peter Ujfalusia8fc4152014-01-03 15:27:49 +0200117 bool write_to_reg = false;
Peter Ujfalusic96907f2010-03-22 17:46:37 +0200118
Lars-Peter Clausen052901f42013-10-06 13:43:50 +0200119 /* Decide if the given register can be written */
120 switch (reg) {
121 case TWL4030_REG_EAR_CTL:
122 if (twl4030->earpiece_enabled)
Peter Ujfalusia8fc4152014-01-03 15:27:49 +0200123 write_to_reg = true;
Lars-Peter Clausen052901f42013-10-06 13:43:50 +0200124 break;
125 case TWL4030_REG_PREDL_CTL:
126 if (twl4030->predrivel_enabled)
Peter Ujfalusia8fc4152014-01-03 15:27:49 +0200127 write_to_reg = true;
Lars-Peter Clausen052901f42013-10-06 13:43:50 +0200128 break;
129 case TWL4030_REG_PREDR_CTL:
130 if (twl4030->predriver_enabled)
Peter Ujfalusia8fc4152014-01-03 15:27:49 +0200131 write_to_reg = true;
Lars-Peter Clausen052901f42013-10-06 13:43:50 +0200132 break;
133 case TWL4030_REG_PRECKL_CTL:
134 if (twl4030->carkitl_enabled)
Peter Ujfalusia8fc4152014-01-03 15:27:49 +0200135 write_to_reg = true;
Lars-Peter Clausen052901f42013-10-06 13:43:50 +0200136 break;
137 case TWL4030_REG_PRECKR_CTL:
138 if (twl4030->carkitr_enabled)
Peter Ujfalusia8fc4152014-01-03 15:27:49 +0200139 write_to_reg = true;
Lars-Peter Clausen052901f42013-10-06 13:43:50 +0200140 break;
141 case TWL4030_REG_HS_GAIN_SET:
142 if (twl4030->hsl_enabled || twl4030->hsr_enabled)
Peter Ujfalusia8fc4152014-01-03 15:27:49 +0200143 write_to_reg = true;
Lars-Peter Clausen052901f42013-10-06 13:43:50 +0200144 break;
145 default:
146 /* All other register can be written */
Peter Ujfalusia8fc4152014-01-03 15:27:49 +0200147 write_to_reg = true;
Lars-Peter Clausen052901f42013-10-06 13:43:50 +0200148 break;
Peter Ujfalusic96907f2010-03-22 17:46:37 +0200149 }
Peter Ujfalusia8fc4152014-01-03 15:27:49 +0200150
151 return write_to_reg;
152}
153
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200154static int twl4030_write(struct snd_soc_codec *codec, unsigned int reg,
155 unsigned int value)
Peter Ujfalusia8fc4152014-01-03 15:27:49 +0200156{
Peter Ujfalusia450aa62014-01-03 15:27:55 +0200157 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
158
159 /* Update the ctl cache */
160 switch (reg) {
161 case TWL4030_REG_EAR_CTL:
162 case TWL4030_REG_PREDL_CTL:
163 case TWL4030_REG_PREDR_CTL:
164 case TWL4030_REG_PRECKL_CTL:
165 case TWL4030_REG_PRECKR_CTL:
166 case TWL4030_REG_HS_GAIN_SET:
167 twl4030->ctl_cache[reg - TWL4030_REG_EAR_CTL] = value;
168 break;
169 default:
170 break;
171 }
172
Peter Ujfalusib703b502014-01-03 15:27:56 +0200173 if (twl4030_can_write_to_chip(twl4030, reg))
Peter Ujfalusia8fc4152014-01-03 15:27:49 +0200174 return twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, value, reg);
Lars-Peter Clausen052901f42013-10-06 13:43:50 +0200175
Peter Ujfalusic96907f2010-03-22 17:46:37 +0200176 return 0;
Steve Sakomancc175572008-10-30 21:35:26 -0700177}
178
Peter Ujfalusi7e6120c2010-10-25 11:34:23 +0300179static inline void twl4030_wait_ms(int time)
180{
181 if (time < 60) {
182 time *= 1000;
183 usleep_range(time, time + 500);
184 } else {
185 msleep(time);
186 }
187}
188
Peter Ujfalusidb04e2c2009-01-27 11:29:40 +0200189static void twl4030_codec_enable(struct snd_soc_codec *codec, int enable)
Steve Sakomancc175572008-10-30 21:35:26 -0700190{
Mark Brownb2c812e2010-04-14 15:35:19 +0900191 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +0300192 int mode;
Steve Sakomancc175572008-10-30 21:35:26 -0700193
Peter Ujfalusi73939582009-01-29 14:57:50 +0200194 if (enable == twl4030->codec_powered)
195 return;
196
Peter Ujfalusidb04e2c2009-01-27 11:29:40 +0200197 if (enable)
Peter Ujfalusi57fe7252011-05-31 12:02:49 +0300198 mode = twl4030_audio_enable_resource(TWL4030_AUDIO_RES_POWER);
Peter Ujfalusidb04e2c2009-01-27 11:29:40 +0200199 else
Peter Ujfalusi57fe7252011-05-31 12:02:49 +0300200 mode = twl4030_audio_disable_resource(TWL4030_AUDIO_RES_POWER);
Steve Sakomancc175572008-10-30 21:35:26 -0700201
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +0200202 if (mode >= 0)
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +0300203 twl4030->codec_powered = enable;
Steve Sakomancc175572008-10-30 21:35:26 -0700204
205 /* REVISIT: this delay is present in TI sample drivers */
206 /* but there seems to be no TRM requirement for it */
207 udelay(10);
208}
209
Peter Ujfalusi2d6d6492012-09-10 13:46:32 +0300210static void twl4030_setup_pdata_of(struct twl4030_codec_data *pdata,
211 struct device_node *node)
212{
213 int value;
214
215 of_property_read_u32(node, "ti,digimic_delay",
216 &pdata->digimic_delay);
217 of_property_read_u32(node, "ti,ramp_delay_value",
218 &pdata->ramp_delay_value);
219 of_property_read_u32(node, "ti,offset_cncl_path",
220 &pdata->offset_cncl_path);
221 if (!of_property_read_u32(node, "ti,hs_extmute", &value))
222 pdata->hs_extmute = value;
223
224 pdata->hs_extmute_gpio = of_get_named_gpio(node,
225 "ti,hs_extmute_gpio", 0);
226 if (gpio_is_valid(pdata->hs_extmute_gpio))
227 pdata->hs_extmute = 1;
228}
229
230static struct twl4030_codec_data *twl4030_get_pdata(struct snd_soc_codec *codec)
Steve Sakomancc175572008-10-30 21:35:26 -0700231{
Peter Ujfalusi4ae6df52011-05-31 15:21:13 +0300232 struct twl4030_codec_data *pdata = dev_get_platdata(codec->dev);
Peter Ujfalusi2d6d6492012-09-10 13:46:32 +0300233 struct device_node *twl4030_codec_node = NULL;
234
235 twl4030_codec_node = of_find_node_by_name(codec->dev->parent->of_node,
236 "codec");
237
238 if (!pdata && twl4030_codec_node) {
239 pdata = devm_kzalloc(codec->dev,
240 sizeof(struct twl4030_codec_data),
241 GFP_KERNEL);
242 if (!pdata) {
243 dev_err(codec->dev, "Can not allocate memory\n");
244 return NULL;
245 }
246 twl4030_setup_pdata_of(pdata, twl4030_codec_node);
247 }
248
249 return pdata;
250}
251
252static void twl4030_init_chip(struct snd_soc_codec *codec)
253{
254 struct twl4030_codec_data *pdata;
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300255 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
256 u8 reg, byte;
257 int i = 0;
Steve Sakomancc175572008-10-30 21:35:26 -0700258
Peter Ujfalusi2d6d6492012-09-10 13:46:32 +0300259 pdata = twl4030_get_pdata(codec);
260
Peter Ujfalusi5712ded2012-12-31 11:51:46 +0100261 if (pdata && pdata->hs_extmute) {
262 if (gpio_is_valid(pdata->hs_extmute_gpio)) {
263 int ret;
Peter Ujfalusi281ecd12012-09-10 13:46:27 +0300264
Peter Ujfalusi5712ded2012-12-31 11:51:46 +0100265 if (!pdata->hs_extmute_gpio)
266 dev_warn(codec->dev,
267 "Extmute GPIO is 0 is this correct?\n");
Peter Ujfalusi281ecd12012-09-10 13:46:27 +0300268
Peter Ujfalusi5712ded2012-12-31 11:51:46 +0100269 ret = gpio_request_one(pdata->hs_extmute_gpio,
270 GPIOF_OUT_INIT_LOW,
271 "hs_extmute");
272 if (ret) {
273 dev_err(codec->dev,
274 "Failed to get hs_extmute GPIO\n");
275 pdata->hs_extmute_gpio = -1;
276 }
277 } else {
278 u8 pin_mux;
279
280 /* Set TWL4030 GPIO6 as EXTMUTE signal */
281 twl_i2c_read_u8(TWL4030_MODULE_INTBR, &pin_mux,
282 TWL4030_PMBR1_REG);
283 pin_mux &= ~TWL4030_GPIO6_PWM0_MUTE(0x03);
284 pin_mux |= TWL4030_GPIO6_PWM0_MUTE(0x02);
285 twl_i2c_write_u8(TWL4030_MODULE_INTBR, pin_mux,
286 TWL4030_PMBR1_REG);
Peter Ujfalusi281ecd12012-09-10 13:46:27 +0300287 }
288 }
289
Peter Ujfalusi8b3bca22014-01-03 15:27:52 +0200290 /* Initialize the local ctl register cache */
291 tw4030_init_ctl_cache(twl4030);
292
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300293 /* anti-pop when changing analog gain */
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +0200294 reg = twl4030_read(codec, TWL4030_REG_MISC_SET_1);
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300295 twl4030_write(codec, TWL4030_REG_MISC_SET_1,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200296 reg | TWL4030_SMOOTH_ANAVOL_EN);
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300297
298 twl4030_write(codec, TWL4030_REG_OPTION,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200299 TWL4030_ATXL1_EN | TWL4030_ATXR1_EN |
300 TWL4030_ARXL2_EN | TWL4030_ARXR2_EN);
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300301
Peter Ujfalusi3c36cc62010-05-26 11:38:19 +0300302 /* REG_ARXR2_APGA_CTL reset according to the TRM: 0dB, DA_EN */
303 twl4030_write(codec, TWL4030_REG_ARXR2_APGA_CTL, 0x32);
304
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300305 /* Machine dependent setup */
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000306 if (!pdata)
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300307 return;
308
Peter Ujfalusi182f73f2012-09-10 13:46:31 +0300309 twl4030->pdata = pdata;
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300310
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +0200311 reg = twl4030_read(codec, TWL4030_REG_HS_POPN_SET);
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300312 reg &= ~TWL4030_RAMP_DELAY;
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000313 reg |= (pdata->ramp_delay_value << 2);
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +0200314 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, reg);
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300315
316 /* initiate offset cancellation */
317 twl4030_codec_enable(codec, 1);
318
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +0200319 reg = twl4030_read(codec, TWL4030_REG_ANAMICL);
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300320 reg &= ~TWL4030_OFFSET_CNCL_SEL;
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000321 reg |= pdata->offset_cncl_path;
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300322 twl4030_write(codec, TWL4030_REG_ANAMICL,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200323 reg | TWL4030_CNCL_OFFSET_START);
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300324
Peter Ujfalusi7e6120c2010-10-25 11:34:23 +0300325 /*
326 * Wait for offset cancellation to complete.
327 * Since this takes a while, do not slam the i2c.
328 * Start polling the status after ~20ms.
329 */
330 msleep(20);
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300331 do {
Peter Ujfalusi7e6120c2010-10-25 11:34:23 +0300332 usleep_range(1000, 2000);
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +0200333 twl_set_regcache_bypass(TWL4030_MODULE_AUDIO_VOICE, true);
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300334 twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &byte,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200335 TWL4030_REG_ANAMICL);
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +0200336 twl_set_regcache_bypass(TWL4030_MODULE_AUDIO_VOICE, false);
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300337 } while ((i++ < 100) &&
338 ((byte & TWL4030_CNCL_OFFSET_START) ==
339 TWL4030_CNCL_OFFSET_START));
340
Peter Ujfalusidb04e2c2009-01-27 11:29:40 +0200341 twl4030_codec_enable(codec, 0);
Steve Sakomancc175572008-10-30 21:35:26 -0700342}
343
Peter Ujfalusi2845fa12009-10-28 10:57:05 +0200344static void twl4030_apll_enable(struct snd_soc_codec *codec, int enable)
Peter Ujfalusi73939582009-01-29 14:57:50 +0200345{
Mark Brownb2c812e2010-04-14 15:35:19 +0900346 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Peter Ujfalusi73939582009-01-29 14:57:50 +0200347
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +0300348 if (enable) {
349 twl4030->apll_enabled++;
350 if (twl4030->apll_enabled == 1)
Sachin Kamatbb17bc72014-07-01 09:59:31 +0530351 twl4030_audio_enable_resource(
Peter Ujfalusi57fe7252011-05-31 12:02:49 +0300352 TWL4030_AUDIO_RES_APLL);
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +0300353 } else {
354 twl4030->apll_enabled--;
355 if (!twl4030->apll_enabled)
Sachin Kamatbb17bc72014-07-01 09:59:31 +0530356 twl4030_audio_disable_resource(
Peter Ujfalusi57fe7252011-05-31 12:02:49 +0300357 TWL4030_AUDIO_RES_APLL);
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +0300358 }
Peter Ujfalusi73939582009-01-29 14:57:50 +0200359}
360
Peter Ujfalusi5e98a462008-12-09 12:35:47 +0200361/* Earpiece */
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900362static const struct snd_kcontrol_new twl4030_dapm_earpiece_controls[] = {
363 SOC_DAPM_SINGLE("Voice", TWL4030_REG_EAR_CTL, 0, 1, 0),
364 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_EAR_CTL, 1, 1, 0),
365 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_EAR_CTL, 2, 1, 0),
366 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_EAR_CTL, 3, 1, 0),
367};
Peter Ujfalusi5e98a462008-12-09 12:35:47 +0200368
Peter Ujfalusi2a6f5c582008-12-09 12:35:48 +0200369/* PreDrive Left */
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900370static const struct snd_kcontrol_new twl4030_dapm_predrivel_controls[] = {
371 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PREDL_CTL, 0, 1, 0),
372 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_PREDL_CTL, 1, 1, 0),
373 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PREDL_CTL, 2, 1, 0),
374 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PREDL_CTL, 3, 1, 0),
375};
Peter Ujfalusi2a6f5c582008-12-09 12:35:48 +0200376
377/* PreDrive Right */
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900378static const struct snd_kcontrol_new twl4030_dapm_predriver_controls[] = {
379 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PREDR_CTL, 0, 1, 0),
380 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_PREDR_CTL, 1, 1, 0),
381 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PREDR_CTL, 2, 1, 0),
382 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PREDR_CTL, 3, 1, 0),
383};
Peter Ujfalusi2a6f5c582008-12-09 12:35:48 +0200384
Peter Ujfalusidfad21a2008-12-09 12:35:49 +0200385/* Headset Left */
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900386static const struct snd_kcontrol_new twl4030_dapm_hsol_controls[] = {
387 SOC_DAPM_SINGLE("Voice", TWL4030_REG_HS_SEL, 0, 1, 0),
388 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_HS_SEL, 1, 1, 0),
389 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_HS_SEL, 2, 1, 0),
390};
Peter Ujfalusidfad21a2008-12-09 12:35:49 +0200391
392/* Headset Right */
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900393static const struct snd_kcontrol_new twl4030_dapm_hsor_controls[] = {
394 SOC_DAPM_SINGLE("Voice", TWL4030_REG_HS_SEL, 3, 1, 0),
395 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_HS_SEL, 4, 1, 0),
396 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_HS_SEL, 5, 1, 0),
397};
Peter Ujfalusidfad21a2008-12-09 12:35:49 +0200398
Peter Ujfalusi5152d8c2008-12-09 12:35:50 +0200399/* Carkit Left */
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900400static const struct snd_kcontrol_new twl4030_dapm_carkitl_controls[] = {
401 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PRECKL_CTL, 0, 1, 0),
402 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_PRECKL_CTL, 1, 1, 0),
403 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PRECKL_CTL, 2, 1, 0),
404};
Peter Ujfalusi5152d8c2008-12-09 12:35:50 +0200405
406/* Carkit Right */
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900407static const struct snd_kcontrol_new twl4030_dapm_carkitr_controls[] = {
408 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PRECKR_CTL, 0, 1, 0),
409 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_PRECKR_CTL, 1, 1, 0),
410 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PRECKR_CTL, 2, 1, 0),
411};
Peter Ujfalusi5152d8c2008-12-09 12:35:50 +0200412
Peter Ujfalusidf339802008-12-09 12:35:51 +0200413/* Handsfree Left */
414static const char *twl4030_handsfreel_texts[] =
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900415 {"Voice", "AudioL1", "AudioL2", "AudioR2"};
Peter Ujfalusidf339802008-12-09 12:35:51 +0200416
Takashi Iwai9f04fba2014-02-18 10:28:25 +0100417static SOC_ENUM_SINGLE_DECL(twl4030_handsfreel_enum,
418 TWL4030_REG_HFL_CTL, 0,
419 twl4030_handsfreel_texts);
Peter Ujfalusidf339802008-12-09 12:35:51 +0200420
421static const struct snd_kcontrol_new twl4030_dapm_handsfreel_control =
422SOC_DAPM_ENUM("Route", twl4030_handsfreel_enum);
423
Peter Ujfalusi0f89bdc2009-05-25 11:12:13 +0300424/* Handsfree Left virtual mute */
425static const struct snd_kcontrol_new twl4030_dapm_handsfreelmute_control =
Lars-Peter Clausen052901f42013-10-06 13:43:50 +0200426 SOC_DAPM_SINGLE_VIRT("Switch", 1);
Peter Ujfalusi0f89bdc2009-05-25 11:12:13 +0300427
Peter Ujfalusidf339802008-12-09 12:35:51 +0200428/* Handsfree Right */
429static const char *twl4030_handsfreer_texts[] =
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900430 {"Voice", "AudioR1", "AudioR2", "AudioL2"};
Peter Ujfalusidf339802008-12-09 12:35:51 +0200431
Takashi Iwai9f04fba2014-02-18 10:28:25 +0100432static SOC_ENUM_SINGLE_DECL(twl4030_handsfreer_enum,
433 TWL4030_REG_HFR_CTL, 0,
434 twl4030_handsfreer_texts);
Peter Ujfalusidf339802008-12-09 12:35:51 +0200435
436static const struct snd_kcontrol_new twl4030_dapm_handsfreer_control =
437SOC_DAPM_ENUM("Route", twl4030_handsfreer_enum);
438
Peter Ujfalusi0f89bdc2009-05-25 11:12:13 +0300439/* Handsfree Right virtual mute */
440static const struct snd_kcontrol_new twl4030_dapm_handsfreermute_control =
Lars-Peter Clausen052901f42013-10-06 13:43:50 +0200441 SOC_DAPM_SINGLE_VIRT("Switch", 1);
Peter Ujfalusi0f89bdc2009-05-25 11:12:13 +0300442
Peter Ujfalusi376f7832009-05-05 08:55:47 +0300443/* Vibra */
444/* Vibra audio path selection */
445static const char *twl4030_vibra_texts[] =
446 {"AudioL1", "AudioR1", "AudioL2", "AudioR2"};
447
Takashi Iwai9f04fba2014-02-18 10:28:25 +0100448static SOC_ENUM_SINGLE_DECL(twl4030_vibra_enum,
449 TWL4030_REG_VIBRA_CTL, 2,
450 twl4030_vibra_texts);
Peter Ujfalusi376f7832009-05-05 08:55:47 +0300451
452static const struct snd_kcontrol_new twl4030_dapm_vibra_control =
453SOC_DAPM_ENUM("Route", twl4030_vibra_enum);
454
455/* Vibra path selection: local vibrator (PWM) or audio driven */
456static const char *twl4030_vibrapath_texts[] =
457 {"Local vibrator", "Audio"};
458
Takashi Iwai9f04fba2014-02-18 10:28:25 +0100459static SOC_ENUM_SINGLE_DECL(twl4030_vibrapath_enum,
460 TWL4030_REG_VIBRA_CTL, 4,
461 twl4030_vibrapath_texts);
Peter Ujfalusi376f7832009-05-05 08:55:47 +0300462
463static const struct snd_kcontrol_new twl4030_dapm_vibrapath_control =
464SOC_DAPM_ENUM("Route", twl4030_vibrapath_enum);
465
Peter Ujfalusi276c6222008-12-31 10:08:38 +0200466/* Left analog microphone selection */
Joonyoung Shim97b80962009-05-11 20:36:08 +0900467static const struct snd_kcontrol_new twl4030_dapm_analoglmic_controls[] = {
Peter Ujfalusi90289352009-08-14 08:44:00 +0300468 SOC_DAPM_SINGLE("Main Mic Capture Switch",
469 TWL4030_REG_ANAMICL, 0, 1, 0),
470 SOC_DAPM_SINGLE("Headset Mic Capture Switch",
471 TWL4030_REG_ANAMICL, 1, 1, 0),
472 SOC_DAPM_SINGLE("AUXL Capture Switch",
473 TWL4030_REG_ANAMICL, 2, 1, 0),
474 SOC_DAPM_SINGLE("Carkit Mic Capture Switch",
475 TWL4030_REG_ANAMICL, 3, 1, 0),
Joonyoung Shim97b80962009-05-11 20:36:08 +0900476};
Peter Ujfalusi276c6222008-12-31 10:08:38 +0200477
478/* Right analog microphone selection */
Joonyoung Shim97b80962009-05-11 20:36:08 +0900479static const struct snd_kcontrol_new twl4030_dapm_analogrmic_controls[] = {
Peter Ujfalusi90289352009-08-14 08:44:00 +0300480 SOC_DAPM_SINGLE("Sub Mic Capture Switch", TWL4030_REG_ANAMICR, 0, 1, 0),
481 SOC_DAPM_SINGLE("AUXR Capture Switch", TWL4030_REG_ANAMICR, 2, 1, 0),
Joonyoung Shim97b80962009-05-11 20:36:08 +0900482};
Peter Ujfalusi276c6222008-12-31 10:08:38 +0200483
484/* TX1 L/R Analog/Digital microphone selection */
485static const char *twl4030_micpathtx1_texts[] =
486 {"Analog", "Digimic0"};
487
Takashi Iwai9f04fba2014-02-18 10:28:25 +0100488static SOC_ENUM_SINGLE_DECL(twl4030_micpathtx1_enum,
489 TWL4030_REG_ADCMICSEL, 0,
490 twl4030_micpathtx1_texts);
Peter Ujfalusi276c6222008-12-31 10:08:38 +0200491
492static const struct snd_kcontrol_new twl4030_dapm_micpathtx1_control =
493SOC_DAPM_ENUM("Route", twl4030_micpathtx1_enum);
494
495/* TX2 L/R Analog/Digital microphone selection */
496static const char *twl4030_micpathtx2_texts[] =
497 {"Analog", "Digimic1"};
498
Takashi Iwai9f04fba2014-02-18 10:28:25 +0100499static SOC_ENUM_SINGLE_DECL(twl4030_micpathtx2_enum,
500 TWL4030_REG_ADCMICSEL, 2,
501 twl4030_micpathtx2_texts);
Peter Ujfalusi276c6222008-12-31 10:08:38 +0200502
503static const struct snd_kcontrol_new twl4030_dapm_micpathtx2_control =
504SOC_DAPM_ENUM("Route", twl4030_micpathtx2_enum);
505
Peter Ujfalusi73939582009-01-29 14:57:50 +0200506/* Analog bypass for AudioR1 */
507static const struct snd_kcontrol_new twl4030_dapm_abypassr1_control =
508 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXR1_APGA_CTL, 2, 1, 0);
509
510/* Analog bypass for AudioL1 */
511static const struct snd_kcontrol_new twl4030_dapm_abypassl1_control =
512 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXL1_APGA_CTL, 2, 1, 0);
513
514/* Analog bypass for AudioR2 */
515static const struct snd_kcontrol_new twl4030_dapm_abypassr2_control =
516 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXR2_APGA_CTL, 2, 1, 0);
517
518/* Analog bypass for AudioL2 */
519static const struct snd_kcontrol_new twl4030_dapm_abypassl2_control =
520 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXL2_APGA_CTL, 2, 1, 0);
521
Lopez Cruz, Misaelfcd274a2009-04-30 21:47:22 -0500522/* Analog bypass for Voice */
523static const struct snd_kcontrol_new twl4030_dapm_abypassv_control =
524 SOC_DAPM_SINGLE("Switch", TWL4030_REG_VDL_APGA_CTL, 2, 1, 0);
525
Peter Ujfalusi8b0d3152010-07-12 11:50:06 +0300526/* Digital bypass gain, mute instead of -30dB */
Peter Ujfalusi6bab83f2009-02-18 14:39:05 +0200527static const unsigned int twl4030_dapm_dbypass_tlv[] = {
Peter Ujfalusi8b0d3152010-07-12 11:50:06 +0300528 TLV_DB_RANGE_HEAD(3),
529 0, 1, TLV_DB_SCALE_ITEM(-3000, 600, 1),
530 2, 3, TLV_DB_SCALE_ITEM(-2400, 0, 0),
Peter Ujfalusi6bab83f2009-02-18 14:39:05 +0200531 4, 7, TLV_DB_SCALE_ITEM(-1800, 600, 0),
532};
533
534/* Digital bypass left (TX1L -> RX2L) */
535static const struct snd_kcontrol_new twl4030_dapm_dbypassl_control =
536 SOC_DAPM_SINGLE_TLV("Volume",
537 TWL4030_REG_ATX2ARXPGA, 3, 7, 0,
538 twl4030_dapm_dbypass_tlv);
539
540/* Digital bypass right (TX1R -> RX2R) */
541static const struct snd_kcontrol_new twl4030_dapm_dbypassr_control =
542 SOC_DAPM_SINGLE_TLV("Volume",
543 TWL4030_REG_ATX2ARXPGA, 0, 7, 0,
544 twl4030_dapm_dbypass_tlv);
545
Lopez Cruz, Misaelee8f6892009-04-30 21:48:08 -0500546/*
547 * Voice Sidetone GAIN volume control:
548 * from -51 to -10 dB in 1 dB steps (mute instead of -51 dB)
549 */
550static DECLARE_TLV_DB_SCALE(twl4030_dapm_dbypassv_tlv, -5100, 100, 1);
551
552/* Digital bypass voice: sidetone (VUL -> VDL)*/
553static const struct snd_kcontrol_new twl4030_dapm_dbypassv_control =
554 SOC_DAPM_SINGLE_TLV("Volume",
555 TWL4030_REG_VSTPGA, 0, 0x29, 0,
556 twl4030_dapm_dbypassv_tlv);
557
Peter Ujfalusi9008adf2009-08-13 15:59:34 +0300558/*
559 * Output PGA builder:
560 * Handle the muting and unmuting of the given output (turning off the
561 * amplifier associated with the output pin)
Peter Ujfalusic96907f2010-03-22 17:46:37 +0200562 * On mute bypass the reg_cache and write 0 to the register
563 * On unmute: restore the register content from the reg_cache
Peter Ujfalusi9008adf2009-08-13 15:59:34 +0300564 * Outputs handled in this way: Earpiece, PreDrivL/R, CarkitL/R
565 */
566#define TWL4030_OUTPUT_PGA(pin_name, reg, mask) \
567static int pin_name##pga_event(struct snd_soc_dapm_widget *w, \
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200568 struct snd_kcontrol *kcontrol, int event) \
Peter Ujfalusi9008adf2009-08-13 15:59:34 +0300569{ \
Mark Brownb2c812e2010-04-14 15:35:19 +0900570 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(w->codec); \
Peter Ujfalusi9008adf2009-08-13 15:59:34 +0300571 \
572 switch (event) { \
573 case SND_SOC_DAPM_POST_PMU: \
Peter Ujfalusic96907f2010-03-22 17:46:37 +0200574 twl4030->pin_name##_enabled = 1; \
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +0200575 twl4030_write(w->codec, reg, twl4030_read(w->codec, reg)); \
Peter Ujfalusi9008adf2009-08-13 15:59:34 +0300576 break; \
577 case SND_SOC_DAPM_POST_PMD: \
Peter Ujfalusic96907f2010-03-22 17:46:37 +0200578 twl4030->pin_name##_enabled = 0; \
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200579 twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, 0, reg); \
Peter Ujfalusi9008adf2009-08-13 15:59:34 +0300580 break; \
581 } \
582 return 0; \
583}
584
585TWL4030_OUTPUT_PGA(earpiece, TWL4030_REG_EAR_CTL, TWL4030_EAR_GAIN);
586TWL4030_OUTPUT_PGA(predrivel, TWL4030_REG_PREDL_CTL, TWL4030_PREDL_GAIN);
587TWL4030_OUTPUT_PGA(predriver, TWL4030_REG_PREDR_CTL, TWL4030_PREDR_GAIN);
588TWL4030_OUTPUT_PGA(carkitl, TWL4030_REG_PRECKL_CTL, TWL4030_PRECKL_GAIN);
589TWL4030_OUTPUT_PGA(carkitr, TWL4030_REG_PRECKR_CTL, TWL4030_PRECKR_GAIN);
590
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300591static void handsfree_ramp(struct snd_soc_codec *codec, int reg, int ramp)
Stanley.Miao49d92c72008-12-11 23:28:10 +0800592{
Stanley.Miao49d92c72008-12-11 23:28:10 +0800593 unsigned char hs_ctl;
594
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +0200595 hs_ctl = twl4030_read(codec, reg);
Stanley.Miao49d92c72008-12-11 23:28:10 +0800596
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300597 if (ramp) {
598 /* HF ramp-up */
599 hs_ctl |= TWL4030_HF_CTL_REF_EN;
600 twl4030_write(codec, reg, hs_ctl);
601 udelay(10);
Stanley.Miao49d92c72008-12-11 23:28:10 +0800602 hs_ctl |= TWL4030_HF_CTL_RAMP_EN;
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300603 twl4030_write(codec, reg, hs_ctl);
604 udelay(40);
Stanley.Miao49d92c72008-12-11 23:28:10 +0800605 hs_ctl |= TWL4030_HF_CTL_LOOP_EN;
Stanley.Miao49d92c72008-12-11 23:28:10 +0800606 hs_ctl |= TWL4030_HF_CTL_HB_EN;
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300607 twl4030_write(codec, reg, hs_ctl);
Stanley.Miao49d92c72008-12-11 23:28:10 +0800608 } else {
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300609 /* HF ramp-down */
610 hs_ctl &= ~TWL4030_HF_CTL_LOOP_EN;
611 hs_ctl &= ~TWL4030_HF_CTL_HB_EN;
612 twl4030_write(codec, reg, hs_ctl);
613 hs_ctl &= ~TWL4030_HF_CTL_RAMP_EN;
614 twl4030_write(codec, reg, hs_ctl);
615 udelay(40);
616 hs_ctl &= ~TWL4030_HF_CTL_REF_EN;
617 twl4030_write(codec, reg, hs_ctl);
Stanley.Miao49d92c72008-12-11 23:28:10 +0800618 }
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300619}
Stanley.Miao49d92c72008-12-11 23:28:10 +0800620
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300621static int handsfreelpga_event(struct snd_soc_dapm_widget *w,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200622 struct snd_kcontrol *kcontrol, int event)
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300623{
624 switch (event) {
625 case SND_SOC_DAPM_POST_PMU:
626 handsfree_ramp(w->codec, TWL4030_REG_HFL_CTL, 1);
627 break;
628 case SND_SOC_DAPM_POST_PMD:
629 handsfree_ramp(w->codec, TWL4030_REG_HFL_CTL, 0);
630 break;
631 }
632 return 0;
633}
634
635static int handsfreerpga_event(struct snd_soc_dapm_widget *w,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200636 struct snd_kcontrol *kcontrol, int event)
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300637{
638 switch (event) {
639 case SND_SOC_DAPM_POST_PMU:
640 handsfree_ramp(w->codec, TWL4030_REG_HFR_CTL, 1);
641 break;
642 case SND_SOC_DAPM_POST_PMD:
643 handsfree_ramp(w->codec, TWL4030_REG_HFR_CTL, 0);
644 break;
645 }
Stanley.Miao49d92c72008-12-11 23:28:10 +0800646 return 0;
647}
648
Jari Vanhala86139a12009-10-29 11:58:09 +0200649static int vibramux_event(struct snd_soc_dapm_widget *w,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200650 struct snd_kcontrol *kcontrol, int event)
Jari Vanhala86139a12009-10-29 11:58:09 +0200651{
652 twl4030_write(w->codec, TWL4030_REG_VIBRA_SET, 0xff);
653 return 0;
654}
655
Peter Ujfalusi7729cf72009-10-29 11:58:10 +0200656static int apll_event(struct snd_soc_dapm_widget *w,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200657 struct snd_kcontrol *kcontrol, int event)
Peter Ujfalusi7729cf72009-10-29 11:58:10 +0200658{
659 switch (event) {
660 case SND_SOC_DAPM_PRE_PMU:
661 twl4030_apll_enable(w->codec, 1);
662 break;
663 case SND_SOC_DAPM_POST_PMD:
664 twl4030_apll_enable(w->codec, 0);
665 break;
666 }
667 return 0;
668}
669
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +0300670static int aif_event(struct snd_soc_dapm_widget *w,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200671 struct snd_kcontrol *kcontrol, int event)
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +0300672{
673 u8 audio_if;
674
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +0200675 audio_if = twl4030_read(w->codec, TWL4030_REG_AUDIO_IF);
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +0300676 switch (event) {
677 case SND_SOC_DAPM_PRE_PMU:
678 /* Enable AIF */
679 /* enable the PLL before we use it to clock the DAI */
680 twl4030_apll_enable(w->codec, 1);
681
682 twl4030_write(w->codec, TWL4030_REG_AUDIO_IF,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200683 audio_if | TWL4030_AIF_EN);
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +0300684 break;
685 case SND_SOC_DAPM_POST_PMD:
686 /* disable the DAI before we stop it's source PLL */
687 twl4030_write(w->codec, TWL4030_REG_AUDIO_IF,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200688 audio_if & ~TWL4030_AIF_EN);
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +0300689 twl4030_apll_enable(w->codec, 0);
690 break;
691 }
692 return 0;
693}
694
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300695static void headset_ramp(struct snd_soc_codec *codec, int ramp)
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200696{
697 unsigned char hs_gain, hs_pop;
Mark Brownb2c812e2010-04-14 15:35:19 +0900698 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Peter Ujfalusi182f73f2012-09-10 13:46:31 +0300699 struct twl4030_codec_data *pdata = twl4030->pdata;
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300700 /* Base values for ramp delay calculation: 2^19 - 2^26 */
701 unsigned int ramp_base[] = {524288, 1048576, 2097152, 4194304,
702 8388608, 16777216, 33554432, 67108864};
Peter Ujfalusi7e6120c2010-10-25 11:34:23 +0300703 unsigned int delay;
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200704
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +0200705 hs_gain = twl4030_read(codec, TWL4030_REG_HS_GAIN_SET);
706 hs_pop = twl4030_read(codec, TWL4030_REG_HS_POPN_SET);
Peter Ujfalusi7e6120c2010-10-25 11:34:23 +0300707 delay = (ramp_base[(hs_pop & TWL4030_RAMP_DELAY) >> 2] /
708 twl4030->sysclk) + 1;
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200709
Candelaria Villareal, Jorge4e49ffd2009-07-01 19:17:43 -0500710 /* Enable external mute control, this dramatically reduces
711 * the pop-noise */
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000712 if (pdata && pdata->hs_extmute) {
Peter Ujfalusi281ecd12012-09-10 13:46:27 +0300713 if (gpio_is_valid(pdata->hs_extmute_gpio)) {
714 gpio_set_value(pdata->hs_extmute_gpio, 1);
Candelaria Villareal, Jorge4e49ffd2009-07-01 19:17:43 -0500715 } else {
716 hs_pop |= TWL4030_EXTMUTE;
717 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
718 }
719 }
720
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300721 if (ramp) {
722 /* Headset ramp-up according to the TRM */
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200723 hs_pop |= TWL4030_VMID_EN;
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300724 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
Peter Ujfalusic96907f2010-03-22 17:46:37 +0200725 /* Actually write to the register */
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200726 twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, hs_gain,
727 TWL4030_REG_HS_GAIN_SET);
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200728 hs_pop |= TWL4030_RAMP_EN;
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300729 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
Candelaria Villareal, Jorge4e49ffd2009-07-01 19:17:43 -0500730 /* Wait ramp delay time + 1, so the VMID can settle */
Peter Ujfalusi7e6120c2010-10-25 11:34:23 +0300731 twl4030_wait_ms(delay);
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300732 } else {
733 /* Headset ramp-down _not_ according to
734 * the TRM, but in a way that it is working */
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200735 hs_pop &= ~TWL4030_RAMP_EN;
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300736 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
737 /* Wait ramp delay time + 1, so the VMID can settle */
Peter Ujfalusi7e6120c2010-10-25 11:34:23 +0300738 twl4030_wait_ms(delay);
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200739 /* Bypass the reg_cache to mute the headset */
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200740 twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, hs_gain & (~0x0f),
741 TWL4030_REG_HS_GAIN_SET);
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300742
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200743 hs_pop &= ~TWL4030_VMID_EN;
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300744 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
745 }
Candelaria Villareal, Jorge4e49ffd2009-07-01 19:17:43 -0500746
747 /* Disable external mute */
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000748 if (pdata && pdata->hs_extmute) {
Peter Ujfalusi281ecd12012-09-10 13:46:27 +0300749 if (gpio_is_valid(pdata->hs_extmute_gpio)) {
750 gpio_set_value(pdata->hs_extmute_gpio, 0);
Candelaria Villareal, Jorge4e49ffd2009-07-01 19:17:43 -0500751 } else {
752 hs_pop &= ~TWL4030_EXTMUTE;
753 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
754 }
755 }
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300756}
757
758static int headsetlpga_event(struct snd_soc_dapm_widget *w,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200759 struct snd_kcontrol *kcontrol, int event)
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300760{
Mark Brownb2c812e2010-04-14 15:35:19 +0900761 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(w->codec);
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300762
763 switch (event) {
764 case SND_SOC_DAPM_POST_PMU:
765 /* Do the ramp-up only once */
766 if (!twl4030->hsr_enabled)
767 headset_ramp(w->codec, 1);
768
769 twl4030->hsl_enabled = 1;
770 break;
771 case SND_SOC_DAPM_POST_PMD:
772 /* Do the ramp-down only if both headsetL/R is disabled */
773 if (!twl4030->hsr_enabled)
774 headset_ramp(w->codec, 0);
775
776 twl4030->hsl_enabled = 0;
777 break;
778 }
779 return 0;
780}
781
782static int headsetrpga_event(struct snd_soc_dapm_widget *w,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200783 struct snd_kcontrol *kcontrol, int event)
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300784{
Mark Brownb2c812e2010-04-14 15:35:19 +0900785 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(w->codec);
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300786
787 switch (event) {
788 case SND_SOC_DAPM_POST_PMU:
789 /* Do the ramp-up only once */
790 if (!twl4030->hsl_enabled)
791 headset_ramp(w->codec, 1);
792
793 twl4030->hsr_enabled = 1;
794 break;
795 case SND_SOC_DAPM_POST_PMD:
796 /* Do the ramp-down only if both headsetL/R is disabled */
797 if (!twl4030->hsl_enabled)
798 headset_ramp(w->codec, 0);
799
800 twl4030->hsr_enabled = 0;
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200801 break;
802 }
803 return 0;
804}
805
Peter Ujfalusi01ea6ba2010-07-20 15:49:09 +0300806static int digimic_event(struct snd_soc_dapm_widget *w,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200807 struct snd_kcontrol *kcontrol, int event)
Peter Ujfalusi01ea6ba2010-07-20 15:49:09 +0300808{
809 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(w->codec);
Peter Ujfalusi182f73f2012-09-10 13:46:31 +0300810 struct twl4030_codec_data *pdata = twl4030->pdata;
Peter Ujfalusi01ea6ba2010-07-20 15:49:09 +0300811
Peter Ujfalusi182f73f2012-09-10 13:46:31 +0300812 if (pdata && pdata->digimic_delay)
813 twl4030_wait_ms(pdata->digimic_delay);
Peter Ujfalusi01ea6ba2010-07-20 15:49:09 +0300814 return 0;
815}
816
Peter Ujfalusic10b82c2008-11-24 13:49:35 +0200817/*
Peter Ujfalusib0bd53a2008-11-24 13:49:38 +0200818 * Some of the gain controls in TWL (mostly those which are associated with
819 * the outputs) are implemented in an interesting way:
820 * 0x0 : Power down (mute)
821 * 0x1 : 6dB
822 * 0x2 : 0 dB
823 * 0x3 : -6 dB
824 * Inverting not going to help with these.
825 * Custom volsw and volsw_2r get/put functions to handle these gain bits.
826 */
Peter Ujfalusib0bd53a2008-11-24 13:49:38 +0200827static int snd_soc_get_volsw_twl4030(struct snd_kcontrol *kcontrol,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200828 struct snd_ctl_elem_value *ucontrol)
Peter Ujfalusib0bd53a2008-11-24 13:49:38 +0200829{
830 struct soc_mixer_control *mc =
831 (struct soc_mixer_control *)kcontrol->private_value;
Lars-Peter Clausenea53bf72014-03-18 09:02:04 +0100832 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
Peter Ujfalusib0bd53a2008-11-24 13:49:38 +0200833 unsigned int reg = mc->reg;
834 unsigned int shift = mc->shift;
835 unsigned int rshift = mc->rshift;
836 int max = mc->max;
837 int mask = (1 << fls(max)) - 1;
838
839 ucontrol->value.integer.value[0] =
840 (snd_soc_read(codec, reg) >> shift) & mask;
841 if (ucontrol->value.integer.value[0])
842 ucontrol->value.integer.value[0] =
843 max + 1 - ucontrol->value.integer.value[0];
844
845 if (shift != rshift) {
846 ucontrol->value.integer.value[1] =
847 (snd_soc_read(codec, reg) >> rshift) & mask;
848 if (ucontrol->value.integer.value[1])
849 ucontrol->value.integer.value[1] =
850 max + 1 - ucontrol->value.integer.value[1];
851 }
852
853 return 0;
854}
855
856static int snd_soc_put_volsw_twl4030(struct snd_kcontrol *kcontrol,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200857 struct snd_ctl_elem_value *ucontrol)
Peter Ujfalusib0bd53a2008-11-24 13:49:38 +0200858{
859 struct soc_mixer_control *mc =
860 (struct soc_mixer_control *)kcontrol->private_value;
Lars-Peter Clausenea53bf72014-03-18 09:02:04 +0100861 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
Peter Ujfalusib0bd53a2008-11-24 13:49:38 +0200862 unsigned int reg = mc->reg;
863 unsigned int shift = mc->shift;
864 unsigned int rshift = mc->rshift;
865 int max = mc->max;
866 int mask = (1 << fls(max)) - 1;
867 unsigned short val, val2, val_mask;
868
869 val = (ucontrol->value.integer.value[0] & mask);
870
871 val_mask = mask << shift;
872 if (val)
873 val = max + 1 - val;
874 val = val << shift;
875 if (shift != rshift) {
876 val2 = (ucontrol->value.integer.value[1] & mask);
877 val_mask |= mask << rshift;
878 if (val2)
879 val2 = max + 1 - val2;
880 val |= val2 << rshift;
881 }
882 return snd_soc_update_bits(codec, reg, val_mask, val);
883}
884
885static int snd_soc_get_volsw_r2_twl4030(struct snd_kcontrol *kcontrol,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200886 struct snd_ctl_elem_value *ucontrol)
Peter Ujfalusib0bd53a2008-11-24 13:49:38 +0200887{
888 struct soc_mixer_control *mc =
889 (struct soc_mixer_control *)kcontrol->private_value;
Lars-Peter Clausenea53bf72014-03-18 09:02:04 +0100890 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
Peter Ujfalusib0bd53a2008-11-24 13:49:38 +0200891 unsigned int reg = mc->reg;
892 unsigned int reg2 = mc->rreg;
893 unsigned int shift = mc->shift;
894 int max = mc->max;
895 int mask = (1<<fls(max))-1;
896
897 ucontrol->value.integer.value[0] =
898 (snd_soc_read(codec, reg) >> shift) & mask;
899 ucontrol->value.integer.value[1] =
900 (snd_soc_read(codec, reg2) >> shift) & mask;
901
902 if (ucontrol->value.integer.value[0])
903 ucontrol->value.integer.value[0] =
904 max + 1 - ucontrol->value.integer.value[0];
905 if (ucontrol->value.integer.value[1])
906 ucontrol->value.integer.value[1] =
907 max + 1 - ucontrol->value.integer.value[1];
908
909 return 0;
910}
911
912static int snd_soc_put_volsw_r2_twl4030(struct snd_kcontrol *kcontrol,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200913 struct snd_ctl_elem_value *ucontrol)
Peter Ujfalusib0bd53a2008-11-24 13:49:38 +0200914{
915 struct soc_mixer_control *mc =
916 (struct soc_mixer_control *)kcontrol->private_value;
Lars-Peter Clausenea53bf72014-03-18 09:02:04 +0100917 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
Peter Ujfalusib0bd53a2008-11-24 13:49:38 +0200918 unsigned int reg = mc->reg;
919 unsigned int reg2 = mc->rreg;
920 unsigned int shift = mc->shift;
921 int max = mc->max;
922 int mask = (1 << fls(max)) - 1;
923 int err;
924 unsigned short val, val2, val_mask;
925
926 val_mask = mask << shift;
927 val = (ucontrol->value.integer.value[0] & mask);
928 val2 = (ucontrol->value.integer.value[1] & mask);
929
930 if (val)
931 val = max + 1 - val;
932 if (val2)
933 val2 = max + 1 - val2;
934
935 val = val << shift;
936 val2 = val2 << shift;
937
938 err = snd_soc_update_bits(codec, reg, val_mask, val);
939 if (err < 0)
940 return err;
941
942 err = snd_soc_update_bits(codec, reg2, val_mask, val2);
943 return err;
944}
945
Lopez Cruz, Misaelb74bd402009-05-18 11:52:55 -0500946/* Codec operation modes */
947static const char *twl4030_op_modes_texts[] = {
948 "Option 2 (voice/audio)", "Option 1 (audio)"
949};
950
Takashi Iwai9f04fba2014-02-18 10:28:25 +0100951static SOC_ENUM_SINGLE_DECL(twl4030_op_modes_enum,
952 TWL4030_REG_CODEC_MODE, 0,
953 twl4030_op_modes_texts);
Lopez Cruz, Misaelb74bd402009-05-18 11:52:55 -0500954
Mark Brown423c2382009-06-20 13:54:02 +0100955static int snd_soc_put_twl4030_opmode_enum_double(struct snd_kcontrol *kcontrol,
Lopez Cruz, Misaelb74bd402009-05-18 11:52:55 -0500956 struct snd_ctl_elem_value *ucontrol)
957{
Lars-Peter Clausenea53bf72014-03-18 09:02:04 +0100958 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
Mark Brownb2c812e2010-04-14 15:35:19 +0900959 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Lopez Cruz, Misaelb74bd402009-05-18 11:52:55 -0500960
961 if (twl4030->configured) {
Peter Ujfalusi3b8a0792012-02-21 09:34:20 +0200962 dev_err(codec->dev,
963 "operation mode cannot be changed on-the-fly\n");
Lopez Cruz, Misaelb74bd402009-05-18 11:52:55 -0500964 return -EBUSY;
965 }
966
Takashi Iwai6b207c02014-02-18 08:56:39 +0100967 return snd_soc_put_enum_double(kcontrol, ucontrol);
Lopez Cruz, Misaelb74bd402009-05-18 11:52:55 -0500968}
969
Peter Ujfalusib0bd53a2008-11-24 13:49:38 +0200970/*
Peter Ujfalusic10b82c2008-11-24 13:49:35 +0200971 * FGAIN volume control:
972 * from -62 to 0 dB in 1 dB steps (mute instead of -63 dB)
973 */
Peter Ujfalusid889a722008-12-01 10:03:46 +0200974static DECLARE_TLV_DB_SCALE(digital_fine_tlv, -6300, 100, 1);
Peter Ujfalusic10b82c2008-11-24 13:49:35 +0200975
Peter Ujfalusi0d33ea02008-11-24 13:49:36 +0200976/*
977 * CGAIN volume control:
978 * 0 dB to 12 dB in 6 dB steps
979 * value 2 and 3 means 12 dB
980 */
Peter Ujfalusid889a722008-12-01 10:03:46 +0200981static DECLARE_TLV_DB_SCALE(digital_coarse_tlv, 0, 600, 0);
982
983/*
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900984 * Voice Downlink GAIN volume control:
985 * from -37 to 12 dB in 1 dB steps (mute instead of -37 dB)
986 */
987static DECLARE_TLV_DB_SCALE(digital_voice_downlink_tlv, -3700, 100, 1);
988
989/*
Peter Ujfalusid889a722008-12-01 10:03:46 +0200990 * Analog playback gain
991 * -24 dB to 12 dB in 2 dB steps
992 */
993static DECLARE_TLV_DB_SCALE(analog_tlv, -2400, 200, 0);
Peter Ujfalusi0d33ea02008-11-24 13:49:36 +0200994
Peter Ujfalusi381a22b2008-12-01 10:03:45 +0200995/*
Peter Ujfalusi42902392008-12-01 10:03:47 +0200996 * Gain controls tied to outputs
997 * -6 dB to 6 dB in 6 dB steps (mute instead of -12)
998 */
999static DECLARE_TLV_DB_SCALE(output_tvl, -1200, 600, 1);
1000
1001/*
Joonyoung Shim18cc8d82009-04-28 18:18:05 +09001002 * Gain control for earpiece amplifier
1003 * 0 dB to 12 dB in 6 dB steps (mute instead of -6)
1004 */
1005static DECLARE_TLV_DB_SCALE(output_ear_tvl, -600, 600, 1);
1006
1007/*
Peter Ujfalusi381a22b2008-12-01 10:03:45 +02001008 * Capture gain after the ADCs
1009 * from 0 dB to 31 dB in 1 dB steps
1010 */
1011static DECLARE_TLV_DB_SCALE(digital_capture_tlv, 0, 100, 0);
1012
Grazvydas Ignotas5920b452008-12-02 20:48:58 +02001013/*
1014 * Gain control for input amplifiers
1015 * 0 dB to 30 dB in 6 dB steps
1016 */
1017static DECLARE_TLV_DB_SCALE(input_gain_tlv, 0, 600, 0);
1018
Lopez Cruz, Misael328d0a12009-06-22 10:51:52 -05001019/* AVADC clock priority */
1020static const char *twl4030_avadc_clk_priority_texts[] = {
1021 "Voice high priority", "HiFi high priority"
1022};
1023
Takashi Iwai9f04fba2014-02-18 10:28:25 +01001024static SOC_ENUM_SINGLE_DECL(twl4030_avadc_clk_priority_enum,
1025 TWL4030_REG_AVADC_CTL, 2,
1026 twl4030_avadc_clk_priority_texts);
Lopez Cruz, Misael328d0a12009-06-22 10:51:52 -05001027
Peter Ujfalusi89492be2009-03-05 12:48:49 +02001028static const char *twl4030_rampdelay_texts[] = {
1029 "27/20/14 ms", "55/40/27 ms", "109/81/55 ms", "218/161/109 ms",
1030 "437/323/218 ms", "874/645/437 ms", "1748/1291/874 ms",
1031 "3495/2581/1748 ms"
1032};
1033
Takashi Iwai9f04fba2014-02-18 10:28:25 +01001034static SOC_ENUM_SINGLE_DECL(twl4030_rampdelay_enum,
1035 TWL4030_REG_HS_POPN_SET, 2,
1036 twl4030_rampdelay_texts);
Peter Ujfalusi89492be2009-03-05 12:48:49 +02001037
Peter Ujfalusi376f7832009-05-05 08:55:47 +03001038/* Vibra H-bridge direction mode */
1039static const char *twl4030_vibradirmode_texts[] = {
1040 "Vibra H-bridge direction", "Audio data MSB",
1041};
1042
Takashi Iwai9f04fba2014-02-18 10:28:25 +01001043static SOC_ENUM_SINGLE_DECL(twl4030_vibradirmode_enum,
1044 TWL4030_REG_VIBRA_CTL, 5,
1045 twl4030_vibradirmode_texts);
Peter Ujfalusi376f7832009-05-05 08:55:47 +03001046
1047/* Vibra H-bridge direction */
1048static const char *twl4030_vibradir_texts[] = {
1049 "Positive polarity", "Negative polarity",
1050};
1051
Takashi Iwai9f04fba2014-02-18 10:28:25 +01001052static SOC_ENUM_SINGLE_DECL(twl4030_vibradir_enum,
1053 TWL4030_REG_VIBRA_CTL, 1,
1054 twl4030_vibradir_texts);
Peter Ujfalusi376f7832009-05-05 08:55:47 +03001055
Peter Ujfalusi36aeff62010-05-12 10:35:36 +03001056/* Digimic Left and right swapping */
1057static const char *twl4030_digimicswap_texts[] = {
1058 "Not swapped", "Swapped",
1059};
1060
Takashi Iwai9f04fba2014-02-18 10:28:25 +01001061static SOC_ENUM_SINGLE_DECL(twl4030_digimicswap_enum,
1062 TWL4030_REG_MISC_SET_1, 0,
1063 twl4030_digimicswap_texts);
Peter Ujfalusi36aeff62010-05-12 10:35:36 +03001064
Steve Sakomancc175572008-10-30 21:35:26 -07001065static const struct snd_kcontrol_new twl4030_snd_controls[] = {
Lopez Cruz, Misaelb74bd402009-05-18 11:52:55 -05001066 /* Codec operation mode control */
1067 SOC_ENUM_EXT("Codec Operation Mode", twl4030_op_modes_enum,
1068 snd_soc_get_enum_double,
1069 snd_soc_put_twl4030_opmode_enum_double),
1070
Peter Ujfalusid889a722008-12-01 10:03:46 +02001071 /* Common playback gain controls */
1072 SOC_DOUBLE_R_TLV("DAC1 Digital Fine Playback Volume",
1073 TWL4030_REG_ARXL1PGA, TWL4030_REG_ARXR1PGA,
1074 0, 0x3f, 0, digital_fine_tlv),
1075 SOC_DOUBLE_R_TLV("DAC2 Digital Fine Playback Volume",
1076 TWL4030_REG_ARXL2PGA, TWL4030_REG_ARXR2PGA,
1077 0, 0x3f, 0, digital_fine_tlv),
1078
1079 SOC_DOUBLE_R_TLV("DAC1 Digital Coarse Playback Volume",
1080 TWL4030_REG_ARXL1PGA, TWL4030_REG_ARXR1PGA,
1081 6, 0x2, 0, digital_coarse_tlv),
1082 SOC_DOUBLE_R_TLV("DAC2 Digital Coarse Playback Volume",
1083 TWL4030_REG_ARXL2PGA, TWL4030_REG_ARXR2PGA,
1084 6, 0x2, 0, digital_coarse_tlv),
1085
1086 SOC_DOUBLE_R_TLV("DAC1 Analog Playback Volume",
1087 TWL4030_REG_ARXL1_APGA_CTL, TWL4030_REG_ARXR1_APGA_CTL,
1088 3, 0x12, 1, analog_tlv),
1089 SOC_DOUBLE_R_TLV("DAC2 Analog Playback Volume",
1090 TWL4030_REG_ARXL2_APGA_CTL, TWL4030_REG_ARXR2_APGA_CTL,
1091 3, 0x12, 1, analog_tlv),
Peter Ujfalusi44c55872008-12-09 08:45:44 +02001092 SOC_DOUBLE_R("DAC1 Analog Playback Switch",
1093 TWL4030_REG_ARXL1_APGA_CTL, TWL4030_REG_ARXR1_APGA_CTL,
1094 1, 1, 0),
1095 SOC_DOUBLE_R("DAC2 Analog Playback Switch",
1096 TWL4030_REG_ARXL2_APGA_CTL, TWL4030_REG_ARXR2_APGA_CTL,
1097 1, 1, 0),
Peter Ujfalusi381a22b2008-12-01 10:03:45 +02001098
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001099 /* Common voice downlink gain controls */
1100 SOC_SINGLE_TLV("DAC Voice Digital Downlink Volume",
1101 TWL4030_REG_VRXPGA, 0, 0x31, 0, digital_voice_downlink_tlv),
1102
1103 SOC_SINGLE_TLV("DAC Voice Analog Downlink Volume",
1104 TWL4030_REG_VDL_APGA_CTL, 3, 0x12, 1, analog_tlv),
1105
1106 SOC_SINGLE("DAC Voice Analog Downlink Switch",
1107 TWL4030_REG_VDL_APGA_CTL, 1, 1, 0),
1108
Peter Ujfalusi42902392008-12-01 10:03:47 +02001109 /* Separate output gain controls */
Peter Ujfalusi0f9887d2011-10-05 10:29:19 +03001110 SOC_DOUBLE_R_EXT_TLV("PreDriv Playback Volume",
Peter Ujfalusi42902392008-12-01 10:03:47 +02001111 TWL4030_REG_PREDL_CTL, TWL4030_REG_PREDR_CTL,
Peter Ujfalusi0f9887d2011-10-05 10:29:19 +03001112 4, 3, 0, snd_soc_get_volsw_r2_twl4030,
1113 snd_soc_put_volsw_r2_twl4030, output_tvl),
Peter Ujfalusi42902392008-12-01 10:03:47 +02001114
Peter Ujfalusi0f9887d2011-10-05 10:29:19 +03001115 SOC_DOUBLE_EXT_TLV("Headset Playback Volume",
1116 TWL4030_REG_HS_GAIN_SET, 0, 2, 3, 0, snd_soc_get_volsw_twl4030,
1117 snd_soc_put_volsw_twl4030, output_tvl),
Peter Ujfalusi42902392008-12-01 10:03:47 +02001118
Peter Ujfalusi0f9887d2011-10-05 10:29:19 +03001119 SOC_DOUBLE_R_EXT_TLV("Carkit Playback Volume",
Peter Ujfalusi42902392008-12-01 10:03:47 +02001120 TWL4030_REG_PRECKL_CTL, TWL4030_REG_PRECKR_CTL,
Peter Ujfalusi0f9887d2011-10-05 10:29:19 +03001121 4, 3, 0, snd_soc_get_volsw_r2_twl4030,
1122 snd_soc_put_volsw_r2_twl4030, output_tvl),
Peter Ujfalusi42902392008-12-01 10:03:47 +02001123
Peter Ujfalusi0f9887d2011-10-05 10:29:19 +03001124 SOC_SINGLE_EXT_TLV("Earpiece Playback Volume",
1125 TWL4030_REG_EAR_CTL, 4, 3, 0, snd_soc_get_volsw_twl4030,
1126 snd_soc_put_volsw_twl4030, output_ear_tvl),
Peter Ujfalusi42902392008-12-01 10:03:47 +02001127
Peter Ujfalusi381a22b2008-12-01 10:03:45 +02001128 /* Common capture gain controls */
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001129 SOC_DOUBLE_R_TLV("TX1 Digital Capture Volume",
Peter Ujfalusi381a22b2008-12-01 10:03:45 +02001130 TWL4030_REG_ATXL1PGA, TWL4030_REG_ATXR1PGA,
1131 0, 0x1f, 0, digital_capture_tlv),
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001132 SOC_DOUBLE_R_TLV("TX2 Digital Capture Volume",
1133 TWL4030_REG_AVTXL2PGA, TWL4030_REG_AVTXR2PGA,
1134 0, 0x1f, 0, digital_capture_tlv),
Grazvydas Ignotas5920b452008-12-02 20:48:58 +02001135
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001136 SOC_DOUBLE_TLV("Analog Capture Volume", TWL4030_REG_ANAMIC_GAIN,
Grazvydas Ignotas5920b452008-12-02 20:48:58 +02001137 0, 3, 5, 0, input_gain_tlv),
Peter Ujfalusi89492be2009-03-05 12:48:49 +02001138
Lopez Cruz, Misael328d0a12009-06-22 10:51:52 -05001139 SOC_ENUM("AVADC Clock Priority", twl4030_avadc_clk_priority_enum),
1140
Peter Ujfalusi89492be2009-03-05 12:48:49 +02001141 SOC_ENUM("HS ramp delay", twl4030_rampdelay_enum),
Peter Ujfalusi376f7832009-05-05 08:55:47 +03001142
1143 SOC_ENUM("Vibra H-bridge mode", twl4030_vibradirmode_enum),
1144 SOC_ENUM("Vibra H-bridge direction", twl4030_vibradir_enum),
Peter Ujfalusi36aeff62010-05-12 10:35:36 +03001145
1146 SOC_ENUM("Digimic LR Swap", twl4030_digimicswap_enum),
Steve Sakomancc175572008-10-30 21:35:26 -07001147};
1148
Steve Sakomancc175572008-10-30 21:35:26 -07001149static const struct snd_soc_dapm_widget twl4030_dapm_widgets[] = {
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001150 /* Left channel inputs */
1151 SND_SOC_DAPM_INPUT("MAINMIC"),
1152 SND_SOC_DAPM_INPUT("HSMIC"),
1153 SND_SOC_DAPM_INPUT("AUXL"),
1154 SND_SOC_DAPM_INPUT("CARKITMIC"),
1155 /* Right channel inputs */
1156 SND_SOC_DAPM_INPUT("SUBMIC"),
1157 SND_SOC_DAPM_INPUT("AUXR"),
1158 /* Digital microphones (Stereo) */
1159 SND_SOC_DAPM_INPUT("DIGIMIC0"),
1160 SND_SOC_DAPM_INPUT("DIGIMIC1"),
Steve Sakomancc175572008-10-30 21:35:26 -07001161
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001162 /* Outputs */
Peter Ujfalusi5e98a462008-12-09 12:35:47 +02001163 SND_SOC_DAPM_OUTPUT("EARPIECE"),
Peter Ujfalusi2a6f5c582008-12-09 12:35:48 +02001164 SND_SOC_DAPM_OUTPUT("PREDRIVEL"),
1165 SND_SOC_DAPM_OUTPUT("PREDRIVER"),
Peter Ujfalusidfad21a2008-12-09 12:35:49 +02001166 SND_SOC_DAPM_OUTPUT("HSOL"),
1167 SND_SOC_DAPM_OUTPUT("HSOR"),
Peter Ujfalusi6a1bee42008-12-10 12:51:46 +02001168 SND_SOC_DAPM_OUTPUT("CARKITL"),
1169 SND_SOC_DAPM_OUTPUT("CARKITR"),
Peter Ujfalusidf339802008-12-09 12:35:51 +02001170 SND_SOC_DAPM_OUTPUT("HFL"),
1171 SND_SOC_DAPM_OUTPUT("HFR"),
Peter Ujfalusi376f7832009-05-05 08:55:47 +03001172 SND_SOC_DAPM_OUTPUT("VIBRA"),
Steve Sakomancc175572008-10-30 21:35:26 -07001173
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +03001174 /* AIF and APLL clocks for running DAIs (including loopback) */
1175 SND_SOC_DAPM_OUTPUT("Virtual HiFi OUT"),
1176 SND_SOC_DAPM_INPUT("Virtual HiFi IN"),
1177 SND_SOC_DAPM_OUTPUT("Virtual Voice OUT"),
1178
Peter Ujfalusi53b50472008-12-09 08:45:43 +02001179 /* DACs */
Peter Ujfalusi7f51e7d2012-09-20 16:32:02 +03001180 SND_SOC_DAPM_DAC("DAC Right1", NULL, SND_SOC_NOPM, 0, 0),
1181 SND_SOC_DAPM_DAC("DAC Left1", NULL, SND_SOC_NOPM, 0, 0),
1182 SND_SOC_DAPM_DAC("DAC Right2", NULL, SND_SOC_NOPM, 0, 0),
1183 SND_SOC_DAPM_DAC("DAC Left2", NULL, SND_SOC_NOPM, 0, 0),
1184 SND_SOC_DAPM_DAC("DAC Voice", NULL, SND_SOC_NOPM, 0, 0),
Steve Sakomancc175572008-10-30 21:35:26 -07001185
Peter Ujfalusi927a7742012-12-31 11:51:42 +01001186 SND_SOC_DAPM_AIF_IN("VAIFIN", "Voice Playback", 0,
1187 TWL4030_REG_VOICE_IF, 6, 0),
1188
Peter Ujfalusi73939582009-01-29 14:57:50 +02001189 /* Analog bypasses */
Peter Ujfalusi78e08e22009-10-28 10:57:04 +02001190 SND_SOC_DAPM_SWITCH("Right1 Analog Loopback", SND_SOC_NOPM, 0, 0,
1191 &twl4030_dapm_abypassr1_control),
1192 SND_SOC_DAPM_SWITCH("Left1 Analog Loopback", SND_SOC_NOPM, 0, 0,
1193 &twl4030_dapm_abypassl1_control),
1194 SND_SOC_DAPM_SWITCH("Right2 Analog Loopback", SND_SOC_NOPM, 0, 0,
1195 &twl4030_dapm_abypassr2_control),
1196 SND_SOC_DAPM_SWITCH("Left2 Analog Loopback", SND_SOC_NOPM, 0, 0,
1197 &twl4030_dapm_abypassl2_control),
1198 SND_SOC_DAPM_SWITCH("Voice Analog Loopback", SND_SOC_NOPM, 0, 0,
1199 &twl4030_dapm_abypassv_control),
1200
1201 /* Master analog loopback switch */
1202 SND_SOC_DAPM_SUPPLY("FM Loop Enable", TWL4030_REG_MISC_SET_1, 5, 0,
1203 NULL, 0),
Peter Ujfalusi73939582009-01-29 14:57:50 +02001204
Peter Ujfalusi6bab83f2009-02-18 14:39:05 +02001205 /* Digital bypasses */
Peter Ujfalusi78e08e22009-10-28 10:57:04 +02001206 SND_SOC_DAPM_SWITCH("Left Digital Loopback", SND_SOC_NOPM, 0, 0,
1207 &twl4030_dapm_dbypassl_control),
1208 SND_SOC_DAPM_SWITCH("Right Digital Loopback", SND_SOC_NOPM, 0, 0,
1209 &twl4030_dapm_dbypassr_control),
1210 SND_SOC_DAPM_SWITCH("Voice Digital Loopback", SND_SOC_NOPM, 0, 0,
1211 &twl4030_dapm_dbypassv_control),
Peter Ujfalusi6bab83f2009-02-18 14:39:05 +02001212
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001213 /* Digital mixers, power control for the physical DACs */
1214 SND_SOC_DAPM_MIXER("Digital R1 Playback Mixer",
1215 TWL4030_REG_AVDAC_CTL, 0, 0, NULL, 0),
1216 SND_SOC_DAPM_MIXER("Digital L1 Playback Mixer",
1217 TWL4030_REG_AVDAC_CTL, 1, 0, NULL, 0),
1218 SND_SOC_DAPM_MIXER("Digital R2 Playback Mixer",
1219 TWL4030_REG_AVDAC_CTL, 2, 0, NULL, 0),
1220 SND_SOC_DAPM_MIXER("Digital L2 Playback Mixer",
1221 TWL4030_REG_AVDAC_CTL, 3, 0, NULL, 0),
1222 SND_SOC_DAPM_MIXER("Digital Voice Playback Mixer",
1223 TWL4030_REG_AVDAC_CTL, 4, 0, NULL, 0),
1224
1225 /* Analog mixers, power control for the physical PGAs */
1226 SND_SOC_DAPM_MIXER("Analog R1 Playback Mixer",
1227 TWL4030_REG_ARXR1_APGA_CTL, 0, 0, NULL, 0),
1228 SND_SOC_DAPM_MIXER("Analog L1 Playback Mixer",
1229 TWL4030_REG_ARXL1_APGA_CTL, 0, 0, NULL, 0),
1230 SND_SOC_DAPM_MIXER("Analog R2 Playback Mixer",
1231 TWL4030_REG_ARXR2_APGA_CTL, 0, 0, NULL, 0),
1232 SND_SOC_DAPM_MIXER("Analog L2 Playback Mixer",
1233 TWL4030_REG_ARXL2_APGA_CTL, 0, 0, NULL, 0),
1234 SND_SOC_DAPM_MIXER("Analog Voice Playback Mixer",
1235 TWL4030_REG_VDL_APGA_CTL, 0, 0, NULL, 0),
Peter Ujfalusi73939582009-01-29 14:57:50 +02001236
Peter Ujfalusi7729cf72009-10-29 11:58:10 +02001237 SND_SOC_DAPM_SUPPLY("APLL Enable", SND_SOC_NOPM, 0, 0, apll_event,
1238 SND_SOC_DAPM_PRE_PMU|SND_SOC_DAPM_POST_PMD),
1239
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +03001240 SND_SOC_DAPM_SUPPLY("AIF Enable", SND_SOC_NOPM, 0, 0, aif_event,
1241 SND_SOC_DAPM_PRE_PMU|SND_SOC_DAPM_POST_PMD),
Peter Ujfalusic42a59e2010-02-09 15:24:04 +02001242
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001243 /* Output MIXER controls */
Peter Ujfalusi5e98a462008-12-09 12:35:47 +02001244 /* Earpiece */
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001245 SND_SOC_DAPM_MIXER("Earpiece Mixer", SND_SOC_NOPM, 0, 0,
1246 &twl4030_dapm_earpiece_controls[0],
1247 ARRAY_SIZE(twl4030_dapm_earpiece_controls)),
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001248 SND_SOC_DAPM_PGA_E("Earpiece PGA", SND_SOC_NOPM,
1249 0, 0, NULL, 0, earpiecepga_event,
1250 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
Peter Ujfalusi2a6f5c582008-12-09 12:35:48 +02001251 /* PreDrivL/R */
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001252 SND_SOC_DAPM_MIXER("PredriveL Mixer", SND_SOC_NOPM, 0, 0,
1253 &twl4030_dapm_predrivel_controls[0],
1254 ARRAY_SIZE(twl4030_dapm_predrivel_controls)),
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001255 SND_SOC_DAPM_PGA_E("PredriveL PGA", SND_SOC_NOPM,
1256 0, 0, NULL, 0, predrivelpga_event,
1257 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001258 SND_SOC_DAPM_MIXER("PredriveR Mixer", SND_SOC_NOPM, 0, 0,
1259 &twl4030_dapm_predriver_controls[0],
1260 ARRAY_SIZE(twl4030_dapm_predriver_controls)),
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001261 SND_SOC_DAPM_PGA_E("PredriveR PGA", SND_SOC_NOPM,
1262 0, 0, NULL, 0, predriverpga_event,
1263 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
Peter Ujfalusidfad21a2008-12-09 12:35:49 +02001264 /* HeadsetL/R */
Peter Ujfalusi6943c922009-05-18 16:02:05 +03001265 SND_SOC_DAPM_MIXER("HeadsetL Mixer", SND_SOC_NOPM, 0, 0,
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001266 &twl4030_dapm_hsol_controls[0],
Peter Ujfalusi6943c922009-05-18 16:02:05 +03001267 ARRAY_SIZE(twl4030_dapm_hsol_controls)),
1268 SND_SOC_DAPM_PGA_E("HeadsetL PGA", SND_SOC_NOPM,
1269 0, 0, NULL, 0, headsetlpga_event,
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001270 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1271 SND_SOC_DAPM_MIXER("HeadsetR Mixer", SND_SOC_NOPM, 0, 0,
1272 &twl4030_dapm_hsor_controls[0],
1273 ARRAY_SIZE(twl4030_dapm_hsor_controls)),
Peter Ujfalusi6943c922009-05-18 16:02:05 +03001274 SND_SOC_DAPM_PGA_E("HeadsetR PGA", SND_SOC_NOPM,
1275 0, 0, NULL, 0, headsetrpga_event,
1276 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
Peter Ujfalusi5152d8c2008-12-09 12:35:50 +02001277 /* CarkitL/R */
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001278 SND_SOC_DAPM_MIXER("CarkitL Mixer", SND_SOC_NOPM, 0, 0,
1279 &twl4030_dapm_carkitl_controls[0],
1280 ARRAY_SIZE(twl4030_dapm_carkitl_controls)),
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001281 SND_SOC_DAPM_PGA_E("CarkitL PGA", SND_SOC_NOPM,
1282 0, 0, NULL, 0, carkitlpga_event,
1283 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001284 SND_SOC_DAPM_MIXER("CarkitR Mixer", SND_SOC_NOPM, 0, 0,
1285 &twl4030_dapm_carkitr_controls[0],
1286 ARRAY_SIZE(twl4030_dapm_carkitr_controls)),
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001287 SND_SOC_DAPM_PGA_E("CarkitR PGA", SND_SOC_NOPM,
1288 0, 0, NULL, 0, carkitrpga_event,
1289 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001290
1291 /* Output MUX controls */
Peter Ujfalusidf339802008-12-09 12:35:51 +02001292 /* HandsfreeL/R */
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +03001293 SND_SOC_DAPM_MUX("HandsfreeL Mux", SND_SOC_NOPM, 0, 0,
1294 &twl4030_dapm_handsfreel_control),
Lopez Cruz, Misaele3c7dbb2009-06-25 12:36:14 -05001295 SND_SOC_DAPM_SWITCH("HandsfreeL", SND_SOC_NOPM, 0, 0,
Peter Ujfalusi0f89bdc2009-05-25 11:12:13 +03001296 &twl4030_dapm_handsfreelmute_control),
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +03001297 SND_SOC_DAPM_PGA_E("HandsfreeL PGA", SND_SOC_NOPM,
1298 0, 0, NULL, 0, handsfreelpga_event,
1299 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1300 SND_SOC_DAPM_MUX("HandsfreeR Mux", SND_SOC_NOPM, 5, 0,
1301 &twl4030_dapm_handsfreer_control),
Lopez Cruz, Misaele3c7dbb2009-06-25 12:36:14 -05001302 SND_SOC_DAPM_SWITCH("HandsfreeR", SND_SOC_NOPM, 0, 0,
Peter Ujfalusi0f89bdc2009-05-25 11:12:13 +03001303 &twl4030_dapm_handsfreermute_control),
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +03001304 SND_SOC_DAPM_PGA_E("HandsfreeR PGA", SND_SOC_NOPM,
1305 0, 0, NULL, 0, handsfreerpga_event,
1306 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
Peter Ujfalusi376f7832009-05-05 08:55:47 +03001307 /* Vibra */
Jari Vanhala86139a12009-10-29 11:58:09 +02001308 SND_SOC_DAPM_MUX_E("Vibra Mux", TWL4030_REG_VIBRA_CTL, 0, 0,
1309 &twl4030_dapm_vibra_control, vibramux_event,
1310 SND_SOC_DAPM_PRE_PMU),
Peter Ujfalusi376f7832009-05-05 08:55:47 +03001311 SND_SOC_DAPM_MUX("Vibra Route", SND_SOC_NOPM, 0, 0,
1312 &twl4030_dapm_vibrapath_control),
Peter Ujfalusi5e98a462008-12-09 12:35:47 +02001313
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001314 /* Introducing four virtual ADC, since TWL4030 have four channel for
1315 capture */
Peter Ujfalusi7f51e7d2012-09-20 16:32:02 +03001316 SND_SOC_DAPM_ADC("ADC Virtual Left1", NULL, SND_SOC_NOPM, 0, 0),
1317 SND_SOC_DAPM_ADC("ADC Virtual Right1", NULL, SND_SOC_NOPM, 0, 0),
1318 SND_SOC_DAPM_ADC("ADC Virtual Left2", NULL, SND_SOC_NOPM, 0, 0),
1319 SND_SOC_DAPM_ADC("ADC Virtual Right2", NULL, SND_SOC_NOPM, 0, 0),
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001320
Peter Ujfalusi927a7742012-12-31 11:51:42 +01001321 SND_SOC_DAPM_AIF_OUT("VAIFOUT", "Voice Capture", 0,
1322 TWL4030_REG_VOICE_IF, 5, 0),
1323
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001324 /* Analog/Digital mic path selection.
1325 TX1 Left/Right: either analog Left/Right or Digimic0
1326 TX2 Left/Right: either analog Left/Right or Digimic1 */
Peter Ujfalusibda7d2a2010-08-03 12:01:01 +03001327 SND_SOC_DAPM_MUX("TX1 Capture Route", SND_SOC_NOPM, 0, 0,
1328 &twl4030_dapm_micpathtx1_control),
1329 SND_SOC_DAPM_MUX("TX2 Capture Route", SND_SOC_NOPM, 0, 0,
1330 &twl4030_dapm_micpathtx2_control),
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001331
Joonyoung Shim97b80962009-05-11 20:36:08 +09001332 /* Analog input mixers for the capture amplifiers */
Peter Ujfalusi90289352009-08-14 08:44:00 +03001333 SND_SOC_DAPM_MIXER("Analog Left",
Joonyoung Shim97b80962009-05-11 20:36:08 +09001334 TWL4030_REG_ANAMICL, 4, 0,
1335 &twl4030_dapm_analoglmic_controls[0],
1336 ARRAY_SIZE(twl4030_dapm_analoglmic_controls)),
Peter Ujfalusi90289352009-08-14 08:44:00 +03001337 SND_SOC_DAPM_MIXER("Analog Right",
Joonyoung Shim97b80962009-05-11 20:36:08 +09001338 TWL4030_REG_ANAMICR, 4, 0,
1339 &twl4030_dapm_analogrmic_controls[0],
1340 ARRAY_SIZE(twl4030_dapm_analogrmic_controls)),
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001341
Peter Ujfalusifb2a2f82009-01-27 11:29:42 +02001342 SND_SOC_DAPM_PGA("ADC Physical Left",
1343 TWL4030_REG_AVADC_CTL, 3, 0, NULL, 0),
1344 SND_SOC_DAPM_PGA("ADC Physical Right",
1345 TWL4030_REG_AVADC_CTL, 1, 0, NULL, 0),
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001346
Peter Ujfalusi01ea6ba2010-07-20 15:49:09 +03001347 SND_SOC_DAPM_PGA_E("Digimic0 Enable",
1348 TWL4030_REG_ADCMICSEL, 1, 0, NULL, 0,
1349 digimic_event, SND_SOC_DAPM_POST_PMU),
1350 SND_SOC_DAPM_PGA_E("Digimic1 Enable",
1351 TWL4030_REG_ADCMICSEL, 3, 0, NULL, 0,
1352 digimic_event, SND_SOC_DAPM_POST_PMU),
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001353
Peter Ujfalusibda7d2a2010-08-03 12:01:01 +03001354 SND_SOC_DAPM_SUPPLY("micbias1 select", TWL4030_REG_MICBIAS_CTL, 5, 0,
1355 NULL, 0),
1356 SND_SOC_DAPM_SUPPLY("micbias2 select", TWL4030_REG_MICBIAS_CTL, 6, 0,
1357 NULL, 0),
1358
Peter Ujfalusie04d6e52012-12-31 11:51:45 +01001359 /* Microphone bias */
1360 SND_SOC_DAPM_SUPPLY("Mic Bias 1",
1361 TWL4030_REG_MICBIAS_CTL, 0, 0, NULL, 0),
1362 SND_SOC_DAPM_SUPPLY("Mic Bias 2",
1363 TWL4030_REG_MICBIAS_CTL, 1, 0, NULL, 0),
1364 SND_SOC_DAPM_SUPPLY("Headset Mic Bias",
1365 TWL4030_REG_MICBIAS_CTL, 2, 0, NULL, 0),
Peter Ujfalusi73939582009-01-29 14:57:50 +02001366
Peter Ujfalusi927a7742012-12-31 11:51:42 +01001367 SND_SOC_DAPM_SUPPLY("VIF Enable", TWL4030_REG_VOICE_IF, 0, 0, NULL, 0),
Steve Sakomancc175572008-10-30 21:35:26 -07001368};
1369
1370static const struct snd_soc_dapm_route intercon[] = {
Peter Ujfalusi7f51e7d2012-09-20 16:32:02 +03001371 /* Stream -> DAC mapping */
1372 {"DAC Right1", NULL, "HiFi Playback"},
1373 {"DAC Left1", NULL, "HiFi Playback"},
1374 {"DAC Right2", NULL, "HiFi Playback"},
1375 {"DAC Left2", NULL, "HiFi Playback"},
Peter Ujfalusi927a7742012-12-31 11:51:42 +01001376 {"DAC Voice", NULL, "VAIFIN"},
Peter Ujfalusi7f51e7d2012-09-20 16:32:02 +03001377
1378 /* ADC -> Stream mapping */
1379 {"HiFi Capture", NULL, "ADC Virtual Left1"},
1380 {"HiFi Capture", NULL, "ADC Virtual Right1"},
1381 {"HiFi Capture", NULL, "ADC Virtual Left2"},
1382 {"HiFi Capture", NULL, "ADC Virtual Right2"},
Peter Ujfalusi927a7742012-12-31 11:51:42 +01001383 {"VAIFOUT", NULL, "ADC Virtual Left2"},
1384 {"VAIFOUT", NULL, "ADC Virtual Right2"},
1385 {"VAIFOUT", NULL, "VIF Enable"},
Peter Ujfalusi7f51e7d2012-09-20 16:32:02 +03001386
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001387 {"Digital L1 Playback Mixer", NULL, "DAC Left1"},
1388 {"Digital R1 Playback Mixer", NULL, "DAC Right1"},
1389 {"Digital L2 Playback Mixer", NULL, "DAC Left2"},
1390 {"Digital R2 Playback Mixer", NULL, "DAC Right2"},
1391 {"Digital Voice Playback Mixer", NULL, "DAC Voice"},
Peter Ujfalusi73939582009-01-29 14:57:50 +02001392
Peter Ujfalusi7729cf72009-10-29 11:58:10 +02001393 /* Supply for the digital part (APLL) */
Peter Ujfalusi7729cf72009-10-29 11:58:10 +02001394 {"Digital Voice Playback Mixer", NULL, "APLL Enable"},
1395
Peter Ujfalusi27eeb1f2010-07-13 12:07:44 +03001396 {"DAC Left1", NULL, "AIF Enable"},
1397 {"DAC Right1", NULL, "AIF Enable"},
1398 {"DAC Left2", NULL, "AIF Enable"},
1399 {"DAC Right1", NULL, "AIF Enable"},
Peter Ujfalusi927a7742012-12-31 11:51:42 +01001400 {"DAC Voice", NULL, "VIF Enable"},
Peter Ujfalusi27eeb1f2010-07-13 12:07:44 +03001401
Peter Ujfalusic42a59e2010-02-09 15:24:04 +02001402 {"Digital R2 Playback Mixer", NULL, "AIF Enable"},
1403 {"Digital L2 Playback Mixer", NULL, "AIF Enable"},
1404
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001405 {"Analog L1 Playback Mixer", NULL, "Digital L1 Playback Mixer"},
1406 {"Analog R1 Playback Mixer", NULL, "Digital R1 Playback Mixer"},
1407 {"Analog L2 Playback Mixer", NULL, "Digital L2 Playback Mixer"},
1408 {"Analog R2 Playback Mixer", NULL, "Digital R2 Playback Mixer"},
1409 {"Analog Voice Playback Mixer", NULL, "Digital Voice Playback Mixer"},
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001410
Peter Ujfalusi5e98a462008-12-09 12:35:47 +02001411 /* Internal playback routings */
1412 /* Earpiece */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001413 {"Earpiece Mixer", "Voice", "Analog Voice Playback Mixer"},
1414 {"Earpiece Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1415 {"Earpiece Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1416 {"Earpiece Mixer", "AudioR1", "Analog R1 Playback Mixer"},
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001417 {"Earpiece PGA", NULL, "Earpiece Mixer"},
Peter Ujfalusi2a6f5c582008-12-09 12:35:48 +02001418 /* PreDrivL */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001419 {"PredriveL Mixer", "Voice", "Analog Voice Playback Mixer"},
1420 {"PredriveL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1421 {"PredriveL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1422 {"PredriveL Mixer", "AudioR2", "Analog R2 Playback Mixer"},
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001423 {"PredriveL PGA", NULL, "PredriveL Mixer"},
Peter Ujfalusi2a6f5c582008-12-09 12:35:48 +02001424 /* PreDrivR */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001425 {"PredriveR Mixer", "Voice", "Analog Voice Playback Mixer"},
1426 {"PredriveR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
1427 {"PredriveR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
1428 {"PredriveR Mixer", "AudioL2", "Analog L2 Playback Mixer"},
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001429 {"PredriveR PGA", NULL, "PredriveR Mixer"},
Peter Ujfalusidfad21a2008-12-09 12:35:49 +02001430 /* HeadsetL */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001431 {"HeadsetL Mixer", "Voice", "Analog Voice Playback Mixer"},
1432 {"HeadsetL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1433 {"HeadsetL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
Peter Ujfalusi6943c922009-05-18 16:02:05 +03001434 {"HeadsetL PGA", NULL, "HeadsetL Mixer"},
Peter Ujfalusidfad21a2008-12-09 12:35:49 +02001435 /* HeadsetR */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001436 {"HeadsetR Mixer", "Voice", "Analog Voice Playback Mixer"},
1437 {"HeadsetR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
1438 {"HeadsetR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
Peter Ujfalusi6943c922009-05-18 16:02:05 +03001439 {"HeadsetR PGA", NULL, "HeadsetR Mixer"},
Peter Ujfalusi5152d8c2008-12-09 12:35:50 +02001440 /* CarkitL */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001441 {"CarkitL Mixer", "Voice", "Analog Voice Playback Mixer"},
1442 {"CarkitL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1443 {"CarkitL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001444 {"CarkitL PGA", NULL, "CarkitL Mixer"},
Peter Ujfalusi5152d8c2008-12-09 12:35:50 +02001445 /* CarkitR */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001446 {"CarkitR Mixer", "Voice", "Analog Voice Playback Mixer"},
1447 {"CarkitR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
1448 {"CarkitR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001449 {"CarkitR PGA", NULL, "CarkitR Mixer"},
Peter Ujfalusidf339802008-12-09 12:35:51 +02001450 /* HandsfreeL */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001451 {"HandsfreeL Mux", "Voice", "Analog Voice Playback Mixer"},
1452 {"HandsfreeL Mux", "AudioL1", "Analog L1 Playback Mixer"},
1453 {"HandsfreeL Mux", "AudioL2", "Analog L2 Playback Mixer"},
1454 {"HandsfreeL Mux", "AudioR2", "Analog R2 Playback Mixer"},
Lopez Cruz, Misaele3c7dbb2009-06-25 12:36:14 -05001455 {"HandsfreeL", "Switch", "HandsfreeL Mux"},
1456 {"HandsfreeL PGA", NULL, "HandsfreeL"},
Peter Ujfalusidf339802008-12-09 12:35:51 +02001457 /* HandsfreeR */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001458 {"HandsfreeR Mux", "Voice", "Analog Voice Playback Mixer"},
1459 {"HandsfreeR Mux", "AudioR1", "Analog R1 Playback Mixer"},
1460 {"HandsfreeR Mux", "AudioR2", "Analog R2 Playback Mixer"},
1461 {"HandsfreeR Mux", "AudioL2", "Analog L2 Playback Mixer"},
Lopez Cruz, Misaele3c7dbb2009-06-25 12:36:14 -05001462 {"HandsfreeR", "Switch", "HandsfreeR Mux"},
1463 {"HandsfreeR PGA", NULL, "HandsfreeR"},
Peter Ujfalusi376f7832009-05-05 08:55:47 +03001464 /* Vibra */
1465 {"Vibra Mux", "AudioL1", "DAC Left1"},
1466 {"Vibra Mux", "AudioR1", "DAC Right1"},
1467 {"Vibra Mux", "AudioL2", "DAC Left2"},
1468 {"Vibra Mux", "AudioR2", "DAC Right2"},
Peter Ujfalusi5e98a462008-12-09 12:35:47 +02001469
Steve Sakomancc175572008-10-30 21:35:26 -07001470 /* outputs */
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +03001471 /* Must be always connected (for AIF and APLL) */
Peter Ujfalusi27eeb1f2010-07-13 12:07:44 +03001472 {"Virtual HiFi OUT", NULL, "DAC Left1"},
1473 {"Virtual HiFi OUT", NULL, "DAC Right1"},
1474 {"Virtual HiFi OUT", NULL, "DAC Left2"},
1475 {"Virtual HiFi OUT", NULL, "DAC Right2"},
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +03001476 /* Must be always connected (for APLL) */
1477 {"Virtual Voice OUT", NULL, "Digital Voice Playback Mixer"},
1478 /* Physical outputs */
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001479 {"EARPIECE", NULL, "Earpiece PGA"},
1480 {"PREDRIVEL", NULL, "PredriveL PGA"},
1481 {"PREDRIVER", NULL, "PredriveR PGA"},
Peter Ujfalusi6943c922009-05-18 16:02:05 +03001482 {"HSOL", NULL, "HeadsetL PGA"},
1483 {"HSOR", NULL, "HeadsetR PGA"},
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001484 {"CARKITL", NULL, "CarkitL PGA"},
1485 {"CARKITR", NULL, "CarkitR PGA"},
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +03001486 {"HFL", NULL, "HandsfreeL PGA"},
1487 {"HFR", NULL, "HandsfreeR PGA"},
Peter Ujfalusi376f7832009-05-05 08:55:47 +03001488 {"Vibra Route", "Audio", "Vibra Mux"},
1489 {"VIBRA", NULL, "Vibra Route"},
Steve Sakomancc175572008-10-30 21:35:26 -07001490
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001491 /* Capture path */
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +03001492 /* Must be always connected (for AIF and APLL) */
1493 {"ADC Virtual Left1", NULL, "Virtual HiFi IN"},
1494 {"ADC Virtual Right1", NULL, "Virtual HiFi IN"},
1495 {"ADC Virtual Left2", NULL, "Virtual HiFi IN"},
1496 {"ADC Virtual Right2", NULL, "Virtual HiFi IN"},
1497 /* Physical inputs */
Peter Ujfalusi90289352009-08-14 08:44:00 +03001498 {"Analog Left", "Main Mic Capture Switch", "MAINMIC"},
1499 {"Analog Left", "Headset Mic Capture Switch", "HSMIC"},
1500 {"Analog Left", "AUXL Capture Switch", "AUXL"},
1501 {"Analog Left", "Carkit Mic Capture Switch", "CARKITMIC"},
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001502
Peter Ujfalusi90289352009-08-14 08:44:00 +03001503 {"Analog Right", "Sub Mic Capture Switch", "SUBMIC"},
1504 {"Analog Right", "AUXR Capture Switch", "AUXR"},
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001505
Peter Ujfalusi90289352009-08-14 08:44:00 +03001506 {"ADC Physical Left", NULL, "Analog Left"},
1507 {"ADC Physical Right", NULL, "Analog Right"},
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001508
1509 {"Digimic0 Enable", NULL, "DIGIMIC0"},
1510 {"Digimic1 Enable", NULL, "DIGIMIC1"},
1511
Peter Ujfalusibda7d2a2010-08-03 12:01:01 +03001512 {"DIGIMIC0", NULL, "micbias1 select"},
1513 {"DIGIMIC1", NULL, "micbias2 select"},
1514
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001515 /* TX1 Left capture path */
Peter Ujfalusifb2a2f82009-01-27 11:29:42 +02001516 {"TX1 Capture Route", "Analog", "ADC Physical Left"},
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001517 {"TX1 Capture Route", "Digimic0", "Digimic0 Enable"},
1518 /* TX1 Right capture path */
Peter Ujfalusifb2a2f82009-01-27 11:29:42 +02001519 {"TX1 Capture Route", "Analog", "ADC Physical Right"},
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001520 {"TX1 Capture Route", "Digimic0", "Digimic0 Enable"},
1521 /* TX2 Left capture path */
Peter Ujfalusifb2a2f82009-01-27 11:29:42 +02001522 {"TX2 Capture Route", "Analog", "ADC Physical Left"},
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001523 {"TX2 Capture Route", "Digimic1", "Digimic1 Enable"},
1524 /* TX2 Right capture path */
Peter Ujfalusifb2a2f82009-01-27 11:29:42 +02001525 {"TX2 Capture Route", "Analog", "ADC Physical Right"},
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001526 {"TX2 Capture Route", "Digimic1", "Digimic1 Enable"},
1527
1528 {"ADC Virtual Left1", NULL, "TX1 Capture Route"},
1529 {"ADC Virtual Right1", NULL, "TX1 Capture Route"},
1530 {"ADC Virtual Left2", NULL, "TX2 Capture Route"},
1531 {"ADC Virtual Right2", NULL, "TX2 Capture Route"},
1532
Peter Ujfalusic42a59e2010-02-09 15:24:04 +02001533 {"ADC Virtual Left1", NULL, "AIF Enable"},
1534 {"ADC Virtual Right1", NULL, "AIF Enable"},
1535 {"ADC Virtual Left2", NULL, "AIF Enable"},
1536 {"ADC Virtual Right2", NULL, "AIF Enable"},
1537
Peter Ujfalusi73939582009-01-29 14:57:50 +02001538 /* Analog bypass routes */
Peter Ujfalusi90289352009-08-14 08:44:00 +03001539 {"Right1 Analog Loopback", "Switch", "Analog Right"},
1540 {"Left1 Analog Loopback", "Switch", "Analog Left"},
1541 {"Right2 Analog Loopback", "Switch", "Analog Right"},
1542 {"Left2 Analog Loopback", "Switch", "Analog Left"},
1543 {"Voice Analog Loopback", "Switch", "Analog Left"},
Peter Ujfalusi73939582009-01-29 14:57:50 +02001544
Peter Ujfalusi78e08e22009-10-28 10:57:04 +02001545 /* Supply for the Analog loopbacks */
1546 {"Right1 Analog Loopback", NULL, "FM Loop Enable"},
1547 {"Left1 Analog Loopback", NULL, "FM Loop Enable"},
1548 {"Right2 Analog Loopback", NULL, "FM Loop Enable"},
1549 {"Left2 Analog Loopback", NULL, "FM Loop Enable"},
1550 {"Voice Analog Loopback", NULL, "FM Loop Enable"},
1551
Peter Ujfalusi73939582009-01-29 14:57:50 +02001552 {"Analog R1 Playback Mixer", NULL, "Right1 Analog Loopback"},
1553 {"Analog L1 Playback Mixer", NULL, "Left1 Analog Loopback"},
1554 {"Analog R2 Playback Mixer", NULL, "Right2 Analog Loopback"},
1555 {"Analog L2 Playback Mixer", NULL, "Left2 Analog Loopback"},
Lopez Cruz, Misaelfcd274a2009-04-30 21:47:22 -05001556 {"Analog Voice Playback Mixer", NULL, "Voice Analog Loopback"},
Peter Ujfalusi73939582009-01-29 14:57:50 +02001557
Peter Ujfalusi6bab83f2009-02-18 14:39:05 +02001558 /* Digital bypass routes */
1559 {"Right Digital Loopback", "Volume", "TX1 Capture Route"},
1560 {"Left Digital Loopback", "Volume", "TX1 Capture Route"},
Lopez Cruz, Misaelee8f6892009-04-30 21:48:08 -05001561 {"Voice Digital Loopback", "Volume", "TX2 Capture Route"},
Peter Ujfalusi6bab83f2009-02-18 14:39:05 +02001562
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001563 {"Digital R2 Playback Mixer", NULL, "Right Digital Loopback"},
1564 {"Digital L2 Playback Mixer", NULL, "Left Digital Loopback"},
1565 {"Digital Voice Playback Mixer", NULL, "Voice Digital Loopback"},
Peter Ujfalusi6bab83f2009-02-18 14:39:05 +02001566
Steve Sakomancc175572008-10-30 21:35:26 -07001567};
1568
Steve Sakomancc175572008-10-30 21:35:26 -07001569static int twl4030_set_bias_level(struct snd_soc_codec *codec,
1570 enum snd_soc_bias_level level)
1571{
1572 switch (level) {
1573 case SND_SOC_BIAS_ON:
Steve Sakomancc175572008-10-30 21:35:26 -07001574 break;
1575 case SND_SOC_BIAS_PREPARE:
Steve Sakomancc175572008-10-30 21:35:26 -07001576 break;
1577 case SND_SOC_BIAS_STANDBY:
Liam Girdwoodce6120c2010-11-05 15:53:46 +02001578 if (codec->dapm.bias_level == SND_SOC_BIAS_OFF)
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +03001579 twl4030_codec_enable(codec, 1);
Steve Sakomancc175572008-10-30 21:35:26 -07001580 break;
1581 case SND_SOC_BIAS_OFF:
Peter Ujfalusicbd2db12010-05-26 11:38:15 +03001582 twl4030_codec_enable(codec, 0);
Steve Sakomancc175572008-10-30 21:35:26 -07001583 break;
1584 }
Liam Girdwoodce6120c2010-11-05 15:53:46 +02001585 codec->dapm.bias_level = level;
Steve Sakomancc175572008-10-30 21:35:26 -07001586
1587 return 0;
1588}
1589
Peter Ujfalusi6b87a912009-04-17 15:55:08 +03001590static void twl4030_constraints(struct twl4030_priv *twl4030,
1591 struct snd_pcm_substream *mst_substream)
1592{
1593 struct snd_pcm_substream *slv_substream;
1594
1595 /* Pick the stream, which need to be constrained */
1596 if (mst_substream == twl4030->master_substream)
1597 slv_substream = twl4030->slave_substream;
1598 else if (mst_substream == twl4030->slave_substream)
1599 slv_substream = twl4030->master_substream;
1600 else /* This should not happen.. */
1601 return;
1602
1603 /* Set the constraints according to the already configured stream */
1604 snd_pcm_hw_constraint_minmax(slv_substream->runtime,
1605 SNDRV_PCM_HW_PARAM_RATE,
1606 twl4030->rate,
1607 twl4030->rate);
1608
1609 snd_pcm_hw_constraint_minmax(slv_substream->runtime,
1610 SNDRV_PCM_HW_PARAM_SAMPLE_BITS,
1611 twl4030->sample_bits,
1612 twl4030->sample_bits);
1613
1614 snd_pcm_hw_constraint_minmax(slv_substream->runtime,
1615 SNDRV_PCM_HW_PARAM_CHANNELS,
1616 twl4030->channels,
1617 twl4030->channels);
1618}
1619
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001620/* In case of 4 channel mode, the RX1 L/R for playback and the TX2 L/R for
1621 * capture has to be enabled/disabled. */
1622static void twl4030_tdm_enable(struct snd_soc_codec *codec, int direction,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +02001623 int enable)
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001624{
1625 u8 reg, mask;
1626
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +02001627 reg = twl4030_read(codec, TWL4030_REG_OPTION);
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001628
1629 if (direction == SNDRV_PCM_STREAM_PLAYBACK)
1630 mask = TWL4030_ARXL1_VRX_EN | TWL4030_ARXR1_EN;
1631 else
1632 mask = TWL4030_ATXL2_VTXL_EN | TWL4030_ATXR2_VTXR_EN;
1633
1634 if (enable)
1635 reg |= mask;
1636 else
1637 reg &= ~mask;
1638
1639 twl4030_write(codec, TWL4030_REG_OPTION, reg);
1640}
1641
Peter Ujfalusid6648da2009-04-07 09:14:00 +03001642static int twl4030_startup(struct snd_pcm_substream *substream,
1643 struct snd_soc_dai *dai)
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001644{
Mark Browne6968a12012-04-04 15:58:16 +01001645 struct snd_soc_codec *codec = dai->codec;
Mark Brownb2c812e2010-04-14 15:35:19 +09001646 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001647
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001648 if (twl4030->master_substream) {
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001649 twl4030->slave_substream = substream;
Peter Ujfalusi6b87a912009-04-17 15:55:08 +03001650 /* The DAI has one configuration for playback and capture, so
1651 * if the DAI has been already configured then constrain this
1652 * substream to match it. */
1653 if (twl4030->configured)
1654 twl4030_constraints(twl4030, twl4030->master_substream);
1655 } else {
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +02001656 if (!(twl4030_read(codec, TWL4030_REG_CODEC_MODE) &
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001657 TWL4030_OPTION_1)) {
1658 /* In option2 4 channel is not supported, set the
1659 * constraint for the first stream for channels, the
1660 * second stream will 'inherit' this cosntraint */
1661 snd_pcm_hw_constraint_minmax(substream->runtime,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +02001662 SNDRV_PCM_HW_PARAM_CHANNELS,
1663 2, 2);
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001664 }
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001665 twl4030->master_substream = substream;
Peter Ujfalusi6b87a912009-04-17 15:55:08 +03001666 }
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001667
1668 return 0;
1669}
1670
Peter Ujfalusid6648da2009-04-07 09:14:00 +03001671static void twl4030_shutdown(struct snd_pcm_substream *substream,
1672 struct snd_soc_dai *dai)
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001673{
Mark Browne6968a12012-04-04 15:58:16 +01001674 struct snd_soc_codec *codec = dai->codec;
Mark Brownb2c812e2010-04-14 15:35:19 +09001675 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001676
1677 if (twl4030->master_substream == substream)
1678 twl4030->master_substream = twl4030->slave_substream;
1679
1680 twl4030->slave_substream = NULL;
Peter Ujfalusi6b87a912009-04-17 15:55:08 +03001681
1682 /* If all streams are closed, or the remaining stream has not yet
1683 * been configured than set the DAI as not configured. */
1684 if (!twl4030->master_substream)
1685 twl4030->configured = 0;
1686 else if (!twl4030->master_substream->runtime->channels)
1687 twl4030->configured = 0;
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001688
1689 /* If the closing substream had 4 channel, do the necessary cleanup */
1690 if (substream->runtime->channels == 4)
1691 twl4030_tdm_enable(codec, substream->stream, 0);
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001692}
1693
Steve Sakomancc175572008-10-30 21:35:26 -07001694static int twl4030_hw_params(struct snd_pcm_substream *substream,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +02001695 struct snd_pcm_hw_params *params,
1696 struct snd_soc_dai *dai)
Steve Sakomancc175572008-10-30 21:35:26 -07001697{
Mark Browne6968a12012-04-04 15:58:16 +01001698 struct snd_soc_codec *codec = dai->codec;
Mark Brownb2c812e2010-04-14 15:35:19 +09001699 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Steve Sakomancc175572008-10-30 21:35:26 -07001700 u8 mode, old_mode, format, old_format;
1701
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001702 /* If the substream has 4 channel, do the necessary setup */
1703 if (params_channels(params) == 4) {
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +02001704 format = twl4030_read(codec, TWL4030_REG_AUDIO_IF);
1705 mode = twl4030_read(codec, TWL4030_REG_CODEC_MODE);
Peter Ujfalusieaf1ac82009-06-01 14:06:40 +03001706
1707 /* Safety check: are we in the correct operating mode and
1708 * the interface is in TDM mode? */
1709 if ((mode & TWL4030_OPTION_1) &&
1710 ((format & TWL4030_AIF_FORMAT) == TWL4030_AIF_FORMAT_TDM))
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001711 twl4030_tdm_enable(codec, substream->stream, 1);
1712 else
1713 return -EINVAL;
1714 }
1715
Peter Ujfalusi6b87a912009-04-17 15:55:08 +03001716 if (twl4030->configured)
1717 /* Ignoring hw_params for already configured DAI */
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001718 return 0;
1719
Steve Sakomancc175572008-10-30 21:35:26 -07001720 /* bit rate */
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +02001721 old_mode = twl4030_read(codec,
1722 TWL4030_REG_CODEC_MODE) & ~TWL4030_CODECPDZ;
Steve Sakomancc175572008-10-30 21:35:26 -07001723 mode = old_mode & ~TWL4030_APLL_RATE;
1724
1725 switch (params_rate(params)) {
1726 case 8000:
1727 mode |= TWL4030_APLL_RATE_8000;
1728 break;
1729 case 11025:
1730 mode |= TWL4030_APLL_RATE_11025;
1731 break;
1732 case 12000:
1733 mode |= TWL4030_APLL_RATE_12000;
1734 break;
1735 case 16000:
1736 mode |= TWL4030_APLL_RATE_16000;
1737 break;
1738 case 22050:
1739 mode |= TWL4030_APLL_RATE_22050;
1740 break;
1741 case 24000:
1742 mode |= TWL4030_APLL_RATE_24000;
1743 break;
1744 case 32000:
1745 mode |= TWL4030_APLL_RATE_32000;
1746 break;
1747 case 44100:
1748 mode |= TWL4030_APLL_RATE_44100;
1749 break;
1750 case 48000:
1751 mode |= TWL4030_APLL_RATE_48000;
1752 break;
Peter Ujfalusi103f2112009-04-03 14:39:05 +03001753 case 96000:
1754 mode |= TWL4030_APLL_RATE_96000;
1755 break;
Steve Sakomancc175572008-10-30 21:35:26 -07001756 default:
Peter Ujfalusi3b8a0792012-02-21 09:34:20 +02001757 dev_err(codec->dev, "%s: unknown rate %d\n", __func__,
Steve Sakomancc175572008-10-30 21:35:26 -07001758 params_rate(params));
1759 return -EINVAL;
1760 }
1761
Steve Sakomancc175572008-10-30 21:35:26 -07001762 /* sample size */
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +02001763 old_format = twl4030_read(codec, TWL4030_REG_AUDIO_IF);
Steve Sakomancc175572008-10-30 21:35:26 -07001764 format = old_format;
1765 format &= ~TWL4030_DATA_WIDTH;
Mark Brown04f630d2014-07-31 12:49:12 +01001766 switch (params_width(params)) {
1767 case 16:
Steve Sakomancc175572008-10-30 21:35:26 -07001768 format |= TWL4030_DATA_WIDTH_16S_16W;
1769 break;
Mark Brown04f630d2014-07-31 12:49:12 +01001770 case 32:
Steve Sakomancc175572008-10-30 21:35:26 -07001771 format |= TWL4030_DATA_WIDTH_32S_24W;
1772 break;
1773 default:
Mark Brown04f630d2014-07-31 12:49:12 +01001774 dev_err(codec->dev, "%s: unsupported bits/sample %d\n",
1775 __func__, params_width(params));
Steve Sakomancc175572008-10-30 21:35:26 -07001776 return -EINVAL;
1777 }
1778
Peter Ujfalusi2046f172010-05-26 11:38:20 +03001779 if (format != old_format || mode != old_mode) {
1780 if (twl4030->codec_powered) {
1781 /*
1782 * If the codec is powered, than we need to toggle the
1783 * codec power.
1784 */
1785 twl4030_codec_enable(codec, 0);
1786 twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
1787 twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
1788 twl4030_codec_enable(codec, 1);
1789 } else {
1790 twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
1791 twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
1792 }
Steve Sakomancc175572008-10-30 21:35:26 -07001793 }
Peter Ujfalusi6b87a912009-04-17 15:55:08 +03001794
1795 /* Store the important parameters for the DAI configuration and set
1796 * the DAI as configured */
1797 twl4030->configured = 1;
1798 twl4030->rate = params_rate(params);
1799 twl4030->sample_bits = hw_param_interval(params,
1800 SNDRV_PCM_HW_PARAM_SAMPLE_BITS)->min;
1801 twl4030->channels = params_channels(params);
1802
1803 /* If both playback and capture streams are open, and one of them
1804 * is setting the hw parameters right now (since we are here), set
1805 * constraints to the other stream to match the current one. */
1806 if (twl4030->slave_substream)
1807 twl4030_constraints(twl4030, substream);
1808
Steve Sakomancc175572008-10-30 21:35:26 -07001809 return 0;
1810}
1811
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +02001812static int twl4030_set_dai_sysclk(struct snd_soc_dai *codec_dai, int clk_id,
1813 unsigned int freq, int dir)
Steve Sakomancc175572008-10-30 21:35:26 -07001814{
1815 struct snd_soc_codec *codec = codec_dai->codec;
Mark Brownb2c812e2010-04-14 15:35:19 +09001816 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Steve Sakomancc175572008-10-30 21:35:26 -07001817
1818 switch (freq) {
1819 case 19200000:
Steve Sakomancc175572008-10-30 21:35:26 -07001820 case 26000000:
Steve Sakomancc175572008-10-30 21:35:26 -07001821 case 38400000:
Steve Sakomancc175572008-10-30 21:35:26 -07001822 break;
1823 default:
Peter Ujfalusi3b8a0792012-02-21 09:34:20 +02001824 dev_err(codec->dev, "Unsupported HFCLKIN: %u\n", freq);
Steve Sakomancc175572008-10-30 21:35:26 -07001825 return -EINVAL;
1826 }
1827
Peter Ujfalusi68d01952009-11-04 09:58:20 +02001828 if ((freq / 1000) != twl4030->sysclk) {
1829 dev_err(codec->dev,
Peter Ujfalusi3b8a0792012-02-21 09:34:20 +02001830 "Mismatch in HFCLKIN: %u (configured: %u)\n",
Peter Ujfalusi68d01952009-11-04 09:58:20 +02001831 freq, twl4030->sysclk * 1000);
1832 return -EINVAL;
1833 }
Steve Sakomancc175572008-10-30 21:35:26 -07001834
1835 return 0;
1836}
1837
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +02001838static int twl4030_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)
Steve Sakomancc175572008-10-30 21:35:26 -07001839{
1840 struct snd_soc_codec *codec = codec_dai->codec;
Peter Ujfalusi2046f172010-05-26 11:38:20 +03001841 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Steve Sakomancc175572008-10-30 21:35:26 -07001842 u8 old_format, format;
1843
1844 /* get format */
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +02001845 old_format = twl4030_read(codec, TWL4030_REG_AUDIO_IF);
Steve Sakomancc175572008-10-30 21:35:26 -07001846 format = old_format;
1847
1848 /* set master/slave audio interface */
1849 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1850 case SND_SOC_DAIFMT_CBM_CFM:
1851 format &= ~(TWL4030_AIF_SLAVE_EN);
Grazvydas Ignotase18c94d2008-11-05 23:51:05 +02001852 format &= ~(TWL4030_CLK256FS_EN);
Steve Sakomancc175572008-10-30 21:35:26 -07001853 break;
1854 case SND_SOC_DAIFMT_CBS_CFS:
Steve Sakomancc175572008-10-30 21:35:26 -07001855 format |= TWL4030_AIF_SLAVE_EN;
Grazvydas Ignotase18c94d2008-11-05 23:51:05 +02001856 format |= TWL4030_CLK256FS_EN;
Steve Sakomancc175572008-10-30 21:35:26 -07001857 break;
1858 default:
1859 return -EINVAL;
1860 }
1861
1862 /* interface format */
1863 format &= ~TWL4030_AIF_FORMAT;
1864 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1865 case SND_SOC_DAIFMT_I2S:
1866 format |= TWL4030_AIF_FORMAT_CODEC;
1867 break;
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001868 case SND_SOC_DAIFMT_DSP_A:
1869 format |= TWL4030_AIF_FORMAT_TDM;
1870 break;
Steve Sakomancc175572008-10-30 21:35:26 -07001871 default:
1872 return -EINVAL;
1873 }
1874
1875 if (format != old_format) {
Peter Ujfalusi2046f172010-05-26 11:38:20 +03001876 if (twl4030->codec_powered) {
1877 /*
1878 * If the codec is powered, than we need to toggle the
1879 * codec power.
1880 */
1881 twl4030_codec_enable(codec, 0);
1882 twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
1883 twl4030_codec_enable(codec, 1);
1884 } else {
1885 twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
1886 }
Steve Sakomancc175572008-10-30 21:35:26 -07001887 }
1888
1889 return 0;
1890}
1891
Lopez Cruz, Misael68140442009-07-03 02:21:39 -05001892static int twl4030_set_tristate(struct snd_soc_dai *dai, int tristate)
1893{
1894 struct snd_soc_codec *codec = dai->codec;
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +02001895 u8 reg = twl4030_read(codec, TWL4030_REG_AUDIO_IF);
Lopez Cruz, Misael68140442009-07-03 02:21:39 -05001896
1897 if (tristate)
1898 reg |= TWL4030_AIF_TRI_EN;
1899 else
1900 reg &= ~TWL4030_AIF_TRI_EN;
1901
1902 return twl4030_write(codec, TWL4030_REG_AUDIO_IF, reg);
1903}
1904
Misael Lopez Cruzb7a755a2009-05-17 20:02:31 -05001905/* In case of voice mode, the RX1 L(VRX) for downlink and the TX2 L/R
1906 * (VTXL, VTXR) for uplink has to be enabled/disabled. */
1907static void twl4030_voice_enable(struct snd_soc_codec *codec, int direction,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +02001908 int enable)
Misael Lopez Cruzb7a755a2009-05-17 20:02:31 -05001909{
1910 u8 reg, mask;
1911
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +02001912 reg = twl4030_read(codec, TWL4030_REG_OPTION);
Misael Lopez Cruzb7a755a2009-05-17 20:02:31 -05001913
1914 if (direction == SNDRV_PCM_STREAM_PLAYBACK)
1915 mask = TWL4030_ARXL1_VRX_EN;
1916 else
1917 mask = TWL4030_ATXL2_VTXL_EN | TWL4030_ATXR2_VTXR_EN;
1918
1919 if (enable)
1920 reg |= mask;
1921 else
1922 reg &= ~mask;
1923
1924 twl4030_write(codec, TWL4030_REG_OPTION, reg);
1925}
1926
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001927static int twl4030_voice_startup(struct snd_pcm_substream *substream,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +02001928 struct snd_soc_dai *dai)
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001929{
Mark Browne6968a12012-04-04 15:58:16 +01001930 struct snd_soc_codec *codec = dai->codec;
Mark Brownb2c812e2010-04-14 15:35:19 +09001931 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001932 u8 mode;
1933
1934 /* If the system master clock is not 26MHz, the voice PCM interface is
Lucas De Marchi25985ed2011-03-30 22:57:33 -03001935 * not available.
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001936 */
Peter Ujfalusi68d01952009-11-04 09:58:20 +02001937 if (twl4030->sysclk != 26000) {
Peter Ujfalusi3b8a0792012-02-21 09:34:20 +02001938 dev_err(codec->dev,
1939 "%s: HFCLKIN is %u KHz, voice interface needs 26MHz\n",
1940 __func__, twl4030->sysclk);
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001941 return -EINVAL;
1942 }
1943
1944 /* If the codec mode is not option2, the voice PCM interface is not
Lucas De Marchi25985ed2011-03-30 22:57:33 -03001945 * available.
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001946 */
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +02001947 mode = twl4030_read(codec, TWL4030_REG_CODEC_MODE)
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001948 & TWL4030_OPT_MODE;
1949
1950 if (mode != TWL4030_OPTION_2) {
Peter Ujfalusi3b8a0792012-02-21 09:34:20 +02001951 dev_err(codec->dev, "%s: the codec mode is not option2\n",
1952 __func__);
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001953 return -EINVAL;
1954 }
1955
1956 return 0;
1957}
1958
Misael Lopez Cruzb7a755a2009-05-17 20:02:31 -05001959static void twl4030_voice_shutdown(struct snd_pcm_substream *substream,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +02001960 struct snd_soc_dai *dai)
Misael Lopez Cruzb7a755a2009-05-17 20:02:31 -05001961{
Mark Browne6968a12012-04-04 15:58:16 +01001962 struct snd_soc_codec *codec = dai->codec;
Misael Lopez Cruzb7a755a2009-05-17 20:02:31 -05001963
1964 /* Enable voice digital filters */
1965 twl4030_voice_enable(codec, substream->stream, 0);
1966}
1967
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001968static int twl4030_voice_hw_params(struct snd_pcm_substream *substream,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +02001969 struct snd_pcm_hw_params *params,
1970 struct snd_soc_dai *dai)
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001971{
Mark Browne6968a12012-04-04 15:58:16 +01001972 struct snd_soc_codec *codec = dai->codec;
Peter Ujfalusi2046f172010-05-26 11:38:20 +03001973 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001974 u8 old_mode, mode;
1975
Misael Lopez Cruzb7a755a2009-05-17 20:02:31 -05001976 /* Enable voice digital filters */
1977 twl4030_voice_enable(codec, substream->stream, 1);
1978
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001979 /* bit rate */
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +02001980 old_mode = twl4030_read(codec,
1981 TWL4030_REG_CODEC_MODE) & ~TWL4030_CODECPDZ;
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001982 mode = old_mode;
1983
1984 switch (params_rate(params)) {
1985 case 8000:
1986 mode &= ~(TWL4030_SEL_16K);
1987 break;
1988 case 16000:
1989 mode |= TWL4030_SEL_16K;
1990 break;
1991 default:
Peter Ujfalusi3b8a0792012-02-21 09:34:20 +02001992 dev_err(codec->dev, "%s: unknown rate %d\n", __func__,
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001993 params_rate(params));
1994 return -EINVAL;
1995 }
1996
1997 if (mode != old_mode) {
Peter Ujfalusi2046f172010-05-26 11:38:20 +03001998 if (twl4030->codec_powered) {
1999 /*
2000 * If the codec is powered, than we need to toggle the
2001 * codec power.
2002 */
2003 twl4030_codec_enable(codec, 0);
2004 twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
2005 twl4030_codec_enable(codec, 1);
2006 } else {
2007 twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
2008 }
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002009 }
2010
2011 return 0;
2012}
2013
2014static int twl4030_voice_set_dai_sysclk(struct snd_soc_dai *codec_dai,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +02002015 int clk_id, unsigned int freq, int dir)
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002016{
2017 struct snd_soc_codec *codec = codec_dai->codec;
Takashi Iwaid4a8ca22010-04-20 08:20:31 +02002018 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002019
Peter Ujfalusi68d01952009-11-04 09:58:20 +02002020 if (freq != 26000000) {
Peter Ujfalusi3b8a0792012-02-21 09:34:20 +02002021 dev_err(codec->dev,
2022 "%s: HFCLKIN is %u KHz, voice interface needs 26MHz\n",
2023 __func__, freq / 1000);
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002024 return -EINVAL;
2025 }
Peter Ujfalusi68d01952009-11-04 09:58:20 +02002026 if ((freq / 1000) != twl4030->sysclk) {
2027 dev_err(codec->dev,
Peter Ujfalusi3b8a0792012-02-21 09:34:20 +02002028 "Mismatch in HFCLKIN: %u (configured: %u)\n",
Peter Ujfalusi68d01952009-11-04 09:58:20 +02002029 freq, twl4030->sysclk * 1000);
2030 return -EINVAL;
2031 }
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002032 return 0;
2033}
2034
2035static int twl4030_voice_set_dai_fmt(struct snd_soc_dai *codec_dai,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +02002036 unsigned int fmt)
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002037{
2038 struct snd_soc_codec *codec = codec_dai->codec;
Peter Ujfalusi2046f172010-05-26 11:38:20 +03002039 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002040 u8 old_format, format;
2041
2042 /* get format */
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +02002043 old_format = twl4030_read(codec, TWL4030_REG_VOICE_IF);
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002044 format = old_format;
2045
2046 /* set master/slave audio interface */
2047 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
Lopez Cruz, Misaelc2643012009-06-19 03:23:42 -05002048 case SND_SOC_DAIFMT_CBM_CFM:
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002049 format &= ~(TWL4030_VIF_SLAVE_EN);
2050 break;
2051 case SND_SOC_DAIFMT_CBS_CFS:
2052 format |= TWL4030_VIF_SLAVE_EN;
2053 break;
2054 default:
2055 return -EINVAL;
2056 }
2057
2058 /* clock inversion */
2059 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
2060 case SND_SOC_DAIFMT_IB_NF:
2061 format &= ~(TWL4030_VIF_FORMAT);
2062 break;
2063 case SND_SOC_DAIFMT_NB_IF:
2064 format |= TWL4030_VIF_FORMAT;
2065 break;
2066 default:
2067 return -EINVAL;
2068 }
2069
2070 if (format != old_format) {
Peter Ujfalusi2046f172010-05-26 11:38:20 +03002071 if (twl4030->codec_powered) {
2072 /*
2073 * If the codec is powered, than we need to toggle the
2074 * codec power.
2075 */
2076 twl4030_codec_enable(codec, 0);
2077 twl4030_write(codec, TWL4030_REG_VOICE_IF, format);
2078 twl4030_codec_enable(codec, 1);
2079 } else {
2080 twl4030_write(codec, TWL4030_REG_VOICE_IF, format);
2081 }
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002082 }
2083
2084 return 0;
2085}
2086
Lopez Cruz, Misael68140442009-07-03 02:21:39 -05002087static int twl4030_voice_set_tristate(struct snd_soc_dai *dai, int tristate)
2088{
2089 struct snd_soc_codec *codec = dai->codec;
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +02002090 u8 reg = twl4030_read(codec, TWL4030_REG_VOICE_IF);
Lopez Cruz, Misael68140442009-07-03 02:21:39 -05002091
2092 if (tristate)
2093 reg |= TWL4030_VIF_TRI_EN;
2094 else
2095 reg &= ~TWL4030_VIF_TRI_EN;
2096
2097 return twl4030_write(codec, TWL4030_REG_VOICE_IF, reg);
2098}
2099
Jarkko Nikulabbba9442008-11-12 17:05:41 +02002100#define TWL4030_RATES (SNDRV_PCM_RATE_8000_48000)
Peter Ujfalusidcdeda42010-12-14 13:45:29 +02002101#define TWL4030_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
Steve Sakomancc175572008-10-30 21:35:26 -07002102
Lars-Peter Clausen85e76522011-11-23 11:40:40 +01002103static const struct snd_soc_dai_ops twl4030_dai_hifi_ops = {
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02002104 .startup = twl4030_startup,
2105 .shutdown = twl4030_shutdown,
Joonyoung Shim10d9e3d2009-03-16 21:23:35 +09002106 .hw_params = twl4030_hw_params,
2107 .set_sysclk = twl4030_set_dai_sysclk,
2108 .set_fmt = twl4030_set_dai_fmt,
Lopez Cruz, Misael68140442009-07-03 02:21:39 -05002109 .set_tristate = twl4030_set_tristate,
Joonyoung Shim10d9e3d2009-03-16 21:23:35 +09002110};
2111
Lars-Peter Clausen85e76522011-11-23 11:40:40 +01002112static const struct snd_soc_dai_ops twl4030_dai_voice_ops = {
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002113 .startup = twl4030_voice_startup,
Misael Lopez Cruzb7a755a2009-05-17 20:02:31 -05002114 .shutdown = twl4030_voice_shutdown,
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002115 .hw_params = twl4030_voice_hw_params,
2116 .set_sysclk = twl4030_voice_set_dai_sysclk,
2117 .set_fmt = twl4030_voice_set_dai_fmt,
Lopez Cruz, Misael68140442009-07-03 02:21:39 -05002118 .set_tristate = twl4030_voice_set_tristate,
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002119};
2120
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002121static struct snd_soc_dai_driver twl4030_dai[] = {
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002122{
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002123 .name = "twl4030-hifi",
Steve Sakomancc175572008-10-30 21:35:26 -07002124 .playback = {
Peter Ujfalusib4852b72009-05-22 15:12:15 +03002125 .stream_name = "HiFi Playback",
Steve Sakomancc175572008-10-30 21:35:26 -07002126 .channels_min = 2,
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03002127 .channels_max = 4,
Peter Ujfalusi31ad0f32009-03-27 10:39:07 +02002128 .rates = TWL4030_RATES | SNDRV_PCM_RATE_96000,
Peter Ujfalusi8819f652012-01-18 12:18:26 +01002129 .formats = TWL4030_FORMATS,
2130 .sig_bits = 24,},
Steve Sakomancc175572008-10-30 21:35:26 -07002131 .capture = {
Peter Ujfalusi7f51e7d2012-09-20 16:32:02 +03002132 .stream_name = "HiFi Capture",
Steve Sakomancc175572008-10-30 21:35:26 -07002133 .channels_min = 2,
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03002134 .channels_max = 4,
Steve Sakomancc175572008-10-30 21:35:26 -07002135 .rates = TWL4030_RATES,
Peter Ujfalusi8819f652012-01-18 12:18:26 +01002136 .formats = TWL4030_FORMATS,
2137 .sig_bits = 24,},
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002138 .ops = &twl4030_dai_hifi_ops,
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002139},
2140{
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002141 .name = "twl4030-voice",
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002142 .playback = {
Peter Ujfalusib4852b72009-05-22 15:12:15 +03002143 .stream_name = "Voice Playback",
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002144 .channels_min = 1,
2145 .channels_max = 1,
2146 .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000,
2147 .formats = SNDRV_PCM_FMTBIT_S16_LE,},
2148 .capture = {
Peter Ujfalusi7f51e7d2012-09-20 16:32:02 +03002149 .stream_name = "Voice Capture",
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002150 .channels_min = 1,
2151 .channels_max = 2,
2152 .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000,
2153 .formats = SNDRV_PCM_FMTBIT_S16_LE,},
2154 .ops = &twl4030_dai_voice_ops,
2155},
Steve Sakomancc175572008-10-30 21:35:26 -07002156};
Steve Sakomancc175572008-10-30 21:35:26 -07002157
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002158static int twl4030_soc_probe(struct snd_soc_codec *codec)
Steve Sakomancc175572008-10-30 21:35:26 -07002159{
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002160 struct twl4030_priv *twl4030;
Steve Sakomancc175572008-10-30 21:35:26 -07002161
Peter Ujfalusif2b1ce42012-09-10 13:46:30 +03002162 twl4030 = devm_kzalloc(codec->dev, sizeof(struct twl4030_priv),
2163 GFP_KERNEL);
Sachin Kamat04cc41a2014-06-20 15:29:03 +05302164 if (!twl4030)
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002165 return -ENOMEM;
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002166 snd_soc_codec_set_drvdata(codec, twl4030);
2167 /* Set the defaults, and power up the codec */
Peter Ujfalusi57fe7252011-05-31 12:02:49 +03002168 twl4030->sysclk = twl4030_audio_get_mclk() / 1000;
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002169
2170 twl4030_init_chip(codec);
Steve Sakomancc175572008-10-30 21:35:26 -07002171
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002172 return 0;
Steve Sakomancc175572008-10-30 21:35:26 -07002173}
2174
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002175static int twl4030_soc_remove(struct snd_soc_codec *codec)
Steve Sakomancc175572008-10-30 21:35:26 -07002176{
Axel Lin5b3b0fa2010-11-19 17:31:08 +08002177 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Peter Ujfalusi182f73f2012-09-10 13:46:31 +03002178 struct twl4030_codec_data *pdata = twl4030->pdata;
Axel Lin5b3b0fa2010-11-19 17:31:08 +08002179
Peter Ujfalusi281ecd12012-09-10 13:46:27 +03002180 if (pdata && pdata->hs_extmute && gpio_is_valid(pdata->hs_extmute_gpio))
2181 gpio_free(pdata->hs_extmute_gpio);
2182
Steve Sakomancc175572008-10-30 21:35:26 -07002183 return 0;
2184}
2185
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002186static struct snd_soc_codec_driver soc_codec_dev_twl4030 = {
2187 .probe = twl4030_soc_probe,
2188 .remove = twl4030_soc_remove,
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +02002189 .read = twl4030_read,
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002190 .write = twl4030_write,
2191 .set_bias_level = twl4030_set_bias_level,
Axel Lineb3032f2012-01-27 18:02:09 +08002192 .idle_bias_off = true,
Peter Ujfalusif7c93f02011-10-11 13:11:32 +03002193
2194 .controls = twl4030_snd_controls,
2195 .num_controls = ARRAY_SIZE(twl4030_snd_controls),
2196 .dapm_widgets = twl4030_dapm_widgets,
2197 .num_dapm_widgets = ARRAY_SIZE(twl4030_dapm_widgets),
2198 .dapm_routes = intercon,
2199 .num_dapm_routes = ARRAY_SIZE(intercon),
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002200};
2201
Bill Pemberton05c4c6f2012-12-07 09:26:20 -05002202static int twl4030_codec_probe(struct platform_device *pdev)
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002203{
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002204 return snd_soc_register_codec(&pdev->dev, &soc_codec_dev_twl4030,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +02002205 twl4030_dai, ARRAY_SIZE(twl4030_dai));
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002206}
2207
Bill Pemberton05c4c6f2012-12-07 09:26:20 -05002208static int twl4030_codec_remove(struct platform_device *pdev)
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002209{
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002210 snd_soc_unregister_codec(&pdev->dev);
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002211 return 0;
2212}
2213
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002214MODULE_ALIAS("platform:twl4030-codec");
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002215
2216static struct platform_driver twl4030_codec_driver = {
2217 .probe = twl4030_codec_probe,
Bill Pemberton05c4c6f2012-12-07 09:26:20 -05002218 .remove = twl4030_codec_remove,
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002219 .driver = {
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002220 .name = "twl4030-codec",
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002221 },
Steve Sakomancc175572008-10-30 21:35:26 -07002222};
Steve Sakomancc175572008-10-30 21:35:26 -07002223
Mark Brown5bbcc3c2011-11-23 22:52:08 +00002224module_platform_driver(twl4030_codec_driver);
Mark Brown64089b82008-12-08 19:17:58 +00002225
Steve Sakomancc175572008-10-30 21:35:26 -07002226MODULE_DESCRIPTION("ASoC TWL4030 codec driver");
2227MODULE_AUTHOR("Steve Sakoman");
2228MODULE_LICENSE("GPL");