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Jeff Garzik669a5db2006-08-29 18:12:40 -04001/*
2 * pata_opti.c - ATI PATA for new ATA layer
3 * (C) 2005 Red Hat Inc
Jeff Garzik669a5db2006-08-29 18:12:40 -04004 *
5 * Based on
6 * linux/drivers/ide/pci/opti621.c Version 0.7 Sept 10, 2002
7 *
8 * Copyright (C) 1996-1998 Linus Torvalds & authors (see below)
9 *
10 * Authors:
11 * Jaromir Koutek <miri@punknet.cz>,
12 * Jan Harkes <jaharkes@cwi.nl>,
13 * Mark Lord <mlord@pobox.com>
14 * Some parts of code are from ali14xx.c and from rz1000.c.
15 *
16 * Also consulted the FreeBSD prototype driver by Kevin Day to try
17 * and resolve some confusions. Further documentation can be found in
18 * Ralf Brown's interrupt list
19 *
20 * If you have other variants of the Opti range (Viper/Vendetta) please
21 * try this driver with those PCI idents and report back. For the later
22 * chips see the pata_optidma driver
23 *
24 */
25
26#include <linux/kernel.h>
27#include <linux/module.h>
28#include <linux/pci.h>
Jeff Garzik669a5db2006-08-29 18:12:40 -040029#include <linux/blkdev.h>
30#include <linux/delay.h>
31#include <scsi/scsi_host.h>
32#include <linux/libata.h>
33
34#define DRV_NAME "pata_opti"
Jeff Garzika0fcdc02007-03-09 07:24:15 -050035#define DRV_VERSION "0.2.9"
Jeff Garzik669a5db2006-08-29 18:12:40 -040036
37enum {
38 READ_REG = 0, /* index of Read cycle timing register */
39 WRITE_REG = 1, /* index of Write cycle timing register */
40 CNTRL_REG = 3, /* index of Control register */
41 STRAP_REG = 5, /* index of Strap register */
42 MISC_REG = 6 /* index of Miscellaneous register */
43};
44
45/**
46 * opti_pre_reset - probe begin
Tejun Heocc0680a2007-08-06 18:36:23 +090047 * @link: ATA link
Tejun Heod4b2bab2007-02-02 16:50:52 +090048 * @deadline: deadline jiffies for the operation
Jeff Garzik669a5db2006-08-29 18:12:40 -040049 *
50 * Set up cable type and use generic probe init
51 */
52
Tejun Heocc0680a2007-08-06 18:36:23 +090053static int opti_pre_reset(struct ata_link *link, unsigned long deadline)
Jeff Garzik669a5db2006-08-29 18:12:40 -040054{
Tejun Heocc0680a2007-08-06 18:36:23 +090055 struct ata_port *ap = link->ap;
Jeff Garzik669a5db2006-08-29 18:12:40 -040056 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
57 static const struct pci_bits opti_enable_bits[] = {
58 { 0x45, 1, 0x80, 0x00 },
59 { 0x40, 1, 0x08, 0x00 }
60 };
61
Alan Coxc9619222006-09-26 17:53:38 +010062 if (!pci_test_config_bits(pdev, &opti_enable_bits[ap->port_no]))
63 return -ENOENT;
Tejun Heod4b2bab2007-02-02 16:50:52 +090064
Tejun Heo9363c382008-04-07 22:47:16 +090065 return ata_sff_prereset(link, deadline);
Jeff Garzik669a5db2006-08-29 18:12:40 -040066}
67
68/**
Jeff Garzik669a5db2006-08-29 18:12:40 -040069 * opti_write_reg - control register setup
70 * @ap: ATA port
71 * @value: value
72 * @reg: control register number
73 *
74 * The Opti uses magic 'trapdoor' register accesses to do configuration
75 * rather than using PCI space as other controllers do. The double inw
76 * on the error register activates configuration mode. We can then write
77 * the control register
78 */
79
80static void opti_write_reg(struct ata_port *ap, u8 val, int reg)
81{
Tejun Heo0d5ff562007-02-01 15:06:36 +090082 void __iomem *regio = ap->ioaddr.cmd_addr;
Jeff Garzik669a5db2006-08-29 18:12:40 -040083
84 /* These 3 unlock the control register access */
Tejun Heo0d5ff562007-02-01 15:06:36 +090085 ioread16(regio + 1);
86 ioread16(regio + 1);
87 iowrite8(3, regio + 2);
Jeff Garzik669a5db2006-08-29 18:12:40 -040088
89 /* Do the I/O */
Tejun Heo0d5ff562007-02-01 15:06:36 +090090 iowrite8(val, regio + reg);
Jeff Garzik669a5db2006-08-29 18:12:40 -040091
92 /* Relock */
Tejun Heo0d5ff562007-02-01 15:06:36 +090093 iowrite8(0x83, regio + 2);
Jeff Garzik669a5db2006-08-29 18:12:40 -040094}
95
Jeff Garzik669a5db2006-08-29 18:12:40 -040096/**
97 * opti_set_piomode - set initial PIO mode data
98 * @ap: ATA interface
99 * @adev: ATA device
100 *
101 * Called to do the PIO mode setup. Timing numbers are taken from
102 * the FreeBSD driver then pre computed to keep the code clean. There
103 * are two tables depending on the hardware clock speed.
104 */
105
106static void opti_set_piomode(struct ata_port *ap, struct ata_device *adev)
107{
108 struct ata_device *pair = ata_dev_pair(adev);
109 int clock;
110 int pio = adev->pio_mode - XFER_PIO_0;
Tejun Heo0d5ff562007-02-01 15:06:36 +0900111 void __iomem *regio = ap->ioaddr.cmd_addr;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400112 u8 addr;
113
114 /* Address table precomputed with prefetch off and a DCLK of 2 */
115 static const u8 addr_timing[2][5] = {
116 { 0x30, 0x20, 0x20, 0x10, 0x10 },
117 { 0x20, 0x20, 0x10, 0x10, 0x10 }
118 };
119 static const u8 data_rec_timing[2][5] = {
120 { 0x6B, 0x56, 0x42, 0x32, 0x31 },
121 { 0x58, 0x44, 0x32, 0x22, 0x21 }
122 };
123
Tejun Heo0d5ff562007-02-01 15:06:36 +0900124 iowrite8(0xff, regio + 5);
125 clock = ioread16(regio + 5) & 1;
Jeff Garzik669a5db2006-08-29 18:12:40 -0400126
127 /*
128 * As with many controllers the address setup time is shared
129 * and must suit both devices if present.
130 */
131
132 addr = addr_timing[clock][pio];
133 if (pair) {
134 /* Hardware constraint */
135 u8 pair_addr = addr_timing[clock][pair->pio_mode - XFER_PIO_0];
136 if (pair_addr > addr)
137 addr = pair_addr;
138 }
139
140 /* Commence primary programming sequence */
141 opti_write_reg(ap, adev->devno, MISC_REG);
142 opti_write_reg(ap, data_rec_timing[clock][pio], READ_REG);
143 opti_write_reg(ap, data_rec_timing[clock][pio], WRITE_REG);
144 opti_write_reg(ap, addr, MISC_REG);
145
146 /* Programming sequence complete, override strapping */
147 opti_write_reg(ap, 0x85, CNTRL_REG);
148}
149
150static struct scsi_host_template opti_sht = {
Tejun Heo68d1d072008-03-25 12:22:49 +0900151 ATA_PIO_SHT(DRV_NAME),
Jeff Garzik669a5db2006-08-29 18:12:40 -0400152};
153
154static struct ata_port_operations opti_port_ops = {
Tejun Heo029cfd62008-03-25 12:22:49 +0900155 .inherits = &ata_sff_port_ops,
Jeff Garzika0fcdc02007-03-09 07:24:15 -0500156 .cable_detect = ata_cable_40wire,
Tejun Heo029cfd62008-03-25 12:22:49 +0900157 .set_piomode = opti_set_piomode,
Tejun Heoa1efdab2008-03-25 12:22:50 +0900158 .prereset = opti_pre_reset,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400159};
160
161static int opti_init_one(struct pci_dev *dev, const struct pci_device_id *id)
162{
Tejun Heo1626aeb2007-05-04 12:43:58 +0200163 static const struct ata_port_info info = {
Jeff Garzik1d2808f2007-05-28 06:59:48 -0400164 .flags = ATA_FLAG_SLAVE_POSS,
Erik Inge Bolsø14bdef92009-03-14 21:38:24 +0100165 .pio_mask = ATA_PIO4,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400166 .port_ops = &opti_port_ops
167 };
Tejun Heo1626aeb2007-05-04 12:43:58 +0200168 const struct ata_port_info *ppi[] = { &info, NULL };
Jeff Garzik669a5db2006-08-29 18:12:40 -0400169
Joe Perches06296a12011-04-15 15:52:00 -0700170 ata_print_version_once(&dev->dev, DRV_VERSION);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400171
Alan Cox16ea0fc2010-02-23 02:26:06 -0500172 return ata_pci_sff_init_one(dev, ppi, &opti_sht, NULL, 0);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400173}
174
175static const struct pci_device_id opti[] = {
Jeff Garzik2d2744f2006-09-28 20:21:59 -0400176 { PCI_VDEVICE(OPTI, PCI_DEVICE_ID_OPTI_82C621), 0 },
177 { PCI_VDEVICE(OPTI, PCI_DEVICE_ID_OPTI_82C825), 1 },
178
179 { },
Jeff Garzik669a5db2006-08-29 18:12:40 -0400180};
181
182static struct pci_driver opti_pci_driver = {
Jeff Garzik2d2744f2006-09-28 20:21:59 -0400183 .name = DRV_NAME,
Jeff Garzik669a5db2006-08-29 18:12:40 -0400184 .id_table = opti,
185 .probe = opti_init_one,
Alan30ced0f2006-11-22 16:57:36 +0000186 .remove = ata_pci_remove_one,
Tejun Heo438ac6d2007-03-02 17:31:26 +0900187#ifdef CONFIG_PM
Alan30ced0f2006-11-22 16:57:36 +0000188 .suspend = ata_pci_device_suspend,
189 .resume = ata_pci_device_resume,
Tejun Heo438ac6d2007-03-02 17:31:26 +0900190#endif
Jeff Garzik669a5db2006-08-29 18:12:40 -0400191};
192
Axel Lin2fc75da2012-04-19 13:43:05 +0800193module_pci_driver(opti_pci_driver);
Jeff Garzik669a5db2006-08-29 18:12:40 -0400194
195MODULE_AUTHOR("Alan Cox");
196MODULE_DESCRIPTION("low-level driver for Opti 621/621X");
197MODULE_LICENSE("GPL");
198MODULE_DEVICE_TABLE(pci, opti);
199MODULE_VERSION(DRV_VERSION);