Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright © 2006-2007 Intel Corporation |
| 3 | * Copyright (c) 2006 Dave Airlie <airlied@linux.ie> |
| 4 | * |
| 5 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 6 | * copy of this software and associated documentation files (the "Software"), |
| 7 | * to deal in the Software without restriction, including without limitation |
| 8 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| 9 | * and/or sell copies of the Software, and to permit persons to whom the |
| 10 | * Software is furnished to do so, subject to the following conditions: |
| 11 | * |
| 12 | * The above copyright notice and this permission notice (including the next |
| 13 | * paragraph) shall be included in all copies or substantial portions of the |
| 14 | * Software. |
| 15 | * |
| 16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 17 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 18 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 19 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 20 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
| 21 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER |
| 22 | * DEALINGS IN THE SOFTWARE. |
| 23 | * |
| 24 | * Authors: |
| 25 | * Eric Anholt <eric@anholt.net> |
| 26 | * Dave Airlie <airlied@linux.ie> |
| 27 | * Jesse Barnes <jesse.barnes@intel.com> |
| 28 | */ |
| 29 | |
Jesse Barnes | c1c7af6 | 2009-09-10 15:28:03 -0700 | [diff] [blame^] | 30 | #include <acpi/button.h> |
Paul Collins | 565dcd4 | 2009-02-04 23:05:41 +1300 | [diff] [blame] | 31 | #include <linux/dmi.h> |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 32 | #include <linux/i2c.h> |
| 33 | #include "drmP.h" |
| 34 | #include "drm.h" |
| 35 | #include "drm_crtc.h" |
| 36 | #include "drm_edid.h" |
| 37 | #include "intel_drv.h" |
| 38 | #include "i915_drm.h" |
| 39 | #include "i915_drv.h" |
Zhao Yakui | e99da35 | 2009-06-26 09:46:18 +0800 | [diff] [blame] | 40 | #include <linux/acpi.h> |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 41 | |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame] | 42 | /* Private structure for the integrated LVDS support */ |
| 43 | struct intel_lvds_priv { |
| 44 | int fitting_mode; |
| 45 | u32 pfit_control; |
| 46 | u32 pfit_pgm_ratios; |
| 47 | }; |
| 48 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 49 | /** |
| 50 | * Sets the backlight level. |
| 51 | * |
| 52 | * \param level backlight level, from 0 to intel_lvds_get_max_backlight(). |
| 53 | */ |
| 54 | static void intel_lvds_set_backlight(struct drm_device *dev, int level) |
| 55 | { |
| 56 | struct drm_i915_private *dev_priv = dev->dev_private; |
Zhenyu Wang | 541998a | 2009-06-05 15:38:44 +0800 | [diff] [blame] | 57 | u32 blc_pwm_ctl, reg; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 58 | |
Zhenyu Wang | 541998a | 2009-06-05 15:38:44 +0800 | [diff] [blame] | 59 | if (IS_IGDNG(dev)) |
| 60 | reg = BLC_PWM_CPU_CTL; |
| 61 | else |
| 62 | reg = BLC_PWM_CTL; |
| 63 | |
| 64 | blc_pwm_ctl = I915_READ(reg) & ~BACKLIGHT_DUTY_CYCLE_MASK; |
| 65 | I915_WRITE(reg, (blc_pwm_ctl | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 66 | (level << BACKLIGHT_DUTY_CYCLE_SHIFT))); |
| 67 | } |
| 68 | |
| 69 | /** |
| 70 | * Returns the maximum level of the backlight duty cycle field. |
| 71 | */ |
| 72 | static u32 intel_lvds_get_max_backlight(struct drm_device *dev) |
| 73 | { |
| 74 | struct drm_i915_private *dev_priv = dev->dev_private; |
Zhenyu Wang | 541998a | 2009-06-05 15:38:44 +0800 | [diff] [blame] | 75 | u32 reg; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 76 | |
Zhenyu Wang | 541998a | 2009-06-05 15:38:44 +0800 | [diff] [blame] | 77 | if (IS_IGDNG(dev)) |
| 78 | reg = BLC_PWM_PCH_CTL2; |
| 79 | else |
| 80 | reg = BLC_PWM_CTL; |
| 81 | |
| 82 | return ((I915_READ(reg) & BACKLIGHT_MODULATION_FREQ_MASK) >> |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 83 | BACKLIGHT_MODULATION_FREQ_SHIFT) * 2; |
| 84 | } |
| 85 | |
| 86 | /** |
| 87 | * Sets the power state for the panel. |
| 88 | */ |
| 89 | static void intel_lvds_set_power(struct drm_device *dev, bool on) |
| 90 | { |
| 91 | struct drm_i915_private *dev_priv = dev->dev_private; |
Zhenyu Wang | 541998a | 2009-06-05 15:38:44 +0800 | [diff] [blame] | 92 | u32 pp_status, ctl_reg, status_reg; |
| 93 | |
| 94 | if (IS_IGDNG(dev)) { |
| 95 | ctl_reg = PCH_PP_CONTROL; |
| 96 | status_reg = PCH_PP_STATUS; |
| 97 | } else { |
| 98 | ctl_reg = PP_CONTROL; |
| 99 | status_reg = PP_STATUS; |
| 100 | } |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 101 | |
| 102 | if (on) { |
Zhenyu Wang | 541998a | 2009-06-05 15:38:44 +0800 | [diff] [blame] | 103 | I915_WRITE(ctl_reg, I915_READ(ctl_reg) | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 104 | POWER_TARGET_ON); |
| 105 | do { |
Zhenyu Wang | 541998a | 2009-06-05 15:38:44 +0800 | [diff] [blame] | 106 | pp_status = I915_READ(status_reg); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 107 | } while ((pp_status & PP_ON) == 0); |
| 108 | |
| 109 | intel_lvds_set_backlight(dev, dev_priv->backlight_duty_cycle); |
| 110 | } else { |
| 111 | intel_lvds_set_backlight(dev, 0); |
| 112 | |
Zhenyu Wang | 541998a | 2009-06-05 15:38:44 +0800 | [diff] [blame] | 113 | I915_WRITE(ctl_reg, I915_READ(ctl_reg) & |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 114 | ~POWER_TARGET_ON); |
| 115 | do { |
Zhenyu Wang | 541998a | 2009-06-05 15:38:44 +0800 | [diff] [blame] | 116 | pp_status = I915_READ(status_reg); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 117 | } while (pp_status & PP_ON); |
| 118 | } |
| 119 | } |
| 120 | |
| 121 | static void intel_lvds_dpms(struct drm_encoder *encoder, int mode) |
| 122 | { |
| 123 | struct drm_device *dev = encoder->dev; |
| 124 | |
| 125 | if (mode == DRM_MODE_DPMS_ON) |
| 126 | intel_lvds_set_power(dev, true); |
| 127 | else |
| 128 | intel_lvds_set_power(dev, false); |
| 129 | |
| 130 | /* XXX: We never power down the LVDS pairs. */ |
| 131 | } |
| 132 | |
| 133 | static void intel_lvds_save(struct drm_connector *connector) |
| 134 | { |
| 135 | struct drm_device *dev = connector->dev; |
| 136 | struct drm_i915_private *dev_priv = dev->dev_private; |
Zhenyu Wang | 541998a | 2009-06-05 15:38:44 +0800 | [diff] [blame] | 137 | u32 pp_on_reg, pp_off_reg, pp_ctl_reg, pp_div_reg; |
| 138 | u32 pwm_ctl_reg; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 139 | |
Zhenyu Wang | 541998a | 2009-06-05 15:38:44 +0800 | [diff] [blame] | 140 | if (IS_IGDNG(dev)) { |
| 141 | pp_on_reg = PCH_PP_ON_DELAYS; |
| 142 | pp_off_reg = PCH_PP_OFF_DELAYS; |
| 143 | pp_ctl_reg = PCH_PP_CONTROL; |
| 144 | pp_div_reg = PCH_PP_DIVISOR; |
| 145 | pwm_ctl_reg = BLC_PWM_CPU_CTL; |
| 146 | } else { |
| 147 | pp_on_reg = PP_ON_DELAYS; |
| 148 | pp_off_reg = PP_OFF_DELAYS; |
| 149 | pp_ctl_reg = PP_CONTROL; |
| 150 | pp_div_reg = PP_DIVISOR; |
| 151 | pwm_ctl_reg = BLC_PWM_CTL; |
| 152 | } |
| 153 | |
| 154 | dev_priv->savePP_ON = I915_READ(pp_on_reg); |
| 155 | dev_priv->savePP_OFF = I915_READ(pp_off_reg); |
| 156 | dev_priv->savePP_CONTROL = I915_READ(pp_ctl_reg); |
| 157 | dev_priv->savePP_DIVISOR = I915_READ(pp_div_reg); |
| 158 | dev_priv->saveBLC_PWM_CTL = I915_READ(pwm_ctl_reg); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 159 | dev_priv->backlight_duty_cycle = (dev_priv->saveBLC_PWM_CTL & |
| 160 | BACKLIGHT_DUTY_CYCLE_MASK); |
| 161 | |
| 162 | /* |
| 163 | * If the light is off at server startup, just make it full brightness |
| 164 | */ |
| 165 | if (dev_priv->backlight_duty_cycle == 0) |
| 166 | dev_priv->backlight_duty_cycle = |
| 167 | intel_lvds_get_max_backlight(dev); |
| 168 | } |
| 169 | |
| 170 | static void intel_lvds_restore(struct drm_connector *connector) |
| 171 | { |
| 172 | struct drm_device *dev = connector->dev; |
| 173 | struct drm_i915_private *dev_priv = dev->dev_private; |
Zhenyu Wang | 541998a | 2009-06-05 15:38:44 +0800 | [diff] [blame] | 174 | u32 pp_on_reg, pp_off_reg, pp_ctl_reg, pp_div_reg; |
| 175 | u32 pwm_ctl_reg; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 176 | |
Zhenyu Wang | 541998a | 2009-06-05 15:38:44 +0800 | [diff] [blame] | 177 | if (IS_IGDNG(dev)) { |
| 178 | pp_on_reg = PCH_PP_ON_DELAYS; |
| 179 | pp_off_reg = PCH_PP_OFF_DELAYS; |
| 180 | pp_ctl_reg = PCH_PP_CONTROL; |
| 181 | pp_div_reg = PCH_PP_DIVISOR; |
| 182 | pwm_ctl_reg = BLC_PWM_CPU_CTL; |
| 183 | } else { |
| 184 | pp_on_reg = PP_ON_DELAYS; |
| 185 | pp_off_reg = PP_OFF_DELAYS; |
| 186 | pp_ctl_reg = PP_CONTROL; |
| 187 | pp_div_reg = PP_DIVISOR; |
| 188 | pwm_ctl_reg = BLC_PWM_CTL; |
| 189 | } |
| 190 | |
| 191 | I915_WRITE(pwm_ctl_reg, dev_priv->saveBLC_PWM_CTL); |
| 192 | I915_WRITE(pp_on_reg, dev_priv->savePP_ON); |
| 193 | I915_WRITE(pp_off_reg, dev_priv->savePP_OFF); |
| 194 | I915_WRITE(pp_div_reg, dev_priv->savePP_DIVISOR); |
| 195 | I915_WRITE(pp_ctl_reg, dev_priv->savePP_CONTROL); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 196 | if (dev_priv->savePP_CONTROL & POWER_TARGET_ON) |
| 197 | intel_lvds_set_power(dev, true); |
| 198 | else |
| 199 | intel_lvds_set_power(dev, false); |
| 200 | } |
| 201 | |
| 202 | static int intel_lvds_mode_valid(struct drm_connector *connector, |
| 203 | struct drm_display_mode *mode) |
| 204 | { |
| 205 | struct drm_device *dev = connector->dev; |
| 206 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 207 | struct drm_display_mode *fixed_mode = dev_priv->panel_fixed_mode; |
| 208 | |
| 209 | if (fixed_mode) { |
| 210 | if (mode->hdisplay > fixed_mode->hdisplay) |
| 211 | return MODE_PANEL; |
| 212 | if (mode->vdisplay > fixed_mode->vdisplay) |
| 213 | return MODE_PANEL; |
| 214 | } |
| 215 | |
| 216 | return MODE_OK; |
| 217 | } |
| 218 | |
| 219 | static bool intel_lvds_mode_fixup(struct drm_encoder *encoder, |
| 220 | struct drm_display_mode *mode, |
| 221 | struct drm_display_mode *adjusted_mode) |
| 222 | { |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame] | 223 | /* |
| 224 | * float point operation is not supported . So the PANEL_RATIO_FACTOR |
| 225 | * is defined, which can avoid the float point computation when |
| 226 | * calculating the panel ratio. |
| 227 | */ |
| 228 | #define PANEL_RATIO_FACTOR 8192 |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 229 | struct drm_device *dev = encoder->dev; |
| 230 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 231 | struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc); |
| 232 | struct drm_encoder *tmp_encoder; |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame] | 233 | struct intel_output *intel_output = enc_to_intel_output(encoder); |
| 234 | struct intel_lvds_priv *lvds_priv = intel_output->dev_priv; |
| 235 | u32 pfit_control = 0, pfit_pgm_ratios = 0; |
| 236 | int left_border = 0, right_border = 0, top_border = 0; |
| 237 | int bottom_border = 0; |
| 238 | bool border = 0; |
| 239 | int panel_ratio, desired_ratio, vert_scale, horiz_scale; |
| 240 | int horiz_ratio, vert_ratio; |
Zhao Yakui | aa0261f | 2009-06-22 15:31:26 +0800 | [diff] [blame] | 241 | u32 hsync_width, vsync_width; |
| 242 | u32 hblank_width, vblank_width; |
| 243 | u32 hsync_pos, vsync_pos; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 244 | |
| 245 | /* Should never happen!! */ |
| 246 | if (!IS_I965G(dev) && intel_crtc->pipe == 0) { |
Keith Packard | 1ae8c0a | 2009-06-28 15:42:17 -0700 | [diff] [blame] | 247 | DRM_ERROR("Can't support LVDS on pipe A\n"); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 248 | return false; |
| 249 | } |
| 250 | |
| 251 | /* Should never happen!! */ |
| 252 | list_for_each_entry(tmp_encoder, &dev->mode_config.encoder_list, head) { |
| 253 | if (tmp_encoder != encoder && tmp_encoder->crtc == encoder->crtc) { |
Keith Packard | 1ae8c0a | 2009-06-28 15:42:17 -0700 | [diff] [blame] | 254 | DRM_ERROR("Can't enable LVDS and another " |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 255 | "encoder on the same pipe\n"); |
| 256 | return false; |
| 257 | } |
| 258 | } |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame] | 259 | /* If we don't have a panel mode, there is nothing we can do */ |
| 260 | if (dev_priv->panel_fixed_mode == NULL) |
| 261 | return true; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 262 | /* |
| 263 | * If we have timings from the BIOS for the panel, put them in |
| 264 | * to the adjusted mode. The CRTC will be set up for this mode, |
| 265 | * with the panel scaling set up to source from the H/VDisplay |
| 266 | * of the original mode. |
| 267 | */ |
| 268 | if (dev_priv->panel_fixed_mode != NULL) { |
| 269 | adjusted_mode->hdisplay = dev_priv->panel_fixed_mode->hdisplay; |
| 270 | adjusted_mode->hsync_start = |
| 271 | dev_priv->panel_fixed_mode->hsync_start; |
| 272 | adjusted_mode->hsync_end = |
| 273 | dev_priv->panel_fixed_mode->hsync_end; |
| 274 | adjusted_mode->htotal = dev_priv->panel_fixed_mode->htotal; |
| 275 | adjusted_mode->vdisplay = dev_priv->panel_fixed_mode->vdisplay; |
| 276 | adjusted_mode->vsync_start = |
| 277 | dev_priv->panel_fixed_mode->vsync_start; |
| 278 | adjusted_mode->vsync_end = |
| 279 | dev_priv->panel_fixed_mode->vsync_end; |
| 280 | adjusted_mode->vtotal = dev_priv->panel_fixed_mode->vtotal; |
| 281 | adjusted_mode->clock = dev_priv->panel_fixed_mode->clock; |
| 282 | drm_mode_set_crtcinfo(adjusted_mode, CRTC_INTERLACE_HALVE_V); |
| 283 | } |
| 284 | |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame] | 285 | /* Make sure pre-965s set dither correctly */ |
| 286 | if (!IS_I965G(dev)) { |
| 287 | if (dev_priv->panel_wants_dither || dev_priv->lvds_dither) |
| 288 | pfit_control |= PANEL_8TO6_DITHER_ENABLE; |
| 289 | } |
| 290 | |
| 291 | /* Native modes don't need fitting */ |
| 292 | if (adjusted_mode->hdisplay == mode->hdisplay && |
| 293 | adjusted_mode->vdisplay == mode->vdisplay) { |
| 294 | pfit_pgm_ratios = 0; |
| 295 | border = 0; |
| 296 | goto out; |
| 297 | } |
| 298 | |
| 299 | /* 965+ wants fuzzy fitting */ |
| 300 | if (IS_I965G(dev)) |
| 301 | pfit_control |= (intel_crtc->pipe << PFIT_PIPE_SHIFT) | |
| 302 | PFIT_FILTER_FUZZY; |
| 303 | |
Zhao Yakui | aa0261f | 2009-06-22 15:31:26 +0800 | [diff] [blame] | 304 | hsync_width = adjusted_mode->crtc_hsync_end - |
| 305 | adjusted_mode->crtc_hsync_start; |
| 306 | vsync_width = adjusted_mode->crtc_vsync_end - |
| 307 | adjusted_mode->crtc_vsync_start; |
| 308 | hblank_width = adjusted_mode->crtc_hblank_end - |
| 309 | adjusted_mode->crtc_hblank_start; |
| 310 | vblank_width = adjusted_mode->crtc_vblank_end - |
| 311 | adjusted_mode->crtc_vblank_start; |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame] | 312 | /* |
| 313 | * Deal with panel fitting options. Figure out how to stretch the |
| 314 | * image based on its aspect ratio & the current panel fitting mode. |
| 315 | */ |
| 316 | panel_ratio = adjusted_mode->hdisplay * PANEL_RATIO_FACTOR / |
| 317 | adjusted_mode->vdisplay; |
| 318 | desired_ratio = mode->hdisplay * PANEL_RATIO_FACTOR / |
| 319 | mode->vdisplay; |
| 320 | /* |
| 321 | * Enable automatic panel scaling for non-native modes so that they fill |
| 322 | * the screen. Should be enabled before the pipe is enabled, according |
| 323 | * to register description and PRM. |
| 324 | * Change the value here to see the borders for debugging |
| 325 | */ |
| 326 | I915_WRITE(BCLRPAT_A, 0); |
| 327 | I915_WRITE(BCLRPAT_B, 0); |
| 328 | |
| 329 | switch (lvds_priv->fitting_mode) { |
Jesse Barnes | 53bd838 | 2009-07-01 10:04:40 -0700 | [diff] [blame] | 330 | case DRM_MODE_SCALE_CENTER: |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame] | 331 | /* |
| 332 | * For centered modes, we have to calculate border widths & |
| 333 | * heights and modify the values programmed into the CRTC. |
| 334 | */ |
| 335 | left_border = (adjusted_mode->hdisplay - mode->hdisplay) / 2; |
| 336 | right_border = left_border; |
| 337 | if (mode->hdisplay & 1) |
| 338 | right_border++; |
| 339 | top_border = (adjusted_mode->vdisplay - mode->vdisplay) / 2; |
| 340 | bottom_border = top_border; |
| 341 | if (mode->vdisplay & 1) |
| 342 | bottom_border++; |
| 343 | /* Set active & border values */ |
| 344 | adjusted_mode->crtc_hdisplay = mode->hdisplay; |
Zhao Yakui | aa0261f | 2009-06-22 15:31:26 +0800 | [diff] [blame] | 345 | /* Keep the boder be even */ |
| 346 | if (right_border & 1) |
| 347 | right_border++; |
| 348 | /* use the border directly instead of border minuse one */ |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame] | 349 | adjusted_mode->crtc_hblank_start = mode->hdisplay + |
Zhao Yakui | aa0261f | 2009-06-22 15:31:26 +0800 | [diff] [blame] | 350 | right_border; |
| 351 | /* keep the blank width constant */ |
| 352 | adjusted_mode->crtc_hblank_end = |
| 353 | adjusted_mode->crtc_hblank_start + hblank_width; |
| 354 | /* get the hsync pos relative to hblank start */ |
| 355 | hsync_pos = (hblank_width - hsync_width) / 2; |
| 356 | /* keep the hsync pos be even */ |
| 357 | if (hsync_pos & 1) |
| 358 | hsync_pos++; |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame] | 359 | adjusted_mode->crtc_hsync_start = |
Zhao Yakui | aa0261f | 2009-06-22 15:31:26 +0800 | [diff] [blame] | 360 | adjusted_mode->crtc_hblank_start + hsync_pos; |
| 361 | /* keep the hsync width constant */ |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame] | 362 | adjusted_mode->crtc_hsync_end = |
Zhao Yakui | aa0261f | 2009-06-22 15:31:26 +0800 | [diff] [blame] | 363 | adjusted_mode->crtc_hsync_start + hsync_width; |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame] | 364 | adjusted_mode->crtc_vdisplay = mode->vdisplay; |
Zhao Yakui | aa0261f | 2009-06-22 15:31:26 +0800 | [diff] [blame] | 365 | /* use the border instead of border minus one */ |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame] | 366 | adjusted_mode->crtc_vblank_start = mode->vdisplay + |
Zhao Yakui | aa0261f | 2009-06-22 15:31:26 +0800 | [diff] [blame] | 367 | bottom_border; |
| 368 | /* keep the vblank width constant */ |
| 369 | adjusted_mode->crtc_vblank_end = |
| 370 | adjusted_mode->crtc_vblank_start + vblank_width; |
| 371 | /* get the vsync start postion relative to vblank start */ |
| 372 | vsync_pos = (vblank_width - vsync_width) / 2; |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame] | 373 | adjusted_mode->crtc_vsync_start = |
Zhao Yakui | aa0261f | 2009-06-22 15:31:26 +0800 | [diff] [blame] | 374 | adjusted_mode->crtc_vblank_start + vsync_pos; |
| 375 | /* keep the vsync width constant */ |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame] | 376 | adjusted_mode->crtc_vsync_end = |
Zhao Yakui | aa0261f | 2009-06-22 15:31:26 +0800 | [diff] [blame] | 377 | adjusted_mode->crtc_vblank_start + vsync_width; |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame] | 378 | border = 1; |
| 379 | break; |
| 380 | case DRM_MODE_SCALE_ASPECT: |
| 381 | /* Scale but preserve the spect ratio */ |
| 382 | pfit_control |= PFIT_ENABLE; |
| 383 | if (IS_I965G(dev)) { |
| 384 | /* 965+ is easy, it does everything in hw */ |
| 385 | if (panel_ratio > desired_ratio) |
| 386 | pfit_control |= PFIT_SCALING_PILLAR; |
| 387 | else if (panel_ratio < desired_ratio) |
| 388 | pfit_control |= PFIT_SCALING_LETTER; |
| 389 | else |
| 390 | pfit_control |= PFIT_SCALING_AUTO; |
| 391 | } else { |
| 392 | /* |
| 393 | * For earlier chips we have to calculate the scaling |
| 394 | * ratio by hand and program it into the |
| 395 | * PFIT_PGM_RATIO register |
| 396 | */ |
| 397 | u32 horiz_bits, vert_bits, bits = 12; |
| 398 | horiz_ratio = mode->hdisplay * PANEL_RATIO_FACTOR/ |
| 399 | adjusted_mode->hdisplay; |
| 400 | vert_ratio = mode->vdisplay * PANEL_RATIO_FACTOR/ |
| 401 | adjusted_mode->vdisplay; |
| 402 | horiz_scale = adjusted_mode->hdisplay * |
| 403 | PANEL_RATIO_FACTOR / mode->hdisplay; |
| 404 | vert_scale = adjusted_mode->vdisplay * |
| 405 | PANEL_RATIO_FACTOR / mode->vdisplay; |
| 406 | |
| 407 | /* retain aspect ratio */ |
| 408 | if (panel_ratio > desired_ratio) { /* Pillar */ |
| 409 | u32 scaled_width; |
| 410 | scaled_width = mode->hdisplay * vert_scale / |
| 411 | PANEL_RATIO_FACTOR; |
| 412 | horiz_ratio = vert_ratio; |
| 413 | pfit_control |= (VERT_AUTO_SCALE | |
| 414 | VERT_INTERP_BILINEAR | |
| 415 | HORIZ_INTERP_BILINEAR); |
| 416 | /* Pillar will have left/right borders */ |
| 417 | left_border = (adjusted_mode->hdisplay - |
| 418 | scaled_width) / 2; |
| 419 | right_border = left_border; |
| 420 | if (mode->hdisplay & 1) /* odd resolutions */ |
| 421 | right_border++; |
Zhao Yakui | aa0261f | 2009-06-22 15:31:26 +0800 | [diff] [blame] | 422 | /* keep the border be even */ |
| 423 | if (right_border & 1) |
| 424 | right_border++; |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame] | 425 | adjusted_mode->crtc_hdisplay = scaled_width; |
Zhao Yakui | aa0261f | 2009-06-22 15:31:26 +0800 | [diff] [blame] | 426 | /* use border instead of border minus one */ |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame] | 427 | adjusted_mode->crtc_hblank_start = |
Zhao Yakui | aa0261f | 2009-06-22 15:31:26 +0800 | [diff] [blame] | 428 | scaled_width + right_border; |
| 429 | /* keep the hblank width constant */ |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame] | 430 | adjusted_mode->crtc_hblank_end = |
Zhao Yakui | aa0261f | 2009-06-22 15:31:26 +0800 | [diff] [blame] | 431 | adjusted_mode->crtc_hblank_start + |
| 432 | hblank_width; |
| 433 | /* |
| 434 | * get the hsync start pos relative to |
| 435 | * hblank start |
| 436 | */ |
| 437 | hsync_pos = (hblank_width - hsync_width) / 2; |
| 438 | /* keep the hsync_pos be even */ |
| 439 | if (hsync_pos & 1) |
| 440 | hsync_pos++; |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame] | 441 | adjusted_mode->crtc_hsync_start = |
Zhao Yakui | aa0261f | 2009-06-22 15:31:26 +0800 | [diff] [blame] | 442 | adjusted_mode->crtc_hblank_start + |
| 443 | hsync_pos; |
| 444 | /* keept hsync width constant */ |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame] | 445 | adjusted_mode->crtc_hsync_end = |
Zhao Yakui | aa0261f | 2009-06-22 15:31:26 +0800 | [diff] [blame] | 446 | adjusted_mode->crtc_hsync_start + |
| 447 | hsync_width; |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame] | 448 | border = 1; |
| 449 | } else if (panel_ratio < desired_ratio) { /* letter */ |
| 450 | u32 scaled_height = mode->vdisplay * |
| 451 | horiz_scale / PANEL_RATIO_FACTOR; |
| 452 | vert_ratio = horiz_ratio; |
| 453 | pfit_control |= (HORIZ_AUTO_SCALE | |
| 454 | VERT_INTERP_BILINEAR | |
| 455 | HORIZ_INTERP_BILINEAR); |
| 456 | /* Letterbox will have top/bottom border */ |
| 457 | top_border = (adjusted_mode->vdisplay - |
| 458 | scaled_height) / 2; |
| 459 | bottom_border = top_border; |
| 460 | if (mode->vdisplay & 1) |
| 461 | bottom_border++; |
| 462 | adjusted_mode->crtc_vdisplay = scaled_height; |
Zhao Yakui | aa0261f | 2009-06-22 15:31:26 +0800 | [diff] [blame] | 463 | /* use border instead of border minus one */ |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame] | 464 | adjusted_mode->crtc_vblank_start = |
Zhao Yakui | aa0261f | 2009-06-22 15:31:26 +0800 | [diff] [blame] | 465 | scaled_height + bottom_border; |
| 466 | /* keep the vblank width constant */ |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame] | 467 | adjusted_mode->crtc_vblank_end = |
Zhao Yakui | aa0261f | 2009-06-22 15:31:26 +0800 | [diff] [blame] | 468 | adjusted_mode->crtc_vblank_start + |
| 469 | vblank_width; |
| 470 | /* |
| 471 | * get the vsync start pos relative to |
| 472 | * vblank start |
| 473 | */ |
| 474 | vsync_pos = (vblank_width - vsync_width) / 2; |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame] | 475 | adjusted_mode->crtc_vsync_start = |
Zhao Yakui | aa0261f | 2009-06-22 15:31:26 +0800 | [diff] [blame] | 476 | adjusted_mode->crtc_vblank_start + |
| 477 | vsync_pos; |
| 478 | /* keep the vsync width constant */ |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame] | 479 | adjusted_mode->crtc_vsync_end = |
Zhao Yakui | aa0261f | 2009-06-22 15:31:26 +0800 | [diff] [blame] | 480 | adjusted_mode->crtc_vsync_start + |
| 481 | vsync_width; |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame] | 482 | border = 1; |
| 483 | } else { |
| 484 | /* Aspects match, Let hw scale both directions */ |
| 485 | pfit_control |= (VERT_AUTO_SCALE | |
| 486 | HORIZ_AUTO_SCALE | |
| 487 | VERT_INTERP_BILINEAR | |
| 488 | HORIZ_INTERP_BILINEAR); |
| 489 | } |
| 490 | horiz_bits = (1 << bits) * horiz_ratio / |
| 491 | PANEL_RATIO_FACTOR; |
| 492 | vert_bits = (1 << bits) * vert_ratio / |
| 493 | PANEL_RATIO_FACTOR; |
| 494 | pfit_pgm_ratios = |
| 495 | ((vert_bits << PFIT_VERT_SCALE_SHIFT) & |
| 496 | PFIT_VERT_SCALE_MASK) | |
| 497 | ((horiz_bits << PFIT_HORIZ_SCALE_SHIFT) & |
| 498 | PFIT_HORIZ_SCALE_MASK); |
| 499 | } |
| 500 | break; |
| 501 | |
| 502 | case DRM_MODE_SCALE_FULLSCREEN: |
| 503 | /* |
| 504 | * Full scaling, even if it changes the aspect ratio. |
| 505 | * Fortunately this is all done for us in hw. |
| 506 | */ |
| 507 | pfit_control |= PFIT_ENABLE; |
| 508 | if (IS_I965G(dev)) |
| 509 | pfit_control |= PFIT_SCALING_AUTO; |
| 510 | else |
| 511 | pfit_control |= (VERT_AUTO_SCALE | HORIZ_AUTO_SCALE | |
| 512 | VERT_INTERP_BILINEAR | |
| 513 | HORIZ_INTERP_BILINEAR); |
| 514 | break; |
| 515 | default: |
| 516 | break; |
| 517 | } |
| 518 | |
| 519 | out: |
| 520 | lvds_priv->pfit_control = pfit_control; |
| 521 | lvds_priv->pfit_pgm_ratios = pfit_pgm_ratios; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 522 | /* |
| 523 | * XXX: It would be nice to support lower refresh rates on the |
| 524 | * panels to reduce power consumption, and perhaps match the |
| 525 | * user's requested refresh rate. |
| 526 | */ |
| 527 | |
| 528 | return true; |
| 529 | } |
| 530 | |
| 531 | static void intel_lvds_prepare(struct drm_encoder *encoder) |
| 532 | { |
| 533 | struct drm_device *dev = encoder->dev; |
| 534 | struct drm_i915_private *dev_priv = dev->dev_private; |
Zhenyu Wang | 541998a | 2009-06-05 15:38:44 +0800 | [diff] [blame] | 535 | u32 reg; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 536 | |
Zhenyu Wang | 541998a | 2009-06-05 15:38:44 +0800 | [diff] [blame] | 537 | if (IS_IGDNG(dev)) |
| 538 | reg = BLC_PWM_CPU_CTL; |
| 539 | else |
| 540 | reg = BLC_PWM_CTL; |
| 541 | |
| 542 | dev_priv->saveBLC_PWM_CTL = I915_READ(reg); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 543 | dev_priv->backlight_duty_cycle = (dev_priv->saveBLC_PWM_CTL & |
| 544 | BACKLIGHT_DUTY_CYCLE_MASK); |
| 545 | |
| 546 | intel_lvds_set_power(dev, false); |
| 547 | } |
| 548 | |
| 549 | static void intel_lvds_commit( struct drm_encoder *encoder) |
| 550 | { |
| 551 | struct drm_device *dev = encoder->dev; |
| 552 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 553 | |
| 554 | if (dev_priv->backlight_duty_cycle == 0) |
| 555 | dev_priv->backlight_duty_cycle = |
| 556 | intel_lvds_get_max_backlight(dev); |
| 557 | |
| 558 | intel_lvds_set_power(dev, true); |
| 559 | } |
| 560 | |
| 561 | static void intel_lvds_mode_set(struct drm_encoder *encoder, |
| 562 | struct drm_display_mode *mode, |
| 563 | struct drm_display_mode *adjusted_mode) |
| 564 | { |
| 565 | struct drm_device *dev = encoder->dev; |
| 566 | struct drm_i915_private *dev_priv = dev->dev_private; |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame] | 567 | struct intel_output *intel_output = enc_to_intel_output(encoder); |
| 568 | struct intel_lvds_priv *lvds_priv = intel_output->dev_priv; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 569 | |
| 570 | /* |
| 571 | * The LVDS pin pair will already have been turned on in the |
| 572 | * intel_crtc_mode_set since it has a large impact on the DPLL |
| 573 | * settings. |
| 574 | */ |
| 575 | |
Zhenyu Wang | 541998a | 2009-06-05 15:38:44 +0800 | [diff] [blame] | 576 | /* No panel fitting yet, fixme */ |
| 577 | if (IS_IGDNG(dev)) |
| 578 | return; |
| 579 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 580 | /* |
| 581 | * Enable automatic panel scaling so that non-native modes fill the |
| 582 | * screen. Should be enabled before the pipe is enabled, according to |
| 583 | * register description and PRM. |
| 584 | */ |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame] | 585 | I915_WRITE(PFIT_PGM_RATIOS, lvds_priv->pfit_pgm_ratios); |
| 586 | I915_WRITE(PFIT_CONTROL, lvds_priv->pfit_control); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 587 | } |
| 588 | |
| 589 | /** |
| 590 | * Detect the LVDS connection. |
| 591 | * |
| 592 | * This always returns CONNECTOR_STATUS_CONNECTED. This connector should only have |
| 593 | * been set up if the LVDS was actually connected anyway. |
| 594 | */ |
| 595 | static enum drm_connector_status intel_lvds_detect(struct drm_connector *connector) |
| 596 | { |
| 597 | return connector_status_connected; |
| 598 | } |
| 599 | |
| 600 | /** |
| 601 | * Return the list of DDC modes if available, or the BIOS fixed mode otherwise. |
| 602 | */ |
| 603 | static int intel_lvds_get_modes(struct drm_connector *connector) |
| 604 | { |
| 605 | struct drm_device *dev = connector->dev; |
| 606 | struct intel_output *intel_output = to_intel_output(connector); |
| 607 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 608 | int ret = 0; |
| 609 | |
| 610 | ret = intel_ddc_get_modes(intel_output); |
| 611 | |
| 612 | if (ret) |
| 613 | return ret; |
| 614 | |
| 615 | /* Didn't get an EDID, so |
| 616 | * Set wide sync ranges so we get all modes |
| 617 | * handed to valid_mode for checking |
| 618 | */ |
| 619 | connector->display_info.min_vfreq = 0; |
| 620 | connector->display_info.max_vfreq = 200; |
| 621 | connector->display_info.min_hfreq = 0; |
| 622 | connector->display_info.max_hfreq = 200; |
| 623 | |
| 624 | if (dev_priv->panel_fixed_mode != NULL) { |
| 625 | struct drm_display_mode *mode; |
| 626 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 627 | mode = drm_mode_duplicate(dev, dev_priv->panel_fixed_mode); |
| 628 | drm_mode_probed_add(connector, mode); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 629 | |
| 630 | return 1; |
| 631 | } |
| 632 | |
| 633 | return 0; |
| 634 | } |
| 635 | |
Jesse Barnes | c1c7af6 | 2009-09-10 15:28:03 -0700 | [diff] [blame^] | 636 | static int intel_lid_notify(struct notifier_block *nb, unsigned long val, |
| 637 | void *unused) |
| 638 | { |
| 639 | struct drm_i915_private *dev_priv = |
| 640 | container_of(nb, struct drm_i915_private, lid_notifier); |
| 641 | struct drm_device *dev = dev_priv->dev; |
| 642 | |
| 643 | if (acpi_lid_open()) |
| 644 | drm_helper_resume_force_mode(dev); |
| 645 | |
| 646 | return NOTIFY_OK; |
| 647 | } |
| 648 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 649 | /** |
| 650 | * intel_lvds_destroy - unregister and free LVDS structures |
| 651 | * @connector: connector to free |
| 652 | * |
| 653 | * Unregister the DDC bus for this connector then free the driver private |
| 654 | * structure. |
| 655 | */ |
| 656 | static void intel_lvds_destroy(struct drm_connector *connector) |
| 657 | { |
Jesse Barnes | c1c7af6 | 2009-09-10 15:28:03 -0700 | [diff] [blame^] | 658 | struct drm_device *dev = connector->dev; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 659 | struct intel_output *intel_output = to_intel_output(connector); |
Jesse Barnes | c1c7af6 | 2009-09-10 15:28:03 -0700 | [diff] [blame^] | 660 | struct drm_i915_private *dev_priv = dev->dev_private; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 661 | |
| 662 | if (intel_output->ddc_bus) |
| 663 | intel_i2c_destroy(intel_output->ddc_bus); |
Jesse Barnes | c1c7af6 | 2009-09-10 15:28:03 -0700 | [diff] [blame^] | 664 | if (dev_priv->lid_notifier.notifier_call) |
| 665 | acpi_lid_notifier_unregister(&dev_priv->lid_notifier); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 666 | drm_sysfs_connector_remove(connector); |
| 667 | drm_connector_cleanup(connector); |
| 668 | kfree(connector); |
| 669 | } |
| 670 | |
Jesse Barnes | 335041e | 2009-01-22 22:22:06 +1000 | [diff] [blame] | 671 | static int intel_lvds_set_property(struct drm_connector *connector, |
| 672 | struct drm_property *property, |
| 673 | uint64_t value) |
| 674 | { |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame] | 675 | struct drm_device *dev = connector->dev; |
| 676 | struct intel_output *intel_output = |
| 677 | to_intel_output(connector); |
| 678 | |
| 679 | if (property == dev->mode_config.scaling_mode_property && |
| 680 | connector->encoder) { |
| 681 | struct drm_crtc *crtc = connector->encoder->crtc; |
| 682 | struct intel_lvds_priv *lvds_priv = intel_output->dev_priv; |
Jesse Barnes | 53bd838 | 2009-07-01 10:04:40 -0700 | [diff] [blame] | 683 | if (value == DRM_MODE_SCALE_NONE) { |
| 684 | DRM_DEBUG_KMS("no scaling not supported\n"); |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame] | 685 | return 0; |
| 686 | } |
| 687 | if (lvds_priv->fitting_mode == value) { |
| 688 | /* the LVDS scaling property is not changed */ |
| 689 | return 0; |
| 690 | } |
| 691 | lvds_priv->fitting_mode = value; |
| 692 | if (crtc && crtc->enabled) { |
| 693 | /* |
| 694 | * If the CRTC is enabled, the display will be changed |
| 695 | * according to the new panel fitting mode. |
| 696 | */ |
| 697 | drm_crtc_helper_set_mode(crtc, &crtc->mode, |
| 698 | crtc->x, crtc->y, crtc->fb); |
| 699 | } |
| 700 | } |
| 701 | |
Jesse Barnes | 335041e | 2009-01-22 22:22:06 +1000 | [diff] [blame] | 702 | return 0; |
| 703 | } |
| 704 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 705 | static const struct drm_encoder_helper_funcs intel_lvds_helper_funcs = { |
| 706 | .dpms = intel_lvds_dpms, |
| 707 | .mode_fixup = intel_lvds_mode_fixup, |
| 708 | .prepare = intel_lvds_prepare, |
| 709 | .mode_set = intel_lvds_mode_set, |
| 710 | .commit = intel_lvds_commit, |
| 711 | }; |
| 712 | |
| 713 | static const struct drm_connector_helper_funcs intel_lvds_connector_helper_funcs = { |
| 714 | .get_modes = intel_lvds_get_modes, |
| 715 | .mode_valid = intel_lvds_mode_valid, |
| 716 | .best_encoder = intel_best_encoder, |
| 717 | }; |
| 718 | |
| 719 | static const struct drm_connector_funcs intel_lvds_connector_funcs = { |
Keith Packard | c9fb15f | 2009-05-30 20:42:28 -0700 | [diff] [blame] | 720 | .dpms = drm_helper_connector_dpms, |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 721 | .save = intel_lvds_save, |
| 722 | .restore = intel_lvds_restore, |
| 723 | .detect = intel_lvds_detect, |
| 724 | .fill_modes = drm_helper_probe_single_connector_modes, |
Jesse Barnes | 335041e | 2009-01-22 22:22:06 +1000 | [diff] [blame] | 725 | .set_property = intel_lvds_set_property, |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 726 | .destroy = intel_lvds_destroy, |
| 727 | }; |
| 728 | |
| 729 | |
| 730 | static void intel_lvds_enc_destroy(struct drm_encoder *encoder) |
| 731 | { |
| 732 | drm_encoder_cleanup(encoder); |
| 733 | } |
| 734 | |
| 735 | static const struct drm_encoder_funcs intel_lvds_enc_funcs = { |
| 736 | .destroy = intel_lvds_enc_destroy, |
| 737 | }; |
| 738 | |
Jarod Wilson | 425d244 | 2009-05-05 10:00:25 -0400 | [diff] [blame] | 739 | static int __init intel_no_lvds_dmi_callback(const struct dmi_system_id *id) |
| 740 | { |
Zhao Yakui | 8a4c47f | 2009-07-20 13:48:04 +0800 | [diff] [blame] | 741 | DRM_DEBUG_KMS("Skipping LVDS initialization for %s\n", id->ident); |
Jarod Wilson | 425d244 | 2009-05-05 10:00:25 -0400 | [diff] [blame] | 742 | return 1; |
| 743 | } |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 744 | |
Jarod Wilson | 425d244 | 2009-05-05 10:00:25 -0400 | [diff] [blame] | 745 | /* These systems claim to have LVDS, but really don't */ |
Jaswinder Singh Rajput | 93c05f2 | 2009-06-04 09:41:19 +1000 | [diff] [blame] | 746 | static const struct dmi_system_id intel_no_lvds[] = { |
Jarod Wilson | 425d244 | 2009-05-05 10:00:25 -0400 | [diff] [blame] | 747 | { |
| 748 | .callback = intel_no_lvds_dmi_callback, |
| 749 | .ident = "Apple Mac Mini (Core series)", |
| 750 | .matches = { |
Keith Packard | 98acd46 | 2009-06-14 12:31:58 -0700 | [diff] [blame] | 751 | DMI_MATCH(DMI_SYS_VENDOR, "Apple"), |
Jarod Wilson | 425d244 | 2009-05-05 10:00:25 -0400 | [diff] [blame] | 752 | DMI_MATCH(DMI_PRODUCT_NAME, "Macmini1,1"), |
| 753 | }, |
| 754 | }, |
| 755 | { |
| 756 | .callback = intel_no_lvds_dmi_callback, |
| 757 | .ident = "Apple Mac Mini (Core 2 series)", |
| 758 | .matches = { |
Keith Packard | 98acd46 | 2009-06-14 12:31:58 -0700 | [diff] [blame] | 759 | DMI_MATCH(DMI_SYS_VENDOR, "Apple"), |
Jarod Wilson | 425d244 | 2009-05-05 10:00:25 -0400 | [diff] [blame] | 760 | DMI_MATCH(DMI_PRODUCT_NAME, "Macmini2,1"), |
| 761 | }, |
| 762 | }, |
| 763 | { |
| 764 | .callback = intel_no_lvds_dmi_callback, |
| 765 | .ident = "MSI IM-945GSE-A", |
| 766 | .matches = { |
| 767 | DMI_MATCH(DMI_SYS_VENDOR, "MSI"), |
| 768 | DMI_MATCH(DMI_PRODUCT_NAME, "A9830IMS"), |
| 769 | }, |
| 770 | }, |
| 771 | { |
| 772 | .callback = intel_no_lvds_dmi_callback, |
| 773 | .ident = "Dell Studio Hybrid", |
| 774 | .matches = { |
| 775 | DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), |
| 776 | DMI_MATCH(DMI_PRODUCT_NAME, "Studio Hybrid 140g"), |
| 777 | }, |
| 778 | }, |
Jarod Wilson | 70aa96c | 2009-05-27 17:20:39 -0400 | [diff] [blame] | 779 | { |
| 780 | .callback = intel_no_lvds_dmi_callback, |
| 781 | .ident = "AOpen Mini PC", |
| 782 | .matches = { |
| 783 | DMI_MATCH(DMI_SYS_VENDOR, "AOpen"), |
| 784 | DMI_MATCH(DMI_PRODUCT_NAME, "i965GMx-IF"), |
| 785 | }, |
| 786 | }, |
Michael Cousin | fa0864b | 2009-06-05 21:16:22 +0200 | [diff] [blame] | 787 | { |
| 788 | .callback = intel_no_lvds_dmi_callback, |
Tormod Volden | ed8c754 | 2009-07-13 22:26:48 +0200 | [diff] [blame] | 789 | .ident = "AOpen Mini PC MP915", |
| 790 | .matches = { |
| 791 | DMI_MATCH(DMI_BOARD_VENDOR, "AOpen"), |
| 792 | DMI_MATCH(DMI_BOARD_NAME, "i915GMx-F"), |
| 793 | }, |
| 794 | }, |
| 795 | { |
| 796 | .callback = intel_no_lvds_dmi_callback, |
Michael Cousin | fa0864b | 2009-06-05 21:16:22 +0200 | [diff] [blame] | 797 | .ident = "Aopen i945GTt-VFA", |
| 798 | .matches = { |
| 799 | DMI_MATCH(DMI_PRODUCT_VERSION, "AO00001JW"), |
| 800 | }, |
| 801 | }, |
Jarod Wilson | 425d244 | 2009-05-05 10:00:25 -0400 | [diff] [blame] | 802 | |
| 803 | { } /* terminating entry */ |
| 804 | }; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 805 | |
Zhao Yakui | e99da35 | 2009-06-26 09:46:18 +0800 | [diff] [blame] | 806 | #ifdef CONFIG_ACPI |
| 807 | /* |
| 808 | * check_lid_device -- check whether @handle is an ACPI LID device. |
| 809 | * @handle: ACPI device handle |
| 810 | * @level : depth in the ACPI namespace tree |
| 811 | * @context: the number of LID device when we find the device |
| 812 | * @rv: a return value to fill if desired (Not use) |
| 813 | */ |
| 814 | static acpi_status |
| 815 | check_lid_device(acpi_handle handle, u32 level, void *context, |
| 816 | void **return_value) |
| 817 | { |
| 818 | struct acpi_device *acpi_dev; |
| 819 | int *lid_present = context; |
| 820 | |
| 821 | acpi_dev = NULL; |
| 822 | /* Get the acpi device for device handle */ |
| 823 | if (acpi_bus_get_device(handle, &acpi_dev) || !acpi_dev) { |
| 824 | /* If there is no ACPI device for handle, return */ |
| 825 | return AE_OK; |
| 826 | } |
| 827 | |
| 828 | if (!strncmp(acpi_device_hid(acpi_dev), "PNP0C0D", 7)) |
| 829 | *lid_present = 1; |
| 830 | |
| 831 | return AE_OK; |
| 832 | } |
| 833 | |
| 834 | /** |
| 835 | * check whether there exists the ACPI LID device by enumerating the ACPI |
| 836 | * device tree. |
| 837 | */ |
| 838 | static int intel_lid_present(void) |
| 839 | { |
| 840 | int lid_present = 0; |
| 841 | |
| 842 | if (acpi_disabled) { |
| 843 | /* If ACPI is disabled, there is no ACPI device tree to |
| 844 | * check, so assume the LID device would have been present. |
| 845 | */ |
| 846 | return 1; |
| 847 | } |
| 848 | |
| 849 | acpi_walk_namespace(ACPI_TYPE_DEVICE, ACPI_ROOT_OBJECT, |
| 850 | ACPI_UINT32_MAX, |
| 851 | check_lid_device, &lid_present, NULL); |
| 852 | |
| 853 | return lid_present; |
| 854 | } |
| 855 | #else |
| 856 | static int intel_lid_present(void) |
| 857 | { |
| 858 | /* In the absence of ACPI built in, assume that the LID device would |
| 859 | * have been present. |
| 860 | */ |
| 861 | return 1; |
| 862 | } |
| 863 | #endif |
| 864 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 865 | /** |
| 866 | * intel_lvds_init - setup LVDS connectors on this device |
| 867 | * @dev: drm device |
| 868 | * |
| 869 | * Create the connector, register the LVDS DDC bus, and try to figure out what |
| 870 | * modes we can display on the LVDS panel (if present). |
| 871 | */ |
| 872 | void intel_lvds_init(struct drm_device *dev) |
| 873 | { |
| 874 | struct drm_i915_private *dev_priv = dev->dev_private; |
| 875 | struct intel_output *intel_output; |
| 876 | struct drm_connector *connector; |
| 877 | struct drm_encoder *encoder; |
| 878 | struct drm_display_mode *scan; /* *modes, *bios_mode; */ |
| 879 | struct drm_crtc *crtc; |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame] | 880 | struct intel_lvds_priv *lvds_priv; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 881 | u32 lvds; |
Zhenyu Wang | 541998a | 2009-06-05 15:38:44 +0800 | [diff] [blame] | 882 | int pipe, gpio = GPIOC; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 883 | |
Jarod Wilson | 425d244 | 2009-05-05 10:00:25 -0400 | [diff] [blame] | 884 | /* Skip init on machines we know falsely report LVDS */ |
| 885 | if (dmi_check_system(intel_no_lvds)) |
Paul Collins | 565dcd4 | 2009-02-04 23:05:41 +1300 | [diff] [blame] | 886 | return; |
Paul Collins | 565dcd4 | 2009-02-04 23:05:41 +1300 | [diff] [blame] | 887 | |
Zhao Yakui | e99da35 | 2009-06-26 09:46:18 +0800 | [diff] [blame] | 888 | /* Assume that any device without an ACPI LID device also doesn't |
| 889 | * have an integrated LVDS. We would be better off parsing the BIOS |
| 890 | * to get a reliable indicator, but that code isn't written yet. |
| 891 | * |
| 892 | * In the case of all-in-one desktops using LVDS that we've seen, |
| 893 | * they're using SDVO LVDS. |
| 894 | */ |
| 895 | if (!intel_lid_present()) |
| 896 | return; |
| 897 | |
Zhenyu Wang | 541998a | 2009-06-05 15:38:44 +0800 | [diff] [blame] | 898 | if (IS_IGDNG(dev)) { |
| 899 | if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0) |
| 900 | return; |
Zhenyu Wang | 32f9d65 | 2009-07-24 01:00:32 +0800 | [diff] [blame] | 901 | if (dev_priv->edp_support) { |
| 902 | DRM_DEBUG("disable LVDS for eDP support\n"); |
| 903 | return; |
| 904 | } |
Zhenyu Wang | 541998a | 2009-06-05 15:38:44 +0800 | [diff] [blame] | 905 | gpio = PCH_GPIOC; |
| 906 | } |
| 907 | |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame] | 908 | intel_output = kzalloc(sizeof(struct intel_output) + |
| 909 | sizeof(struct intel_lvds_priv), GFP_KERNEL); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 910 | if (!intel_output) { |
| 911 | return; |
| 912 | } |
| 913 | |
| 914 | connector = &intel_output->base; |
| 915 | encoder = &intel_output->enc; |
| 916 | drm_connector_init(dev, &intel_output->base, &intel_lvds_connector_funcs, |
| 917 | DRM_MODE_CONNECTOR_LVDS); |
| 918 | |
| 919 | drm_encoder_init(dev, &intel_output->enc, &intel_lvds_enc_funcs, |
| 920 | DRM_MODE_ENCODER_LVDS); |
| 921 | |
| 922 | drm_mode_connector_attach_encoder(&intel_output->base, &intel_output->enc); |
| 923 | intel_output->type = INTEL_OUTPUT_LVDS; |
| 924 | |
Ma Ling | f8aed70 | 2009-08-24 13:50:24 +0800 | [diff] [blame] | 925 | intel_output->clone_mask = (1 << INTEL_LVDS_CLONE_BIT); |
| 926 | intel_output->crtc_mask = (1 << 1); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 927 | drm_encoder_helper_add(encoder, &intel_lvds_helper_funcs); |
| 928 | drm_connector_helper_add(connector, &intel_lvds_connector_helper_funcs); |
| 929 | connector->display_info.subpixel_order = SubPixelHorizontalRGB; |
| 930 | connector->interlace_allowed = false; |
| 931 | connector->doublescan_allowed = false; |
| 932 | |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame] | 933 | lvds_priv = (struct intel_lvds_priv *)(intel_output + 1); |
| 934 | intel_output->dev_priv = lvds_priv; |
| 935 | /* create the scaling mode property */ |
| 936 | drm_mode_create_scaling_mode_property(dev); |
| 937 | /* |
| 938 | * the initial panel fitting mode will be FULL_SCREEN. |
| 939 | */ |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 940 | |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame] | 941 | drm_connector_attach_property(&intel_output->base, |
| 942 | dev->mode_config.scaling_mode_property, |
| 943 | DRM_MODE_SCALE_FULLSCREEN); |
| 944 | lvds_priv->fitting_mode = DRM_MODE_SCALE_FULLSCREEN; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 945 | /* |
| 946 | * LVDS discovery: |
| 947 | * 1) check for EDID on DDC |
| 948 | * 2) check for VBT data |
| 949 | * 3) check to see if LVDS is already on |
| 950 | * if none of the above, no panel |
| 951 | * 4) make sure lid is open |
| 952 | * if closed, act like it's not there for now |
| 953 | */ |
| 954 | |
| 955 | /* Set up the DDC bus. */ |
Zhenyu Wang | 541998a | 2009-06-05 15:38:44 +0800 | [diff] [blame] | 956 | intel_output->ddc_bus = intel_i2c_create(dev, gpio, "LVDSDDC_C"); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 957 | if (!intel_output->ddc_bus) { |
| 958 | dev_printk(KERN_ERR, &dev->pdev->dev, "DDC bus registration " |
| 959 | "failed.\n"); |
| 960 | goto failed; |
| 961 | } |
| 962 | |
| 963 | /* |
| 964 | * Attempt to get the fixed panel mode from DDC. Assume that the |
| 965 | * preferred mode is the right one. |
| 966 | */ |
| 967 | intel_ddc_get_modes(intel_output); |
| 968 | |
| 969 | list_for_each_entry(scan, &connector->probed_modes, head) { |
| 970 | mutex_lock(&dev->mode_config.mutex); |
| 971 | if (scan->type & DRM_MODE_TYPE_PREFERRED) { |
| 972 | dev_priv->panel_fixed_mode = |
| 973 | drm_mode_duplicate(dev, scan); |
| 974 | mutex_unlock(&dev->mode_config.mutex); |
Paul Collins | 565dcd4 | 2009-02-04 23:05:41 +1300 | [diff] [blame] | 975 | goto out; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 976 | } |
| 977 | mutex_unlock(&dev->mode_config.mutex); |
| 978 | } |
| 979 | |
| 980 | /* Failed to get EDID, what about VBT? */ |
Ma Ling | 8863170 | 2009-05-13 11:19:55 +0800 | [diff] [blame] | 981 | if (dev_priv->lfp_lvds_vbt_mode) { |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 982 | mutex_lock(&dev->mode_config.mutex); |
| 983 | dev_priv->panel_fixed_mode = |
Ma Ling | 8863170 | 2009-05-13 11:19:55 +0800 | [diff] [blame] | 984 | drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 985 | mutex_unlock(&dev->mode_config.mutex); |
Jesse Barnes | e285f3cd | 2009-01-14 10:53:36 -0800 | [diff] [blame] | 986 | if (dev_priv->panel_fixed_mode) { |
| 987 | dev_priv->panel_fixed_mode->type |= |
| 988 | DRM_MODE_TYPE_PREFERRED; |
Jesse Barnes | e285f3cd | 2009-01-14 10:53:36 -0800 | [diff] [blame] | 989 | goto out; |
| 990 | } |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 991 | } |
| 992 | |
| 993 | /* |
| 994 | * If we didn't get EDID, try checking if the panel is already turned |
| 995 | * on. If so, assume that whatever is currently programmed is the |
| 996 | * correct mode. |
| 997 | */ |
Zhenyu Wang | 541998a | 2009-06-05 15:38:44 +0800 | [diff] [blame] | 998 | |
| 999 | /* IGDNG: FIXME if still fail, not try pipe mode now */ |
| 1000 | if (IS_IGDNG(dev)) |
| 1001 | goto failed; |
| 1002 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1003 | lvds = I915_READ(LVDS); |
| 1004 | pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0; |
| 1005 | crtc = intel_get_crtc_from_pipe(dev, pipe); |
| 1006 | |
| 1007 | if (crtc && (lvds & LVDS_PORT_EN)) { |
| 1008 | dev_priv->panel_fixed_mode = intel_crtc_mode_get(dev, crtc); |
| 1009 | if (dev_priv->panel_fixed_mode) { |
| 1010 | dev_priv->panel_fixed_mode->type |= |
| 1011 | DRM_MODE_TYPE_PREFERRED; |
Paul Collins | 565dcd4 | 2009-02-04 23:05:41 +1300 | [diff] [blame] | 1012 | goto out; |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1013 | } |
| 1014 | } |
| 1015 | |
| 1016 | /* If we still don't have a mode after all that, give up. */ |
| 1017 | if (!dev_priv->panel_fixed_mode) |
| 1018 | goto failed; |
| 1019 | |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1020 | out: |
Zhenyu Wang | 541998a | 2009-06-05 15:38:44 +0800 | [diff] [blame] | 1021 | if (IS_IGDNG(dev)) { |
| 1022 | u32 pwm; |
| 1023 | /* make sure PWM is enabled */ |
| 1024 | pwm = I915_READ(BLC_PWM_CPU_CTL2); |
| 1025 | pwm |= (PWM_ENABLE | PWM_PIPE_B); |
| 1026 | I915_WRITE(BLC_PWM_CPU_CTL2, pwm); |
| 1027 | |
| 1028 | pwm = I915_READ(BLC_PWM_PCH_CTL1); |
| 1029 | pwm |= PWM_PCH_ENABLE; |
| 1030 | I915_WRITE(BLC_PWM_PCH_CTL1, pwm); |
| 1031 | } |
Jesse Barnes | c1c7af6 | 2009-09-10 15:28:03 -0700 | [diff] [blame^] | 1032 | dev_priv->lid_notifier.notifier_call = intel_lid_notify; |
| 1033 | if (acpi_lid_notifier_register(&dev_priv->lid_notifier)) { |
| 1034 | DRM_DEBUG("lid notifier registration failed\n"); |
| 1035 | dev_priv->lid_notifier.notifier_call = NULL; |
| 1036 | } |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1037 | drm_sysfs_connector_add(connector); |
| 1038 | return; |
| 1039 | |
| 1040 | failed: |
Zhao Yakui | 8a4c47f | 2009-07-20 13:48:04 +0800 | [diff] [blame] | 1041 | DRM_DEBUG_KMS("No LVDS modes found, disabling.\n"); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1042 | if (intel_output->ddc_bus) |
| 1043 | intel_i2c_destroy(intel_output->ddc_bus); |
| 1044 | drm_connector_cleanup(connector); |
Zhao Yakui | 3fbe18d | 2009-06-22 15:31:25 +0800 | [diff] [blame] | 1045 | kfree(intel_output); |
Jesse Barnes | 79e5394 | 2008-11-07 14:24:08 -0800 | [diff] [blame] | 1046 | } |