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H. Peter Anvin1965aae2008-10-22 22:26:29 -07001#ifndef _ASM_X86_IRQ_VECTORS_H
2#define _ASM_X86_IRQ_VECTORS_H
Thomas Gleixner9b7dc562008-05-02 20:10:09 +02003
Ingo Molnar9fc2e792009-01-31 02:48:17 +01004/*
5 * Linux IRQ vector layout.
6 *
7 * There are 256 IDT entries (per CPU - each entry is 8 bytes) which can
8 * be defined by Linux. They are used as a jump table by the CPU when a
9 * given vector is triggered - by a CPU-external, CPU-internal or
10 * software-triggered event.
11 *
12 * Linux sets the kernel code address each entry jumps to early during
13 * bootup, and never changes them. This is the general layout of the
14 * IDT entries:
15 *
16 * Vectors 0 ... 31 : system traps and exceptions - hardcoded events
17 * Vectors 32 ... 127 : device interrupts
18 * Vector 128 : legacy int80 syscall interface
19 * Vectors 129 ... 237 : device interrupts
20 * Vectors 238 ... 255 : special interrupts
21 *
22 * 64-bit x86 has per CPU IDT tables, 32-bit has one shared IDT table.
23 *
24 * This file enumerates the exact layout of them:
25 */
26
27#define NMI_VECTOR 0x02
Thomas Gleixner9b7dc562008-05-02 20:10:09 +020028
29/*
30 * IDT vectors usable for external interrupt sources start
31 * at 0x20:
32 */
Ingo Molnar9fc2e792009-01-31 02:48:17 +010033#define FIRST_EXTERNAL_VECTOR 0x20
Thomas Gleixner9b7dc562008-05-02 20:10:09 +020034
35#ifdef CONFIG_X86_32
Ingo Molnar9fc2e792009-01-31 02:48:17 +010036# define SYSCALL_VECTOR 0x80
Thomas Gleixner9b7dc562008-05-02 20:10:09 +020037#else
Ingo Molnar9fc2e792009-01-31 02:48:17 +010038# define IA32_SYSCALL_VECTOR 0x80
Thomas Gleixner9b7dc562008-05-02 20:10:09 +020039#endif
40
41/*
Thomas Gleixner9b7dc562008-05-02 20:10:09 +020042 * Reserve the lowest usable priority level 0x20 - 0x2f for triggering
Yinghai Lu497c9a12008-08-19 20:50:28 -070043 * cleanup after irq migration.
Thomas Gleixner9b7dc562008-05-02 20:10:09 +020044 */
Ingo Molnar9fc2e792009-01-31 02:48:17 +010045#define IRQ_MOVE_CLEANUP_VECTOR FIRST_EXTERNAL_VECTOR
Thomas Gleixner9b7dc562008-05-02 20:10:09 +020046
47/*
Yinghai Lu497c9a12008-08-19 20:50:28 -070048 * Vectors 0x30-0x3f are used for ISA interrupts.
Thomas Gleixner9b7dc562008-05-02 20:10:09 +020049 */
Ingo Molnar9fc2e792009-01-31 02:48:17 +010050#define IRQ0_VECTOR (FIRST_EXTERNAL_VECTOR + 0x10)
51
52#define IRQ1_VECTOR (IRQ0_VECTOR + 1)
53#define IRQ2_VECTOR (IRQ0_VECTOR + 2)
54#define IRQ3_VECTOR (IRQ0_VECTOR + 3)
55#define IRQ4_VECTOR (IRQ0_VECTOR + 4)
56#define IRQ5_VECTOR (IRQ0_VECTOR + 5)
57#define IRQ6_VECTOR (IRQ0_VECTOR + 6)
58#define IRQ7_VECTOR (IRQ0_VECTOR + 7)
59#define IRQ8_VECTOR (IRQ0_VECTOR + 8)
60#define IRQ9_VECTOR (IRQ0_VECTOR + 9)
61#define IRQ10_VECTOR (IRQ0_VECTOR + 10)
62#define IRQ11_VECTOR (IRQ0_VECTOR + 11)
63#define IRQ12_VECTOR (IRQ0_VECTOR + 12)
64#define IRQ13_VECTOR (IRQ0_VECTOR + 13)
65#define IRQ14_VECTOR (IRQ0_VECTOR + 14)
66#define IRQ15_VECTOR (IRQ0_VECTOR + 15)
Thomas Gleixner9b7dc562008-05-02 20:10:09 +020067
68/*
69 * Special IRQ vectors used by the SMP architecture, 0xf0-0xff
70 *
71 * some of the following vectors are 'rare', they are merged
72 * into a single vector (CALL_FUNCTION_VECTOR) to save vector space.
73 * TLB, reschedule and local APIC vectors are performance-critical.
Thomas Gleixner9b7dc562008-05-02 20:10:09 +020074 */
Ingo Molnar5da690d2009-01-31 02:10:03 +010075
76#define SPURIOUS_APIC_VECTOR 0xff
Ingo Molnar647ad942009-01-31 02:06:50 +010077/*
78 * Sanity check
79 */
80#if ((SPURIOUS_APIC_VECTOR & 0x0F) != 0x0F)
81# error SPURIOUS_APIC_VECTOR definition error
82#endif
83
Ingo Molnar5da690d2009-01-31 02:10:03 +010084#define ERROR_APIC_VECTOR 0xfe
85#define RESCHEDULE_VECTOR 0xfd
86#define CALL_FUNCTION_VECTOR 0xfc
87#define CALL_FUNCTION_SINGLE_VECTOR 0xfb
88#define THERMAL_APIC_VECTOR 0xfa
89
Thomas Gleixner9b7dc562008-05-02 20:10:09 +020090#ifdef CONFIG_X86_32
Tejun Heo02cf94c2009-01-21 17:26:06 +090091/* 0xf8 - 0xf9 : free */
Thomas Gleixner9b7dc562008-05-02 20:10:09 +020092#else
Tejun Heo6dd01be2009-01-21 17:26:06 +090093# define THRESHOLD_APIC_VECTOR 0xf9
94# define UV_BAU_MESSAGE 0xf8
Thomas Gleixner9b7dc562008-05-02 20:10:09 +020095#endif
96
Ingo Molnar5da690d2009-01-31 02:10:03 +010097/* f0-f7 used for spreading out TLB flushes: */
98#define INVALIDATE_TLB_VECTOR_END 0xf7
99#define INVALIDATE_TLB_VECTOR_START 0xf0
Ingo Molnar9fc2e792009-01-31 02:48:17 +0100100#define NUM_INVALIDATE_TLB_VECTORS 8
Ingo Molnar5da690d2009-01-31 02:10:03 +0100101
Thomas Gleixner9b7dc562008-05-02 20:10:09 +0200102/*
103 * Local APIC timer IRQ vector is on a different priority level,
104 * to work around the 'lost local interrupt if more than 2 IRQ
105 * sources per level' errata.
106 */
Ingo Molnar9fc2e792009-01-31 02:48:17 +0100107#define LOCAL_TIMER_VECTOR 0xef
Thomas Gleixner9b7dc562008-05-02 20:10:09 +0200108
109/*
Ingo Molnar193c81b2009-01-31 02:23:27 +0100110 * Performance monitoring interrupt vector:
111 */
Ingo Molnar9fc2e792009-01-31 02:48:17 +0100112#define LOCAL_PERF_VECTOR 0xee
Ingo Molnar193c81b2009-01-31 02:23:27 +0100113
114/*
Thomas Gleixner9b7dc562008-05-02 20:10:09 +0200115 * First APIC vector available to drivers: (vectors 0x30-0xee) we
116 * start at 0x31(0x41) to spread out vectors evenly between priority
117 * levels. (0x80 is the syscall vector)
118 */
Ingo Molnar9fc2e792009-01-31 02:48:17 +0100119#define FIRST_DEVICE_VECTOR (IRQ15_VECTOR + 2)
Thomas Gleixner9b7dc562008-05-02 20:10:09 +0200120
Ingo Molnar9fc2e792009-01-31 02:48:17 +0100121#define NR_VECTORS 256
Thomas Gleixner9b7dc562008-05-02 20:10:09 +0200122
Ingo Molnar9fc2e792009-01-31 02:48:17 +0100123#define FPU_IRQ 13
Thomas Gleixner9b7dc562008-05-02 20:10:09 +0200124
Ingo Molnar9fc2e792009-01-31 02:48:17 +0100125#define FIRST_VM86_IRQ 3
126#define LAST_VM86_IRQ 15
127#define invalid_vm86_irq(irq) ((irq) < 3 || (irq) > 15)
Thomas Gleixner9b7dc562008-05-02 20:10:09 +0200128
Ingo Molnar9fc2e792009-01-31 02:48:17 +0100129#define NR_IRQS_LEGACY 16
Yinghai Lu99d093d2008-12-05 18:58:32 -0800130
Ingo Molnar3e92ab32009-01-31 02:21:42 +0100131#ifdef CONFIG_X86_IO_APIC
Ingo Molnarc3796982009-01-31 02:50:46 +0100132# ifndef CONFIG_SPARSE_IRQ
133# if NR_CPUS < MAX_IO_APICS
134# define NR_IRQS (NR_VECTORS + (32 * NR_CPUS))
135# else
136# define NR_IRQS (NR_VECTORS + (32 * MAX_IO_APICS))
137# endif
Eric W. Biederman3c7569b2008-08-10 00:35:50 -0700138# else
Ingo Molnarc3796982009-01-31 02:50:46 +0100139# define NR_IRQS \
Yinghai Lu4a046d12009-01-12 17:39:24 -0800140 ((8 * NR_CPUS) > (32 * MAX_IO_APICS) ? \
Mike Travis9332fcc2009-01-10 22:24:07 -0800141 (NR_VECTORS + (8 * NR_CPUS)) : \
Ingo Molnar3e92ab32009-01-31 02:21:42 +0100142 (NR_VECTORS + (32 * MAX_IO_APICS)))
Ingo Molnarc3796982009-01-31 02:50:46 +0100143# endif
Ingo Molnar3e92ab32009-01-31 02:21:42 +0100144#else /* !CONFIG_X86_IO_APIC: */
Ingo Molnar9fc2e792009-01-31 02:48:17 +0100145# define NR_IRQS 16
Yinghai Lu1b489762008-11-04 14:10:13 -0800146#endif
Thomas Gleixner9b7dc562008-05-02 20:10:09 +0200147
H. Peter Anvin1965aae2008-10-22 22:26:29 -0700148#endif /* _ASM_X86_IRQ_VECTORS_H */