Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | #ifndef __ASM_ARM_SYSTEM_H |
| 2 | #define __ASM_ARM_SYSTEM_H |
| 3 | |
| 4 | #ifdef __KERNEL__ |
| 5 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 6 | #define CPU_ARCH_UNKNOWN 0 |
| 7 | #define CPU_ARCH_ARMv3 1 |
| 8 | #define CPU_ARCH_ARMv4 2 |
| 9 | #define CPU_ARCH_ARMv4T 3 |
| 10 | #define CPU_ARCH_ARMv5 4 |
| 11 | #define CPU_ARCH_ARMv5T 5 |
| 12 | #define CPU_ARCH_ARMv5TE 6 |
| 13 | #define CPU_ARCH_ARMv5TEJ 7 |
| 14 | #define CPU_ARCH_ARMv6 8 |
Catalin Marinas | bbe8888 | 2007-05-08 22:27:46 +0100 | [diff] [blame] | 15 | #define CPU_ARCH_ARMv7 9 |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 16 | |
| 17 | /* |
| 18 | * CR1 bits (CP#15 CR1) |
| 19 | */ |
| 20 | #define CR_M (1 << 0) /* MMU enable */ |
| 21 | #define CR_A (1 << 1) /* Alignment abort enable */ |
| 22 | #define CR_C (1 << 2) /* Dcache enable */ |
| 23 | #define CR_W (1 << 3) /* Write buffer enable */ |
| 24 | #define CR_P (1 << 4) /* 32-bit exception handler */ |
| 25 | #define CR_D (1 << 5) /* 32-bit data address range */ |
| 26 | #define CR_L (1 << 6) /* Implementation defined */ |
| 27 | #define CR_B (1 << 7) /* Big endian */ |
| 28 | #define CR_S (1 << 8) /* System MMU protection */ |
| 29 | #define CR_R (1 << 9) /* ROM MMU protection */ |
| 30 | #define CR_F (1 << 10) /* Implementation defined */ |
| 31 | #define CR_Z (1 << 11) /* Implementation defined */ |
| 32 | #define CR_I (1 << 12) /* Icache enable */ |
| 33 | #define CR_V (1 << 13) /* Vectors relocated to 0xffff0000 */ |
| 34 | #define CR_RR (1 << 14) /* Round Robin cache replacement */ |
| 35 | #define CR_L4 (1 << 15) /* LDR pc can set T bit */ |
| 36 | #define CR_DT (1 << 16) |
| 37 | #define CR_IT (1 << 18) |
| 38 | #define CR_ST (1 << 19) |
| 39 | #define CR_FI (1 << 21) /* Fast interrupt (lower latency mode) */ |
| 40 | #define CR_U (1 << 22) /* Unaligned access operation */ |
| 41 | #define CR_XP (1 << 23) /* Extended page tables */ |
| 42 | #define CR_VE (1 << 24) /* Vectored interrupts */ |
Russell King | b1cce6b | 2008-11-04 10:52:28 +0000 | [diff] [blame] | 43 | #define CR_EE (1 << 25) /* Exception (Big) Endian */ |
| 44 | #define CR_TRE (1 << 28) /* TEX remap enable */ |
| 45 | #define CR_AFE (1 << 29) /* Access flag enable */ |
| 46 | #define CR_TE (1 << 30) /* Thumb exception enable */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 47 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 48 | /* |
| 49 | * This is used to ensure the compiler did actually allocate the register we |
| 50 | * asked it for some inline assembly sequences. Apparently we can't trust |
| 51 | * the compiler from one version to another so a bit of paranoia won't hurt. |
| 52 | * This string is meant to be concatenated with the inline asm string and |
| 53 | * will cause compilation to stop on mismatch. |
| 54 | * (for details, see gcc PR 15089) |
| 55 | */ |
| 56 | #define __asmeq(x, y) ".ifnc " x "," y " ; .err ; .endif\n\t" |
| 57 | |
| 58 | #ifndef __ASSEMBLY__ |
| 59 | |
Dave Martin | 2ecccf9 | 2011-08-19 17:58:35 +0100 | [diff] [blame] | 60 | #include <linux/compiler.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 61 | #include <linux/linkage.h> |
Russell King | 255d1f8 | 2006-12-18 00:12:47 +0000 | [diff] [blame] | 62 | #include <linux/irqflags.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 63 | |
Catalin Marinas | e7c5650 | 2010-03-24 16:49:54 +0100 | [diff] [blame] | 64 | #include <asm/outercache.h> |
| 65 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 66 | struct thread_info; |
| 67 | struct task_struct; |
| 68 | |
| 69 | /* information about the system we're running on */ |
| 70 | extern unsigned int system_rev; |
| 71 | extern unsigned int system_serial_low; |
| 72 | extern unsigned int system_serial_high; |
| 73 | extern unsigned int mem_fclk_21285; |
| 74 | |
| 75 | struct pt_regs; |
| 76 | |
Russell King | a9221de | 2010-01-20 17:02:54 +0000 | [diff] [blame] | 77 | void die(const char *msg, struct pt_regs *regs, int err); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 78 | |
Russell King | cfb0810 | 2005-06-30 11:06:49 +0100 | [diff] [blame] | 79 | struct siginfo; |
Christoph Hellwig | 1eeb66a | 2007-05-08 00:27:03 -0700 | [diff] [blame] | 80 | void arm_notify_die(const char *str, struct pt_regs *regs, struct siginfo *info, |
Russell King | cfb0810 | 2005-06-30 11:06:49 +0100 | [diff] [blame] | 81 | unsigned long err, unsigned long trap); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 82 | |
Catalin Marinas | f7b8156 | 2011-11-22 17:30:31 +0000 | [diff] [blame] | 83 | #ifdef CONFIG_ARM_LPAE |
| 84 | #define FAULT_CODE_ALIGNMENT 33 |
| 85 | #define FAULT_CODE_DEBUG 34 |
| 86 | #else |
| 87 | #define FAULT_CODE_ALIGNMENT 1 |
| 88 | #define FAULT_CODE_DEBUG 2 |
| 89 | #endif |
| 90 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 91 | void hook_fault_code(int nr, int (*fn)(unsigned long, unsigned int, |
| 92 | struct pt_regs *), |
Kirill A. Shutemov | 6338a6a | 2010-07-22 13:18:19 +0100 | [diff] [blame] | 93 | int sig, int code, const char *name); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 94 | |
Will Deacon | 3a4b5dc | 2010-09-03 10:39:59 +0100 | [diff] [blame] | 95 | void hook_ifault_code(int nr, int (*fn)(unsigned long, unsigned int, |
| 96 | struct pt_regs *), |
| 97 | int sig, int code, const char *name); |
| 98 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 99 | #define xchg(ptr,x) \ |
| 100 | ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr)))) |
| 101 | |
Russell King | 652a12e | 2005-04-17 15:50:36 +0100 | [diff] [blame] | 102 | extern asmlinkage void c_backtrace(unsigned long fp, int pmode); |
Russell King | 5470dc6 | 2005-11-16 18:36:49 +0000 | [diff] [blame] | 103 | |
| 104 | struct mm_struct; |
Russell King | 652a12e | 2005-04-17 15:50:36 +0100 | [diff] [blame] | 105 | extern void show_pte(struct mm_struct *mm, unsigned long addr); |
| 106 | extern void __show_regs(struct pt_regs *); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 107 | |
Dave Martin | 2ecccf9 | 2011-08-19 17:58:35 +0100 | [diff] [blame] | 108 | extern int __pure cpu_architecture(void); |
Russell King | 36c5ed2 | 2005-06-19 18:39:33 +0100 | [diff] [blame] | 109 | extern void cpu_init(void); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 110 | |
Russell King | e879c86 | 2011-11-01 13:16:26 +0000 | [diff] [blame] | 111 | void soft_restart(unsigned long); |
Russell King | be093be | 2009-03-19 16:20:24 +0000 | [diff] [blame] | 112 | extern void (*arm_pm_restart)(char str, const char *cmd); |
Nicolas Pitre | 4fa2043 | 2011-08-01 17:25:06 -0400 | [diff] [blame] | 113 | extern void (*arm_pm_idle)(void); |
Richard Purdie | 74617fb | 2006-06-19 19:57:12 +0100 | [diff] [blame] | 114 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 115 | #define UDBG_UNDEFINED (1 << 0) |
| 116 | #define UDBG_SYSCALL (1 << 1) |
| 117 | #define UDBG_BADABORT (1 << 2) |
| 118 | #define UDBG_SEGV (1 << 3) |
| 119 | #define UDBG_BUS (1 << 4) |
| 120 | |
| 121 | extern unsigned int user_debug; |
| 122 | |
| 123 | #if __LINUX_ARM_ARCH__ >= 4 |
| 124 | #define vectors_high() (cr_alignment & CR_V) |
| 125 | #else |
| 126 | #define vectors_high() (0) |
| 127 | #endif |
| 128 | |
Shiraz Hashim | 3d29005 | 2010-12-23 11:32:41 +0100 | [diff] [blame] | 129 | #if __LINUX_ARM_ARCH__ >= 7 || \ |
| 130 | (__LINUX_ARM_ARCH__ == 6 && defined(CONFIG_CPU_32v6K)) |
| 131 | #define sev() __asm__ __volatile__ ("sev" : : : "memory") |
| 132 | #define wfe() __asm__ __volatile__ ("wfe" : : : "memory") |
| 133 | #define wfi() __asm__ __volatile__ ("wfi" : : : "memory") |
| 134 | #endif |
| 135 | |
Catalin Marinas | 56163fc | 2007-05-08 22:53:44 +0100 | [diff] [blame] | 136 | #if __LINUX_ARM_ARCH__ >= 7 |
| 137 | #define isb() __asm__ __volatile__ ("isb" : : : "memory") |
| 138 | #define dsb() __asm__ __volatile__ ("dsb" : : : "memory") |
| 139 | #define dmb() __asm__ __volatile__ ("dmb" : : : "memory") |
| 140 | #elif defined(CONFIG_CPU_XSC3) || __LINUX_ARM_ARCH__ == 6 |
Catalin Marinas | dcda7e4 | 2007-02-05 14:47:35 +0100 | [diff] [blame] | 141 | #define isb() __asm__ __volatile__ ("mcr p15, 0, %0, c7, c5, 4" \ |
| 142 | : : "r" (0) : "memory") |
| 143 | #define dsb() __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" \ |
| 144 | : : "r" (0) : "memory") |
| 145 | #define dmb() __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 5" \ |
| 146 | : : "r" (0) : "memory") |
Paulius Zaleckas | 28853ac | 2009-03-25 13:10:01 +0200 | [diff] [blame] | 147 | #elif defined(CONFIG_CPU_FA526) |
| 148 | #define isb() __asm__ __volatile__ ("mcr p15, 0, %0, c7, c5, 4" \ |
| 149 | : : "r" (0) : "memory") |
| 150 | #define dsb() __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" \ |
| 151 | : : "r" (0) : "memory") |
| 152 | #define dmb() __asm__ __volatile__ ("" : : : "memory") |
Russell King | 6d9b37a | 2005-07-26 19:44:26 +0100 | [diff] [blame] | 153 | #else |
Catalin Marinas | dcda7e4 | 2007-02-05 14:47:35 +0100 | [diff] [blame] | 154 | #define isb() __asm__ __volatile__ ("" : : : "memory") |
| 155 | #define dsb() __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" \ |
| 156 | : : "r" (0) : "memory") |
| 157 | #define dmb() __asm__ __volatile__ ("" : : : "memory") |
Russell King | 6d9b37a | 2005-07-26 19:44:26 +0100 | [diff] [blame] | 158 | #endif |
Catalin Marinas | 9623b37 | 2007-02-28 12:30:38 +0100 | [diff] [blame] | 159 | |
Catalin Marinas | e7c5650 | 2010-03-24 16:49:54 +0100 | [diff] [blame] | 160 | #ifdef CONFIG_ARCH_HAS_BARRIERS |
| 161 | #include <mach/barriers.h> |
Russell King | ac1d426 | 2010-05-17 17:24:04 +0100 | [diff] [blame] | 162 | #elif defined(CONFIG_ARM_DMA_MEM_BUFFERABLE) || defined(CONFIG_SMP) |
Catalin Marinas | e7c5650 | 2010-03-24 16:49:54 +0100 | [diff] [blame] | 163 | #define mb() do { dsb(); outer_sync(); } while (0) |
Catalin Marinas | a904f5f | 2011-04-06 16:18:47 +0100 | [diff] [blame] | 164 | #define rmb() dsb() |
Catalin Marinas | e7c5650 | 2010-03-24 16:49:54 +0100 | [diff] [blame] | 165 | #define wmb() mb() |
Russell King | 26a26d3 | 2009-11-20 21:06:43 +0000 | [diff] [blame] | 166 | #else |
Axel Lin | 7c0ab43 | 2011-01-03 02:26:53 +0100 | [diff] [blame] | 167 | #include <asm/memory.h> |
Lennert Buytenhek | 398e692 | 2007-03-31 12:03:20 +0100 | [diff] [blame] | 168 | #define mb() do { if (arch_is_coherent()) dmb(); else barrier(); } while (0) |
| 169 | #define rmb() do { if (arch_is_coherent()) dmb(); else barrier(); } while (0) |
| 170 | #define wmb() do { if (arch_is_coherent()) dmb(); else barrier(); } while (0) |
Russell King | 26a26d3 | 2009-11-20 21:06:43 +0000 | [diff] [blame] | 171 | #endif |
| 172 | |
| 173 | #ifndef CONFIG_SMP |
Lennert Buytenhek | 398e692 | 2007-03-31 12:03:20 +0100 | [diff] [blame] | 174 | #define smp_mb() barrier() |
| 175 | #define smp_rmb() barrier() |
| 176 | #define smp_wmb() barrier() |
Catalin Marinas | 9623b37 | 2007-02-28 12:30:38 +0100 | [diff] [blame] | 177 | #else |
Catalin Marinas | e7c5650 | 2010-03-24 16:49:54 +0100 | [diff] [blame] | 178 | #define smp_mb() dmb() |
| 179 | #define smp_rmb() dmb() |
| 180 | #define smp_wmb() dmb() |
Lennert Buytenhek | 398e692 | 2007-03-31 12:03:20 +0100 | [diff] [blame] | 181 | #endif |
Russell King | 26a26d3 | 2009-11-20 21:06:43 +0000 | [diff] [blame] | 182 | |
Lennert Buytenhek | 398e692 | 2007-03-31 12:03:20 +0100 | [diff] [blame] | 183 | #define read_barrier_depends() do { } while(0) |
| 184 | #define smp_read_barrier_depends() do { } while(0) |
Catalin Marinas | 9623b37 | 2007-02-28 12:30:38 +0100 | [diff] [blame] | 185 | |
| 186 | #define set_mb(var, value) do { var = value; smp_mb(); } while (0) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 187 | #define nop() __asm__ __volatile__("mov\tr0,r0\t@ nop\n\t"); |
| 188 | |
Catalin Marinas | 56660fa | 2007-02-05 14:48:02 +0100 | [diff] [blame] | 189 | extern unsigned long cr_no_alignment; /* defined in entry-armv.S */ |
| 190 | extern unsigned long cr_alignment; /* defined in entry-armv.S */ |
| 191 | |
| 192 | static inline unsigned int get_cr(void) |
| 193 | { |
| 194 | unsigned int val; |
| 195 | asm("mrc p15, 0, %0, c1, c0, 0 @ get CR" : "=r" (val) : : "cc"); |
| 196 | return val; |
| 197 | } |
| 198 | |
| 199 | static inline void set_cr(unsigned int val) |
| 200 | { |
| 201 | asm volatile("mcr p15, 0, %0, c1, c0, 0 @ set CR" |
| 202 | : : "r" (val) : "cc"); |
| 203 | isb(); |
| 204 | } |
| 205 | |
| 206 | #ifndef CONFIG_SMP |
| 207 | extern void adjust_cr(unsigned long mask, unsigned long set); |
| 208 | #endif |
| 209 | |
| 210 | #define CPACC_FULL(n) (3 << (n * 2)) |
| 211 | #define CPACC_SVC(n) (1 << (n * 2)) |
| 212 | #define CPACC_DISABLE(n) (0 << (n * 2)) |
| 213 | |
| 214 | static inline unsigned int get_copro_access(void) |
| 215 | { |
| 216 | unsigned int val; |
| 217 | asm("mrc p15, 0, %0, c1, c0, 2 @ get copro access" |
| 218 | : "=r" (val) : : "cc"); |
| 219 | return val; |
| 220 | } |
| 221 | |
| 222 | static inline void set_copro_access(unsigned int val) |
| 223 | { |
| 224 | asm volatile("mcr p15, 0, %0, c1, c0, 2 @ set copro access" |
| 225 | : : "r" (val) : "cc"); |
| 226 | isb(); |
| 227 | } |
| 228 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 229 | /* |
Nick Piggin | 4866cde | 2005-06-25 14:57:23 -0700 | [diff] [blame] | 230 | * switch_mm() may do a full cache flush over the context switch, |
| 231 | * so enable interrupts over the context switch to avoid high |
| 232 | * latency. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 233 | */ |
Nick Piggin | 4866cde | 2005-06-25 14:57:23 -0700 | [diff] [blame] | 234 | #define __ARCH_WANT_INTERRUPTS_ON_CTXSW |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 235 | |
| 236 | /* |
| 237 | * switch_to(prev, next) should switch from task `prev' to `next' |
| 238 | * `prev' will never be the same as `next'. schedule() itself |
| 239 | * contains the memory barrier to tell GCC not to cache `current'. |
| 240 | */ |
| 241 | extern struct task_struct *__switch_to(struct task_struct *, struct thread_info *, struct thread_info *); |
| 242 | |
| 243 | #define switch_to(prev,next,last) \ |
| 244 | do { \ |
Al Viro | e7c1b32 | 2006-01-12 01:05:56 -0800 | [diff] [blame] | 245 | last = __switch_to(prev,task_thread_info(prev), task_thread_info(next)); \ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 246 | } while (0) |
| 247 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 248 | #if defined(CONFIG_CPU_SA1100) || defined(CONFIG_CPU_SA110) |
| 249 | /* |
| 250 | * On the StrongARM, "swp" is terminally broken since it bypasses the |
| 251 | * cache totally. This means that the cache becomes inconsistent, and, |
| 252 | * since we use normal loads/stores as well, this is really bad. |
| 253 | * Typically, this causes oopsen in filp_close, but could have other, |
Lucas De Marchi | 25985ed | 2011-03-30 22:57:33 -0300 | [diff] [blame] | 254 | * more disastrous effects. There are two work-arounds: |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 255 | * 1. Disable interrupts and emulate the atomic swap |
| 256 | * 2. Clean the cache, perform atomic swap, flush the cache |
| 257 | * |
| 258 | * We choose (1) since its the "easiest" to achieve here and is not |
| 259 | * dependent on the processor type. |
Russell King | 053a7b5 | 2005-06-28 19:22:25 +0100 | [diff] [blame] | 260 | * |
| 261 | * NOTE that this solution won't work on an SMP system, so explcitly |
| 262 | * forbid it here. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 263 | */ |
| 264 | #define swp_is_buggy |
| 265 | #endif |
| 266 | |
| 267 | static inline unsigned long __xchg(unsigned long x, volatile void *ptr, int size) |
| 268 | { |
| 269 | extern void __bad_xchg(volatile void *, int); |
| 270 | unsigned long ret; |
| 271 | #ifdef swp_is_buggy |
| 272 | unsigned long flags; |
| 273 | #endif |
Russell King | 9560782 | 2005-07-26 19:39:31 +0100 | [diff] [blame] | 274 | #if __LINUX_ARM_ARCH__ >= 6 |
| 275 | unsigned int tmp; |
| 276 | #endif |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 277 | |
Russell King | bac4e96 | 2009-05-25 20:58:00 +0100 | [diff] [blame] | 278 | smp_mb(); |
| 279 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 280 | switch (size) { |
Russell King | 9560782 | 2005-07-26 19:39:31 +0100 | [diff] [blame] | 281 | #if __LINUX_ARM_ARCH__ >= 6 |
| 282 | case 1: |
| 283 | asm volatile("@ __xchg1\n" |
| 284 | "1: ldrexb %0, [%3]\n" |
| 285 | " strexb %1, %2, [%3]\n" |
| 286 | " teq %1, #0\n" |
| 287 | " bne 1b" |
| 288 | : "=&r" (ret), "=&r" (tmp) |
| 289 | : "r" (x), "r" (ptr) |
| 290 | : "memory", "cc"); |
| 291 | break; |
| 292 | case 4: |
| 293 | asm volatile("@ __xchg4\n" |
| 294 | "1: ldrex %0, [%3]\n" |
| 295 | " strex %1, %2, [%3]\n" |
| 296 | " teq %1, #0\n" |
| 297 | " bne 1b" |
| 298 | : "=&r" (ret), "=&r" (tmp) |
| 299 | : "r" (x), "r" (ptr) |
| 300 | : "memory", "cc"); |
| 301 | break; |
| 302 | #elif defined(swp_is_buggy) |
| 303 | #ifdef CONFIG_SMP |
| 304 | #error SMP is not supported on this platform |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 305 | #endif |
Russell King | 9560782 | 2005-07-26 19:39:31 +0100 | [diff] [blame] | 306 | case 1: |
Lennert Buytenhek | e7cc2c5 | 2006-09-21 03:35:20 +0100 | [diff] [blame] | 307 | raw_local_irq_save(flags); |
Russell King | 9560782 | 2005-07-26 19:39:31 +0100 | [diff] [blame] | 308 | ret = *(volatile unsigned char *)ptr; |
| 309 | *(volatile unsigned char *)ptr = x; |
Lennert Buytenhek | e7cc2c5 | 2006-09-21 03:35:20 +0100 | [diff] [blame] | 310 | raw_local_irq_restore(flags); |
Russell King | 9560782 | 2005-07-26 19:39:31 +0100 | [diff] [blame] | 311 | break; |
| 312 | |
| 313 | case 4: |
Lennert Buytenhek | e7cc2c5 | 2006-09-21 03:35:20 +0100 | [diff] [blame] | 314 | raw_local_irq_save(flags); |
Russell King | 9560782 | 2005-07-26 19:39:31 +0100 | [diff] [blame] | 315 | ret = *(volatile unsigned long *)ptr; |
| 316 | *(volatile unsigned long *)ptr = x; |
Lennert Buytenhek | e7cc2c5 | 2006-09-21 03:35:20 +0100 | [diff] [blame] | 317 | raw_local_irq_restore(flags); |
Russell King | 9560782 | 2005-07-26 19:39:31 +0100 | [diff] [blame] | 318 | break; |
| 319 | #else |
| 320 | case 1: |
| 321 | asm volatile("@ __xchg1\n" |
| 322 | " swpb %0, %1, [%2]" |
| 323 | : "=&r" (ret) |
| 324 | : "r" (x), "r" (ptr) |
| 325 | : "memory", "cc"); |
| 326 | break; |
| 327 | case 4: |
| 328 | asm volatile("@ __xchg4\n" |
| 329 | " swp %0, %1, [%2]" |
| 330 | : "=&r" (ret) |
| 331 | : "r" (x), "r" (ptr) |
| 332 | : "memory", "cc"); |
| 333 | break; |
| 334 | #endif |
| 335 | default: |
| 336 | __bad_xchg(ptr, size), ret = 0; |
| 337 | break; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 338 | } |
Russell King | bac4e96 | 2009-05-25 20:58:00 +0100 | [diff] [blame] | 339 | smp_mb(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 340 | |
| 341 | return ret; |
| 342 | } |
| 343 | |
Ben Dooks | dabaeff | 2006-03-15 23:17:26 +0000 | [diff] [blame] | 344 | extern void disable_hlt(void); |
| 345 | extern void enable_hlt(void); |
| 346 | |
Kevin Hilman | c7b0aff | 2010-10-01 22:13:47 +0100 | [diff] [blame] | 347 | void cpu_idle_wait(void); |
| 348 | |
Mathieu Desnoyers | 176393d | 2008-02-07 00:16:11 -0800 | [diff] [blame] | 349 | #include <asm-generic/cmpxchg-local.h> |
| 350 | |
Mathieu Desnoyers | ecd322c | 2009-05-28 16:07:39 -0400 | [diff] [blame] | 351 | #if __LINUX_ARM_ARCH__ < 6 |
Russell King | 4ed67a5 | 2011-01-17 15:42:42 +0000 | [diff] [blame] | 352 | /* min ARCH < ARMv6 */ |
Mathieu Desnoyers | ecd322c | 2009-05-28 16:07:39 -0400 | [diff] [blame] | 353 | |
| 354 | #ifdef CONFIG_SMP |
| 355 | #error "SMP is not supported on this platform" |
| 356 | #endif |
| 357 | |
Mathieu Desnoyers | 176393d | 2008-02-07 00:16:11 -0800 | [diff] [blame] | 358 | /* |
| 359 | * cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make |
| 360 | * them available. |
| 361 | */ |
| 362 | #define cmpxchg_local(ptr, o, n) \ |
| 363 | ((__typeof__(*(ptr)))__cmpxchg_local_generic((ptr), (unsigned long)(o),\ |
| 364 | (unsigned long)(n), sizeof(*(ptr)))) |
| 365 | #define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n)) |
| 366 | |
| 367 | #ifndef CONFIG_SMP |
| 368 | #include <asm-generic/cmpxchg.h> |
| 369 | #endif |
| 370 | |
Russell King | 4ed67a5 | 2011-01-17 15:42:42 +0000 | [diff] [blame] | 371 | #else /* min ARCH >= ARMv6 */ |
Mathieu Desnoyers | ecd322c | 2009-05-28 16:07:39 -0400 | [diff] [blame] | 372 | |
| 373 | extern void __bad_cmpxchg(volatile void *ptr, int size); |
| 374 | |
| 375 | /* |
| 376 | * cmpxchg only support 32-bits operands on ARMv6. |
| 377 | */ |
| 378 | |
| 379 | static inline unsigned long __cmpxchg(volatile void *ptr, unsigned long old, |
| 380 | unsigned long new, int size) |
| 381 | { |
| 382 | unsigned long oldval, res; |
| 383 | |
| 384 | switch (size) { |
Russell King | 4ed67a5 | 2011-01-17 15:42:42 +0000 | [diff] [blame] | 385 | #ifndef CONFIG_CPU_V6 /* min ARCH >= ARMv6K */ |
Mathieu Desnoyers | ecd322c | 2009-05-28 16:07:39 -0400 | [diff] [blame] | 386 | case 1: |
| 387 | do { |
| 388 | asm volatile("@ __cmpxchg1\n" |
| 389 | " ldrexb %1, [%2]\n" |
| 390 | " mov %0, #0\n" |
| 391 | " teq %1, %3\n" |
| 392 | " strexbeq %0, %4, [%2]\n" |
| 393 | : "=&r" (res), "=&r" (oldval) |
| 394 | : "r" (ptr), "Ir" (old), "r" (new) |
| 395 | : "memory", "cc"); |
| 396 | } while (res); |
| 397 | break; |
| 398 | case 2: |
| 399 | do { |
| 400 | asm volatile("@ __cmpxchg1\n" |
| 401 | " ldrexh %1, [%2]\n" |
| 402 | " mov %0, #0\n" |
| 403 | " teq %1, %3\n" |
| 404 | " strexheq %0, %4, [%2]\n" |
| 405 | : "=&r" (res), "=&r" (oldval) |
| 406 | : "r" (ptr), "Ir" (old), "r" (new) |
| 407 | : "memory", "cc"); |
| 408 | } while (res); |
| 409 | break; |
Russell King | 4ed67a5 | 2011-01-17 15:42:42 +0000 | [diff] [blame] | 410 | #endif |
Mathieu Desnoyers | ecd322c | 2009-05-28 16:07:39 -0400 | [diff] [blame] | 411 | case 4: |
| 412 | do { |
| 413 | asm volatile("@ __cmpxchg4\n" |
| 414 | " ldrex %1, [%2]\n" |
| 415 | " mov %0, #0\n" |
| 416 | " teq %1, %3\n" |
| 417 | " strexeq %0, %4, [%2]\n" |
| 418 | : "=&r" (res), "=&r" (oldval) |
| 419 | : "r" (ptr), "Ir" (old), "r" (new) |
| 420 | : "memory", "cc"); |
| 421 | } while (res); |
| 422 | break; |
| 423 | default: |
| 424 | __bad_cmpxchg(ptr, size); |
| 425 | oldval = 0; |
| 426 | } |
| 427 | |
| 428 | return oldval; |
| 429 | } |
| 430 | |
| 431 | static inline unsigned long __cmpxchg_mb(volatile void *ptr, unsigned long old, |
| 432 | unsigned long new, int size) |
| 433 | { |
| 434 | unsigned long ret; |
| 435 | |
| 436 | smp_mb(); |
| 437 | ret = __cmpxchg(ptr, old, new, size); |
| 438 | smp_mb(); |
| 439 | |
| 440 | return ret; |
| 441 | } |
| 442 | |
| 443 | #define cmpxchg(ptr,o,n) \ |
| 444 | ((__typeof__(*(ptr)))__cmpxchg_mb((ptr), \ |
| 445 | (unsigned long)(o), \ |
| 446 | (unsigned long)(n), \ |
| 447 | sizeof(*(ptr)))) |
| 448 | |
| 449 | static inline unsigned long __cmpxchg_local(volatile void *ptr, |
| 450 | unsigned long old, |
| 451 | unsigned long new, int size) |
| 452 | { |
| 453 | unsigned long ret; |
| 454 | |
| 455 | switch (size) { |
Russell King | 4ed67a5 | 2011-01-17 15:42:42 +0000 | [diff] [blame] | 456 | #ifdef CONFIG_CPU_V6 /* min ARCH == ARMv6 */ |
Mathieu Desnoyers | ecd322c | 2009-05-28 16:07:39 -0400 | [diff] [blame] | 457 | case 1: |
| 458 | case 2: |
| 459 | ret = __cmpxchg_local_generic(ptr, old, new, size); |
| 460 | break; |
Russell King | 4ed67a5 | 2011-01-17 15:42:42 +0000 | [diff] [blame] | 461 | #endif |
Mathieu Desnoyers | ecd322c | 2009-05-28 16:07:39 -0400 | [diff] [blame] | 462 | default: |
| 463 | ret = __cmpxchg(ptr, old, new, size); |
| 464 | } |
| 465 | |
| 466 | return ret; |
| 467 | } |
| 468 | |
| 469 | #define cmpxchg_local(ptr,o,n) \ |
| 470 | ((__typeof__(*(ptr)))__cmpxchg_local((ptr), \ |
| 471 | (unsigned long)(o), \ |
| 472 | (unsigned long)(n), \ |
| 473 | sizeof(*(ptr)))) |
| 474 | |
Russell King | 4ed67a5 | 2011-01-17 15:42:42 +0000 | [diff] [blame] | 475 | #ifndef CONFIG_CPU_V6 /* min ARCH >= ARMv6K */ |
Mathieu Desnoyers | ecd322c | 2009-05-28 16:07:39 -0400 | [diff] [blame] | 476 | |
| 477 | /* |
| 478 | * Note : ARMv7-M (currently unsupported by Linux) does not support |
| 479 | * ldrexd/strexd. If ARMv7-M is ever supported by the Linux kernel, it should |
| 480 | * not be allowed to use __cmpxchg64. |
| 481 | */ |
| 482 | static inline unsigned long long __cmpxchg64(volatile void *ptr, |
| 483 | unsigned long long old, |
| 484 | unsigned long long new) |
| 485 | { |
| 486 | register unsigned long long oldval asm("r0"); |
| 487 | register unsigned long long __old asm("r2") = old; |
| 488 | register unsigned long long __new asm("r4") = new; |
| 489 | unsigned long res; |
| 490 | |
| 491 | do { |
| 492 | asm volatile( |
| 493 | " @ __cmpxchg8\n" |
| 494 | " ldrexd %1, %H1, [%2]\n" |
| 495 | " mov %0, #0\n" |
| 496 | " teq %1, %3\n" |
| 497 | " teqeq %H1, %H3\n" |
| 498 | " strexdeq %0, %4, %H4, [%2]\n" |
| 499 | : "=&r" (res), "=&r" (oldval) |
| 500 | : "r" (ptr), "Ir" (__old), "r" (__new) |
| 501 | : "memory", "cc"); |
| 502 | } while (res); |
| 503 | |
| 504 | return oldval; |
| 505 | } |
| 506 | |
| 507 | static inline unsigned long long __cmpxchg64_mb(volatile void *ptr, |
| 508 | unsigned long long old, |
| 509 | unsigned long long new) |
| 510 | { |
| 511 | unsigned long long ret; |
| 512 | |
| 513 | smp_mb(); |
| 514 | ret = __cmpxchg64(ptr, old, new); |
| 515 | smp_mb(); |
| 516 | |
| 517 | return ret; |
| 518 | } |
| 519 | |
| 520 | #define cmpxchg64(ptr,o,n) \ |
| 521 | ((__typeof__(*(ptr)))__cmpxchg64_mb((ptr), \ |
| 522 | (unsigned long long)(o), \ |
| 523 | (unsigned long long)(n))) |
| 524 | |
| 525 | #define cmpxchg64_local(ptr,o,n) \ |
| 526 | ((__typeof__(*(ptr)))__cmpxchg64((ptr), \ |
| 527 | (unsigned long long)(o), \ |
| 528 | (unsigned long long)(n))) |
| 529 | |
Russell King | 4ed67a5 | 2011-01-17 15:42:42 +0000 | [diff] [blame] | 530 | #else /* min ARCH = ARMv6 */ |
Mathieu Desnoyers | ecd322c | 2009-05-28 16:07:39 -0400 | [diff] [blame] | 531 | |
| 532 | #define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n)) |
| 533 | |
Russell King | 4ed67a5 | 2011-01-17 15:42:42 +0000 | [diff] [blame] | 534 | #endif |
Mathieu Desnoyers | ecd322c | 2009-05-28 16:07:39 -0400 | [diff] [blame] | 535 | |
| 536 | #endif /* __LINUX_ARM_ARCH__ >= 6 */ |
| 537 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 538 | #endif /* __ASSEMBLY__ */ |
| 539 | |
| 540 | #define arch_align_stack(x) (x) |
| 541 | |
| 542 | #endif /* __KERNEL__ */ |
| 543 | |
| 544 | #endif |