Gitiles
Code Review Sign In
gerrit-public.fairphone.software / kernel / msm-4.9 / c7a6fd50f19cfbfb0426c8d4326f8b93cc80e9c7 / . / arch / arm64 / boot / dts / qcom / msm8953.dtsi
blob: e90c30bb066e9f33bda092b459b403c22cb5706f [file] [log] [blame]
Srinivas Ramana3cac2782017-09-13 16:31:17 +0530[diff] [blame]1/*
2 * Copyright (c) 2015-2017, The Linux Foundation. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 and
6 * only version 2 as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13
14#include "skeleton64.dtsi"
15#include <dt-bindings/gpio/gpio.h>
Kiran Gundaaf6a0b62017-10-23 16:03:10 +0530[diff] [blame]16#include <dt-bindings/interrupt-controller/arm-gic.h>
Srinivas Ramana3cac2782017-09-13 16:31:17 +0530[diff] [blame]17
18/ {
19 model = "Qualcomm Technologies, Inc. MSM 8953";
20 compatible = "qcom,msm8953";
21 qcom,msm-id = <293 0x0>;
22 interrupt-parent = <&intc>;
23
24 chosen {
25 bootargs = "sched_enable_hmp=1 sched_enable_power_aware=1";
26 };
27
28 reserved-memory {
29 #address-cells = <2>;
30 #size-cells = <2>;
31 ranges;
32
33 other_ext_mem: other_ext_region@0 {
34 compatible = "removed-dma-pool";
35 no-map;
36 reg = <0x0 0x85b00000 0x0 0xd00000>;
37 };
38
39 modem_mem: modem_region@0 {
40 compatible = "removed-dma-pool";
41 no-map-fixup;
42 reg = <0x0 0x86c00000 0x0 0x6a00000>;
43 };
44
45 adsp_fw_mem: adsp_fw_region@0 {
46 compatible = "removed-dma-pool";
47 no-map;
48 reg = <0x0 0x8d600000 0x0 0x1100000>;
49 };
50
51 wcnss_fw_mem: wcnss_fw_region@0 {
52 compatible = "removed-dma-pool";
53 no-map;
54 reg = <0x0 0x8e700000 0x0 0x700000>;
55 };
56
57 venus_mem: venus_region@0 {
58 compatible = "shared-dma-pool";
59 reusable;
60 alloc-ranges = <0x0 0x80000000 0x0 0x10000000>;
61 alignment = <0 0x400000>;
62 size = <0 0x0800000>;
63 };
64
65 secure_mem: secure_region@0 {
66 compatible = "shared-dma-pool";
67 reusable;
68 alignment = <0 0x400000>;
69 size = <0 0x09800000>;
70 };
71
72 qseecom_mem: qseecom_region@0 {
73 compatible = "shared-dma-pool";
74 reusable;
75 alignment = <0 0x400000>;
76 size = <0 0x1000000>;
77 };
78
79 adsp_mem: adsp_region@0 {
80 compatible = "shared-dma-pool";
81 reusable;
82 size = <0 0x400000>;
83 };
84
85 dfps_data_mem: dfps_data_mem@90000000 {
86 reg = <0 0x90000000 0 0x1000>;
87 label = "dfps_data_mem";
88 };
89
90 cont_splash_mem: splash_region@0x90001000 {
91 reg = <0x0 0x90001000 0x0 0x13ff000>;
92 label = "cont_splash_mem";
93 };
94
95 gpu_mem: gpu_region@0 {
96 compatible = "shared-dma-pool";
97 reusable;
98 alloc-ranges = <0x0 0x80000000 0x0 0x10000000>;
99 alignment = <0 0x400000>;
100 size = <0 0x800000>;
101 };
102 };
103
104 aliases {
105 /* smdtty devices */
106 sdhc1 = &sdhc_1; /* SDC1 eMMC slot */
107 sdhc2 = &sdhc_2; /* SDC2 for SD card */
108 };
109
110 soc: soc { };
111
112};
113
114#include "msm8953-pinctrl.dtsi"
115#include "msm8953-cpu.dtsi"
116
117
118&soc {
119 #address-cells = <1>;
120 #size-cells = <1>;
121 ranges = <0 0 0 0xffffffff>;
122 compatible = "simple-bus";
123
124 apc_apm: apm@b111000 {
125 compatible = "qcom,msm8953-apm";
126 reg = <0xb111000 0x1000>;
127 reg-names = "pm-apcc-glb";
128 qcom,apm-post-halt-delay = <0x2>;
129 qcom,apm-halt-clk-delay = <0x11>;
130 qcom,apm-resume-clk-delay = <0x10>;
131 qcom,apm-sel-switch-delay = <0x01>;
132 };
133
134 intc: interrupt-controller@b000000 {
135 compatible = "qcom,msm-qgic2";
136 interrupt-controller;
137 #interrupt-cells = <3>;
138 reg = <0x0b000000 0x1000>,
139 <0x0b002000 0x1000>;
140 };
141
142 qcom,msm-gladiator@b1c0000 {
143 compatible = "qcom,msm-gladiator";
144 reg = <0x0b1c0000 0x4000>;
145 reg-names = "gladiator_base";
146 interrupts = <0 22 0>;
147 };
148
149 timer {
150 compatible = "arm,armv8-timer";
151 interrupts = <1 2 0xff08>,
152 <1 3 0xff08>,
153 <1 4 0xff08>,
154 <1 1 0xff08>;
155 clock-frequency = <19200000>;
156 };
157
158 timer@b120000 {
159 #address-cells = <1>;
160 #size-cells = <1>;
161 ranges;
162 compatible = "arm,armv7-timer-mem";
163 reg = <0xb120000 0x1000>;
164 clock-frequency = <19200000>;
165
166 frame@b121000 {
167 frame-number = <0>;
168 interrupts = <0 8 0x4>,
169 <0 7 0x4>;
170 reg = <0xb121000 0x1000>,
171 <0xb122000 0x1000>;
172 };
173
174 frame@b123000 {
175 frame-number = <1>;
176 interrupts = <0 9 0x4>;
177 reg = <0xb123000 0x1000>;
178 status = "disabled";
179 };
180
181 frame@b124000 {
182 frame-number = <2>;
183 interrupts = <0 10 0x4>;
184 reg = <0xb124000 0x1000>;
185 status = "disabled";
186 };
187
188 frame@b125000 {
189 frame-number = <3>;
190 interrupts = <0 11 0x4>;
191 reg = <0xb125000 0x1000>;
192 status = "disabled";
193 };
194
195 frame@b126000 {
196 frame-number = <4>;
197 interrupts = <0 12 0x4>;
198 reg = <0xb126000 0x1000>;
199 status = "disabled";
200 };
201
202 frame@b127000 {
203 frame-number = <5>;
204 interrupts = <0 13 0x4>;
205 reg = <0xb127000 0x1000>;
206 status = "disabled";
207 };
208
209 frame@b128000 {
210 frame-number = <6>;
211 interrupts = <0 14 0x4>;
212 reg = <0xb128000 0x1000>;
213 status = "disabled";
214 };
215 };
216 qcom,rmtfs_sharedmem@00000000 {
217 compatible = "qcom,sharedmem-uio";
218 reg = <0x00000000 0x00180000>;
219 reg-names = "rmtfs";
220 qcom,client-id = <0x00000001>;
221 };
222
223 restart@4ab000 {
224 compatible = "qcom,pshold";
225 reg = <0x4ab000 0x4>,
226 <0x193d100 0x4>;
227 reg-names = "pshold-base", "tcsr-boot-misc-detect";
228 };
229
230 qcom,mpm2-sleep-counter@4a3000 {
231 compatible = "qcom,mpm2-sleep-counter";
232 reg = <0x4a3000 0x1000>;
233 clock-frequency = <32768>;
234 };
235
236 cpu-pmu {
237 compatible = "arm,armv8-pmuv3";
238 interrupts = <1 7 0xff00>;
239 };
240
241 qcom,sps {
242 compatible = "qcom,msm_sps_4k";
243 qcom,pipe-attr-ee;
244 };
245
246 blsp1_uart0: serial@78af000 {
247 compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
248 reg = <0x78af000 0x200>;
249 interrupts = <0 107 0>;
250 status = "disabled";
251 };
252
253 dma_blsp1: qcom,sps-dma@7884000 { /* BLSP1 */
254 #dma-cells = <4>;
255 compatible = "qcom,sps-dma";
256 reg = <0x7884000 0x1f000>;
257 interrupts = <0 238 0>;
258 qcom,summing-threshold = <10>;
259 };
260
261 dma_blsp2: qcom,sps-dma@7ac4000 { /* BLSP2 */
262 #dma-cells = <4>;
263 compatible = "qcom,sps-dma";
264 reg = <0x7ac4000 0x1f000>;
265 interrupts = <0 239 0>;
266 qcom,summing-threshold = <10>;
267 };
268
269 slim_msm: slim@c140000{
270 cell-index = <1>;
271 compatible = "qcom,slim-ngd";
272 reg = <0xc140000 0x2c000>,
273 <0xc104000 0x2a000>;
274 reg-names = "slimbus_physical", "slimbus_bam_physical";
275 interrupts = <0 163 0>, <0 180 0>;
276 interrupt-names = "slimbus_irq", "slimbus_bam_irq";
277 qcom,apps-ch-pipes = <0x600000>;
278 qcom,ea-pc = <0x200>;
279 status = "disabled";
280 };
281
282 cpubw: qcom,cpubw {
283 compatible = "qcom,devbw";
284 governor = "cpufreq";
285 qcom,src-dst-ports = <1 512>;
286 qcom,active-only;
287 qcom,bw-tbl =
288 < 769 /* 100.8 MHz */ >,
289 < 1611 /* 211.2 MHz */ >, /*Low SVS*/
290 < 2124 /* 278.4 MHz */ >,
291 < 2929 /* 384 MHz */ >,
292 < 3221 /* 422.4 MHz */ >, /* SVS */
293 < 4248 /* 556.8 MHz */ >,
294 < 5126 /* 672 MHz */ >,
295 < 5859 /* 768 MHz */ >, /* SVS+ */
296 < 6152 /* 806.4 MHz */ >,
297 < 6445 /* 844.8 MHz */ >, /* NOM */
298 < 7104 /* 931.2 MHz */ >; /* TURBO */
299 };
300
301 mincpubw: qcom,mincpubw {
302 compatible = "qcom,devbw";
303 governor = "cpufreq";
304 qcom,src-dst-ports = <1 512>;
305 qcom,active-only;
306 qcom,bw-tbl =
307 < 769 /* 100.8 MHz */ >,
308 < 1611 /* 211.2 MHz */ >, /*Low SVS*/
309 < 2124 /* 278.4 MHz */ >,
310 < 2929 /* 384 MHz */ >,
311 < 3221 /* 422.4 MHz */ >, /* SVS */
312 < 4248 /* 556.8 MHz */ >,
313 < 5126 /* 672 MHz */ >,
314 < 5859 /* 768 MHz */ >, /* SVS+ */
315 < 6152 /* 806.4 MHz */ >,
316 < 6445 /* 844.8 MHz */ >, /* NOM */
317 < 7104 /* 931.2 MHz */ >; /* TURBO */
318 };
319
320 qcom,cpu-bwmon {
321 compatible = "qcom,bimc-bwmon2";
322 reg = <0x408000 0x300>, <0x401000 0x200>;
323 reg-names = "base", "global_base";
324 interrupts = <0 183 4>;
325 qcom,mport = <0>;
326 qcom,target-dev = <&cpubw>;
327 };
328
329 devfreq-cpufreq {
330 cpubw-cpufreq {
331 target-dev = <&cpubw>;
332 cpu-to-dev-map =
333 < 652800 1611>,
334 < 1036800 3221>,
335 < 1401600 5859>,
336 < 1689600 6445>,
337 < 1804800 7104>,
338 < 1958400 7104>,
339 < 2208000 7104>;
340 };
341
342 mincpubw-cpufreq {
343 target-dev = <&mincpubw>;
344 cpu-to-dev-map =
345 < 652800 1611 >,
346 < 1401600 3221 >,
347 < 2208000 5859 >;
348 };
349 };
350
Jonathan Avilac7a6fd52017-10-12 15:24:05 -0700[diff] [blame^]351 cpubw_compute: qcom,cpubw-compute {
352 compatible = "qcom,arm-cpu-mon";
353 qcom,cpulist = < &CPU0 &CPU1 &CPU2 &CPU3
354 &CPU4 &CPU5 &CPU6 &CPU7 >;
355 qcom,target-dev = <&cpubw>;
356 qcom,core-dev-table =
357 < 652800 1611>,
358 < 1036800 3221>,
359 < 1401600 5859>,
360 < 1689600 6445>,
361 < 1804800 7104>,
362 < 1958400 7104>,
363 < 2208000 7104>;
364 };
365
366 mincpubw_compute: qcom,mincpubw-compute {
367 compatible = "qcom,arm-cpu-mon";
368 qcom,cpulist = < &CPU0 &CPU1 &CPU2 &CPU3
369 &CPU4 &CPU5 &CPU6 &CPU7 >;
370 qcom,target-dev = <&mincpubw>;
371 qcom,core-dev-table =
372 < 652800 1611 >,
373 < 1401600 3221 >,
374 < 2208000 5859 >;
375 };
376
Srinivas Ramana3cac2782017-09-13 16:31:17 +0530[diff] [blame]377 qcom,ipc-spinlock@1905000 {
378 compatible = "qcom,ipc-spinlock-sfpb";
379 reg = <0x1905000 0x8000>;
380 qcom,num-locks = <8>;
381 };
382
383 qcom,smem@86300000 {
384 compatible = "qcom,smem";
385 reg = <0x86300000 0x100000>,
386 <0x0b011008 0x4>,
387 <0x60000 0x8000>,
388 <0x193d000 0x8>;
389 reg-names = "smem", "irq-reg-base",
390 "aux-mem1", "smem_targ_info_reg";
391 qcom,mpu-enabled;
392
393 qcom,smd-modem {
394 compatible = "qcom,smd";
395 qcom,smd-edge = <0>;
396 qcom,smd-irq-offset = <0x0>;
397 qcom,smd-irq-bitmask = <0x1000>;
398 interrupts = <0 25 1>;
399 label = "modem";
400 qcom,not-loadable;
401 };
402
403 qcom,smsm-modem {
404 compatible = "qcom,smsm";
405 qcom,smsm-edge = <0>;
406 qcom,smsm-irq-offset = <0x0>;
407 qcom,smsm-irq-bitmask = <0x2000>;
408 interrupts = <0 26 1>;
409 };
410
411 qcom,smd-wcnss {
412 compatible = "qcom,smd";
413 qcom,smd-edge = <6>;
414 qcom,smd-irq-offset = <0x0>;
415 qcom,smd-irq-bitmask = <0x20000>;
416 interrupts = <0 142 1>;
417 label = "wcnss";
418 };
419
420 qcom,smsm-wcnss {
421 compatible = "qcom,smsm";
422 qcom,smsm-edge = <6>;
423 qcom,smsm-irq-offset = <0x0>;
424 qcom,smsm-irq-bitmask = <0x80000>;
425 interrupts = <0 144 1>;
426 };
427
428 qcom,smd-adsp {
429 compatible = "qcom,smd";
430 qcom,smd-edge = <1>;
431 qcom,smd-irq-offset = <0x0>;
432 qcom,smd-irq-bitmask = <0x100>;
433 interrupts = <0 289 1>;
434 label = "adsp";
435 };
436
437 qcom,smsm-adsp {
438 compatible = "qcom,smsm";
439 qcom,smsm-edge = <1>;
440 qcom,smsm-irq-offset = <0x0>;
441 qcom,smsm-irq-bitmask = <0x200>;
442 interrupts = <0 290 1>;
443 };
444
445 qcom,smd-rpm {
446 compatible = "qcom,smd";
447 qcom,smd-edge = <15>;
448 qcom,smd-irq-offset = <0x0>;
449 qcom,smd-irq-bitmask = <0x1>;
450 interrupts = <0 168 1>;
451 label = "rpm";
452 qcom,irq-no-suspend;
453 qcom,not-loadable;
454 };
455 };
456
457 qcom,wdt@b017000 {
458 compatible = "qcom,msm-watchdog";
459 reg = <0xb017000 0x1000>;
460 reg-names = "wdt-base";
461 interrupts = <0 3 0>, <0 4 0>;
462 qcom,bark-time = <11000>;
463 qcom,pet-time = <10000>;
464 qcom,ipi-ping;
465 qcom,wakeup-enable;
466 };
467
468 qcom,chd {
469 compatible = "qcom,core-hang-detect";
470 qcom,threshold-arr = <0xb1880b0 0xb1980b0 0xb1a80b0
471 0xb1b80b0 0xb0880b0 0xb0980b0 0xb0a80b0 0xb0b80b0>;
472 qcom,config-arr = <0xb1880b8 0xb1980b8 0xb1a80b8
473 0xb1b80b8 0xb0880b8 0xb0980b8 0xb0a80b8 0xb0b80b8>;
474 };
475
476 qcom,msm-rtb {
477 compatible = "qcom,msm-rtb";
478 qcom,rtb-size = <0x100000>;
479 };
480
481 qcom,msm-imem@8600000 {
482 compatible = "qcom,msm-imem";
483 reg = <0x08600000 0x1000>;
484 ranges = <0x0 0x08600000 0x1000>;
485 #address-cells = <1>;
486 #size-cells = <1>;
487
488 mem_dump_table@10 {
489 compatible = "qcom,msm-imem-mem_dump_table";
490 reg = <0x10 8>;
491 };
492
493 restart_reason@65c {
494 compatible = "qcom,msm-imem-restart_reason";
495 reg = <0x65c 4>;
496 };
497
498 boot_stats@6b0 {
499 compatible = "qcom,msm-imem-boot_stats";
500 reg = <0x6b0 32>;
501 };
502
503 pil@94c {
504 compatible = "qcom,msm-imem-pil";
505 reg = <0x94c 200>;
506
507 };
508 };
509
510 qcom,memshare {
511 compatible = "qcom,memshare";
512
513 qcom,client_1 {
514 compatible = "qcom,memshare-peripheral";
515 qcom,peripheral-size = <0x200000>;
516 qcom,client-id = <0>;
517 qcom,allocate-boot-time;
518 label = "modem";
519 };
520
521 qcom,client_2 {
522 compatible = "qcom,memshare-peripheral";
523 qcom,peripheral-size = <0x300000>;
524 qcom,client-id = <2>;
525 label = "modem";
526 };
527
528 mem_client_3_size: qcom,client_3 {
529 compatible = "qcom,memshare-peripheral";
530 qcom,peripheral-size = <0x0>;
531 qcom,client-id = <1>;
532 label = "modem";
533 };
534 };
535 sdcc1_ice: sdcc1ice@7803000 {
536 compatible = "qcom,ice";
537 reg = <0x7803000 0x8000>;
538 interrupt-names = "sdcc_ice_nonsec_level_irq",
539 "sdcc_ice_sec_level_irq";
540 interrupts = <0 312 0>, <0 313 0>;
541 qcom,enable-ice-clk;
542 qcom,op-freq-hz = <270000000>, <0>, <0>, <0>;
543 qcom,msm-bus,name = "sdcc_ice_noc";
544 qcom,msm-bus,num-cases = <2>;
545 qcom,msm-bus,num-paths = <1>;
546 qcom,msm-bus,vectors-KBps =
547 <78 512 0 0>, /* No vote */
548 <78 512 1000 0>; /* Max. bandwidth */
549 qcom,bus-vector-names = "MIN", "MAX";
550 qcom,instance-type = "sdcc";
551 };
552
553 sdhc_1: sdhci@7824900 {
554 compatible = "qcom,sdhci-msm";
555 reg = <0x7824900 0x500>, <0x7824000 0x800>, <0x7824e00 0x200>;
556 reg-names = "hc_mem", "core_mem", "cmdq_mem";
557
558 interrupts = <0 123 0>, <0 138 0>;
559 interrupt-names = "hc_irq", "pwr_irq";
560
561 sdhc-msm-crypto = <&sdcc1_ice>;
562 qcom,bus-width = <8>;
563
564 qcom,devfreq,freq-table = <50000000 200000000>;
565
566 qcom,pm-qos-irq-type = "affine_irq";
567 qcom,pm-qos-irq-latency = <2 213>;
568
569 qcom,pm-qos-cpu-groups = <0x0f 0xf0>;
570 qcom,pm-qos-cmdq-latency-us = <2 213>, <2 213>;
571
572 qcom,pm-qos-legacy-latency-us = <2 213>, <2 213>;
573
574 qcom,msm-bus,name = "sdhc1";
575 qcom,msm-bus,num-cases = <9>;
576 qcom,msm-bus,num-paths = <1>;
577 qcom,msm-bus,vectors-KBps = <78 512 0 0>, /* No vote */
578 <78 512 1046 3200>, /* 400 KB/s*/
579 <78 512 52286 160000>, /* 20 MB/s */
580 <78 512 65360 200000>, /* 25 MB/s */
581 <78 512 130718 400000>, /* 50 MB/s */
582 <78 512 130718 400000>, /* 100 MB/s */
583 <78 512 261438 800000>, /* 200 MB/s */
584 <78 512 261438 800000>, /* 400 MB/s */
585 <78 512 1338562 4096000>; /* Max. bandwidth */
586 qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000
587 100000000 200000000 400000000 4294967295>;
588
589 qcom,ice-clk-rates = <270000000 160000000>;
590 qcom,large-address-bus;
591
592 status = "disabled";
593 };
594
595 sdhc_2: sdhci@7864900 {
596 compatible = "qcom,sdhci-msm";
597 reg = <0x7864900 0x500>, <0x7864000 0x800>;
598 reg-names = "hc_mem", "core_mem";
599
600 interrupts = <0 125 0>, <0 221 0>;
601 interrupt-names = "hc_irq", "pwr_irq";
602
603 qcom,bus-width = <4>;
604
605 qcom,pm-qos-irq-type = "affine_irq";
606 qcom,pm-qos-irq-latency = <2 213>;
607
608 qcom,pm-qos-cpu-groups = <0x0f 0xf0>;
609 qcom,pm-qos-legacy-latency-us = <2 213>, <2 213>;
610
611 qcom,devfreq,freq-table = <50000000 200000000>;
612
613 qcom,msm-bus,name = "sdhc2";
614 qcom,msm-bus,num-cases = <8>;
615 qcom,msm-bus,num-paths = <1>;
616 qcom,msm-bus,vectors-KBps = <81 512 0 0>, /* No vote */
617 <81 512 1046 3200>, /* 400 KB/s*/
618 <81 512 52286 160000>, /* 20 MB/s */
619 <81 512 65360 200000>, /* 25 MB/s */
620 <81 512 130718 400000>, /* 50 MB/s */
621 <81 512 261438 800000>, /* 100 MB/s */
622 <81 512 261438 800000>, /* 200 MB/s */
623 <81 512 1338562 4096000>; /* Max. bandwidth */
624 qcom,bus-bw-vectors-bps = <0 400000 20000000 25000000 50000000
625 100000000 200000000 4294967295>;
626
627 qcom,large-address-bus;
628 status = "disabled";
629 };
630
Kiran Gundaaf6a0b62017-10-23 16:03:10 +0530[diff] [blame]631 spmi_bus: qcom,spmi@200f000 {
632 compatible = "qcom,spmi-pmic-arb";
633 reg = <0x200f000 0x1000>,
634 <0x2400000 0x800000>,
635 <0x2c00000 0x800000>,
636 <0x3800000 0x200000>,
637 <0x200a000 0x2100>;
638 reg-names = "core", "chnls", "obsrvr", "intr", "cnfg";
639 interrupt-names = "periph_irq";
640 interrupts = <GIC_SPI 190 IRQ_TYPE_NONE>;
641 qcom,ee = <0>;
642 qcom,channel = <0>;
643 #address-cells = <1>;
644 #size-cells = <0>;
645 interrupt-controller;
646 #interrupt-cells = <3>;
647 cell-index = <0>;
648 };
Srinivas Ramana3cac2782017-09-13 16:31:17 +0530[diff] [blame]649};