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Steve Sakomancc175572008-10-30 21:35:26 -07001/*
2 * ALSA SoC TWL4030 codec driver
3 *
4 * Author: Steve Sakoman, <steve@sakoman.com>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * version 2 as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
18 * 02110-1301 USA
19 *
20 */
21
22#include <linux/module.h>
23#include <linux/moduleparam.h>
24#include <linux/init.h>
25#include <linux/delay.h>
26#include <linux/pm.h>
27#include <linux/i2c.h>
28#include <linux/platform_device.h>
Peter Ujfalusi2d6d6492012-09-10 13:46:32 +030029#include <linux/of.h>
30#include <linux/of_gpio.h>
Santosh Shilimkarb07682b2009-12-13 20:05:51 +010031#include <linux/i2c/twl.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090032#include <linux/slab.h>
Peter Ujfalusi281ecd12012-09-10 13:46:27 +030033#include <linux/gpio.h>
Steve Sakomancc175572008-10-30 21:35:26 -070034#include <sound/core.h>
35#include <sound/pcm.h>
36#include <sound/pcm_params.h>
37#include <sound/soc.h>
Steve Sakomancc175572008-10-30 21:35:26 -070038#include <sound/initval.h>
Peter Ujfalusic10b82c2008-11-24 13:49:35 +020039#include <sound/tlv.h>
Steve Sakomancc175572008-10-30 21:35:26 -070040
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +000041/* Register descriptions are here */
Peter Ujfalusi57fe7252011-05-31 12:02:49 +030042#include <linux/mfd/twl4030-audio.h>
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +000043
Peter Ujfalusi5712ded2012-12-31 11:51:46 +010044/* TWL4030 PMBR1 Register */
45#define TWL4030_PMBR1_REG 0x0D
46/* TWL4030 PMBR1 Register GPIO6 mux bits */
47#define TWL4030_GPIO6_PWM0_MUTE(value) ((value & 0x03) << 2)
48
Lars-Peter Clausen052901f42013-10-06 13:43:50 +020049#define TWL4030_CACHEREGNUM (TWL4030_REG_MISC_SET_2 + 1)
Steve Sakomancc175572008-10-30 21:35:26 -070050
Peter Ujfalusi73939582009-01-29 14:57:50 +020051/* codec private data */
52struct twl4030_priv {
Peter Ujfalusi73939582009-01-29 14:57:50 +020053 unsigned int codec_powered;
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +030054
55 /* reference counts of AIF/APLL users */
Peter Ujfalusi2845fa12009-10-28 10:57:05 +020056 unsigned int apll_enabled;
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +020057
58 struct snd_pcm_substream *master_substream;
59 struct snd_pcm_substream *slave_substream;
Peter Ujfalusi6b87a912009-04-17 15:55:08 +030060
61 unsigned int configured;
62 unsigned int rate;
63 unsigned int sample_bits;
64 unsigned int channels;
Peter Ujfalusi6943c922009-05-18 16:02:05 +030065
66 unsigned int sysclk;
67
Peter Ujfalusic96907f2010-03-22 17:46:37 +020068 /* Output (with associated amp) states */
69 u8 hsl_enabled, hsr_enabled;
70 u8 earpiece_enabled;
71 u8 predrivel_enabled, predriver_enabled;
72 u8 carkitl_enabled, carkitr_enabled;
Peter Ujfalusi8b3bca22014-01-03 15:27:52 +020073 u8 ctl_cache[TWL4030_REG_PRECKR_CTL - TWL4030_REG_EAR_CTL + 1];
Peter Ujfalusi01ea6ba2010-07-20 15:49:09 +030074
Peter Ujfalusi182f73f2012-09-10 13:46:31 +030075 struct twl4030_codec_data *pdata;
Peter Ujfalusi73939582009-01-29 14:57:50 +020076};
77
Peter Ujfalusi8b3bca22014-01-03 15:27:52 +020078static void tw4030_init_ctl_cache(struct twl4030_priv *twl4030)
79{
80 int i;
81 u8 byte;
82
83 for (i = TWL4030_REG_EAR_CTL; i <= TWL4030_REG_PRECKR_CTL; i++) {
84 twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &byte, i);
85 twl4030->ctl_cache[i - TWL4030_REG_EAR_CTL] = byte;
86 }
87}
88
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +020089static unsigned int twl4030_read(struct snd_soc_codec *codec, unsigned int reg)
90{
91 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
92 u8 value = 0;
Steve Sakomancc175572008-10-30 21:35:26 -070093
Ian Molton91432e92009-01-17 17:44:23 +000094 if (reg >= TWL4030_CACHEREGNUM)
95 return -EIO;
96
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +020097 switch (reg) {
98 case TWL4030_REG_EAR_CTL:
99 case TWL4030_REG_PREDL_CTL:
100 case TWL4030_REG_PREDR_CTL:
101 case TWL4030_REG_PRECKL_CTL:
102 case TWL4030_REG_PRECKR_CTL:
103 case TWL4030_REG_HS_GAIN_SET:
104 value = twl4030->ctl_cache[reg - TWL4030_REG_EAR_CTL];
105 break;
106 default:
107 twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &value, reg);
108 break;
109 }
Steve Sakomancc175572008-10-30 21:35:26 -0700110
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +0200111 return value;
Steve Sakomancc175572008-10-30 21:35:26 -0700112}
113
Peter Ujfalusib703b502014-01-03 15:27:56 +0200114static bool twl4030_can_write_to_chip(struct twl4030_priv *twl4030,
Peter Ujfalusia8fc4152014-01-03 15:27:49 +0200115 unsigned int reg)
Steve Sakomancc175572008-10-30 21:35:26 -0700116{
Peter Ujfalusia8fc4152014-01-03 15:27:49 +0200117 bool write_to_reg = false;
Peter Ujfalusic96907f2010-03-22 17:46:37 +0200118
Lars-Peter Clausen052901f42013-10-06 13:43:50 +0200119 /* Decide if the given register can be written */
120 switch (reg) {
121 case TWL4030_REG_EAR_CTL:
122 if (twl4030->earpiece_enabled)
Peter Ujfalusia8fc4152014-01-03 15:27:49 +0200123 write_to_reg = true;
Lars-Peter Clausen052901f42013-10-06 13:43:50 +0200124 break;
125 case TWL4030_REG_PREDL_CTL:
126 if (twl4030->predrivel_enabled)
Peter Ujfalusia8fc4152014-01-03 15:27:49 +0200127 write_to_reg = true;
Lars-Peter Clausen052901f42013-10-06 13:43:50 +0200128 break;
129 case TWL4030_REG_PREDR_CTL:
130 if (twl4030->predriver_enabled)
Peter Ujfalusia8fc4152014-01-03 15:27:49 +0200131 write_to_reg = true;
Lars-Peter Clausen052901f42013-10-06 13:43:50 +0200132 break;
133 case TWL4030_REG_PRECKL_CTL:
134 if (twl4030->carkitl_enabled)
Peter Ujfalusia8fc4152014-01-03 15:27:49 +0200135 write_to_reg = true;
Lars-Peter Clausen052901f42013-10-06 13:43:50 +0200136 break;
137 case TWL4030_REG_PRECKR_CTL:
138 if (twl4030->carkitr_enabled)
Peter Ujfalusia8fc4152014-01-03 15:27:49 +0200139 write_to_reg = true;
Lars-Peter Clausen052901f42013-10-06 13:43:50 +0200140 break;
141 case TWL4030_REG_HS_GAIN_SET:
142 if (twl4030->hsl_enabled || twl4030->hsr_enabled)
Peter Ujfalusia8fc4152014-01-03 15:27:49 +0200143 write_to_reg = true;
Lars-Peter Clausen052901f42013-10-06 13:43:50 +0200144 break;
145 default:
146 /* All other register can be written */
Peter Ujfalusia8fc4152014-01-03 15:27:49 +0200147 write_to_reg = true;
Lars-Peter Clausen052901f42013-10-06 13:43:50 +0200148 break;
Peter Ujfalusic96907f2010-03-22 17:46:37 +0200149 }
Peter Ujfalusia8fc4152014-01-03 15:27:49 +0200150
151 return write_to_reg;
152}
153
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200154static int twl4030_write(struct snd_soc_codec *codec, unsigned int reg,
155 unsigned int value)
Peter Ujfalusia8fc4152014-01-03 15:27:49 +0200156{
Peter Ujfalusia450aa62014-01-03 15:27:55 +0200157 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
158
159 /* Update the ctl cache */
160 switch (reg) {
161 case TWL4030_REG_EAR_CTL:
162 case TWL4030_REG_PREDL_CTL:
163 case TWL4030_REG_PREDR_CTL:
164 case TWL4030_REG_PRECKL_CTL:
165 case TWL4030_REG_PRECKR_CTL:
166 case TWL4030_REG_HS_GAIN_SET:
167 twl4030->ctl_cache[reg - TWL4030_REG_EAR_CTL] = value;
168 break;
169 default:
170 break;
171 }
172
Peter Ujfalusib703b502014-01-03 15:27:56 +0200173 if (twl4030_can_write_to_chip(twl4030, reg))
Peter Ujfalusia8fc4152014-01-03 15:27:49 +0200174 return twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, value, reg);
Lars-Peter Clausen052901f42013-10-06 13:43:50 +0200175
Peter Ujfalusic96907f2010-03-22 17:46:37 +0200176 return 0;
Steve Sakomancc175572008-10-30 21:35:26 -0700177}
178
Peter Ujfalusi7e6120c2010-10-25 11:34:23 +0300179static inline void twl4030_wait_ms(int time)
180{
181 if (time < 60) {
182 time *= 1000;
183 usleep_range(time, time + 500);
184 } else {
185 msleep(time);
186 }
187}
188
Peter Ujfalusidb04e2c2009-01-27 11:29:40 +0200189static void twl4030_codec_enable(struct snd_soc_codec *codec, int enable)
Steve Sakomancc175572008-10-30 21:35:26 -0700190{
Mark Brownb2c812e2010-04-14 15:35:19 +0900191 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +0300192 int mode;
Steve Sakomancc175572008-10-30 21:35:26 -0700193
Peter Ujfalusi73939582009-01-29 14:57:50 +0200194 if (enable == twl4030->codec_powered)
195 return;
196
Peter Ujfalusidb04e2c2009-01-27 11:29:40 +0200197 if (enable)
Peter Ujfalusi57fe7252011-05-31 12:02:49 +0300198 mode = twl4030_audio_enable_resource(TWL4030_AUDIO_RES_POWER);
Peter Ujfalusidb04e2c2009-01-27 11:29:40 +0200199 else
Peter Ujfalusi57fe7252011-05-31 12:02:49 +0300200 mode = twl4030_audio_disable_resource(TWL4030_AUDIO_RES_POWER);
Steve Sakomancc175572008-10-30 21:35:26 -0700201
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +0200202 if (mode >= 0)
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +0300203 twl4030->codec_powered = enable;
Steve Sakomancc175572008-10-30 21:35:26 -0700204
205 /* REVISIT: this delay is present in TI sample drivers */
206 /* but there seems to be no TRM requirement for it */
207 udelay(10);
208}
209
Peter Ujfalusi2d6d6492012-09-10 13:46:32 +0300210static void twl4030_setup_pdata_of(struct twl4030_codec_data *pdata,
211 struct device_node *node)
212{
213 int value;
214
215 of_property_read_u32(node, "ti,digimic_delay",
216 &pdata->digimic_delay);
217 of_property_read_u32(node, "ti,ramp_delay_value",
218 &pdata->ramp_delay_value);
219 of_property_read_u32(node, "ti,offset_cncl_path",
220 &pdata->offset_cncl_path);
221 if (!of_property_read_u32(node, "ti,hs_extmute", &value))
222 pdata->hs_extmute = value;
223
224 pdata->hs_extmute_gpio = of_get_named_gpio(node,
225 "ti,hs_extmute_gpio", 0);
226 if (gpio_is_valid(pdata->hs_extmute_gpio))
227 pdata->hs_extmute = 1;
228}
229
230static struct twl4030_codec_data *twl4030_get_pdata(struct snd_soc_codec *codec)
Steve Sakomancc175572008-10-30 21:35:26 -0700231{
Peter Ujfalusi4ae6df52011-05-31 15:21:13 +0300232 struct twl4030_codec_data *pdata = dev_get_platdata(codec->dev);
Peter Ujfalusi2d6d6492012-09-10 13:46:32 +0300233 struct device_node *twl4030_codec_node = NULL;
234
235 twl4030_codec_node = of_find_node_by_name(codec->dev->parent->of_node,
236 "codec");
237
238 if (!pdata && twl4030_codec_node) {
239 pdata = devm_kzalloc(codec->dev,
240 sizeof(struct twl4030_codec_data),
241 GFP_KERNEL);
242 if (!pdata) {
243 dev_err(codec->dev, "Can not allocate memory\n");
244 return NULL;
245 }
246 twl4030_setup_pdata_of(pdata, twl4030_codec_node);
247 }
248
249 return pdata;
250}
251
252static void twl4030_init_chip(struct snd_soc_codec *codec)
253{
254 struct twl4030_codec_data *pdata;
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300255 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
256 u8 reg, byte;
257 int i = 0;
Steve Sakomancc175572008-10-30 21:35:26 -0700258
Peter Ujfalusi2d6d6492012-09-10 13:46:32 +0300259 pdata = twl4030_get_pdata(codec);
260
Peter Ujfalusi5712ded2012-12-31 11:51:46 +0100261 if (pdata && pdata->hs_extmute) {
262 if (gpio_is_valid(pdata->hs_extmute_gpio)) {
263 int ret;
Peter Ujfalusi281ecd12012-09-10 13:46:27 +0300264
Peter Ujfalusi5712ded2012-12-31 11:51:46 +0100265 if (!pdata->hs_extmute_gpio)
266 dev_warn(codec->dev,
267 "Extmute GPIO is 0 is this correct?\n");
Peter Ujfalusi281ecd12012-09-10 13:46:27 +0300268
Peter Ujfalusi5712ded2012-12-31 11:51:46 +0100269 ret = gpio_request_one(pdata->hs_extmute_gpio,
270 GPIOF_OUT_INIT_LOW,
271 "hs_extmute");
272 if (ret) {
273 dev_err(codec->dev,
274 "Failed to get hs_extmute GPIO\n");
275 pdata->hs_extmute_gpio = -1;
276 }
277 } else {
278 u8 pin_mux;
279
280 /* Set TWL4030 GPIO6 as EXTMUTE signal */
281 twl_i2c_read_u8(TWL4030_MODULE_INTBR, &pin_mux,
282 TWL4030_PMBR1_REG);
283 pin_mux &= ~TWL4030_GPIO6_PWM0_MUTE(0x03);
284 pin_mux |= TWL4030_GPIO6_PWM0_MUTE(0x02);
285 twl_i2c_write_u8(TWL4030_MODULE_INTBR, pin_mux,
286 TWL4030_PMBR1_REG);
Peter Ujfalusi281ecd12012-09-10 13:46:27 +0300287 }
288 }
289
Peter Ujfalusi8b3bca22014-01-03 15:27:52 +0200290 /* Initialize the local ctl register cache */
291 tw4030_init_ctl_cache(twl4030);
292
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300293 /* anti-pop when changing analog gain */
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +0200294 reg = twl4030_read(codec, TWL4030_REG_MISC_SET_1);
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300295 twl4030_write(codec, TWL4030_REG_MISC_SET_1,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200296 reg | TWL4030_SMOOTH_ANAVOL_EN);
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300297
298 twl4030_write(codec, TWL4030_REG_OPTION,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200299 TWL4030_ATXL1_EN | TWL4030_ATXR1_EN |
300 TWL4030_ARXL2_EN | TWL4030_ARXR2_EN);
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300301
Peter Ujfalusi3c36cc62010-05-26 11:38:19 +0300302 /* REG_ARXR2_APGA_CTL reset according to the TRM: 0dB, DA_EN */
303 twl4030_write(codec, TWL4030_REG_ARXR2_APGA_CTL, 0x32);
304
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300305 /* Machine dependent setup */
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000306 if (!pdata)
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300307 return;
308
Peter Ujfalusi182f73f2012-09-10 13:46:31 +0300309 twl4030->pdata = pdata;
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300310
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +0200311 reg = twl4030_read(codec, TWL4030_REG_HS_POPN_SET);
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300312 reg &= ~TWL4030_RAMP_DELAY;
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000313 reg |= (pdata->ramp_delay_value << 2);
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +0200314 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, reg);
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300315
316 /* initiate offset cancellation */
317 twl4030_codec_enable(codec, 1);
318
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +0200319 reg = twl4030_read(codec, TWL4030_REG_ANAMICL);
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300320 reg &= ~TWL4030_OFFSET_CNCL_SEL;
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000321 reg |= pdata->offset_cncl_path;
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300322 twl4030_write(codec, TWL4030_REG_ANAMICL,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200323 reg | TWL4030_CNCL_OFFSET_START);
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300324
Peter Ujfalusi7e6120c2010-10-25 11:34:23 +0300325 /*
326 * Wait for offset cancellation to complete.
327 * Since this takes a while, do not slam the i2c.
328 * Start polling the status after ~20ms.
329 */
330 msleep(20);
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300331 do {
Peter Ujfalusi7e6120c2010-10-25 11:34:23 +0300332 usleep_range(1000, 2000);
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +0200333 twl_set_regcache_bypass(TWL4030_MODULE_AUDIO_VOICE, true);
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300334 twl_i2c_read_u8(TWL4030_MODULE_AUDIO_VOICE, &byte,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200335 TWL4030_REG_ANAMICL);
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +0200336 twl_set_regcache_bypass(TWL4030_MODULE_AUDIO_VOICE, false);
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +0300337 } while ((i++ < 100) &&
338 ((byte & TWL4030_CNCL_OFFSET_START) ==
339 TWL4030_CNCL_OFFSET_START));
340
Peter Ujfalusidb04e2c2009-01-27 11:29:40 +0200341 twl4030_codec_enable(codec, 0);
Steve Sakomancc175572008-10-30 21:35:26 -0700342}
343
Peter Ujfalusi2845fa12009-10-28 10:57:05 +0200344static void twl4030_apll_enable(struct snd_soc_codec *codec, int enable)
Peter Ujfalusi73939582009-01-29 14:57:50 +0200345{
Mark Brownb2c812e2010-04-14 15:35:19 +0900346 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +0300347 int status = -1;
Peter Ujfalusi73939582009-01-29 14:57:50 +0200348
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +0300349 if (enable) {
350 twl4030->apll_enabled++;
351 if (twl4030->apll_enabled == 1)
Peter Ujfalusi57fe7252011-05-31 12:02:49 +0300352 status = twl4030_audio_enable_resource(
353 TWL4030_AUDIO_RES_APLL);
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +0300354 } else {
355 twl4030->apll_enabled--;
356 if (!twl4030->apll_enabled)
Peter Ujfalusi57fe7252011-05-31 12:02:49 +0300357 status = twl4030_audio_disable_resource(
358 TWL4030_AUDIO_RES_APLL);
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +0300359 }
Peter Ujfalusi73939582009-01-29 14:57:50 +0200360}
361
Peter Ujfalusi5e98a462008-12-09 12:35:47 +0200362/* Earpiece */
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900363static const struct snd_kcontrol_new twl4030_dapm_earpiece_controls[] = {
364 SOC_DAPM_SINGLE("Voice", TWL4030_REG_EAR_CTL, 0, 1, 0),
365 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_EAR_CTL, 1, 1, 0),
366 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_EAR_CTL, 2, 1, 0),
367 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_EAR_CTL, 3, 1, 0),
368};
Peter Ujfalusi5e98a462008-12-09 12:35:47 +0200369
Peter Ujfalusi2a6f5c582008-12-09 12:35:48 +0200370/* PreDrive Left */
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900371static const struct snd_kcontrol_new twl4030_dapm_predrivel_controls[] = {
372 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PREDL_CTL, 0, 1, 0),
373 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_PREDL_CTL, 1, 1, 0),
374 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PREDL_CTL, 2, 1, 0),
375 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PREDL_CTL, 3, 1, 0),
376};
Peter Ujfalusi2a6f5c582008-12-09 12:35:48 +0200377
378/* PreDrive Right */
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900379static const struct snd_kcontrol_new twl4030_dapm_predriver_controls[] = {
380 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PREDR_CTL, 0, 1, 0),
381 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_PREDR_CTL, 1, 1, 0),
382 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PREDR_CTL, 2, 1, 0),
383 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PREDR_CTL, 3, 1, 0),
384};
Peter Ujfalusi2a6f5c582008-12-09 12:35:48 +0200385
Peter Ujfalusidfad21a2008-12-09 12:35:49 +0200386/* Headset Left */
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900387static const struct snd_kcontrol_new twl4030_dapm_hsol_controls[] = {
388 SOC_DAPM_SINGLE("Voice", TWL4030_REG_HS_SEL, 0, 1, 0),
389 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_HS_SEL, 1, 1, 0),
390 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_HS_SEL, 2, 1, 0),
391};
Peter Ujfalusidfad21a2008-12-09 12:35:49 +0200392
393/* Headset Right */
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900394static const struct snd_kcontrol_new twl4030_dapm_hsor_controls[] = {
395 SOC_DAPM_SINGLE("Voice", TWL4030_REG_HS_SEL, 3, 1, 0),
396 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_HS_SEL, 4, 1, 0),
397 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_HS_SEL, 5, 1, 0),
398};
Peter Ujfalusidfad21a2008-12-09 12:35:49 +0200399
Peter Ujfalusi5152d8c2008-12-09 12:35:50 +0200400/* Carkit Left */
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900401static const struct snd_kcontrol_new twl4030_dapm_carkitl_controls[] = {
402 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PRECKL_CTL, 0, 1, 0),
403 SOC_DAPM_SINGLE("AudioL1", TWL4030_REG_PRECKL_CTL, 1, 1, 0),
404 SOC_DAPM_SINGLE("AudioL2", TWL4030_REG_PRECKL_CTL, 2, 1, 0),
405};
Peter Ujfalusi5152d8c2008-12-09 12:35:50 +0200406
407/* Carkit Right */
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900408static const struct snd_kcontrol_new twl4030_dapm_carkitr_controls[] = {
409 SOC_DAPM_SINGLE("Voice", TWL4030_REG_PRECKR_CTL, 0, 1, 0),
410 SOC_DAPM_SINGLE("AudioR1", TWL4030_REG_PRECKR_CTL, 1, 1, 0),
411 SOC_DAPM_SINGLE("AudioR2", TWL4030_REG_PRECKR_CTL, 2, 1, 0),
412};
Peter Ujfalusi5152d8c2008-12-09 12:35:50 +0200413
Peter Ujfalusidf339802008-12-09 12:35:51 +0200414/* Handsfree Left */
415static const char *twl4030_handsfreel_texts[] =
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900416 {"Voice", "AudioL1", "AudioL2", "AudioR2"};
Peter Ujfalusidf339802008-12-09 12:35:51 +0200417
Takashi Iwai9f04fba2014-02-18 10:28:25 +0100418static SOC_ENUM_SINGLE_DECL(twl4030_handsfreel_enum,
419 TWL4030_REG_HFL_CTL, 0,
420 twl4030_handsfreel_texts);
Peter Ujfalusidf339802008-12-09 12:35:51 +0200421
422static const struct snd_kcontrol_new twl4030_dapm_handsfreel_control =
423SOC_DAPM_ENUM("Route", twl4030_handsfreel_enum);
424
Peter Ujfalusi0f89bdc2009-05-25 11:12:13 +0300425/* Handsfree Left virtual mute */
426static const struct snd_kcontrol_new twl4030_dapm_handsfreelmute_control =
Lars-Peter Clausen052901f42013-10-06 13:43:50 +0200427 SOC_DAPM_SINGLE_VIRT("Switch", 1);
Peter Ujfalusi0f89bdc2009-05-25 11:12:13 +0300428
Peter Ujfalusidf339802008-12-09 12:35:51 +0200429/* Handsfree Right */
430static const char *twl4030_handsfreer_texts[] =
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900431 {"Voice", "AudioR1", "AudioR2", "AudioL2"};
Peter Ujfalusidf339802008-12-09 12:35:51 +0200432
Takashi Iwai9f04fba2014-02-18 10:28:25 +0100433static SOC_ENUM_SINGLE_DECL(twl4030_handsfreer_enum,
434 TWL4030_REG_HFR_CTL, 0,
435 twl4030_handsfreer_texts);
Peter Ujfalusidf339802008-12-09 12:35:51 +0200436
437static const struct snd_kcontrol_new twl4030_dapm_handsfreer_control =
438SOC_DAPM_ENUM("Route", twl4030_handsfreer_enum);
439
Peter Ujfalusi0f89bdc2009-05-25 11:12:13 +0300440/* Handsfree Right virtual mute */
441static const struct snd_kcontrol_new twl4030_dapm_handsfreermute_control =
Lars-Peter Clausen052901f42013-10-06 13:43:50 +0200442 SOC_DAPM_SINGLE_VIRT("Switch", 1);
Peter Ujfalusi0f89bdc2009-05-25 11:12:13 +0300443
Peter Ujfalusi376f7832009-05-05 08:55:47 +0300444/* Vibra */
445/* Vibra audio path selection */
446static const char *twl4030_vibra_texts[] =
447 {"AudioL1", "AudioR1", "AudioL2", "AudioR2"};
448
Takashi Iwai9f04fba2014-02-18 10:28:25 +0100449static SOC_ENUM_SINGLE_DECL(twl4030_vibra_enum,
450 TWL4030_REG_VIBRA_CTL, 2,
451 twl4030_vibra_texts);
Peter Ujfalusi376f7832009-05-05 08:55:47 +0300452
453static const struct snd_kcontrol_new twl4030_dapm_vibra_control =
454SOC_DAPM_ENUM("Route", twl4030_vibra_enum);
455
456/* Vibra path selection: local vibrator (PWM) or audio driven */
457static const char *twl4030_vibrapath_texts[] =
458 {"Local vibrator", "Audio"};
459
Takashi Iwai9f04fba2014-02-18 10:28:25 +0100460static SOC_ENUM_SINGLE_DECL(twl4030_vibrapath_enum,
461 TWL4030_REG_VIBRA_CTL, 4,
462 twl4030_vibrapath_texts);
Peter Ujfalusi376f7832009-05-05 08:55:47 +0300463
464static const struct snd_kcontrol_new twl4030_dapm_vibrapath_control =
465SOC_DAPM_ENUM("Route", twl4030_vibrapath_enum);
466
Peter Ujfalusi276c6222008-12-31 10:08:38 +0200467/* Left analog microphone selection */
Joonyoung Shim97b80962009-05-11 20:36:08 +0900468static const struct snd_kcontrol_new twl4030_dapm_analoglmic_controls[] = {
Peter Ujfalusi90289352009-08-14 08:44:00 +0300469 SOC_DAPM_SINGLE("Main Mic Capture Switch",
470 TWL4030_REG_ANAMICL, 0, 1, 0),
471 SOC_DAPM_SINGLE("Headset Mic Capture Switch",
472 TWL4030_REG_ANAMICL, 1, 1, 0),
473 SOC_DAPM_SINGLE("AUXL Capture Switch",
474 TWL4030_REG_ANAMICL, 2, 1, 0),
475 SOC_DAPM_SINGLE("Carkit Mic Capture Switch",
476 TWL4030_REG_ANAMICL, 3, 1, 0),
Joonyoung Shim97b80962009-05-11 20:36:08 +0900477};
Peter Ujfalusi276c6222008-12-31 10:08:38 +0200478
479/* Right analog microphone selection */
Joonyoung Shim97b80962009-05-11 20:36:08 +0900480static const struct snd_kcontrol_new twl4030_dapm_analogrmic_controls[] = {
Peter Ujfalusi90289352009-08-14 08:44:00 +0300481 SOC_DAPM_SINGLE("Sub Mic Capture Switch", TWL4030_REG_ANAMICR, 0, 1, 0),
482 SOC_DAPM_SINGLE("AUXR Capture Switch", TWL4030_REG_ANAMICR, 2, 1, 0),
Joonyoung Shim97b80962009-05-11 20:36:08 +0900483};
Peter Ujfalusi276c6222008-12-31 10:08:38 +0200484
485/* TX1 L/R Analog/Digital microphone selection */
486static const char *twl4030_micpathtx1_texts[] =
487 {"Analog", "Digimic0"};
488
Takashi Iwai9f04fba2014-02-18 10:28:25 +0100489static SOC_ENUM_SINGLE_DECL(twl4030_micpathtx1_enum,
490 TWL4030_REG_ADCMICSEL, 0,
491 twl4030_micpathtx1_texts);
Peter Ujfalusi276c6222008-12-31 10:08:38 +0200492
493static const struct snd_kcontrol_new twl4030_dapm_micpathtx1_control =
494SOC_DAPM_ENUM("Route", twl4030_micpathtx1_enum);
495
496/* TX2 L/R Analog/Digital microphone selection */
497static const char *twl4030_micpathtx2_texts[] =
498 {"Analog", "Digimic1"};
499
Takashi Iwai9f04fba2014-02-18 10:28:25 +0100500static SOC_ENUM_SINGLE_DECL(twl4030_micpathtx2_enum,
501 TWL4030_REG_ADCMICSEL, 2,
502 twl4030_micpathtx2_texts);
Peter Ujfalusi276c6222008-12-31 10:08:38 +0200503
504static const struct snd_kcontrol_new twl4030_dapm_micpathtx2_control =
505SOC_DAPM_ENUM("Route", twl4030_micpathtx2_enum);
506
Peter Ujfalusi73939582009-01-29 14:57:50 +0200507/* Analog bypass for AudioR1 */
508static const struct snd_kcontrol_new twl4030_dapm_abypassr1_control =
509 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXR1_APGA_CTL, 2, 1, 0);
510
511/* Analog bypass for AudioL1 */
512static const struct snd_kcontrol_new twl4030_dapm_abypassl1_control =
513 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXL1_APGA_CTL, 2, 1, 0);
514
515/* Analog bypass for AudioR2 */
516static const struct snd_kcontrol_new twl4030_dapm_abypassr2_control =
517 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXR2_APGA_CTL, 2, 1, 0);
518
519/* Analog bypass for AudioL2 */
520static const struct snd_kcontrol_new twl4030_dapm_abypassl2_control =
521 SOC_DAPM_SINGLE("Switch", TWL4030_REG_ARXL2_APGA_CTL, 2, 1, 0);
522
Lopez Cruz, Misaelfcd274a2009-04-30 21:47:22 -0500523/* Analog bypass for Voice */
524static const struct snd_kcontrol_new twl4030_dapm_abypassv_control =
525 SOC_DAPM_SINGLE("Switch", TWL4030_REG_VDL_APGA_CTL, 2, 1, 0);
526
Peter Ujfalusi8b0d3152010-07-12 11:50:06 +0300527/* Digital bypass gain, mute instead of -30dB */
Peter Ujfalusi6bab83f2009-02-18 14:39:05 +0200528static const unsigned int twl4030_dapm_dbypass_tlv[] = {
Peter Ujfalusi8b0d3152010-07-12 11:50:06 +0300529 TLV_DB_RANGE_HEAD(3),
530 0, 1, TLV_DB_SCALE_ITEM(-3000, 600, 1),
531 2, 3, TLV_DB_SCALE_ITEM(-2400, 0, 0),
Peter Ujfalusi6bab83f2009-02-18 14:39:05 +0200532 4, 7, TLV_DB_SCALE_ITEM(-1800, 600, 0),
533};
534
535/* Digital bypass left (TX1L -> RX2L) */
536static const struct snd_kcontrol_new twl4030_dapm_dbypassl_control =
537 SOC_DAPM_SINGLE_TLV("Volume",
538 TWL4030_REG_ATX2ARXPGA, 3, 7, 0,
539 twl4030_dapm_dbypass_tlv);
540
541/* Digital bypass right (TX1R -> RX2R) */
542static const struct snd_kcontrol_new twl4030_dapm_dbypassr_control =
543 SOC_DAPM_SINGLE_TLV("Volume",
544 TWL4030_REG_ATX2ARXPGA, 0, 7, 0,
545 twl4030_dapm_dbypass_tlv);
546
Lopez Cruz, Misaelee8f6892009-04-30 21:48:08 -0500547/*
548 * Voice Sidetone GAIN volume control:
549 * from -51 to -10 dB in 1 dB steps (mute instead of -51 dB)
550 */
551static DECLARE_TLV_DB_SCALE(twl4030_dapm_dbypassv_tlv, -5100, 100, 1);
552
553/* Digital bypass voice: sidetone (VUL -> VDL)*/
554static const struct snd_kcontrol_new twl4030_dapm_dbypassv_control =
555 SOC_DAPM_SINGLE_TLV("Volume",
556 TWL4030_REG_VSTPGA, 0, 0x29, 0,
557 twl4030_dapm_dbypassv_tlv);
558
Peter Ujfalusi9008adf2009-08-13 15:59:34 +0300559/*
560 * Output PGA builder:
561 * Handle the muting and unmuting of the given output (turning off the
562 * amplifier associated with the output pin)
Peter Ujfalusic96907f2010-03-22 17:46:37 +0200563 * On mute bypass the reg_cache and write 0 to the register
564 * On unmute: restore the register content from the reg_cache
Peter Ujfalusi9008adf2009-08-13 15:59:34 +0300565 * Outputs handled in this way: Earpiece, PreDrivL/R, CarkitL/R
566 */
567#define TWL4030_OUTPUT_PGA(pin_name, reg, mask) \
568static int pin_name##pga_event(struct snd_soc_dapm_widget *w, \
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200569 struct snd_kcontrol *kcontrol, int event) \
Peter Ujfalusi9008adf2009-08-13 15:59:34 +0300570{ \
Mark Brownb2c812e2010-04-14 15:35:19 +0900571 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(w->codec); \
Peter Ujfalusi9008adf2009-08-13 15:59:34 +0300572 \
573 switch (event) { \
574 case SND_SOC_DAPM_POST_PMU: \
Peter Ujfalusic96907f2010-03-22 17:46:37 +0200575 twl4030->pin_name##_enabled = 1; \
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +0200576 twl4030_write(w->codec, reg, twl4030_read(w->codec, reg)); \
Peter Ujfalusi9008adf2009-08-13 15:59:34 +0300577 break; \
578 case SND_SOC_DAPM_POST_PMD: \
Peter Ujfalusic96907f2010-03-22 17:46:37 +0200579 twl4030->pin_name##_enabled = 0; \
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200580 twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, 0, reg); \
Peter Ujfalusi9008adf2009-08-13 15:59:34 +0300581 break; \
582 } \
583 return 0; \
584}
585
586TWL4030_OUTPUT_PGA(earpiece, TWL4030_REG_EAR_CTL, TWL4030_EAR_GAIN);
587TWL4030_OUTPUT_PGA(predrivel, TWL4030_REG_PREDL_CTL, TWL4030_PREDL_GAIN);
588TWL4030_OUTPUT_PGA(predriver, TWL4030_REG_PREDR_CTL, TWL4030_PREDR_GAIN);
589TWL4030_OUTPUT_PGA(carkitl, TWL4030_REG_PRECKL_CTL, TWL4030_PRECKL_GAIN);
590TWL4030_OUTPUT_PGA(carkitr, TWL4030_REG_PRECKR_CTL, TWL4030_PRECKR_GAIN);
591
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300592static void handsfree_ramp(struct snd_soc_codec *codec, int reg, int ramp)
Stanley.Miao49d92c72008-12-11 23:28:10 +0800593{
Stanley.Miao49d92c72008-12-11 23:28:10 +0800594 unsigned char hs_ctl;
595
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +0200596 hs_ctl = twl4030_read(codec, reg);
Stanley.Miao49d92c72008-12-11 23:28:10 +0800597
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300598 if (ramp) {
599 /* HF ramp-up */
600 hs_ctl |= TWL4030_HF_CTL_REF_EN;
601 twl4030_write(codec, reg, hs_ctl);
602 udelay(10);
Stanley.Miao49d92c72008-12-11 23:28:10 +0800603 hs_ctl |= TWL4030_HF_CTL_RAMP_EN;
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300604 twl4030_write(codec, reg, hs_ctl);
605 udelay(40);
Stanley.Miao49d92c72008-12-11 23:28:10 +0800606 hs_ctl |= TWL4030_HF_CTL_LOOP_EN;
Stanley.Miao49d92c72008-12-11 23:28:10 +0800607 hs_ctl |= TWL4030_HF_CTL_HB_EN;
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300608 twl4030_write(codec, reg, hs_ctl);
Stanley.Miao49d92c72008-12-11 23:28:10 +0800609 } else {
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300610 /* HF ramp-down */
611 hs_ctl &= ~TWL4030_HF_CTL_LOOP_EN;
612 hs_ctl &= ~TWL4030_HF_CTL_HB_EN;
613 twl4030_write(codec, reg, hs_ctl);
614 hs_ctl &= ~TWL4030_HF_CTL_RAMP_EN;
615 twl4030_write(codec, reg, hs_ctl);
616 udelay(40);
617 hs_ctl &= ~TWL4030_HF_CTL_REF_EN;
618 twl4030_write(codec, reg, hs_ctl);
Stanley.Miao49d92c72008-12-11 23:28:10 +0800619 }
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300620}
Stanley.Miao49d92c72008-12-11 23:28:10 +0800621
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300622static int handsfreelpga_event(struct snd_soc_dapm_widget *w,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200623 struct snd_kcontrol *kcontrol, int event)
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300624{
625 switch (event) {
626 case SND_SOC_DAPM_POST_PMU:
627 handsfree_ramp(w->codec, TWL4030_REG_HFL_CTL, 1);
628 break;
629 case SND_SOC_DAPM_POST_PMD:
630 handsfree_ramp(w->codec, TWL4030_REG_HFL_CTL, 0);
631 break;
632 }
633 return 0;
634}
635
636static int handsfreerpga_event(struct snd_soc_dapm_widget *w,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200637 struct snd_kcontrol *kcontrol, int event)
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +0300638{
639 switch (event) {
640 case SND_SOC_DAPM_POST_PMU:
641 handsfree_ramp(w->codec, TWL4030_REG_HFR_CTL, 1);
642 break;
643 case SND_SOC_DAPM_POST_PMD:
644 handsfree_ramp(w->codec, TWL4030_REG_HFR_CTL, 0);
645 break;
646 }
Stanley.Miao49d92c72008-12-11 23:28:10 +0800647 return 0;
648}
649
Jari Vanhala86139a12009-10-29 11:58:09 +0200650static int vibramux_event(struct snd_soc_dapm_widget *w,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200651 struct snd_kcontrol *kcontrol, int event)
Jari Vanhala86139a12009-10-29 11:58:09 +0200652{
653 twl4030_write(w->codec, TWL4030_REG_VIBRA_SET, 0xff);
654 return 0;
655}
656
Peter Ujfalusi7729cf72009-10-29 11:58:10 +0200657static int apll_event(struct snd_soc_dapm_widget *w,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200658 struct snd_kcontrol *kcontrol, int event)
Peter Ujfalusi7729cf72009-10-29 11:58:10 +0200659{
660 switch (event) {
661 case SND_SOC_DAPM_PRE_PMU:
662 twl4030_apll_enable(w->codec, 1);
663 break;
664 case SND_SOC_DAPM_POST_PMD:
665 twl4030_apll_enable(w->codec, 0);
666 break;
667 }
668 return 0;
669}
670
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +0300671static int aif_event(struct snd_soc_dapm_widget *w,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200672 struct snd_kcontrol *kcontrol, int event)
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +0300673{
674 u8 audio_if;
675
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +0200676 audio_if = twl4030_read(w->codec, TWL4030_REG_AUDIO_IF);
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +0300677 switch (event) {
678 case SND_SOC_DAPM_PRE_PMU:
679 /* Enable AIF */
680 /* enable the PLL before we use it to clock the DAI */
681 twl4030_apll_enable(w->codec, 1);
682
683 twl4030_write(w->codec, TWL4030_REG_AUDIO_IF,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200684 audio_if | TWL4030_AIF_EN);
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +0300685 break;
686 case SND_SOC_DAPM_POST_PMD:
687 /* disable the DAI before we stop it's source PLL */
688 twl4030_write(w->codec, TWL4030_REG_AUDIO_IF,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200689 audio_if & ~TWL4030_AIF_EN);
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +0300690 twl4030_apll_enable(w->codec, 0);
691 break;
692 }
693 return 0;
694}
695
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300696static void headset_ramp(struct snd_soc_codec *codec, int ramp)
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200697{
698 unsigned char hs_gain, hs_pop;
Mark Brownb2c812e2010-04-14 15:35:19 +0900699 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Peter Ujfalusi182f73f2012-09-10 13:46:31 +0300700 struct twl4030_codec_data *pdata = twl4030->pdata;
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300701 /* Base values for ramp delay calculation: 2^19 - 2^26 */
702 unsigned int ramp_base[] = {524288, 1048576, 2097152, 4194304,
703 8388608, 16777216, 33554432, 67108864};
Peter Ujfalusi7e6120c2010-10-25 11:34:23 +0300704 unsigned int delay;
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200705
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +0200706 hs_gain = twl4030_read(codec, TWL4030_REG_HS_GAIN_SET);
707 hs_pop = twl4030_read(codec, TWL4030_REG_HS_POPN_SET);
Peter Ujfalusi7e6120c2010-10-25 11:34:23 +0300708 delay = (ramp_base[(hs_pop & TWL4030_RAMP_DELAY) >> 2] /
709 twl4030->sysclk) + 1;
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200710
Candelaria Villareal, Jorge4e49ffd2009-07-01 19:17:43 -0500711 /* Enable external mute control, this dramatically reduces
712 * the pop-noise */
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000713 if (pdata && pdata->hs_extmute) {
Peter Ujfalusi281ecd12012-09-10 13:46:27 +0300714 if (gpio_is_valid(pdata->hs_extmute_gpio)) {
715 gpio_set_value(pdata->hs_extmute_gpio, 1);
Candelaria Villareal, Jorge4e49ffd2009-07-01 19:17:43 -0500716 } else {
717 hs_pop |= TWL4030_EXTMUTE;
718 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
719 }
720 }
721
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300722 if (ramp) {
723 /* Headset ramp-up according to the TRM */
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200724 hs_pop |= TWL4030_VMID_EN;
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300725 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
Peter Ujfalusic96907f2010-03-22 17:46:37 +0200726 /* Actually write to the register */
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200727 twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, hs_gain,
728 TWL4030_REG_HS_GAIN_SET);
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200729 hs_pop |= TWL4030_RAMP_EN;
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300730 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
Candelaria Villareal, Jorge4e49ffd2009-07-01 19:17:43 -0500731 /* Wait ramp delay time + 1, so the VMID can settle */
Peter Ujfalusi7e6120c2010-10-25 11:34:23 +0300732 twl4030_wait_ms(delay);
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300733 } else {
734 /* Headset ramp-down _not_ according to
735 * the TRM, but in a way that it is working */
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200736 hs_pop &= ~TWL4030_RAMP_EN;
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300737 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
738 /* Wait ramp delay time + 1, so the VMID can settle */
Peter Ujfalusi7e6120c2010-10-25 11:34:23 +0300739 twl4030_wait_ms(delay);
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200740 /* Bypass the reg_cache to mute the headset */
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200741 twl_i2c_write_u8(TWL4030_MODULE_AUDIO_VOICE, hs_gain & (~0x0f),
742 TWL4030_REG_HS_GAIN_SET);
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300743
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200744 hs_pop &= ~TWL4030_VMID_EN;
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300745 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
746 }
Candelaria Villareal, Jorge4e49ffd2009-07-01 19:17:43 -0500747
748 /* Disable external mute */
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +0000749 if (pdata && pdata->hs_extmute) {
Peter Ujfalusi281ecd12012-09-10 13:46:27 +0300750 if (gpio_is_valid(pdata->hs_extmute_gpio)) {
751 gpio_set_value(pdata->hs_extmute_gpio, 0);
Candelaria Villareal, Jorge4e49ffd2009-07-01 19:17:43 -0500752 } else {
753 hs_pop &= ~TWL4030_EXTMUTE;
754 twl4030_write(codec, TWL4030_REG_HS_POPN_SET, hs_pop);
755 }
756 }
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300757}
758
759static int headsetlpga_event(struct snd_soc_dapm_widget *w,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200760 struct snd_kcontrol *kcontrol, int event)
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300761{
Mark Brownb2c812e2010-04-14 15:35:19 +0900762 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(w->codec);
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300763
764 switch (event) {
765 case SND_SOC_DAPM_POST_PMU:
766 /* Do the ramp-up only once */
767 if (!twl4030->hsr_enabled)
768 headset_ramp(w->codec, 1);
769
770 twl4030->hsl_enabled = 1;
771 break;
772 case SND_SOC_DAPM_POST_PMD:
773 /* Do the ramp-down only if both headsetL/R is disabled */
774 if (!twl4030->hsr_enabled)
775 headset_ramp(w->codec, 0);
776
777 twl4030->hsl_enabled = 0;
778 break;
779 }
780 return 0;
781}
782
783static int headsetrpga_event(struct snd_soc_dapm_widget *w,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200784 struct snd_kcontrol *kcontrol, int event)
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300785{
Mark Brownb2c812e2010-04-14 15:35:19 +0900786 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(w->codec);
Peter Ujfalusi6943c922009-05-18 16:02:05 +0300787
788 switch (event) {
789 case SND_SOC_DAPM_POST_PMU:
790 /* Do the ramp-up only once */
791 if (!twl4030->hsl_enabled)
792 headset_ramp(w->codec, 1);
793
794 twl4030->hsr_enabled = 1;
795 break;
796 case SND_SOC_DAPM_POST_PMD:
797 /* Do the ramp-down only if both headsetL/R is disabled */
798 if (!twl4030->hsl_enabled)
799 headset_ramp(w->codec, 0);
800
801 twl4030->hsr_enabled = 0;
Peter Ujfalusiaad749e2009-01-27 11:29:41 +0200802 break;
803 }
804 return 0;
805}
806
Peter Ujfalusi01ea6ba2010-07-20 15:49:09 +0300807static int digimic_event(struct snd_soc_dapm_widget *w,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200808 struct snd_kcontrol *kcontrol, int event)
Peter Ujfalusi01ea6ba2010-07-20 15:49:09 +0300809{
810 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(w->codec);
Peter Ujfalusi182f73f2012-09-10 13:46:31 +0300811 struct twl4030_codec_data *pdata = twl4030->pdata;
Peter Ujfalusi01ea6ba2010-07-20 15:49:09 +0300812
Peter Ujfalusi182f73f2012-09-10 13:46:31 +0300813 if (pdata && pdata->digimic_delay)
814 twl4030_wait_ms(pdata->digimic_delay);
Peter Ujfalusi01ea6ba2010-07-20 15:49:09 +0300815 return 0;
816}
817
Peter Ujfalusic10b82c2008-11-24 13:49:35 +0200818/*
Peter Ujfalusib0bd53a2008-11-24 13:49:38 +0200819 * Some of the gain controls in TWL (mostly those which are associated with
820 * the outputs) are implemented in an interesting way:
821 * 0x0 : Power down (mute)
822 * 0x1 : 6dB
823 * 0x2 : 0 dB
824 * 0x3 : -6 dB
825 * Inverting not going to help with these.
826 * Custom volsw and volsw_2r get/put functions to handle these gain bits.
827 */
Peter Ujfalusib0bd53a2008-11-24 13:49:38 +0200828static int snd_soc_get_volsw_twl4030(struct snd_kcontrol *kcontrol,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200829 struct snd_ctl_elem_value *ucontrol)
Peter Ujfalusib0bd53a2008-11-24 13:49:38 +0200830{
831 struct soc_mixer_control *mc =
832 (struct soc_mixer_control *)kcontrol->private_value;
Lars-Peter Clausenea53bf72014-03-18 09:02:04 +0100833 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
Peter Ujfalusib0bd53a2008-11-24 13:49:38 +0200834 unsigned int reg = mc->reg;
835 unsigned int shift = mc->shift;
836 unsigned int rshift = mc->rshift;
837 int max = mc->max;
838 int mask = (1 << fls(max)) - 1;
839
840 ucontrol->value.integer.value[0] =
841 (snd_soc_read(codec, reg) >> shift) & mask;
842 if (ucontrol->value.integer.value[0])
843 ucontrol->value.integer.value[0] =
844 max + 1 - ucontrol->value.integer.value[0];
845
846 if (shift != rshift) {
847 ucontrol->value.integer.value[1] =
848 (snd_soc_read(codec, reg) >> rshift) & mask;
849 if (ucontrol->value.integer.value[1])
850 ucontrol->value.integer.value[1] =
851 max + 1 - ucontrol->value.integer.value[1];
852 }
853
854 return 0;
855}
856
857static int snd_soc_put_volsw_twl4030(struct snd_kcontrol *kcontrol,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200858 struct snd_ctl_elem_value *ucontrol)
Peter Ujfalusib0bd53a2008-11-24 13:49:38 +0200859{
860 struct soc_mixer_control *mc =
861 (struct soc_mixer_control *)kcontrol->private_value;
Lars-Peter Clausenea53bf72014-03-18 09:02:04 +0100862 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
Peter Ujfalusib0bd53a2008-11-24 13:49:38 +0200863 unsigned int reg = mc->reg;
864 unsigned int shift = mc->shift;
865 unsigned int rshift = mc->rshift;
866 int max = mc->max;
867 int mask = (1 << fls(max)) - 1;
868 unsigned short val, val2, val_mask;
869
870 val = (ucontrol->value.integer.value[0] & mask);
871
872 val_mask = mask << shift;
873 if (val)
874 val = max + 1 - val;
875 val = val << shift;
876 if (shift != rshift) {
877 val2 = (ucontrol->value.integer.value[1] & mask);
878 val_mask |= mask << rshift;
879 if (val2)
880 val2 = max + 1 - val2;
881 val |= val2 << rshift;
882 }
883 return snd_soc_update_bits(codec, reg, val_mask, val);
884}
885
886static int snd_soc_get_volsw_r2_twl4030(struct snd_kcontrol *kcontrol,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200887 struct snd_ctl_elem_value *ucontrol)
Peter Ujfalusib0bd53a2008-11-24 13:49:38 +0200888{
889 struct soc_mixer_control *mc =
890 (struct soc_mixer_control *)kcontrol->private_value;
Lars-Peter Clausenea53bf72014-03-18 09:02:04 +0100891 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
Peter Ujfalusib0bd53a2008-11-24 13:49:38 +0200892 unsigned int reg = mc->reg;
893 unsigned int reg2 = mc->rreg;
894 unsigned int shift = mc->shift;
895 int max = mc->max;
896 int mask = (1<<fls(max))-1;
897
898 ucontrol->value.integer.value[0] =
899 (snd_soc_read(codec, reg) >> shift) & mask;
900 ucontrol->value.integer.value[1] =
901 (snd_soc_read(codec, reg2) >> shift) & mask;
902
903 if (ucontrol->value.integer.value[0])
904 ucontrol->value.integer.value[0] =
905 max + 1 - ucontrol->value.integer.value[0];
906 if (ucontrol->value.integer.value[1])
907 ucontrol->value.integer.value[1] =
908 max + 1 - ucontrol->value.integer.value[1];
909
910 return 0;
911}
912
913static int snd_soc_put_volsw_r2_twl4030(struct snd_kcontrol *kcontrol,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +0200914 struct snd_ctl_elem_value *ucontrol)
Peter Ujfalusib0bd53a2008-11-24 13:49:38 +0200915{
916 struct soc_mixer_control *mc =
917 (struct soc_mixer_control *)kcontrol->private_value;
Lars-Peter Clausenea53bf72014-03-18 09:02:04 +0100918 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
Peter Ujfalusib0bd53a2008-11-24 13:49:38 +0200919 unsigned int reg = mc->reg;
920 unsigned int reg2 = mc->rreg;
921 unsigned int shift = mc->shift;
922 int max = mc->max;
923 int mask = (1 << fls(max)) - 1;
924 int err;
925 unsigned short val, val2, val_mask;
926
927 val_mask = mask << shift;
928 val = (ucontrol->value.integer.value[0] & mask);
929 val2 = (ucontrol->value.integer.value[1] & mask);
930
931 if (val)
932 val = max + 1 - val;
933 if (val2)
934 val2 = max + 1 - val2;
935
936 val = val << shift;
937 val2 = val2 << shift;
938
939 err = snd_soc_update_bits(codec, reg, val_mask, val);
940 if (err < 0)
941 return err;
942
943 err = snd_soc_update_bits(codec, reg2, val_mask, val2);
944 return err;
945}
946
Lopez Cruz, Misaelb74bd402009-05-18 11:52:55 -0500947/* Codec operation modes */
948static const char *twl4030_op_modes_texts[] = {
949 "Option 2 (voice/audio)", "Option 1 (audio)"
950};
951
Takashi Iwai9f04fba2014-02-18 10:28:25 +0100952static SOC_ENUM_SINGLE_DECL(twl4030_op_modes_enum,
953 TWL4030_REG_CODEC_MODE, 0,
954 twl4030_op_modes_texts);
Lopez Cruz, Misaelb74bd402009-05-18 11:52:55 -0500955
Mark Brown423c2382009-06-20 13:54:02 +0100956static int snd_soc_put_twl4030_opmode_enum_double(struct snd_kcontrol *kcontrol,
Lopez Cruz, Misaelb74bd402009-05-18 11:52:55 -0500957 struct snd_ctl_elem_value *ucontrol)
958{
Lars-Peter Clausenea53bf72014-03-18 09:02:04 +0100959 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
Mark Brownb2c812e2010-04-14 15:35:19 +0900960 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Lopez Cruz, Misaelb74bd402009-05-18 11:52:55 -0500961
962 if (twl4030->configured) {
Peter Ujfalusi3b8a0792012-02-21 09:34:20 +0200963 dev_err(codec->dev,
964 "operation mode cannot be changed on-the-fly\n");
Lopez Cruz, Misaelb74bd402009-05-18 11:52:55 -0500965 return -EBUSY;
966 }
967
Takashi Iwai6b207c02014-02-18 08:56:39 +0100968 return snd_soc_put_enum_double(kcontrol, ucontrol);
Lopez Cruz, Misaelb74bd402009-05-18 11:52:55 -0500969}
970
Peter Ujfalusib0bd53a2008-11-24 13:49:38 +0200971/*
Peter Ujfalusic10b82c2008-11-24 13:49:35 +0200972 * FGAIN volume control:
973 * from -62 to 0 dB in 1 dB steps (mute instead of -63 dB)
974 */
Peter Ujfalusid889a722008-12-01 10:03:46 +0200975static DECLARE_TLV_DB_SCALE(digital_fine_tlv, -6300, 100, 1);
Peter Ujfalusic10b82c2008-11-24 13:49:35 +0200976
Peter Ujfalusi0d33ea02008-11-24 13:49:36 +0200977/*
978 * CGAIN volume control:
979 * 0 dB to 12 dB in 6 dB steps
980 * value 2 and 3 means 12 dB
981 */
Peter Ujfalusid889a722008-12-01 10:03:46 +0200982static DECLARE_TLV_DB_SCALE(digital_coarse_tlv, 0, 600, 0);
983
984/*
Joonyoung Shim1a787e72009-04-22 13:13:34 +0900985 * Voice Downlink GAIN volume control:
986 * from -37 to 12 dB in 1 dB steps (mute instead of -37 dB)
987 */
988static DECLARE_TLV_DB_SCALE(digital_voice_downlink_tlv, -3700, 100, 1);
989
990/*
Peter Ujfalusid889a722008-12-01 10:03:46 +0200991 * Analog playback gain
992 * -24 dB to 12 dB in 2 dB steps
993 */
994static DECLARE_TLV_DB_SCALE(analog_tlv, -2400, 200, 0);
Peter Ujfalusi0d33ea02008-11-24 13:49:36 +0200995
Peter Ujfalusi381a22b2008-12-01 10:03:45 +0200996/*
Peter Ujfalusi42902392008-12-01 10:03:47 +0200997 * Gain controls tied to outputs
998 * -6 dB to 6 dB in 6 dB steps (mute instead of -12)
999 */
1000static DECLARE_TLV_DB_SCALE(output_tvl, -1200, 600, 1);
1001
1002/*
Joonyoung Shim18cc8d82009-04-28 18:18:05 +09001003 * Gain control for earpiece amplifier
1004 * 0 dB to 12 dB in 6 dB steps (mute instead of -6)
1005 */
1006static DECLARE_TLV_DB_SCALE(output_ear_tvl, -600, 600, 1);
1007
1008/*
Peter Ujfalusi381a22b2008-12-01 10:03:45 +02001009 * Capture gain after the ADCs
1010 * from 0 dB to 31 dB in 1 dB steps
1011 */
1012static DECLARE_TLV_DB_SCALE(digital_capture_tlv, 0, 100, 0);
1013
Grazvydas Ignotas5920b452008-12-02 20:48:58 +02001014/*
1015 * Gain control for input amplifiers
1016 * 0 dB to 30 dB in 6 dB steps
1017 */
1018static DECLARE_TLV_DB_SCALE(input_gain_tlv, 0, 600, 0);
1019
Lopez Cruz, Misael328d0a12009-06-22 10:51:52 -05001020/* AVADC clock priority */
1021static const char *twl4030_avadc_clk_priority_texts[] = {
1022 "Voice high priority", "HiFi high priority"
1023};
1024
Takashi Iwai9f04fba2014-02-18 10:28:25 +01001025static SOC_ENUM_SINGLE_DECL(twl4030_avadc_clk_priority_enum,
1026 TWL4030_REG_AVADC_CTL, 2,
1027 twl4030_avadc_clk_priority_texts);
Lopez Cruz, Misael328d0a12009-06-22 10:51:52 -05001028
Peter Ujfalusi89492be2009-03-05 12:48:49 +02001029static const char *twl4030_rampdelay_texts[] = {
1030 "27/20/14 ms", "55/40/27 ms", "109/81/55 ms", "218/161/109 ms",
1031 "437/323/218 ms", "874/645/437 ms", "1748/1291/874 ms",
1032 "3495/2581/1748 ms"
1033};
1034
Takashi Iwai9f04fba2014-02-18 10:28:25 +01001035static SOC_ENUM_SINGLE_DECL(twl4030_rampdelay_enum,
1036 TWL4030_REG_HS_POPN_SET, 2,
1037 twl4030_rampdelay_texts);
Peter Ujfalusi89492be2009-03-05 12:48:49 +02001038
Peter Ujfalusi376f7832009-05-05 08:55:47 +03001039/* Vibra H-bridge direction mode */
1040static const char *twl4030_vibradirmode_texts[] = {
1041 "Vibra H-bridge direction", "Audio data MSB",
1042};
1043
Takashi Iwai9f04fba2014-02-18 10:28:25 +01001044static SOC_ENUM_SINGLE_DECL(twl4030_vibradirmode_enum,
1045 TWL4030_REG_VIBRA_CTL, 5,
1046 twl4030_vibradirmode_texts);
Peter Ujfalusi376f7832009-05-05 08:55:47 +03001047
1048/* Vibra H-bridge direction */
1049static const char *twl4030_vibradir_texts[] = {
1050 "Positive polarity", "Negative polarity",
1051};
1052
Takashi Iwai9f04fba2014-02-18 10:28:25 +01001053static SOC_ENUM_SINGLE_DECL(twl4030_vibradir_enum,
1054 TWL4030_REG_VIBRA_CTL, 1,
1055 twl4030_vibradir_texts);
Peter Ujfalusi376f7832009-05-05 08:55:47 +03001056
Peter Ujfalusi36aeff62010-05-12 10:35:36 +03001057/* Digimic Left and right swapping */
1058static const char *twl4030_digimicswap_texts[] = {
1059 "Not swapped", "Swapped",
1060};
1061
Takashi Iwai9f04fba2014-02-18 10:28:25 +01001062static SOC_ENUM_SINGLE_DECL(twl4030_digimicswap_enum,
1063 TWL4030_REG_MISC_SET_1, 0,
1064 twl4030_digimicswap_texts);
Peter Ujfalusi36aeff62010-05-12 10:35:36 +03001065
Steve Sakomancc175572008-10-30 21:35:26 -07001066static const struct snd_kcontrol_new twl4030_snd_controls[] = {
Lopez Cruz, Misaelb74bd402009-05-18 11:52:55 -05001067 /* Codec operation mode control */
1068 SOC_ENUM_EXT("Codec Operation Mode", twl4030_op_modes_enum,
1069 snd_soc_get_enum_double,
1070 snd_soc_put_twl4030_opmode_enum_double),
1071
Peter Ujfalusid889a722008-12-01 10:03:46 +02001072 /* Common playback gain controls */
1073 SOC_DOUBLE_R_TLV("DAC1 Digital Fine Playback Volume",
1074 TWL4030_REG_ARXL1PGA, TWL4030_REG_ARXR1PGA,
1075 0, 0x3f, 0, digital_fine_tlv),
1076 SOC_DOUBLE_R_TLV("DAC2 Digital Fine Playback Volume",
1077 TWL4030_REG_ARXL2PGA, TWL4030_REG_ARXR2PGA,
1078 0, 0x3f, 0, digital_fine_tlv),
1079
1080 SOC_DOUBLE_R_TLV("DAC1 Digital Coarse Playback Volume",
1081 TWL4030_REG_ARXL1PGA, TWL4030_REG_ARXR1PGA,
1082 6, 0x2, 0, digital_coarse_tlv),
1083 SOC_DOUBLE_R_TLV("DAC2 Digital Coarse Playback Volume",
1084 TWL4030_REG_ARXL2PGA, TWL4030_REG_ARXR2PGA,
1085 6, 0x2, 0, digital_coarse_tlv),
1086
1087 SOC_DOUBLE_R_TLV("DAC1 Analog Playback Volume",
1088 TWL4030_REG_ARXL1_APGA_CTL, TWL4030_REG_ARXR1_APGA_CTL,
1089 3, 0x12, 1, analog_tlv),
1090 SOC_DOUBLE_R_TLV("DAC2 Analog Playback Volume",
1091 TWL4030_REG_ARXL2_APGA_CTL, TWL4030_REG_ARXR2_APGA_CTL,
1092 3, 0x12, 1, analog_tlv),
Peter Ujfalusi44c55872008-12-09 08:45:44 +02001093 SOC_DOUBLE_R("DAC1 Analog Playback Switch",
1094 TWL4030_REG_ARXL1_APGA_CTL, TWL4030_REG_ARXR1_APGA_CTL,
1095 1, 1, 0),
1096 SOC_DOUBLE_R("DAC2 Analog Playback Switch",
1097 TWL4030_REG_ARXL2_APGA_CTL, TWL4030_REG_ARXR2_APGA_CTL,
1098 1, 1, 0),
Peter Ujfalusi381a22b2008-12-01 10:03:45 +02001099
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001100 /* Common voice downlink gain controls */
1101 SOC_SINGLE_TLV("DAC Voice Digital Downlink Volume",
1102 TWL4030_REG_VRXPGA, 0, 0x31, 0, digital_voice_downlink_tlv),
1103
1104 SOC_SINGLE_TLV("DAC Voice Analog Downlink Volume",
1105 TWL4030_REG_VDL_APGA_CTL, 3, 0x12, 1, analog_tlv),
1106
1107 SOC_SINGLE("DAC Voice Analog Downlink Switch",
1108 TWL4030_REG_VDL_APGA_CTL, 1, 1, 0),
1109
Peter Ujfalusi42902392008-12-01 10:03:47 +02001110 /* Separate output gain controls */
Peter Ujfalusi0f9887d2011-10-05 10:29:19 +03001111 SOC_DOUBLE_R_EXT_TLV("PreDriv Playback Volume",
Peter Ujfalusi42902392008-12-01 10:03:47 +02001112 TWL4030_REG_PREDL_CTL, TWL4030_REG_PREDR_CTL,
Peter Ujfalusi0f9887d2011-10-05 10:29:19 +03001113 4, 3, 0, snd_soc_get_volsw_r2_twl4030,
1114 snd_soc_put_volsw_r2_twl4030, output_tvl),
Peter Ujfalusi42902392008-12-01 10:03:47 +02001115
Peter Ujfalusi0f9887d2011-10-05 10:29:19 +03001116 SOC_DOUBLE_EXT_TLV("Headset Playback Volume",
1117 TWL4030_REG_HS_GAIN_SET, 0, 2, 3, 0, snd_soc_get_volsw_twl4030,
1118 snd_soc_put_volsw_twl4030, output_tvl),
Peter Ujfalusi42902392008-12-01 10:03:47 +02001119
Peter Ujfalusi0f9887d2011-10-05 10:29:19 +03001120 SOC_DOUBLE_R_EXT_TLV("Carkit Playback Volume",
Peter Ujfalusi42902392008-12-01 10:03:47 +02001121 TWL4030_REG_PRECKL_CTL, TWL4030_REG_PRECKR_CTL,
Peter Ujfalusi0f9887d2011-10-05 10:29:19 +03001122 4, 3, 0, snd_soc_get_volsw_r2_twl4030,
1123 snd_soc_put_volsw_r2_twl4030, output_tvl),
Peter Ujfalusi42902392008-12-01 10:03:47 +02001124
Peter Ujfalusi0f9887d2011-10-05 10:29:19 +03001125 SOC_SINGLE_EXT_TLV("Earpiece Playback Volume",
1126 TWL4030_REG_EAR_CTL, 4, 3, 0, snd_soc_get_volsw_twl4030,
1127 snd_soc_put_volsw_twl4030, output_ear_tvl),
Peter Ujfalusi42902392008-12-01 10:03:47 +02001128
Peter Ujfalusi381a22b2008-12-01 10:03:45 +02001129 /* Common capture gain controls */
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001130 SOC_DOUBLE_R_TLV("TX1 Digital Capture Volume",
Peter Ujfalusi381a22b2008-12-01 10:03:45 +02001131 TWL4030_REG_ATXL1PGA, TWL4030_REG_ATXR1PGA,
1132 0, 0x1f, 0, digital_capture_tlv),
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001133 SOC_DOUBLE_R_TLV("TX2 Digital Capture Volume",
1134 TWL4030_REG_AVTXL2PGA, TWL4030_REG_AVTXR2PGA,
1135 0, 0x1f, 0, digital_capture_tlv),
Grazvydas Ignotas5920b452008-12-02 20:48:58 +02001136
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001137 SOC_DOUBLE_TLV("Analog Capture Volume", TWL4030_REG_ANAMIC_GAIN,
Grazvydas Ignotas5920b452008-12-02 20:48:58 +02001138 0, 3, 5, 0, input_gain_tlv),
Peter Ujfalusi89492be2009-03-05 12:48:49 +02001139
Lopez Cruz, Misael328d0a12009-06-22 10:51:52 -05001140 SOC_ENUM("AVADC Clock Priority", twl4030_avadc_clk_priority_enum),
1141
Peter Ujfalusi89492be2009-03-05 12:48:49 +02001142 SOC_ENUM("HS ramp delay", twl4030_rampdelay_enum),
Peter Ujfalusi376f7832009-05-05 08:55:47 +03001143
1144 SOC_ENUM("Vibra H-bridge mode", twl4030_vibradirmode_enum),
1145 SOC_ENUM("Vibra H-bridge direction", twl4030_vibradir_enum),
Peter Ujfalusi36aeff62010-05-12 10:35:36 +03001146
1147 SOC_ENUM("Digimic LR Swap", twl4030_digimicswap_enum),
Steve Sakomancc175572008-10-30 21:35:26 -07001148};
1149
Steve Sakomancc175572008-10-30 21:35:26 -07001150static const struct snd_soc_dapm_widget twl4030_dapm_widgets[] = {
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001151 /* Left channel inputs */
1152 SND_SOC_DAPM_INPUT("MAINMIC"),
1153 SND_SOC_DAPM_INPUT("HSMIC"),
1154 SND_SOC_DAPM_INPUT("AUXL"),
1155 SND_SOC_DAPM_INPUT("CARKITMIC"),
1156 /* Right channel inputs */
1157 SND_SOC_DAPM_INPUT("SUBMIC"),
1158 SND_SOC_DAPM_INPUT("AUXR"),
1159 /* Digital microphones (Stereo) */
1160 SND_SOC_DAPM_INPUT("DIGIMIC0"),
1161 SND_SOC_DAPM_INPUT("DIGIMIC1"),
Steve Sakomancc175572008-10-30 21:35:26 -07001162
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001163 /* Outputs */
Peter Ujfalusi5e98a462008-12-09 12:35:47 +02001164 SND_SOC_DAPM_OUTPUT("EARPIECE"),
Peter Ujfalusi2a6f5c582008-12-09 12:35:48 +02001165 SND_SOC_DAPM_OUTPUT("PREDRIVEL"),
1166 SND_SOC_DAPM_OUTPUT("PREDRIVER"),
Peter Ujfalusidfad21a2008-12-09 12:35:49 +02001167 SND_SOC_DAPM_OUTPUT("HSOL"),
1168 SND_SOC_DAPM_OUTPUT("HSOR"),
Peter Ujfalusi6a1bee42008-12-10 12:51:46 +02001169 SND_SOC_DAPM_OUTPUT("CARKITL"),
1170 SND_SOC_DAPM_OUTPUT("CARKITR"),
Peter Ujfalusidf339802008-12-09 12:35:51 +02001171 SND_SOC_DAPM_OUTPUT("HFL"),
1172 SND_SOC_DAPM_OUTPUT("HFR"),
Peter Ujfalusi376f7832009-05-05 08:55:47 +03001173 SND_SOC_DAPM_OUTPUT("VIBRA"),
Steve Sakomancc175572008-10-30 21:35:26 -07001174
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +03001175 /* AIF and APLL clocks for running DAIs (including loopback) */
1176 SND_SOC_DAPM_OUTPUT("Virtual HiFi OUT"),
1177 SND_SOC_DAPM_INPUT("Virtual HiFi IN"),
1178 SND_SOC_DAPM_OUTPUT("Virtual Voice OUT"),
1179
Peter Ujfalusi53b50472008-12-09 08:45:43 +02001180 /* DACs */
Peter Ujfalusi7f51e7d2012-09-20 16:32:02 +03001181 SND_SOC_DAPM_DAC("DAC Right1", NULL, SND_SOC_NOPM, 0, 0),
1182 SND_SOC_DAPM_DAC("DAC Left1", NULL, SND_SOC_NOPM, 0, 0),
1183 SND_SOC_DAPM_DAC("DAC Right2", NULL, SND_SOC_NOPM, 0, 0),
1184 SND_SOC_DAPM_DAC("DAC Left2", NULL, SND_SOC_NOPM, 0, 0),
1185 SND_SOC_DAPM_DAC("DAC Voice", NULL, SND_SOC_NOPM, 0, 0),
Steve Sakomancc175572008-10-30 21:35:26 -07001186
Peter Ujfalusi927a7742012-12-31 11:51:42 +01001187 SND_SOC_DAPM_AIF_IN("VAIFIN", "Voice Playback", 0,
1188 TWL4030_REG_VOICE_IF, 6, 0),
1189
Peter Ujfalusi73939582009-01-29 14:57:50 +02001190 /* Analog bypasses */
Peter Ujfalusi78e08e22009-10-28 10:57:04 +02001191 SND_SOC_DAPM_SWITCH("Right1 Analog Loopback", SND_SOC_NOPM, 0, 0,
1192 &twl4030_dapm_abypassr1_control),
1193 SND_SOC_DAPM_SWITCH("Left1 Analog Loopback", SND_SOC_NOPM, 0, 0,
1194 &twl4030_dapm_abypassl1_control),
1195 SND_SOC_DAPM_SWITCH("Right2 Analog Loopback", SND_SOC_NOPM, 0, 0,
1196 &twl4030_dapm_abypassr2_control),
1197 SND_SOC_DAPM_SWITCH("Left2 Analog Loopback", SND_SOC_NOPM, 0, 0,
1198 &twl4030_dapm_abypassl2_control),
1199 SND_SOC_DAPM_SWITCH("Voice Analog Loopback", SND_SOC_NOPM, 0, 0,
1200 &twl4030_dapm_abypassv_control),
1201
1202 /* Master analog loopback switch */
1203 SND_SOC_DAPM_SUPPLY("FM Loop Enable", TWL4030_REG_MISC_SET_1, 5, 0,
1204 NULL, 0),
Peter Ujfalusi73939582009-01-29 14:57:50 +02001205
Peter Ujfalusi6bab83f2009-02-18 14:39:05 +02001206 /* Digital bypasses */
Peter Ujfalusi78e08e22009-10-28 10:57:04 +02001207 SND_SOC_DAPM_SWITCH("Left Digital Loopback", SND_SOC_NOPM, 0, 0,
1208 &twl4030_dapm_dbypassl_control),
1209 SND_SOC_DAPM_SWITCH("Right Digital Loopback", SND_SOC_NOPM, 0, 0,
1210 &twl4030_dapm_dbypassr_control),
1211 SND_SOC_DAPM_SWITCH("Voice Digital Loopback", SND_SOC_NOPM, 0, 0,
1212 &twl4030_dapm_dbypassv_control),
Peter Ujfalusi6bab83f2009-02-18 14:39:05 +02001213
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001214 /* Digital mixers, power control for the physical DACs */
1215 SND_SOC_DAPM_MIXER("Digital R1 Playback Mixer",
1216 TWL4030_REG_AVDAC_CTL, 0, 0, NULL, 0),
1217 SND_SOC_DAPM_MIXER("Digital L1 Playback Mixer",
1218 TWL4030_REG_AVDAC_CTL, 1, 0, NULL, 0),
1219 SND_SOC_DAPM_MIXER("Digital R2 Playback Mixer",
1220 TWL4030_REG_AVDAC_CTL, 2, 0, NULL, 0),
1221 SND_SOC_DAPM_MIXER("Digital L2 Playback Mixer",
1222 TWL4030_REG_AVDAC_CTL, 3, 0, NULL, 0),
1223 SND_SOC_DAPM_MIXER("Digital Voice Playback Mixer",
1224 TWL4030_REG_AVDAC_CTL, 4, 0, NULL, 0),
1225
1226 /* Analog mixers, power control for the physical PGAs */
1227 SND_SOC_DAPM_MIXER("Analog R1 Playback Mixer",
1228 TWL4030_REG_ARXR1_APGA_CTL, 0, 0, NULL, 0),
1229 SND_SOC_DAPM_MIXER("Analog L1 Playback Mixer",
1230 TWL4030_REG_ARXL1_APGA_CTL, 0, 0, NULL, 0),
1231 SND_SOC_DAPM_MIXER("Analog R2 Playback Mixer",
1232 TWL4030_REG_ARXR2_APGA_CTL, 0, 0, NULL, 0),
1233 SND_SOC_DAPM_MIXER("Analog L2 Playback Mixer",
1234 TWL4030_REG_ARXL2_APGA_CTL, 0, 0, NULL, 0),
1235 SND_SOC_DAPM_MIXER("Analog Voice Playback Mixer",
1236 TWL4030_REG_VDL_APGA_CTL, 0, 0, NULL, 0),
Peter Ujfalusi73939582009-01-29 14:57:50 +02001237
Peter Ujfalusi7729cf72009-10-29 11:58:10 +02001238 SND_SOC_DAPM_SUPPLY("APLL Enable", SND_SOC_NOPM, 0, 0, apll_event,
1239 SND_SOC_DAPM_PRE_PMU|SND_SOC_DAPM_POST_PMD),
1240
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +03001241 SND_SOC_DAPM_SUPPLY("AIF Enable", SND_SOC_NOPM, 0, 0, aif_event,
1242 SND_SOC_DAPM_PRE_PMU|SND_SOC_DAPM_POST_PMD),
Peter Ujfalusic42a59e2010-02-09 15:24:04 +02001243
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001244 /* Output MIXER controls */
Peter Ujfalusi5e98a462008-12-09 12:35:47 +02001245 /* Earpiece */
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001246 SND_SOC_DAPM_MIXER("Earpiece Mixer", SND_SOC_NOPM, 0, 0,
1247 &twl4030_dapm_earpiece_controls[0],
1248 ARRAY_SIZE(twl4030_dapm_earpiece_controls)),
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001249 SND_SOC_DAPM_PGA_E("Earpiece PGA", SND_SOC_NOPM,
1250 0, 0, NULL, 0, earpiecepga_event,
1251 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
Peter Ujfalusi2a6f5c582008-12-09 12:35:48 +02001252 /* PreDrivL/R */
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001253 SND_SOC_DAPM_MIXER("PredriveL Mixer", SND_SOC_NOPM, 0, 0,
1254 &twl4030_dapm_predrivel_controls[0],
1255 ARRAY_SIZE(twl4030_dapm_predrivel_controls)),
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001256 SND_SOC_DAPM_PGA_E("PredriveL PGA", SND_SOC_NOPM,
1257 0, 0, NULL, 0, predrivelpga_event,
1258 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001259 SND_SOC_DAPM_MIXER("PredriveR Mixer", SND_SOC_NOPM, 0, 0,
1260 &twl4030_dapm_predriver_controls[0],
1261 ARRAY_SIZE(twl4030_dapm_predriver_controls)),
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001262 SND_SOC_DAPM_PGA_E("PredriveR PGA", SND_SOC_NOPM,
1263 0, 0, NULL, 0, predriverpga_event,
1264 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
Peter Ujfalusidfad21a2008-12-09 12:35:49 +02001265 /* HeadsetL/R */
Peter Ujfalusi6943c922009-05-18 16:02:05 +03001266 SND_SOC_DAPM_MIXER("HeadsetL Mixer", SND_SOC_NOPM, 0, 0,
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001267 &twl4030_dapm_hsol_controls[0],
Peter Ujfalusi6943c922009-05-18 16:02:05 +03001268 ARRAY_SIZE(twl4030_dapm_hsol_controls)),
1269 SND_SOC_DAPM_PGA_E("HeadsetL PGA", SND_SOC_NOPM,
1270 0, 0, NULL, 0, headsetlpga_event,
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001271 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1272 SND_SOC_DAPM_MIXER("HeadsetR Mixer", SND_SOC_NOPM, 0, 0,
1273 &twl4030_dapm_hsor_controls[0],
1274 ARRAY_SIZE(twl4030_dapm_hsor_controls)),
Peter Ujfalusi6943c922009-05-18 16:02:05 +03001275 SND_SOC_DAPM_PGA_E("HeadsetR PGA", SND_SOC_NOPM,
1276 0, 0, NULL, 0, headsetrpga_event,
1277 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
Peter Ujfalusi5152d8c2008-12-09 12:35:50 +02001278 /* CarkitL/R */
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001279 SND_SOC_DAPM_MIXER("CarkitL Mixer", SND_SOC_NOPM, 0, 0,
1280 &twl4030_dapm_carkitl_controls[0],
1281 ARRAY_SIZE(twl4030_dapm_carkitl_controls)),
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001282 SND_SOC_DAPM_PGA_E("CarkitL PGA", SND_SOC_NOPM,
1283 0, 0, NULL, 0, carkitlpga_event,
1284 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001285 SND_SOC_DAPM_MIXER("CarkitR Mixer", SND_SOC_NOPM, 0, 0,
1286 &twl4030_dapm_carkitr_controls[0],
1287 ARRAY_SIZE(twl4030_dapm_carkitr_controls)),
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001288 SND_SOC_DAPM_PGA_E("CarkitR PGA", SND_SOC_NOPM,
1289 0, 0, NULL, 0, carkitrpga_event,
1290 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001291
1292 /* Output MUX controls */
Peter Ujfalusidf339802008-12-09 12:35:51 +02001293 /* HandsfreeL/R */
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +03001294 SND_SOC_DAPM_MUX("HandsfreeL Mux", SND_SOC_NOPM, 0, 0,
1295 &twl4030_dapm_handsfreel_control),
Lopez Cruz, Misaele3c7dbb2009-06-25 12:36:14 -05001296 SND_SOC_DAPM_SWITCH("HandsfreeL", SND_SOC_NOPM, 0, 0,
Peter Ujfalusi0f89bdc2009-05-25 11:12:13 +03001297 &twl4030_dapm_handsfreelmute_control),
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +03001298 SND_SOC_DAPM_PGA_E("HandsfreeL PGA", SND_SOC_NOPM,
1299 0, 0, NULL, 0, handsfreelpga_event,
1300 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
1301 SND_SOC_DAPM_MUX("HandsfreeR Mux", SND_SOC_NOPM, 5, 0,
1302 &twl4030_dapm_handsfreer_control),
Lopez Cruz, Misaele3c7dbb2009-06-25 12:36:14 -05001303 SND_SOC_DAPM_SWITCH("HandsfreeR", SND_SOC_NOPM, 0, 0,
Peter Ujfalusi0f89bdc2009-05-25 11:12:13 +03001304 &twl4030_dapm_handsfreermute_control),
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +03001305 SND_SOC_DAPM_PGA_E("HandsfreeR PGA", SND_SOC_NOPM,
1306 0, 0, NULL, 0, handsfreerpga_event,
1307 SND_SOC_DAPM_POST_PMU|SND_SOC_DAPM_POST_PMD),
Peter Ujfalusi376f7832009-05-05 08:55:47 +03001308 /* Vibra */
Jari Vanhala86139a12009-10-29 11:58:09 +02001309 SND_SOC_DAPM_MUX_E("Vibra Mux", TWL4030_REG_VIBRA_CTL, 0, 0,
1310 &twl4030_dapm_vibra_control, vibramux_event,
1311 SND_SOC_DAPM_PRE_PMU),
Peter Ujfalusi376f7832009-05-05 08:55:47 +03001312 SND_SOC_DAPM_MUX("Vibra Route", SND_SOC_NOPM, 0, 0,
1313 &twl4030_dapm_vibrapath_control),
Peter Ujfalusi5e98a462008-12-09 12:35:47 +02001314
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001315 /* Introducing four virtual ADC, since TWL4030 have four channel for
1316 capture */
Peter Ujfalusi7f51e7d2012-09-20 16:32:02 +03001317 SND_SOC_DAPM_ADC("ADC Virtual Left1", NULL, SND_SOC_NOPM, 0, 0),
1318 SND_SOC_DAPM_ADC("ADC Virtual Right1", NULL, SND_SOC_NOPM, 0, 0),
1319 SND_SOC_DAPM_ADC("ADC Virtual Left2", NULL, SND_SOC_NOPM, 0, 0),
1320 SND_SOC_DAPM_ADC("ADC Virtual Right2", NULL, SND_SOC_NOPM, 0, 0),
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001321
Peter Ujfalusi927a7742012-12-31 11:51:42 +01001322 SND_SOC_DAPM_AIF_OUT("VAIFOUT", "Voice Capture", 0,
1323 TWL4030_REG_VOICE_IF, 5, 0),
1324
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001325 /* Analog/Digital mic path selection.
1326 TX1 Left/Right: either analog Left/Right or Digimic0
1327 TX2 Left/Right: either analog Left/Right or Digimic1 */
Peter Ujfalusibda7d2a2010-08-03 12:01:01 +03001328 SND_SOC_DAPM_MUX("TX1 Capture Route", SND_SOC_NOPM, 0, 0,
1329 &twl4030_dapm_micpathtx1_control),
1330 SND_SOC_DAPM_MUX("TX2 Capture Route", SND_SOC_NOPM, 0, 0,
1331 &twl4030_dapm_micpathtx2_control),
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001332
Joonyoung Shim97b80962009-05-11 20:36:08 +09001333 /* Analog input mixers for the capture amplifiers */
Peter Ujfalusi90289352009-08-14 08:44:00 +03001334 SND_SOC_DAPM_MIXER("Analog Left",
Joonyoung Shim97b80962009-05-11 20:36:08 +09001335 TWL4030_REG_ANAMICL, 4, 0,
1336 &twl4030_dapm_analoglmic_controls[0],
1337 ARRAY_SIZE(twl4030_dapm_analoglmic_controls)),
Peter Ujfalusi90289352009-08-14 08:44:00 +03001338 SND_SOC_DAPM_MIXER("Analog Right",
Joonyoung Shim97b80962009-05-11 20:36:08 +09001339 TWL4030_REG_ANAMICR, 4, 0,
1340 &twl4030_dapm_analogrmic_controls[0],
1341 ARRAY_SIZE(twl4030_dapm_analogrmic_controls)),
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001342
Peter Ujfalusifb2a2f82009-01-27 11:29:42 +02001343 SND_SOC_DAPM_PGA("ADC Physical Left",
1344 TWL4030_REG_AVADC_CTL, 3, 0, NULL, 0),
1345 SND_SOC_DAPM_PGA("ADC Physical Right",
1346 TWL4030_REG_AVADC_CTL, 1, 0, NULL, 0),
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001347
Peter Ujfalusi01ea6ba2010-07-20 15:49:09 +03001348 SND_SOC_DAPM_PGA_E("Digimic0 Enable",
1349 TWL4030_REG_ADCMICSEL, 1, 0, NULL, 0,
1350 digimic_event, SND_SOC_DAPM_POST_PMU),
1351 SND_SOC_DAPM_PGA_E("Digimic1 Enable",
1352 TWL4030_REG_ADCMICSEL, 3, 0, NULL, 0,
1353 digimic_event, SND_SOC_DAPM_POST_PMU),
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001354
Peter Ujfalusibda7d2a2010-08-03 12:01:01 +03001355 SND_SOC_DAPM_SUPPLY("micbias1 select", TWL4030_REG_MICBIAS_CTL, 5, 0,
1356 NULL, 0),
1357 SND_SOC_DAPM_SUPPLY("micbias2 select", TWL4030_REG_MICBIAS_CTL, 6, 0,
1358 NULL, 0),
1359
Peter Ujfalusie04d6e52012-12-31 11:51:45 +01001360 /* Microphone bias */
1361 SND_SOC_DAPM_SUPPLY("Mic Bias 1",
1362 TWL4030_REG_MICBIAS_CTL, 0, 0, NULL, 0),
1363 SND_SOC_DAPM_SUPPLY("Mic Bias 2",
1364 TWL4030_REG_MICBIAS_CTL, 1, 0, NULL, 0),
1365 SND_SOC_DAPM_SUPPLY("Headset Mic Bias",
1366 TWL4030_REG_MICBIAS_CTL, 2, 0, NULL, 0),
Peter Ujfalusi73939582009-01-29 14:57:50 +02001367
Peter Ujfalusi927a7742012-12-31 11:51:42 +01001368 SND_SOC_DAPM_SUPPLY("VIF Enable", TWL4030_REG_VOICE_IF, 0, 0, NULL, 0),
Steve Sakomancc175572008-10-30 21:35:26 -07001369};
1370
1371static const struct snd_soc_dapm_route intercon[] = {
Peter Ujfalusi7f51e7d2012-09-20 16:32:02 +03001372 /* Stream -> DAC mapping */
1373 {"DAC Right1", NULL, "HiFi Playback"},
1374 {"DAC Left1", NULL, "HiFi Playback"},
1375 {"DAC Right2", NULL, "HiFi Playback"},
1376 {"DAC Left2", NULL, "HiFi Playback"},
Peter Ujfalusi927a7742012-12-31 11:51:42 +01001377 {"DAC Voice", NULL, "VAIFIN"},
Peter Ujfalusi7f51e7d2012-09-20 16:32:02 +03001378
1379 /* ADC -> Stream mapping */
1380 {"HiFi Capture", NULL, "ADC Virtual Left1"},
1381 {"HiFi Capture", NULL, "ADC Virtual Right1"},
1382 {"HiFi Capture", NULL, "ADC Virtual Left2"},
1383 {"HiFi Capture", NULL, "ADC Virtual Right2"},
Peter Ujfalusi927a7742012-12-31 11:51:42 +01001384 {"VAIFOUT", NULL, "ADC Virtual Left2"},
1385 {"VAIFOUT", NULL, "ADC Virtual Right2"},
1386 {"VAIFOUT", NULL, "VIF Enable"},
Peter Ujfalusi7f51e7d2012-09-20 16:32:02 +03001387
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001388 {"Digital L1 Playback Mixer", NULL, "DAC Left1"},
1389 {"Digital R1 Playback Mixer", NULL, "DAC Right1"},
1390 {"Digital L2 Playback Mixer", NULL, "DAC Left2"},
1391 {"Digital R2 Playback Mixer", NULL, "DAC Right2"},
1392 {"Digital Voice Playback Mixer", NULL, "DAC Voice"},
Peter Ujfalusi73939582009-01-29 14:57:50 +02001393
Peter Ujfalusi7729cf72009-10-29 11:58:10 +02001394 /* Supply for the digital part (APLL) */
Peter Ujfalusi7729cf72009-10-29 11:58:10 +02001395 {"Digital Voice Playback Mixer", NULL, "APLL Enable"},
1396
Peter Ujfalusi27eeb1f2010-07-13 12:07:44 +03001397 {"DAC Left1", NULL, "AIF Enable"},
1398 {"DAC Right1", NULL, "AIF Enable"},
1399 {"DAC Left2", NULL, "AIF Enable"},
1400 {"DAC Right1", NULL, "AIF Enable"},
Peter Ujfalusi927a7742012-12-31 11:51:42 +01001401 {"DAC Voice", NULL, "VIF Enable"},
Peter Ujfalusi27eeb1f2010-07-13 12:07:44 +03001402
Peter Ujfalusic42a59e2010-02-09 15:24:04 +02001403 {"Digital R2 Playback Mixer", NULL, "AIF Enable"},
1404 {"Digital L2 Playback Mixer", NULL, "AIF Enable"},
1405
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001406 {"Analog L1 Playback Mixer", NULL, "Digital L1 Playback Mixer"},
1407 {"Analog R1 Playback Mixer", NULL, "Digital R1 Playback Mixer"},
1408 {"Analog L2 Playback Mixer", NULL, "Digital L2 Playback Mixer"},
1409 {"Analog R2 Playback Mixer", NULL, "Digital R2 Playback Mixer"},
1410 {"Analog Voice Playback Mixer", NULL, "Digital Voice Playback Mixer"},
Joonyoung Shim1a787e72009-04-22 13:13:34 +09001411
Peter Ujfalusi5e98a462008-12-09 12:35:47 +02001412 /* Internal playback routings */
1413 /* Earpiece */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001414 {"Earpiece Mixer", "Voice", "Analog Voice Playback Mixer"},
1415 {"Earpiece Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1416 {"Earpiece Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1417 {"Earpiece Mixer", "AudioR1", "Analog R1 Playback Mixer"},
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001418 {"Earpiece PGA", NULL, "Earpiece Mixer"},
Peter Ujfalusi2a6f5c582008-12-09 12:35:48 +02001419 /* PreDrivL */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001420 {"PredriveL Mixer", "Voice", "Analog Voice Playback Mixer"},
1421 {"PredriveL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1422 {"PredriveL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
1423 {"PredriveL Mixer", "AudioR2", "Analog R2 Playback Mixer"},
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001424 {"PredriveL PGA", NULL, "PredriveL Mixer"},
Peter Ujfalusi2a6f5c582008-12-09 12:35:48 +02001425 /* PreDrivR */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001426 {"PredriveR Mixer", "Voice", "Analog Voice Playback Mixer"},
1427 {"PredriveR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
1428 {"PredriveR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
1429 {"PredriveR Mixer", "AudioL2", "Analog L2 Playback Mixer"},
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001430 {"PredriveR PGA", NULL, "PredriveR Mixer"},
Peter Ujfalusidfad21a2008-12-09 12:35:49 +02001431 /* HeadsetL */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001432 {"HeadsetL Mixer", "Voice", "Analog Voice Playback Mixer"},
1433 {"HeadsetL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1434 {"HeadsetL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
Peter Ujfalusi6943c922009-05-18 16:02:05 +03001435 {"HeadsetL PGA", NULL, "HeadsetL Mixer"},
Peter Ujfalusidfad21a2008-12-09 12:35:49 +02001436 /* HeadsetR */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001437 {"HeadsetR Mixer", "Voice", "Analog Voice Playback Mixer"},
1438 {"HeadsetR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
1439 {"HeadsetR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
Peter Ujfalusi6943c922009-05-18 16:02:05 +03001440 {"HeadsetR PGA", NULL, "HeadsetR Mixer"},
Peter Ujfalusi5152d8c2008-12-09 12:35:50 +02001441 /* CarkitL */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001442 {"CarkitL Mixer", "Voice", "Analog Voice Playback Mixer"},
1443 {"CarkitL Mixer", "AudioL1", "Analog L1 Playback Mixer"},
1444 {"CarkitL Mixer", "AudioL2", "Analog L2 Playback Mixer"},
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001445 {"CarkitL PGA", NULL, "CarkitL Mixer"},
Peter Ujfalusi5152d8c2008-12-09 12:35:50 +02001446 /* CarkitR */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001447 {"CarkitR Mixer", "Voice", "Analog Voice Playback Mixer"},
1448 {"CarkitR Mixer", "AudioR1", "Analog R1 Playback Mixer"},
1449 {"CarkitR Mixer", "AudioR2", "Analog R2 Playback Mixer"},
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001450 {"CarkitR PGA", NULL, "CarkitR Mixer"},
Peter Ujfalusidf339802008-12-09 12:35:51 +02001451 /* HandsfreeL */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001452 {"HandsfreeL Mux", "Voice", "Analog Voice Playback Mixer"},
1453 {"HandsfreeL Mux", "AudioL1", "Analog L1 Playback Mixer"},
1454 {"HandsfreeL Mux", "AudioL2", "Analog L2 Playback Mixer"},
1455 {"HandsfreeL Mux", "AudioR2", "Analog R2 Playback Mixer"},
Lopez Cruz, Misaele3c7dbb2009-06-25 12:36:14 -05001456 {"HandsfreeL", "Switch", "HandsfreeL Mux"},
1457 {"HandsfreeL PGA", NULL, "HandsfreeL"},
Peter Ujfalusidf339802008-12-09 12:35:51 +02001458 /* HandsfreeR */
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001459 {"HandsfreeR Mux", "Voice", "Analog Voice Playback Mixer"},
1460 {"HandsfreeR Mux", "AudioR1", "Analog R1 Playback Mixer"},
1461 {"HandsfreeR Mux", "AudioR2", "Analog R2 Playback Mixer"},
1462 {"HandsfreeR Mux", "AudioL2", "Analog L2 Playback Mixer"},
Lopez Cruz, Misaele3c7dbb2009-06-25 12:36:14 -05001463 {"HandsfreeR", "Switch", "HandsfreeR Mux"},
1464 {"HandsfreeR PGA", NULL, "HandsfreeR"},
Peter Ujfalusi376f7832009-05-05 08:55:47 +03001465 /* Vibra */
1466 {"Vibra Mux", "AudioL1", "DAC Left1"},
1467 {"Vibra Mux", "AudioR1", "DAC Right1"},
1468 {"Vibra Mux", "AudioL2", "DAC Left2"},
1469 {"Vibra Mux", "AudioR2", "DAC Right2"},
Peter Ujfalusi5e98a462008-12-09 12:35:47 +02001470
Steve Sakomancc175572008-10-30 21:35:26 -07001471 /* outputs */
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +03001472 /* Must be always connected (for AIF and APLL) */
Peter Ujfalusi27eeb1f2010-07-13 12:07:44 +03001473 {"Virtual HiFi OUT", NULL, "DAC Left1"},
1474 {"Virtual HiFi OUT", NULL, "DAC Right1"},
1475 {"Virtual HiFi OUT", NULL, "DAC Left2"},
1476 {"Virtual HiFi OUT", NULL, "DAC Right2"},
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +03001477 /* Must be always connected (for APLL) */
1478 {"Virtual Voice OUT", NULL, "Digital Voice Playback Mixer"},
1479 /* Physical outputs */
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001480 {"EARPIECE", NULL, "Earpiece PGA"},
1481 {"PREDRIVEL", NULL, "PredriveL PGA"},
1482 {"PREDRIVER", NULL, "PredriveR PGA"},
Peter Ujfalusi6943c922009-05-18 16:02:05 +03001483 {"HSOL", NULL, "HeadsetL PGA"},
1484 {"HSOR", NULL, "HeadsetR PGA"},
Peter Ujfalusi9008adf2009-08-13 15:59:34 +03001485 {"CARKITL", NULL, "CarkitL PGA"},
1486 {"CARKITR", NULL, "CarkitR PGA"},
Peter Ujfalusi5a2e9a42009-05-25 11:12:11 +03001487 {"HFL", NULL, "HandsfreeL PGA"},
1488 {"HFR", NULL, "HandsfreeR PGA"},
Peter Ujfalusi376f7832009-05-05 08:55:47 +03001489 {"Vibra Route", "Audio", "Vibra Mux"},
1490 {"VIBRA", NULL, "Vibra Route"},
Steve Sakomancc175572008-10-30 21:35:26 -07001491
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001492 /* Capture path */
Peter Ujfalusi7b4c7342010-04-29 10:58:08 +03001493 /* Must be always connected (for AIF and APLL) */
1494 {"ADC Virtual Left1", NULL, "Virtual HiFi IN"},
1495 {"ADC Virtual Right1", NULL, "Virtual HiFi IN"},
1496 {"ADC Virtual Left2", NULL, "Virtual HiFi IN"},
1497 {"ADC Virtual Right2", NULL, "Virtual HiFi IN"},
1498 /* Physical inputs */
Peter Ujfalusi90289352009-08-14 08:44:00 +03001499 {"Analog Left", "Main Mic Capture Switch", "MAINMIC"},
1500 {"Analog Left", "Headset Mic Capture Switch", "HSMIC"},
1501 {"Analog Left", "AUXL Capture Switch", "AUXL"},
1502 {"Analog Left", "Carkit Mic Capture Switch", "CARKITMIC"},
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001503
Peter Ujfalusi90289352009-08-14 08:44:00 +03001504 {"Analog Right", "Sub Mic Capture Switch", "SUBMIC"},
1505 {"Analog Right", "AUXR Capture Switch", "AUXR"},
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001506
Peter Ujfalusi90289352009-08-14 08:44:00 +03001507 {"ADC Physical Left", NULL, "Analog Left"},
1508 {"ADC Physical Right", NULL, "Analog Right"},
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001509
1510 {"Digimic0 Enable", NULL, "DIGIMIC0"},
1511 {"Digimic1 Enable", NULL, "DIGIMIC1"},
1512
Peter Ujfalusibda7d2a2010-08-03 12:01:01 +03001513 {"DIGIMIC0", NULL, "micbias1 select"},
1514 {"DIGIMIC1", NULL, "micbias2 select"},
1515
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001516 /* TX1 Left capture path */
Peter Ujfalusifb2a2f82009-01-27 11:29:42 +02001517 {"TX1 Capture Route", "Analog", "ADC Physical Left"},
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001518 {"TX1 Capture Route", "Digimic0", "Digimic0 Enable"},
1519 /* TX1 Right capture path */
Peter Ujfalusifb2a2f82009-01-27 11:29:42 +02001520 {"TX1 Capture Route", "Analog", "ADC Physical Right"},
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001521 {"TX1 Capture Route", "Digimic0", "Digimic0 Enable"},
1522 /* TX2 Left capture path */
Peter Ujfalusifb2a2f82009-01-27 11:29:42 +02001523 {"TX2 Capture Route", "Analog", "ADC Physical Left"},
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001524 {"TX2 Capture Route", "Digimic1", "Digimic1 Enable"},
1525 /* TX2 Right capture path */
Peter Ujfalusifb2a2f82009-01-27 11:29:42 +02001526 {"TX2 Capture Route", "Analog", "ADC Physical Right"},
Peter Ujfalusi276c6222008-12-31 10:08:38 +02001527 {"TX2 Capture Route", "Digimic1", "Digimic1 Enable"},
1528
1529 {"ADC Virtual Left1", NULL, "TX1 Capture Route"},
1530 {"ADC Virtual Right1", NULL, "TX1 Capture Route"},
1531 {"ADC Virtual Left2", NULL, "TX2 Capture Route"},
1532 {"ADC Virtual Right2", NULL, "TX2 Capture Route"},
1533
Peter Ujfalusic42a59e2010-02-09 15:24:04 +02001534 {"ADC Virtual Left1", NULL, "AIF Enable"},
1535 {"ADC Virtual Right1", NULL, "AIF Enable"},
1536 {"ADC Virtual Left2", NULL, "AIF Enable"},
1537 {"ADC Virtual Right2", NULL, "AIF Enable"},
1538
Peter Ujfalusi73939582009-01-29 14:57:50 +02001539 /* Analog bypass routes */
Peter Ujfalusi90289352009-08-14 08:44:00 +03001540 {"Right1 Analog Loopback", "Switch", "Analog Right"},
1541 {"Left1 Analog Loopback", "Switch", "Analog Left"},
1542 {"Right2 Analog Loopback", "Switch", "Analog Right"},
1543 {"Left2 Analog Loopback", "Switch", "Analog Left"},
1544 {"Voice Analog Loopback", "Switch", "Analog Left"},
Peter Ujfalusi73939582009-01-29 14:57:50 +02001545
Peter Ujfalusi78e08e22009-10-28 10:57:04 +02001546 /* Supply for the Analog loopbacks */
1547 {"Right1 Analog Loopback", NULL, "FM Loop Enable"},
1548 {"Left1 Analog Loopback", NULL, "FM Loop Enable"},
1549 {"Right2 Analog Loopback", NULL, "FM Loop Enable"},
1550 {"Left2 Analog Loopback", NULL, "FM Loop Enable"},
1551 {"Voice Analog Loopback", NULL, "FM Loop Enable"},
1552
Peter Ujfalusi73939582009-01-29 14:57:50 +02001553 {"Analog R1 Playback Mixer", NULL, "Right1 Analog Loopback"},
1554 {"Analog L1 Playback Mixer", NULL, "Left1 Analog Loopback"},
1555 {"Analog R2 Playback Mixer", NULL, "Right2 Analog Loopback"},
1556 {"Analog L2 Playback Mixer", NULL, "Left2 Analog Loopback"},
Lopez Cruz, Misaelfcd274a2009-04-30 21:47:22 -05001557 {"Analog Voice Playback Mixer", NULL, "Voice Analog Loopback"},
Peter Ujfalusi73939582009-01-29 14:57:50 +02001558
Peter Ujfalusi6bab83f2009-02-18 14:39:05 +02001559 /* Digital bypass routes */
1560 {"Right Digital Loopback", "Volume", "TX1 Capture Route"},
1561 {"Left Digital Loopback", "Volume", "TX1 Capture Route"},
Lopez Cruz, Misaelee8f6892009-04-30 21:48:08 -05001562 {"Voice Digital Loopback", "Volume", "TX2 Capture Route"},
Peter Ujfalusi6bab83f2009-02-18 14:39:05 +02001563
Peter Ujfalusi4005d392009-05-18 16:02:04 +03001564 {"Digital R2 Playback Mixer", NULL, "Right Digital Loopback"},
1565 {"Digital L2 Playback Mixer", NULL, "Left Digital Loopback"},
1566 {"Digital Voice Playback Mixer", NULL, "Voice Digital Loopback"},
Peter Ujfalusi6bab83f2009-02-18 14:39:05 +02001567
Steve Sakomancc175572008-10-30 21:35:26 -07001568};
1569
Steve Sakomancc175572008-10-30 21:35:26 -07001570static int twl4030_set_bias_level(struct snd_soc_codec *codec,
1571 enum snd_soc_bias_level level)
1572{
1573 switch (level) {
1574 case SND_SOC_BIAS_ON:
Steve Sakomancc175572008-10-30 21:35:26 -07001575 break;
1576 case SND_SOC_BIAS_PREPARE:
Steve Sakomancc175572008-10-30 21:35:26 -07001577 break;
1578 case SND_SOC_BIAS_STANDBY:
Liam Girdwoodce6120c2010-11-05 15:53:46 +02001579 if (codec->dapm.bias_level == SND_SOC_BIAS_OFF)
Peter Ujfalusiee4ccac72010-05-26 11:38:17 +03001580 twl4030_codec_enable(codec, 1);
Steve Sakomancc175572008-10-30 21:35:26 -07001581 break;
1582 case SND_SOC_BIAS_OFF:
Peter Ujfalusicbd2db12010-05-26 11:38:15 +03001583 twl4030_codec_enable(codec, 0);
Steve Sakomancc175572008-10-30 21:35:26 -07001584 break;
1585 }
Liam Girdwoodce6120c2010-11-05 15:53:46 +02001586 codec->dapm.bias_level = level;
Steve Sakomancc175572008-10-30 21:35:26 -07001587
1588 return 0;
1589}
1590
Peter Ujfalusi6b87a912009-04-17 15:55:08 +03001591static void twl4030_constraints(struct twl4030_priv *twl4030,
1592 struct snd_pcm_substream *mst_substream)
1593{
1594 struct snd_pcm_substream *slv_substream;
1595
1596 /* Pick the stream, which need to be constrained */
1597 if (mst_substream == twl4030->master_substream)
1598 slv_substream = twl4030->slave_substream;
1599 else if (mst_substream == twl4030->slave_substream)
1600 slv_substream = twl4030->master_substream;
1601 else /* This should not happen.. */
1602 return;
1603
1604 /* Set the constraints according to the already configured stream */
1605 snd_pcm_hw_constraint_minmax(slv_substream->runtime,
1606 SNDRV_PCM_HW_PARAM_RATE,
1607 twl4030->rate,
1608 twl4030->rate);
1609
1610 snd_pcm_hw_constraint_minmax(slv_substream->runtime,
1611 SNDRV_PCM_HW_PARAM_SAMPLE_BITS,
1612 twl4030->sample_bits,
1613 twl4030->sample_bits);
1614
1615 snd_pcm_hw_constraint_minmax(slv_substream->runtime,
1616 SNDRV_PCM_HW_PARAM_CHANNELS,
1617 twl4030->channels,
1618 twl4030->channels);
1619}
1620
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001621/* In case of 4 channel mode, the RX1 L/R for playback and the TX2 L/R for
1622 * capture has to be enabled/disabled. */
1623static void twl4030_tdm_enable(struct snd_soc_codec *codec, int direction,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +02001624 int enable)
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001625{
1626 u8 reg, mask;
1627
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +02001628 reg = twl4030_read(codec, TWL4030_REG_OPTION);
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001629
1630 if (direction == SNDRV_PCM_STREAM_PLAYBACK)
1631 mask = TWL4030_ARXL1_VRX_EN | TWL4030_ARXR1_EN;
1632 else
1633 mask = TWL4030_ATXL2_VTXL_EN | TWL4030_ATXR2_VTXR_EN;
1634
1635 if (enable)
1636 reg |= mask;
1637 else
1638 reg &= ~mask;
1639
1640 twl4030_write(codec, TWL4030_REG_OPTION, reg);
1641}
1642
Peter Ujfalusid6648da2009-04-07 09:14:00 +03001643static int twl4030_startup(struct snd_pcm_substream *substream,
1644 struct snd_soc_dai *dai)
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001645{
Mark Browne6968a12012-04-04 15:58:16 +01001646 struct snd_soc_codec *codec = dai->codec;
Mark Brownb2c812e2010-04-14 15:35:19 +09001647 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001648
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001649 if (twl4030->master_substream) {
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001650 twl4030->slave_substream = substream;
Peter Ujfalusi6b87a912009-04-17 15:55:08 +03001651 /* The DAI has one configuration for playback and capture, so
1652 * if the DAI has been already configured then constrain this
1653 * substream to match it. */
1654 if (twl4030->configured)
1655 twl4030_constraints(twl4030, twl4030->master_substream);
1656 } else {
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +02001657 if (!(twl4030_read(codec, TWL4030_REG_CODEC_MODE) &
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001658 TWL4030_OPTION_1)) {
1659 /* In option2 4 channel is not supported, set the
1660 * constraint for the first stream for channels, the
1661 * second stream will 'inherit' this cosntraint */
1662 snd_pcm_hw_constraint_minmax(substream->runtime,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +02001663 SNDRV_PCM_HW_PARAM_CHANNELS,
1664 2, 2);
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001665 }
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001666 twl4030->master_substream = substream;
Peter Ujfalusi6b87a912009-04-17 15:55:08 +03001667 }
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001668
1669 return 0;
1670}
1671
Peter Ujfalusid6648da2009-04-07 09:14:00 +03001672static void twl4030_shutdown(struct snd_pcm_substream *substream,
1673 struct snd_soc_dai *dai)
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001674{
Mark Browne6968a12012-04-04 15:58:16 +01001675 struct snd_soc_codec *codec = dai->codec;
Mark Brownb2c812e2010-04-14 15:35:19 +09001676 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001677
1678 if (twl4030->master_substream == substream)
1679 twl4030->master_substream = twl4030->slave_substream;
1680
1681 twl4030->slave_substream = NULL;
Peter Ujfalusi6b87a912009-04-17 15:55:08 +03001682
1683 /* If all streams are closed, or the remaining stream has not yet
1684 * been configured than set the DAI as not configured. */
1685 if (!twl4030->master_substream)
1686 twl4030->configured = 0;
1687 else if (!twl4030->master_substream->runtime->channels)
1688 twl4030->configured = 0;
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001689
1690 /* If the closing substream had 4 channel, do the necessary cleanup */
1691 if (substream->runtime->channels == 4)
1692 twl4030_tdm_enable(codec, substream->stream, 0);
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001693}
1694
Steve Sakomancc175572008-10-30 21:35:26 -07001695static int twl4030_hw_params(struct snd_pcm_substream *substream,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +02001696 struct snd_pcm_hw_params *params,
1697 struct snd_soc_dai *dai)
Steve Sakomancc175572008-10-30 21:35:26 -07001698{
Mark Browne6968a12012-04-04 15:58:16 +01001699 struct snd_soc_codec *codec = dai->codec;
Mark Brownb2c812e2010-04-14 15:35:19 +09001700 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Steve Sakomancc175572008-10-30 21:35:26 -07001701 u8 mode, old_mode, format, old_format;
1702
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001703 /* If the substream has 4 channel, do the necessary setup */
1704 if (params_channels(params) == 4) {
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +02001705 format = twl4030_read(codec, TWL4030_REG_AUDIO_IF);
1706 mode = twl4030_read(codec, TWL4030_REG_CODEC_MODE);
Peter Ujfalusieaf1ac82009-06-01 14:06:40 +03001707
1708 /* Safety check: are we in the correct operating mode and
1709 * the interface is in TDM mode? */
1710 if ((mode & TWL4030_OPTION_1) &&
1711 ((format & TWL4030_AIF_FORMAT) == TWL4030_AIF_FORMAT_TDM))
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001712 twl4030_tdm_enable(codec, substream->stream, 1);
1713 else
1714 return -EINVAL;
1715 }
1716
Peter Ujfalusi6b87a912009-04-17 15:55:08 +03001717 if (twl4030->configured)
1718 /* Ignoring hw_params for already configured DAI */
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02001719 return 0;
1720
Steve Sakomancc175572008-10-30 21:35:26 -07001721 /* bit rate */
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +02001722 old_mode = twl4030_read(codec,
1723 TWL4030_REG_CODEC_MODE) & ~TWL4030_CODECPDZ;
Steve Sakomancc175572008-10-30 21:35:26 -07001724 mode = old_mode & ~TWL4030_APLL_RATE;
1725
1726 switch (params_rate(params)) {
1727 case 8000:
1728 mode |= TWL4030_APLL_RATE_8000;
1729 break;
1730 case 11025:
1731 mode |= TWL4030_APLL_RATE_11025;
1732 break;
1733 case 12000:
1734 mode |= TWL4030_APLL_RATE_12000;
1735 break;
1736 case 16000:
1737 mode |= TWL4030_APLL_RATE_16000;
1738 break;
1739 case 22050:
1740 mode |= TWL4030_APLL_RATE_22050;
1741 break;
1742 case 24000:
1743 mode |= TWL4030_APLL_RATE_24000;
1744 break;
1745 case 32000:
1746 mode |= TWL4030_APLL_RATE_32000;
1747 break;
1748 case 44100:
1749 mode |= TWL4030_APLL_RATE_44100;
1750 break;
1751 case 48000:
1752 mode |= TWL4030_APLL_RATE_48000;
1753 break;
Peter Ujfalusi103f2112009-04-03 14:39:05 +03001754 case 96000:
1755 mode |= TWL4030_APLL_RATE_96000;
1756 break;
Steve Sakomancc175572008-10-30 21:35:26 -07001757 default:
Peter Ujfalusi3b8a0792012-02-21 09:34:20 +02001758 dev_err(codec->dev, "%s: unknown rate %d\n", __func__,
Steve Sakomancc175572008-10-30 21:35:26 -07001759 params_rate(params));
1760 return -EINVAL;
1761 }
1762
Steve Sakomancc175572008-10-30 21:35:26 -07001763 /* sample size */
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +02001764 old_format = twl4030_read(codec, TWL4030_REG_AUDIO_IF);
Steve Sakomancc175572008-10-30 21:35:26 -07001765 format = old_format;
1766 format &= ~TWL4030_DATA_WIDTH;
1767 switch (params_format(params)) {
1768 case SNDRV_PCM_FORMAT_S16_LE:
1769 format |= TWL4030_DATA_WIDTH_16S_16W;
1770 break;
Peter Ujfalusidcdeda42010-12-14 13:45:29 +02001771 case SNDRV_PCM_FORMAT_S32_LE:
Steve Sakomancc175572008-10-30 21:35:26 -07001772 format |= TWL4030_DATA_WIDTH_32S_24W;
1773 break;
1774 default:
Peter Ujfalusi3b8a0792012-02-21 09:34:20 +02001775 dev_err(codec->dev, "%s: unknown format %d\n", __func__,
Steve Sakomancc175572008-10-30 21:35:26 -07001776 params_format(params));
1777 return -EINVAL;
1778 }
1779
Peter Ujfalusi2046f172010-05-26 11:38:20 +03001780 if (format != old_format || mode != old_mode) {
1781 if (twl4030->codec_powered) {
1782 /*
1783 * If the codec is powered, than we need to toggle the
1784 * codec power.
1785 */
1786 twl4030_codec_enable(codec, 0);
1787 twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
1788 twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
1789 twl4030_codec_enable(codec, 1);
1790 } else {
1791 twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
1792 twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
1793 }
Steve Sakomancc175572008-10-30 21:35:26 -07001794 }
Peter Ujfalusi6b87a912009-04-17 15:55:08 +03001795
1796 /* Store the important parameters for the DAI configuration and set
1797 * the DAI as configured */
1798 twl4030->configured = 1;
1799 twl4030->rate = params_rate(params);
1800 twl4030->sample_bits = hw_param_interval(params,
1801 SNDRV_PCM_HW_PARAM_SAMPLE_BITS)->min;
1802 twl4030->channels = params_channels(params);
1803
1804 /* If both playback and capture streams are open, and one of them
1805 * is setting the hw parameters right now (since we are here), set
1806 * constraints to the other stream to match the current one. */
1807 if (twl4030->slave_substream)
1808 twl4030_constraints(twl4030, substream);
1809
Steve Sakomancc175572008-10-30 21:35:26 -07001810 return 0;
1811}
1812
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +02001813static int twl4030_set_dai_sysclk(struct snd_soc_dai *codec_dai, int clk_id,
1814 unsigned int freq, int dir)
Steve Sakomancc175572008-10-30 21:35:26 -07001815{
1816 struct snd_soc_codec *codec = codec_dai->codec;
Mark Brownb2c812e2010-04-14 15:35:19 +09001817 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Steve Sakomancc175572008-10-30 21:35:26 -07001818
1819 switch (freq) {
1820 case 19200000:
Steve Sakomancc175572008-10-30 21:35:26 -07001821 case 26000000:
Steve Sakomancc175572008-10-30 21:35:26 -07001822 case 38400000:
Steve Sakomancc175572008-10-30 21:35:26 -07001823 break;
1824 default:
Peter Ujfalusi3b8a0792012-02-21 09:34:20 +02001825 dev_err(codec->dev, "Unsupported HFCLKIN: %u\n", freq);
Steve Sakomancc175572008-10-30 21:35:26 -07001826 return -EINVAL;
1827 }
1828
Peter Ujfalusi68d01952009-11-04 09:58:20 +02001829 if ((freq / 1000) != twl4030->sysclk) {
1830 dev_err(codec->dev,
Peter Ujfalusi3b8a0792012-02-21 09:34:20 +02001831 "Mismatch in HFCLKIN: %u (configured: %u)\n",
Peter Ujfalusi68d01952009-11-04 09:58:20 +02001832 freq, twl4030->sysclk * 1000);
1833 return -EINVAL;
1834 }
Steve Sakomancc175572008-10-30 21:35:26 -07001835
1836 return 0;
1837}
1838
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +02001839static int twl4030_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)
Steve Sakomancc175572008-10-30 21:35:26 -07001840{
1841 struct snd_soc_codec *codec = codec_dai->codec;
Peter Ujfalusi2046f172010-05-26 11:38:20 +03001842 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Steve Sakomancc175572008-10-30 21:35:26 -07001843 u8 old_format, format;
1844
1845 /* get format */
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +02001846 old_format = twl4030_read(codec, TWL4030_REG_AUDIO_IF);
Steve Sakomancc175572008-10-30 21:35:26 -07001847 format = old_format;
1848
1849 /* set master/slave audio interface */
1850 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1851 case SND_SOC_DAIFMT_CBM_CFM:
1852 format &= ~(TWL4030_AIF_SLAVE_EN);
Grazvydas Ignotase18c94d2008-11-05 23:51:05 +02001853 format &= ~(TWL4030_CLK256FS_EN);
Steve Sakomancc175572008-10-30 21:35:26 -07001854 break;
1855 case SND_SOC_DAIFMT_CBS_CFS:
Steve Sakomancc175572008-10-30 21:35:26 -07001856 format |= TWL4030_AIF_SLAVE_EN;
Grazvydas Ignotase18c94d2008-11-05 23:51:05 +02001857 format |= TWL4030_CLK256FS_EN;
Steve Sakomancc175572008-10-30 21:35:26 -07001858 break;
1859 default:
1860 return -EINVAL;
1861 }
1862
1863 /* interface format */
1864 format &= ~TWL4030_AIF_FORMAT;
1865 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1866 case SND_SOC_DAIFMT_I2S:
1867 format |= TWL4030_AIF_FORMAT_CODEC;
1868 break;
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03001869 case SND_SOC_DAIFMT_DSP_A:
1870 format |= TWL4030_AIF_FORMAT_TDM;
1871 break;
Steve Sakomancc175572008-10-30 21:35:26 -07001872 default:
1873 return -EINVAL;
1874 }
1875
1876 if (format != old_format) {
Peter Ujfalusi2046f172010-05-26 11:38:20 +03001877 if (twl4030->codec_powered) {
1878 /*
1879 * If the codec is powered, than we need to toggle the
1880 * codec power.
1881 */
1882 twl4030_codec_enable(codec, 0);
1883 twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
1884 twl4030_codec_enable(codec, 1);
1885 } else {
1886 twl4030_write(codec, TWL4030_REG_AUDIO_IF, format);
1887 }
Steve Sakomancc175572008-10-30 21:35:26 -07001888 }
1889
1890 return 0;
1891}
1892
Lopez Cruz, Misael68140442009-07-03 02:21:39 -05001893static int twl4030_set_tristate(struct snd_soc_dai *dai, int tristate)
1894{
1895 struct snd_soc_codec *codec = dai->codec;
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +02001896 u8 reg = twl4030_read(codec, TWL4030_REG_AUDIO_IF);
Lopez Cruz, Misael68140442009-07-03 02:21:39 -05001897
1898 if (tristate)
1899 reg |= TWL4030_AIF_TRI_EN;
1900 else
1901 reg &= ~TWL4030_AIF_TRI_EN;
1902
1903 return twl4030_write(codec, TWL4030_REG_AUDIO_IF, reg);
1904}
1905
Misael Lopez Cruzb7a755a2009-05-17 20:02:31 -05001906/* In case of voice mode, the RX1 L(VRX) for downlink and the TX2 L/R
1907 * (VTXL, VTXR) for uplink has to be enabled/disabled. */
1908static void twl4030_voice_enable(struct snd_soc_codec *codec, int direction,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +02001909 int enable)
Misael Lopez Cruzb7a755a2009-05-17 20:02:31 -05001910{
1911 u8 reg, mask;
1912
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +02001913 reg = twl4030_read(codec, TWL4030_REG_OPTION);
Misael Lopez Cruzb7a755a2009-05-17 20:02:31 -05001914
1915 if (direction == SNDRV_PCM_STREAM_PLAYBACK)
1916 mask = TWL4030_ARXL1_VRX_EN;
1917 else
1918 mask = TWL4030_ATXL2_VTXL_EN | TWL4030_ATXR2_VTXR_EN;
1919
1920 if (enable)
1921 reg |= mask;
1922 else
1923 reg &= ~mask;
1924
1925 twl4030_write(codec, TWL4030_REG_OPTION, reg);
1926}
1927
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001928static int twl4030_voice_startup(struct snd_pcm_substream *substream,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +02001929 struct snd_soc_dai *dai)
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001930{
Mark Browne6968a12012-04-04 15:58:16 +01001931 struct snd_soc_codec *codec = dai->codec;
Mark Brownb2c812e2010-04-14 15:35:19 +09001932 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001933 u8 mode;
1934
1935 /* If the system master clock is not 26MHz, the voice PCM interface is
Lucas De Marchi25985ed2011-03-30 22:57:33 -03001936 * not available.
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001937 */
Peter Ujfalusi68d01952009-11-04 09:58:20 +02001938 if (twl4030->sysclk != 26000) {
Peter Ujfalusi3b8a0792012-02-21 09:34:20 +02001939 dev_err(codec->dev,
1940 "%s: HFCLKIN is %u KHz, voice interface needs 26MHz\n",
1941 __func__, twl4030->sysclk);
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001942 return -EINVAL;
1943 }
1944
1945 /* If the codec mode is not option2, the voice PCM interface is not
Lucas De Marchi25985ed2011-03-30 22:57:33 -03001946 * available.
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001947 */
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +02001948 mode = twl4030_read(codec, TWL4030_REG_CODEC_MODE)
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001949 & TWL4030_OPT_MODE;
1950
1951 if (mode != TWL4030_OPTION_2) {
Peter Ujfalusi3b8a0792012-02-21 09:34:20 +02001952 dev_err(codec->dev, "%s: the codec mode is not option2\n",
1953 __func__);
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001954 return -EINVAL;
1955 }
1956
1957 return 0;
1958}
1959
Misael Lopez Cruzb7a755a2009-05-17 20:02:31 -05001960static void twl4030_voice_shutdown(struct snd_pcm_substream *substream,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +02001961 struct snd_soc_dai *dai)
Misael Lopez Cruzb7a755a2009-05-17 20:02:31 -05001962{
Mark Browne6968a12012-04-04 15:58:16 +01001963 struct snd_soc_codec *codec = dai->codec;
Misael Lopez Cruzb7a755a2009-05-17 20:02:31 -05001964
1965 /* Enable voice digital filters */
1966 twl4030_voice_enable(codec, substream->stream, 0);
1967}
1968
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001969static int twl4030_voice_hw_params(struct snd_pcm_substream *substream,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +02001970 struct snd_pcm_hw_params *params,
1971 struct snd_soc_dai *dai)
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001972{
Mark Browne6968a12012-04-04 15:58:16 +01001973 struct snd_soc_codec *codec = dai->codec;
Peter Ujfalusi2046f172010-05-26 11:38:20 +03001974 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001975 u8 old_mode, mode;
1976
Misael Lopez Cruzb7a755a2009-05-17 20:02:31 -05001977 /* Enable voice digital filters */
1978 twl4030_voice_enable(codec, substream->stream, 1);
1979
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001980 /* bit rate */
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +02001981 old_mode = twl4030_read(codec,
1982 TWL4030_REG_CODEC_MODE) & ~TWL4030_CODECPDZ;
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001983 mode = old_mode;
1984
1985 switch (params_rate(params)) {
1986 case 8000:
1987 mode &= ~(TWL4030_SEL_16K);
1988 break;
1989 case 16000:
1990 mode |= TWL4030_SEL_16K;
1991 break;
1992 default:
Peter Ujfalusi3b8a0792012-02-21 09:34:20 +02001993 dev_err(codec->dev, "%s: unknown rate %d\n", __func__,
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09001994 params_rate(params));
1995 return -EINVAL;
1996 }
1997
1998 if (mode != old_mode) {
Peter Ujfalusi2046f172010-05-26 11:38:20 +03001999 if (twl4030->codec_powered) {
2000 /*
2001 * If the codec is powered, than we need to toggle the
2002 * codec power.
2003 */
2004 twl4030_codec_enable(codec, 0);
2005 twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
2006 twl4030_codec_enable(codec, 1);
2007 } else {
2008 twl4030_write(codec, TWL4030_REG_CODEC_MODE, mode);
2009 }
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002010 }
2011
2012 return 0;
2013}
2014
2015static int twl4030_voice_set_dai_sysclk(struct snd_soc_dai *codec_dai,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +02002016 int clk_id, unsigned int freq, int dir)
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002017{
2018 struct snd_soc_codec *codec = codec_dai->codec;
Takashi Iwaid4a8ca22010-04-20 08:20:31 +02002019 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002020
Peter Ujfalusi68d01952009-11-04 09:58:20 +02002021 if (freq != 26000000) {
Peter Ujfalusi3b8a0792012-02-21 09:34:20 +02002022 dev_err(codec->dev,
2023 "%s: HFCLKIN is %u KHz, voice interface needs 26MHz\n",
2024 __func__, freq / 1000);
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002025 return -EINVAL;
2026 }
Peter Ujfalusi68d01952009-11-04 09:58:20 +02002027 if ((freq / 1000) != twl4030->sysclk) {
2028 dev_err(codec->dev,
Peter Ujfalusi3b8a0792012-02-21 09:34:20 +02002029 "Mismatch in HFCLKIN: %u (configured: %u)\n",
Peter Ujfalusi68d01952009-11-04 09:58:20 +02002030 freq, twl4030->sysclk * 1000);
2031 return -EINVAL;
2032 }
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002033 return 0;
2034}
2035
2036static int twl4030_voice_set_dai_fmt(struct snd_soc_dai *codec_dai,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +02002037 unsigned int fmt)
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002038{
2039 struct snd_soc_codec *codec = codec_dai->codec;
Peter Ujfalusi2046f172010-05-26 11:38:20 +03002040 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002041 u8 old_format, format;
2042
2043 /* get format */
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +02002044 old_format = twl4030_read(codec, TWL4030_REG_VOICE_IF);
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002045 format = old_format;
2046
2047 /* set master/slave audio interface */
2048 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
Lopez Cruz, Misaelc2643012009-06-19 03:23:42 -05002049 case SND_SOC_DAIFMT_CBM_CFM:
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002050 format &= ~(TWL4030_VIF_SLAVE_EN);
2051 break;
2052 case SND_SOC_DAIFMT_CBS_CFS:
2053 format |= TWL4030_VIF_SLAVE_EN;
2054 break;
2055 default:
2056 return -EINVAL;
2057 }
2058
2059 /* clock inversion */
2060 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
2061 case SND_SOC_DAIFMT_IB_NF:
2062 format &= ~(TWL4030_VIF_FORMAT);
2063 break;
2064 case SND_SOC_DAIFMT_NB_IF:
2065 format |= TWL4030_VIF_FORMAT;
2066 break;
2067 default:
2068 return -EINVAL;
2069 }
2070
2071 if (format != old_format) {
Peter Ujfalusi2046f172010-05-26 11:38:20 +03002072 if (twl4030->codec_powered) {
2073 /*
2074 * If the codec is powered, than we need to toggle the
2075 * codec power.
2076 */
2077 twl4030_codec_enable(codec, 0);
2078 twl4030_write(codec, TWL4030_REG_VOICE_IF, format);
2079 twl4030_codec_enable(codec, 1);
2080 } else {
2081 twl4030_write(codec, TWL4030_REG_VOICE_IF, format);
2082 }
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002083 }
2084
2085 return 0;
2086}
2087
Lopez Cruz, Misael68140442009-07-03 02:21:39 -05002088static int twl4030_voice_set_tristate(struct snd_soc_dai *dai, int tristate)
2089{
2090 struct snd_soc_codec *codec = dai->codec;
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +02002091 u8 reg = twl4030_read(codec, TWL4030_REG_VOICE_IF);
Lopez Cruz, Misael68140442009-07-03 02:21:39 -05002092
2093 if (tristate)
2094 reg |= TWL4030_VIF_TRI_EN;
2095 else
2096 reg &= ~TWL4030_VIF_TRI_EN;
2097
2098 return twl4030_write(codec, TWL4030_REG_VOICE_IF, reg);
2099}
2100
Jarkko Nikulabbba9442008-11-12 17:05:41 +02002101#define TWL4030_RATES (SNDRV_PCM_RATE_8000_48000)
Peter Ujfalusidcdeda42010-12-14 13:45:29 +02002102#define TWL4030_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
Steve Sakomancc175572008-10-30 21:35:26 -07002103
Lars-Peter Clausen85e76522011-11-23 11:40:40 +01002104static const struct snd_soc_dai_ops twl4030_dai_hifi_ops = {
Peter Ujfalusi7220b9f2009-03-27 10:39:08 +02002105 .startup = twl4030_startup,
2106 .shutdown = twl4030_shutdown,
Joonyoung Shim10d9e3d2009-03-16 21:23:35 +09002107 .hw_params = twl4030_hw_params,
2108 .set_sysclk = twl4030_set_dai_sysclk,
2109 .set_fmt = twl4030_set_dai_fmt,
Lopez Cruz, Misael68140442009-07-03 02:21:39 -05002110 .set_tristate = twl4030_set_tristate,
Joonyoung Shim10d9e3d2009-03-16 21:23:35 +09002111};
2112
Lars-Peter Clausen85e76522011-11-23 11:40:40 +01002113static const struct snd_soc_dai_ops twl4030_dai_voice_ops = {
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002114 .startup = twl4030_voice_startup,
Misael Lopez Cruzb7a755a2009-05-17 20:02:31 -05002115 .shutdown = twl4030_voice_shutdown,
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002116 .hw_params = twl4030_voice_hw_params,
2117 .set_sysclk = twl4030_voice_set_dai_sysclk,
2118 .set_fmt = twl4030_voice_set_dai_fmt,
Lopez Cruz, Misael68140442009-07-03 02:21:39 -05002119 .set_tristate = twl4030_voice_set_tristate,
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002120};
2121
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002122static struct snd_soc_dai_driver twl4030_dai[] = {
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002123{
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002124 .name = "twl4030-hifi",
Steve Sakomancc175572008-10-30 21:35:26 -07002125 .playback = {
Peter Ujfalusib4852b72009-05-22 15:12:15 +03002126 .stream_name = "HiFi Playback",
Steve Sakomancc175572008-10-30 21:35:26 -07002127 .channels_min = 2,
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03002128 .channels_max = 4,
Peter Ujfalusi31ad0f32009-03-27 10:39:07 +02002129 .rates = TWL4030_RATES | SNDRV_PCM_RATE_96000,
Peter Ujfalusi8819f652012-01-18 12:18:26 +01002130 .formats = TWL4030_FORMATS,
2131 .sig_bits = 24,},
Steve Sakomancc175572008-10-30 21:35:26 -07002132 .capture = {
Peter Ujfalusi7f51e7d2012-09-20 16:32:02 +03002133 .stream_name = "HiFi Capture",
Steve Sakomancc175572008-10-30 21:35:26 -07002134 .channels_min = 2,
Peter Ujfalusi8a1f9362009-04-23 14:36:49 +03002135 .channels_max = 4,
Steve Sakomancc175572008-10-30 21:35:26 -07002136 .rates = TWL4030_RATES,
Peter Ujfalusi8819f652012-01-18 12:18:26 +01002137 .formats = TWL4030_FORMATS,
2138 .sig_bits = 24,},
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002139 .ops = &twl4030_dai_hifi_ops,
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002140},
2141{
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002142 .name = "twl4030-voice",
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002143 .playback = {
Peter Ujfalusib4852b72009-05-22 15:12:15 +03002144 .stream_name = "Voice Playback",
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002145 .channels_min = 1,
2146 .channels_max = 1,
2147 .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000,
2148 .formats = SNDRV_PCM_FMTBIT_S16_LE,},
2149 .capture = {
Peter Ujfalusi7f51e7d2012-09-20 16:32:02 +03002150 .stream_name = "Voice Capture",
Joonyoung Shim7154b3e2009-04-20 19:21:35 +09002151 .channels_min = 1,
2152 .channels_max = 2,
2153 .rates = SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_16000,
2154 .formats = SNDRV_PCM_FMTBIT_S16_LE,},
2155 .ops = &twl4030_dai_voice_ops,
2156},
Steve Sakomancc175572008-10-30 21:35:26 -07002157};
Steve Sakomancc175572008-10-30 21:35:26 -07002158
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002159static int twl4030_soc_probe(struct snd_soc_codec *codec)
Steve Sakomancc175572008-10-30 21:35:26 -07002160{
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002161 struct twl4030_priv *twl4030;
Steve Sakomancc175572008-10-30 21:35:26 -07002162
Peter Ujfalusif2b1ce42012-09-10 13:46:30 +03002163 twl4030 = devm_kzalloc(codec->dev, sizeof(struct twl4030_priv),
2164 GFP_KERNEL);
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002165 if (twl4030 == NULL) {
Peter Ujfalusi3b8a0792012-02-21 09:34:20 +02002166 dev_err(codec->dev, "Can not allocate memory\n");
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002167 return -ENOMEM;
Steve Sakomancc175572008-10-30 21:35:26 -07002168 }
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002169 snd_soc_codec_set_drvdata(codec, twl4030);
2170 /* Set the defaults, and power up the codec */
Peter Ujfalusi57fe7252011-05-31 12:02:49 +03002171 twl4030->sysclk = twl4030_audio_get_mclk() / 1000;
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002172
2173 twl4030_init_chip(codec);
Steve Sakomancc175572008-10-30 21:35:26 -07002174
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002175 return 0;
Steve Sakomancc175572008-10-30 21:35:26 -07002176}
2177
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002178static int twl4030_soc_remove(struct snd_soc_codec *codec)
Steve Sakomancc175572008-10-30 21:35:26 -07002179{
Axel Lin5b3b0fa2010-11-19 17:31:08 +08002180 struct twl4030_priv *twl4030 = snd_soc_codec_get_drvdata(codec);
Peter Ujfalusi182f73f2012-09-10 13:46:31 +03002181 struct twl4030_codec_data *pdata = twl4030->pdata;
Axel Lin5b3b0fa2010-11-19 17:31:08 +08002182
Peter Ujfalusi73939582009-01-29 14:57:50 +02002183 twl4030_set_bias_level(codec, SND_SOC_BIAS_OFF);
Peter Ujfalusi281ecd12012-09-10 13:46:27 +03002184
2185 if (pdata && pdata->hs_extmute && gpio_is_valid(pdata->hs_extmute_gpio))
2186 gpio_free(pdata->hs_extmute_gpio);
2187
Steve Sakomancc175572008-10-30 21:35:26 -07002188 return 0;
2189}
2190
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002191static struct snd_soc_codec_driver soc_codec_dev_twl4030 = {
2192 .probe = twl4030_soc_probe,
2193 .remove = twl4030_soc_remove,
Peter Ujfalusiefc8acf2014-01-03 15:27:53 +02002194 .read = twl4030_read,
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002195 .write = twl4030_write,
2196 .set_bias_level = twl4030_set_bias_level,
Axel Lineb3032f2012-01-27 18:02:09 +08002197 .idle_bias_off = true,
Peter Ujfalusif7c93f02011-10-11 13:11:32 +03002198
2199 .controls = twl4030_snd_controls,
2200 .num_controls = ARRAY_SIZE(twl4030_snd_controls),
2201 .dapm_widgets = twl4030_dapm_widgets,
2202 .num_dapm_widgets = ARRAY_SIZE(twl4030_dapm_widgets),
2203 .dapm_routes = intercon,
2204 .num_dapm_routes = ARRAY_SIZE(intercon),
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002205};
2206
Bill Pemberton05c4c6f2012-12-07 09:26:20 -05002207static int twl4030_codec_probe(struct platform_device *pdev)
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002208{
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002209 return snd_soc_register_codec(&pdev->dev, &soc_codec_dev_twl4030,
Peter Ujfalusi7ded5fe2014-01-03 15:27:54 +02002210 twl4030_dai, ARRAY_SIZE(twl4030_dai));
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002211}
2212
Bill Pemberton05c4c6f2012-12-07 09:26:20 -05002213static int twl4030_codec_remove(struct platform_device *pdev)
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002214{
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002215 snd_soc_unregister_codec(&pdev->dev);
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002216 return 0;
2217}
2218
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002219MODULE_ALIAS("platform:twl4030-codec");
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002220
2221static struct platform_driver twl4030_codec_driver = {
2222 .probe = twl4030_codec_probe,
Bill Pemberton05c4c6f2012-12-07 09:26:20 -05002223 .remove = twl4030_codec_remove,
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002224 .driver = {
Liam Girdwoodf0fba2a2010-03-17 20:15:21 +00002225 .name = "twl4030-codec",
Peter Ujfalusi7a1fecf2009-10-22 13:26:48 +03002226 .owner = THIS_MODULE,
2227 },
Steve Sakomancc175572008-10-30 21:35:26 -07002228};
Steve Sakomancc175572008-10-30 21:35:26 -07002229
Mark Brown5bbcc3c2011-11-23 22:52:08 +00002230module_platform_driver(twl4030_codec_driver);
Mark Brown64089b82008-12-08 19:17:58 +00002231
Steve Sakomancc175572008-10-30 21:35:26 -07002232MODULE_DESCRIPTION("ASoC TWL4030 codec driver");
2233MODULE_AUTHOR("Steve Sakoman");
2234MODULE_LICENSE("GPL");