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gerrit-public.fairphone.software / kernel / msm-4.9 / c8082d344ac4c05932fec1766e5e9ce72cf286ed / . / arch / arm / boot / dts / at91sam9x5.dtsi
blob: d9a93fdd35a566f6a4863822319ba218914804fa [file] [log] [blame]
Nicolas Ferre467f1cf2012-01-26 11:59:20 +0100[diff] [blame]1/*
2 * at91sam9x5.dtsi - Device Tree Include file for AT91SAM9x5 family SoC
3 * applies to AT91SAM9G15, AT91SAM9G25, AT91SAM9G35,
4 * AT91SAM9X25, AT91SAM9X35 SoC
5 *
6 * Copyright (C) 2012 Atmel,
7 * 2012 Nicolas Ferre <nicolas.ferre@atmel.com>
8 *
9 * Licensed under GPLv2 or later.
10 */
11
12/include/ "skeleton.dtsi"
13
14/ {
15 model = "Atmel AT91SAM9x5 family SoC";
16 compatible = "atmel,at91sam9x5";
17 interrupt-parent = <&aic>;
18
19 aliases {
20 serial0 = &dbgu;
21 serial1 = &usart0;
22 serial2 = &usart1;
23 serial3 = &usart2;
24 gpio0 = &pioA;
25 gpio1 = &pioB;
26 gpio2 = &pioC;
27 gpio3 = &pioD;
28 tcb0 = &tcb0;
29 tcb1 = &tcb1;
30 };
31 cpus {
32 cpu@0 {
33 compatible = "arm,arm926ejs";
34 };
35 };
36
37 memory@20000000 {
38 reg = <0x20000000 0x10000000>;
39 };
40
41 ahb {
42 compatible = "simple-bus";
43 #address-cells = <1>;
44 #size-cells = <1>;
45 ranges;
46
47 apb {
48 compatible = "simple-bus";
49 #address-cells = <1>;
50 #size-cells = <1>;
51 ranges;
52
53 aic: interrupt-controller@fffff000 {
54 #interrupt-cells = <2>;
55 compatible = "atmel,at91rm9200-aic";
56 interrupt-controller;
57 interrupt-parent;
58 reg = <0xfffff000 0x200>;
59 };
60
Jean-Christophe PLAGNIOL-VILLARDeb5e76f2012-03-02 20:44:23 +0800[diff] [blame]61 pmc: pmc@fffffc00 {
62 compatible = "atmel,at91rm9200-pmc";
63 reg = <0xfffffc00 0x100>;
64 };
65
Jean-Christophe PLAGNIOL-VILLARDc8082d32012-03-03 03:16:27 +0800[diff] [blame^]66 rstc@fffffe00 {
67 compatible = "atmel,at91sam9g45-rstc";
68 reg = <0xfffffe00 0x10>;
69 };
70
Nicolas Ferre467f1cf2012-01-26 11:59:20 +0100[diff] [blame]71 pit: timer@fffffe30 {
72 compatible = "atmel,at91sam9260-pit";
73 reg = <0xfffffe30 0xf>;
74 interrupts = <1 4>;
75 };
76
77 tcb0: timer@f8008000 {
78 compatible = "atmel,at91sam9x5-tcb";
79 reg = <0xf8008000 0x100>;
80 interrupts = <17 4>;
81 };
82
83 tcb1: timer@f800c000 {
84 compatible = "atmel,at91sam9x5-tcb";
85 reg = <0xf800c000 0x100>;
86 interrupts = <17 4>;
87 };
88
89 dma0: dma-controller@ffffec00 {
90 compatible = "atmel,at91sam9g45-dma";
91 reg = <0xffffec00 0x200>;
92 interrupts = <20 4>;
93 };
94
95 dma1: dma-controller@ffffee00 {
96 compatible = "atmel,at91sam9g45-dma";
97 reg = <0xffffee00 0x200>;
98 interrupts = <21 4>;
99 };
100
101 pioA: gpio@fffff400 {
Nicolas Ferre582d5fb2010-07-20 19:18:51 +0200[diff] [blame]102 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
Nicolas Ferre467f1cf2012-01-26 11:59:20 +0100[diff] [blame]103 reg = <0xfffff400 0x100>;
104 interrupts = <2 4>;
105 #gpio-cells = <2>;
106 gpio-controller;
Nicolas Ferre21f81872012-02-11 15:41:40 +0100[diff] [blame]107 interrupt-controller;
Nicolas Ferre467f1cf2012-01-26 11:59:20 +0100[diff] [blame]108 };
109
110 pioB: gpio@fffff600 {
Nicolas Ferre582d5fb2010-07-20 19:18:51 +0200[diff] [blame]111 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
Nicolas Ferre467f1cf2012-01-26 11:59:20 +0100[diff] [blame]112 reg = <0xfffff600 0x100>;
113 interrupts = <2 4>;
114 #gpio-cells = <2>;
115 gpio-controller;
Nicolas Ferre21f81872012-02-11 15:41:40 +0100[diff] [blame]116 interrupt-controller;
Nicolas Ferre467f1cf2012-01-26 11:59:20 +0100[diff] [blame]117 };
118
119 pioC: gpio@fffff800 {
Nicolas Ferre582d5fb2010-07-20 19:18:51 +0200[diff] [blame]120 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
Nicolas Ferre467f1cf2012-01-26 11:59:20 +0100[diff] [blame]121 reg = <0xfffff800 0x100>;
122 interrupts = <3 4>;
123 #gpio-cells = <2>;
124 gpio-controller;
Nicolas Ferre21f81872012-02-11 15:41:40 +0100[diff] [blame]125 interrupt-controller;
Nicolas Ferre467f1cf2012-01-26 11:59:20 +0100[diff] [blame]126 };
127
128 pioD: gpio@fffffa00 {
Nicolas Ferre582d5fb2010-07-20 19:18:51 +0200[diff] [blame]129 compatible = "atmel,at91sam9x5-gpio", "atmel,at91rm9200-gpio";
Nicolas Ferre467f1cf2012-01-26 11:59:20 +0100[diff] [blame]130 reg = <0xfffffa00 0x100>;
131 interrupts = <3 4>;
132 #gpio-cells = <2>;
133 gpio-controller;
Nicolas Ferre21f81872012-02-11 15:41:40 +0100[diff] [blame]134 interrupt-controller;
Nicolas Ferre467f1cf2012-01-26 11:59:20 +0100[diff] [blame]135 };
136
137 dbgu: serial@fffff200 {
138 compatible = "atmel,at91sam9260-usart";
139 reg = <0xfffff200 0x200>;
140 interrupts = <1 4>;
141 status = "disabled";
142 };
143
144 usart0: serial@f801c000 {
145 compatible = "atmel,at91sam9260-usart";
146 reg = <0xf801c000 0x200>;
147 interrupts = <5 4>;
148 atmel,use-dma-rx;
149 atmel,use-dma-tx;
150 status = "disabled";
151 };
152
153 usart1: serial@f8020000 {
154 compatible = "atmel,at91sam9260-usart";
155 reg = <0xf8020000 0x200>;
156 interrupts = <6 4>;
157 atmel,use-dma-rx;
158 atmel,use-dma-tx;
159 status = "disabled";
160 };
161
162 usart2: serial@f8024000 {
163 compatible = "atmel,at91sam9260-usart";
164 reg = <0xf8024000 0x200>;
165 interrupts = <7 4>;
166 atmel,use-dma-rx;
167 atmel,use-dma-tx;
168 status = "disabled";
169 };
170
171 macb0: ethernet@f802c000 {
172 compatible = "cdns,at32ap7000-macb", "cdns,macb";
173 reg = <0xf802c000 0x100>;
174 interrupts = <24 4>;
175 status = "disabled";
176 };
177
178 macb1: ethernet@f8030000 {
179 compatible = "cdns,at32ap7000-macb", "cdns,macb";
180 reg = <0xf8030000 0x100>;
181 interrupts = <27 4>;
182 status = "disabled";
183 };
184 };
Jean-Christophe PLAGNIOL-VILLARD86a89f42012-02-21 21:38:18 +0800[diff] [blame]185
186 nand0: nand@40000000 {
187 compatible = "atmel,at91rm9200-nand";
188 #address-cells = <1>;
189 #size-cells = <1>;
190 reg = <0x40000000 0x10000000
191 >;
192 atmel,nand-addr-offset = <21>;
193 atmel,nand-cmd-offset = <22>;
194 gpios = <&pioC 8 0
195 &pioC 14 0
196 0
197 >;
198 status = "disabled";
199 };
Nicolas Ferre467f1cf2012-01-26 11:59:20 +0100[diff] [blame]200 };
Jean-Christophe PLAGNIOL-VILLARD10f71c22012-02-23 22:50:32 +0800[diff] [blame]201
202 i2c@0 {
203 compatible = "i2c-gpio";
204 gpios = <&pioA 30 0 /* sda */
205 &pioA 31 0 /* scl */
206 >;
207 i2c-gpio,sda-open-drain;
208 i2c-gpio,scl-open-drain;
209 i2c-gpio,delay-us = <2>; /* ~100 kHz */
210 #address-cells = <1>;
211 #size-cells = <0>;
212 status = "disabled";
213 };
214
215 i2c@1 {
216 compatible = "i2c-gpio";
217 gpios = <&pioC 0 0 /* sda */
218 &pioC 1 0 /* scl */
219 >;
220 i2c-gpio,sda-open-drain;
221 i2c-gpio,scl-open-drain;
222 i2c-gpio,delay-us = <2>; /* ~100 kHz */
223 #address-cells = <1>;
224 #size-cells = <0>;
225 status = "disabled";
226 };
227
228 i2c@2 {
229 compatible = "i2c-gpio";
230 gpios = <&pioB 4 0 /* sda */
231 &pioB 5 0 /* scl */
232 >;
233 i2c-gpio,sda-open-drain;
234 i2c-gpio,scl-open-drain;
235 i2c-gpio,delay-us = <2>; /* ~100 kHz */
236 #address-cells = <1>;
237 #size-cells = <0>;
238 status = "disabled";
239 };
Nicolas Ferre467f1cf2012-01-26 11:59:20 +0100[diff] [blame]240};