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Tomi Valkeinen23c0a7a2009-08-05 16:18:44 +03001/*
2 * linux/drivers/video/omap2/dss/sdi.c
3 *
4 * Copyright (C) 2009 Nokia Corporation
5 * Author: Tomi Valkeinen <tomi.valkeinen@nokia.com>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published by
9 * the Free Software Foundation.
10 *
11 * This program is distributed in the hope that it will be useful, but WITHOUT
12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 * more details.
15 *
16 * You should have received a copy of the GNU General Public License along with
17 * this program. If not, see <http://www.gnu.org/licenses/>.
18 */
19
20#define DSS_SUBSYS_NAME "SDI"
21
22#include <linux/kernel.h>
Tomi Valkeinen23c0a7a2009-08-05 16:18:44 +030023#include <linux/delay.h>
24#include <linux/err.h>
Roger Quadros508886c2010-03-17 13:35:21 +010025#include <linux/regulator/consumer.h>
Paul Gortmakera8a35932011-07-10 13:20:26 -040026#include <linux/export.h>
Tomi Valkeinena57dd4f2012-02-20 16:57:37 +020027#include <linux/platform_device.h>
Tomi Valkeinen13b1ba72012-09-28 10:03:03 +030028#include <linux/string.h>
Tomi Valkeinen23c0a7a2009-08-05 16:18:44 +030029
Tomi Valkeinena0b38cc2011-05-11 14:05:07 +030030#include <video/omapdss.h>
Tomi Valkeinen23c0a7a2009-08-05 16:18:44 +030031#include "dss.h"
32
33static struct {
Tomi Valkeinen46c4b642013-03-19 13:46:40 +020034 struct platform_device *pdev;
35
Tomi Valkeinen23c0a7a2009-08-05 16:18:44 +030036 bool update_enabled;
Roger Quadros508886c2010-03-17 13:35:21 +010037 struct regulator *vdds_sdi_reg;
Archit Taneja37a57992012-06-29 14:33:18 +053038
39 struct dss_lcd_mgr_config mgr_config;
Archit Taneja9b4a5712012-08-08 16:56:06 +053040 struct omap_video_timings timings;
Archit Taneja889b4fd2012-07-20 17:18:49 +053041 int datapairs;
Archit Taneja81b87f52012-09-26 16:30:49 +053042
Tomi Valkeinen1f68d9c2013-04-19 15:09:34 +030043 struct omap_dss_device output;
Tomi Valkeinen23c0a7a2009-08-05 16:18:44 +030044} sdi;
45
Tomi Valkeinen36816fa2013-03-05 17:06:26 +020046struct sdi_clk_calc_ctx {
47 unsigned long pck_min, pck_max;
48
Tomi Valkeinenc56812f2014-01-28 08:50:47 +020049 unsigned long fck;
Tomi Valkeinen36816fa2013-03-05 17:06:26 +020050 struct dispc_clock_info dispc_cinfo;
51};
52
53static bool dpi_calc_dispc_cb(int lckd, int pckd, unsigned long lck,
54 unsigned long pck, void *data)
55{
56 struct sdi_clk_calc_ctx *ctx = data;
57
58 ctx->dispc_cinfo.lck_div = lckd;
59 ctx->dispc_cinfo.pck_div = pckd;
60 ctx->dispc_cinfo.lck = lck;
61 ctx->dispc_cinfo.pck = pck;
62
63 return true;
64}
65
Tomi Valkeinend0f58bd2013-10-31 14:44:23 +020066static bool dpi_calc_dss_cb(unsigned long fck, void *data)
Tomi Valkeinen36816fa2013-03-05 17:06:26 +020067{
68 struct sdi_clk_calc_ctx *ctx = data;
69
Tomi Valkeinend0f58bd2013-10-31 14:44:23 +020070 ctx->fck = fck;
Tomi Valkeinen36816fa2013-03-05 17:06:26 +020071
72 return dispc_div_calc(fck, ctx->pck_min, ctx->pck_max,
73 dpi_calc_dispc_cb, ctx);
74}
75
76static int sdi_calc_clock_div(unsigned long pclk,
Tomi Valkeinend0f58bd2013-10-31 14:44:23 +020077 unsigned long *fck,
Tomi Valkeinen36816fa2013-03-05 17:06:26 +020078 struct dispc_clock_info *dispc_cinfo)
79{
80 int i;
81 struct sdi_clk_calc_ctx ctx;
82
83 /*
84 * DSS fclk gives us very few possibilities, so finding a good pixel
85 * clock may not be possible. We try multiple times to find the clock,
86 * each time widening the pixel clock range we look for, up to
87 * +/- 1MHz.
88 */
89
90 for (i = 0; i < 10; ++i) {
91 bool ok;
92
93 memset(&ctx, 0, sizeof(ctx));
94 if (pclk > 1000 * i * i * i)
95 ctx.pck_min = max(pclk - 1000 * i * i * i, 0lu);
96 else
97 ctx.pck_min = 0;
98 ctx.pck_max = pclk + 1000 * i * i * i;
99
Tomi Valkeinen688af022013-10-31 16:41:57 +0200100 ok = dss_div_calc(pclk, ctx.pck_min, dpi_calc_dss_cb, &ctx);
Tomi Valkeinen36816fa2013-03-05 17:06:26 +0200101 if (ok) {
Tomi Valkeinend0f58bd2013-10-31 14:44:23 +0200102 *fck = ctx.fck;
Tomi Valkeinen36816fa2013-03-05 17:06:26 +0200103 *dispc_cinfo = ctx.dispc_cinfo;
104 return 0;
105 }
106 }
107
108 return -EINVAL;
109}
110
Archit Taneja37a57992012-06-29 14:33:18 +0530111static void sdi_config_lcd_manager(struct omap_dss_device *dssdev)
Sumit Semwal64ba4f72010-12-02 11:27:10 +0000112{
Tomi Valkeinen7ae9a712013-05-10 15:27:07 +0300113 struct omap_overlay_manager *mgr = sdi.output.manager;
Archit Taneja7d6069e2012-09-04 11:49:30 +0530114
Archit Taneja37a57992012-06-29 14:33:18 +0530115 sdi.mgr_config.io_pad_mode = DSS_IO_PAD_MODE_BYPASS;
116
117 sdi.mgr_config.stallmode = false;
118 sdi.mgr_config.fifohandcheck = false;
119
120 sdi.mgr_config.video_port_width = 24;
121 sdi.mgr_config.lcden_sig_polarity = 1;
122
Archit Taneja7d6069e2012-09-04 11:49:30 +0530123 dss_mgr_set_lcd_config(mgr, &sdi.mgr_config);
Tomi Valkeinen23c0a7a2009-08-05 16:18:44 +0300124}
125
Tomi Valkeinencd6e9152013-05-22 13:14:37 +0300126static int sdi_display_enable(struct omap_dss_device *dssdev)
Tomi Valkeinen23c0a7a2009-08-05 16:18:44 +0300127{
Tomi Valkeinen1f68d9c2013-04-19 15:09:34 +0300128 struct omap_dss_device *out = &sdi.output;
Archit Taneja9b4a5712012-08-08 16:56:06 +0530129 struct omap_video_timings *t = &sdi.timings;
Tomi Valkeinend0f58bd2013-10-31 14:44:23 +0200130 unsigned long fck;
Tomi Valkeinen23c0a7a2009-08-05 16:18:44 +0300131 struct dispc_clock_info dispc_cinfo;
Tomi Valkeinen23c0a7a2009-08-05 16:18:44 +0300132 unsigned long pck;
133 int r;
134
Archit Taneja7d6069e2012-09-04 11:49:30 +0530135 if (out == NULL || out->manager == NULL) {
136 DSSERR("failed to enable display: no output/manager\n");
Tomi Valkeinen05e1d602011-06-23 16:38:21 +0300137 return -ENODEV;
138 }
139
Roger Quadros508886c2010-03-17 13:35:21 +0100140 r = regulator_enable(sdi.vdds_sdi_reg);
141 if (r)
Tomi Valkeinen4fbafaf2011-05-27 10:52:19 +0300142 goto err_reg_enable;
Roger Quadros508886c2010-03-17 13:35:21 +0100143
Tomi Valkeinen4fbafaf2011-05-27 10:52:19 +0300144 r = dispc_runtime_get();
145 if (r)
146 goto err_get_dispc;
Tomi Valkeinen23c0a7a2009-08-05 16:18:44 +0300147
Tomi Valkeinen23c0a7a2009-08-05 16:18:44 +0300148 /* 15.5.9.1.2 */
Archit Taneja9b4a5712012-08-08 16:56:06 +0530149 t->data_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE;
150 t->sync_pclk_edge = OMAPDSS_DRIVE_SIG_RISING_EDGE;
Archit Tanejaa8d5e412012-06-25 12:26:38 +0530151
Tomi Valkeinend0f58bd2013-10-31 14:44:23 +0200152 r = sdi_calc_clock_div(t->pixel_clock * 1000, &fck, &dispc_cinfo);
Tomi Valkeinen23c0a7a2009-08-05 16:18:44 +0300153 if (r)
Tomi Valkeinen4fbafaf2011-05-27 10:52:19 +0300154 goto err_calc_clock_div;
Tomi Valkeinen23c0a7a2009-08-05 16:18:44 +0300155
Archit Taneja37a57992012-06-29 14:33:18 +0530156 sdi.mgr_config.clock_info = dispc_cinfo;
Tomi Valkeinen23c0a7a2009-08-05 16:18:44 +0300157
Tomi Valkeinend0f58bd2013-10-31 14:44:23 +0200158 pck = fck / dispc_cinfo.lck_div / dispc_cinfo.pck_div / 1000;
Tomi Valkeinen23c0a7a2009-08-05 16:18:44 +0300159
160 if (pck != t->pixel_clock) {
161 DSSWARN("Could not find exact pixel clock. Requested %d kHz, "
162 "got %lu kHz\n",
163 t->pixel_clock, pck);
164
165 t->pixel_clock = pck;
166 }
167
168
Archit Taneja7d6069e2012-09-04 11:49:30 +0530169 dss_mgr_set_timings(out->manager, t);
Tomi Valkeinen23c0a7a2009-08-05 16:18:44 +0300170
Tomi Valkeinend0f58bd2013-10-31 14:44:23 +0200171 r = dss_set_fck_rate(fck);
Tomi Valkeinen23c0a7a2009-08-05 16:18:44 +0300172 if (r)
Tomi Valkeinen4fbafaf2011-05-27 10:52:19 +0300173 goto err_set_dss_clock_div;
Tomi Valkeinen23c0a7a2009-08-05 16:18:44 +0300174
Archit Taneja37a57992012-06-29 14:33:18 +0530175 sdi_config_lcd_manager(dssdev);
Tomi Valkeinen23c0a7a2009-08-05 16:18:44 +0300176
Tomi Valkeinen35d67862012-08-21 09:09:47 +0300177 /*
178 * LCLK and PCLK divisors are located in shadow registers, and we
179 * normally write them to DISPC registers when enabling the output.
180 * However, SDI uses pck-free as source clock for its PLL, and pck-free
181 * is affected by the divisors. And as we need the PLL before enabling
182 * the output, we need to write the divisors early.
183 *
184 * It seems just writing to the DISPC register is enough, and we don't
185 * need to care about the shadow register mechanism for pck-free. The
186 * exact reason for this is unknown.
187 */
Archit Taneja7d6069e2012-09-04 11:49:30 +0530188 dispc_mgr_set_clock_div(out->manager->id, &sdi.mgr_config.clock_info);
Archit Taneja889b4fd2012-07-20 17:18:49 +0530189
Tomi Valkeinen66591452012-09-11 11:28:59 +0300190 dss_sdi_init(sdi.datapairs);
Tomi Valkeinen42c9dee2011-03-02 12:29:27 +0200191 r = dss_sdi_enable();
192 if (r)
Tomi Valkeinen4fbafaf2011-05-27 10:52:19 +0300193 goto err_sdi_enable;
Tomi Valkeinen42c9dee2011-03-02 12:29:27 +0200194 mdelay(2);
Tomi Valkeinen23c0a7a2009-08-05 16:18:44 +0300195
Archit Taneja7d6069e2012-09-04 11:49:30 +0530196 r = dss_mgr_enable(out->manager);
Tomi Valkeinen33ca2372011-11-21 13:42:58 +0200197 if (r)
198 goto err_mgr_enable;
Tomi Valkeinen23c0a7a2009-08-05 16:18:44 +0300199
Tomi Valkeinen23c0a7a2009-08-05 16:18:44 +0300200 return 0;
Tomi Valkeinen4fbafaf2011-05-27 10:52:19 +0300201
Tomi Valkeinen33ca2372011-11-21 13:42:58 +0200202err_mgr_enable:
203 dss_sdi_disable();
Tomi Valkeinen4fbafaf2011-05-27 10:52:19 +0300204err_sdi_enable:
Tomi Valkeinen4fbafaf2011-05-27 10:52:19 +0300205err_set_dss_clock_div:
206err_calc_clock_div:
207 dispc_runtime_put();
208err_get_dispc:
Roger Quadros508886c2010-03-17 13:35:21 +0100209 regulator_disable(sdi.vdds_sdi_reg);
Tomi Valkeinen4fbafaf2011-05-27 10:52:19 +0300210err_reg_enable:
Tomi Valkeinen23c0a7a2009-08-05 16:18:44 +0300211 return r;
212}
213
Tomi Valkeinencd6e9152013-05-22 13:14:37 +0300214static void sdi_display_disable(struct omap_dss_device *dssdev)
Tomi Valkeinen23c0a7a2009-08-05 16:18:44 +0300215{
Tomi Valkeinen7ae9a712013-05-10 15:27:07 +0300216 struct omap_overlay_manager *mgr = sdi.output.manager;
Archit Taneja7d6069e2012-09-04 11:49:30 +0530217
218 dss_mgr_disable(mgr);
Tomi Valkeinen23c0a7a2009-08-05 16:18:44 +0300219
220 dss_sdi_disable();
221
Tomi Valkeinen4fbafaf2011-05-27 10:52:19 +0300222 dispc_runtime_put();
Tomi Valkeinen23c0a7a2009-08-05 16:18:44 +0300223
Roger Quadros508886c2010-03-17 13:35:21 +0100224 regulator_disable(sdi.vdds_sdi_reg);
Tomi Valkeinen23c0a7a2009-08-05 16:18:44 +0300225}
Tomi Valkeinen23c0a7a2009-08-05 16:18:44 +0300226
Tomi Valkeinencd6e9152013-05-22 13:14:37 +0300227static void sdi_set_timings(struct omap_dss_device *dssdev,
Archit Tanejac7833f72012-07-05 17:11:12 +0530228 struct omap_video_timings *timings)
229{
Archit Taneja9b4a5712012-08-08 16:56:06 +0530230 sdi.timings = *timings;
Archit Tanejac7833f72012-07-05 17:11:12 +0530231}
Archit Tanejac7833f72012-07-05 17:11:12 +0530232
Tomi Valkeinenb1082df2013-05-24 13:19:14 +0300233static void sdi_get_timings(struct omap_dss_device *dssdev,
234 struct omap_video_timings *timings)
235{
236 *timings = sdi.timings;
237}
238
239static int sdi_check_timings(struct omap_dss_device *dssdev,
240 struct omap_video_timings *timings)
241{
242 struct omap_overlay_manager *mgr = sdi.output.manager;
243
244 if (mgr && !dispc_mgr_timings_ok(mgr->id, timings))
245 return -EINVAL;
246
247 if (timings->pixel_clock == 0)
248 return -EINVAL;
249
250 return 0;
251}
252
Tomi Valkeinencd6e9152013-05-22 13:14:37 +0300253static void sdi_set_datapairs(struct omap_dss_device *dssdev, int datapairs)
Archit Taneja889b4fd2012-07-20 17:18:49 +0530254{
255 sdi.datapairs = datapairs;
256}
Archit Taneja889b4fd2012-07-20 17:18:49 +0530257
Tomi Valkeinend37801b2013-05-17 11:00:15 +0300258static int sdi_init_regulator(void)
Tomi Valkeinen23c0a7a2009-08-05 16:18:44 +0300259{
Tomi Valkeinend37801b2013-05-17 11:00:15 +0300260 struct regulator *vdds_sdi;
Tomi Valkeinen23c0a7a2009-08-05 16:18:44 +0300261
Tomi Valkeinend37801b2013-05-17 11:00:15 +0300262 if (sdi.vdds_sdi_reg)
263 return 0;
Tomi Valkeinen5f42f2c2011-02-22 15:53:46 +0200264
Tomi Valkeinen349c3d92013-08-29 10:06:43 +0300265 vdds_sdi = devm_regulator_get(&sdi.pdev->dev, "vdds_sdi");
Tomi Valkeinend37801b2013-05-17 11:00:15 +0300266 if (IS_ERR(vdds_sdi)) {
Tomi Valkeinen40359a92013-12-19 16:15:34 +0200267 if (PTR_ERR(vdds_sdi) != -EPROBE_DEFER)
268 DSSERR("can't get VDDS_SDI regulator\n");
Tomi Valkeinen349c3d92013-08-29 10:06:43 +0300269 return PTR_ERR(vdds_sdi);
Tomi Valkeinen5f42f2c2011-02-22 15:53:46 +0200270 }
271
Tomi Valkeinend37801b2013-05-17 11:00:15 +0300272 sdi.vdds_sdi_reg = vdds_sdi;
273
Tomi Valkeinen23c0a7a2009-08-05 16:18:44 +0300274 return 0;
275}
276
Tomi Valkeinenb1082df2013-05-24 13:19:14 +0300277static int sdi_connect(struct omap_dss_device *dssdev,
278 struct omap_dss_device *dst)
279{
280 struct omap_overlay_manager *mgr;
281 int r;
282
283 r = sdi_init_regulator();
284 if (r)
285 return r;
286
287 mgr = omap_dss_get_overlay_manager(dssdev->dispc_channel);
288 if (!mgr)
289 return -ENODEV;
290
291 r = dss_mgr_connect(mgr, dssdev);
292 if (r)
293 return r;
294
295 r = omapdss_output_set_device(dssdev, dst);
296 if (r) {
297 DSSERR("failed to connect output to new device: %s\n",
298 dst->name);
299 dss_mgr_disconnect(mgr, dssdev);
300 return r;
301 }
302
303 return 0;
304}
305
306static void sdi_disconnect(struct omap_dss_device *dssdev,
307 struct omap_dss_device *dst)
308{
Tomi Valkeinen9560dc102013-07-24 13:06:54 +0300309 WARN_ON(dst != dssdev->dst);
Tomi Valkeinenb1082df2013-05-24 13:19:14 +0300310
Tomi Valkeinen9560dc102013-07-24 13:06:54 +0300311 if (dst != dssdev->dst)
Tomi Valkeinenb1082df2013-05-24 13:19:14 +0300312 return;
313
314 omapdss_output_unset_device(dssdev);
315
316 if (dssdev->manager)
317 dss_mgr_disconnect(dssdev->manager, dssdev);
318}
319
320static const struct omapdss_sdi_ops sdi_ops = {
321 .connect = sdi_connect,
322 .disconnect = sdi_disconnect,
323
Tomi Valkeinencd6e9152013-05-22 13:14:37 +0300324 .enable = sdi_display_enable,
325 .disable = sdi_display_disable,
Tomi Valkeinenb1082df2013-05-24 13:19:14 +0300326
327 .check_timings = sdi_check_timings,
Tomi Valkeinencd6e9152013-05-22 13:14:37 +0300328 .set_timings = sdi_set_timings,
Tomi Valkeinenb1082df2013-05-24 13:19:14 +0300329 .get_timings = sdi_get_timings,
330
Tomi Valkeinencd6e9152013-05-22 13:14:37 +0300331 .set_datapairs = sdi_set_datapairs,
Tomi Valkeinenb1082df2013-05-24 13:19:14 +0300332};
333
Tomi Valkeinend23b3352013-05-02 11:56:35 +0300334static void sdi_init_output(struct platform_device *pdev)
Archit Taneja81b87f52012-09-26 16:30:49 +0530335{
Tomi Valkeinen1f68d9c2013-04-19 15:09:34 +0300336 struct omap_dss_device *out = &sdi.output;
Archit Taneja81b87f52012-09-26 16:30:49 +0530337
Tomi Valkeinen1f68d9c2013-04-19 15:09:34 +0300338 out->dev = &pdev->dev;
Archit Taneja81b87f52012-09-26 16:30:49 +0530339 out->id = OMAP_DSS_OUTPUT_SDI;
Tomi Valkeinen1f68d9c2013-04-19 15:09:34 +0300340 out->output_type = OMAP_DISPLAY_TYPE_SDI;
Tomi Valkeinen7286a082013-02-18 13:06:01 +0200341 out->name = "sdi.0";
Tomi Valkeinen2eea5ae2013-02-13 11:23:54 +0200342 out->dispc_channel = OMAP_DSS_CHANNEL_LCD;
Tomi Valkeinenb1082df2013-05-24 13:19:14 +0300343 out->ops.sdi = &sdi_ops;
Tomi Valkeinenb7328e12013-05-03 11:42:18 +0300344 out->owner = THIS_MODULE;
Archit Taneja81b87f52012-09-26 16:30:49 +0530345
Tomi Valkeinen5d47dbc2013-04-24 13:32:51 +0300346 omapdss_register_output(out);
Archit Taneja81b87f52012-09-26 16:30:49 +0530347}
348
349static void __exit sdi_uninit_output(struct platform_device *pdev)
350{
Tomi Valkeinen1f68d9c2013-04-19 15:09:34 +0300351 struct omap_dss_device *out = &sdi.output;
Archit Taneja81b87f52012-09-26 16:30:49 +0530352
Tomi Valkeinen5d47dbc2013-04-24 13:32:51 +0300353 omapdss_unregister_output(out);
Archit Taneja81b87f52012-09-26 16:30:49 +0530354}
355
Tomi Valkeinend23b3352013-05-02 11:56:35 +0300356static int omap_sdi_probe(struct platform_device *pdev)
Tomi Valkeinen38f3daf2012-05-02 14:55:12 +0300357{
Tomi Valkeinen46c4b642013-03-19 13:46:40 +0200358 sdi.pdev = pdev;
359
Archit Taneja81b87f52012-09-26 16:30:49 +0530360 sdi_init_output(pdev);
361
Tomi Valkeinen23c0a7a2009-08-05 16:18:44 +0300362 return 0;
363}
364
Tomi Valkeinen6e7e8f02012-02-17 17:41:13 +0200365static int __exit omap_sdi_remove(struct platform_device *pdev)
Tomi Valkeinen23c0a7a2009-08-05 16:18:44 +0300366{
Archit Taneja81b87f52012-09-26 16:30:49 +0530367 sdi_uninit_output(pdev);
368
Tomi Valkeinena57dd4f2012-02-20 16:57:37 +0200369 return 0;
370}
371
372static struct platform_driver omap_sdi_driver = {
Tomi Valkeinend23b3352013-05-02 11:56:35 +0300373 .probe = omap_sdi_probe,
Tomi Valkeinen6e7e8f02012-02-17 17:41:13 +0200374 .remove = __exit_p(omap_sdi_remove),
Tomi Valkeinena57dd4f2012-02-20 16:57:37 +0200375 .driver = {
376 .name = "omapdss_sdi",
377 .owner = THIS_MODULE,
378 },
379};
380
Tomi Valkeinen6e7e8f02012-02-17 17:41:13 +0200381int __init sdi_init_platform_driver(void)
Tomi Valkeinena57dd4f2012-02-20 16:57:37 +0200382{
Tomi Valkeinend23b3352013-05-02 11:56:35 +0300383 return platform_driver_register(&omap_sdi_driver);
Tomi Valkeinena57dd4f2012-02-20 16:57:37 +0200384}
385
Tomi Valkeinen6e7e8f02012-02-17 17:41:13 +0200386void __exit sdi_uninit_platform_driver(void)
Tomi Valkeinena57dd4f2012-02-20 16:57:37 +0200387{
388 platform_driver_unregister(&omap_sdi_driver);
Tomi Valkeinen23c0a7a2009-08-05 16:18:44 +0300389}