Sascha Hauer | 295c08b | 2009-08-19 01:43:50 +0200 | [diff] [blame] | 1 | /* |
| 2 | * Regulator Driver for Freescale MC13783 PMIC |
| 3 | * |
Yong Shen | 167e3d8 | 2010-12-14 14:00:54 +0800 | [diff] [blame] | 4 | * Copyright 2010 Yong Shen <yong.shen@linaro.org> |
Sascha Hauer | 295c08b | 2009-08-19 01:43:50 +0200 | [diff] [blame] | 5 | * Copyright (C) 2008 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de> |
Alberto Panizzo | 1bd588f | 2009-12-14 18:26:38 +0100 | [diff] [blame] | 6 | * Copyright 2009 Alberto Panizzo <maramaopercheseimorto@gmail.com> |
Sascha Hauer | 295c08b | 2009-08-19 01:43:50 +0200 | [diff] [blame] | 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License version 2 as |
| 10 | * published by the Free Software Foundation. |
| 11 | */ |
| 12 | |
Uwe Kleine-König | a10099b | 2009-11-10 09:18:07 +0100 | [diff] [blame] | 13 | #include <linux/mfd/mc13783.h> |
Sascha Hauer | 295c08b | 2009-08-19 01:43:50 +0200 | [diff] [blame] | 14 | #include <linux/regulator/machine.h> |
| 15 | #include <linux/regulator/driver.h> |
| 16 | #include <linux/platform_device.h> |
Sascha Hauer | 295c08b | 2009-08-19 01:43:50 +0200 | [diff] [blame] | 17 | #include <linux/kernel.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 18 | #include <linux/slab.h> |
Sascha Hauer | 295c08b | 2009-08-19 01:43:50 +0200 | [diff] [blame] | 19 | #include <linux/init.h> |
| 20 | #include <linux/err.h> |
Paul Gortmaker | 65602c3 | 2011-07-17 16:28:23 -0400 | [diff] [blame] | 21 | #include <linux/module.h> |
Yong Shen | 167e3d8 | 2010-12-14 14:00:54 +0800 | [diff] [blame] | 22 | #include "mc13xxx.h" |
Sascha Hauer | 295c08b | 2009-08-19 01:43:50 +0200 | [diff] [blame] | 23 | |
Uwe Kleine-König | a10099b | 2009-11-10 09:18:07 +0100 | [diff] [blame] | 24 | #define MC13783_REG_SWITCHERS5 29 |
| 25 | #define MC13783_REG_SWITCHERS5_SW3EN (1 << 20) |
Alberto Panizzo | 1bd588f | 2009-12-14 18:26:38 +0100 | [diff] [blame] | 26 | #define MC13783_REG_SWITCHERS5_SW3VSEL 18 |
| 27 | #define MC13783_REG_SWITCHERS5_SW3VSEL_M (3 << 18) |
| 28 | |
| 29 | #define MC13783_REG_REGULATORSETTING0 30 |
| 30 | #define MC13783_REG_REGULATORSETTING0_VIOLOVSEL 2 |
| 31 | #define MC13783_REG_REGULATORSETTING0_VDIGVSEL 4 |
| 32 | #define MC13783_REG_REGULATORSETTING0_VGENVSEL 6 |
| 33 | #define MC13783_REG_REGULATORSETTING0_VRFDIGVSEL 9 |
| 34 | #define MC13783_REG_REGULATORSETTING0_VRFREFVSEL 11 |
| 35 | #define MC13783_REG_REGULATORSETTING0_VRFCPVSEL 13 |
| 36 | #define MC13783_REG_REGULATORSETTING0_VSIMVSEL 14 |
| 37 | #define MC13783_REG_REGULATORSETTING0_VESIMVSEL 15 |
| 38 | #define MC13783_REG_REGULATORSETTING0_VCAMVSEL 16 |
| 39 | |
| 40 | #define MC13783_REG_REGULATORSETTING0_VIOLOVSEL_M (3 << 2) |
| 41 | #define MC13783_REG_REGULATORSETTING0_VDIGVSEL_M (3 << 4) |
| 42 | #define MC13783_REG_REGULATORSETTING0_VGENVSEL_M (7 << 6) |
| 43 | #define MC13783_REG_REGULATORSETTING0_VRFDIGVSEL_M (3 << 9) |
| 44 | #define MC13783_REG_REGULATORSETTING0_VRFREFVSEL_M (3 << 11) |
| 45 | #define MC13783_REG_REGULATORSETTING0_VRFCPVSEL_M (1 << 13) |
| 46 | #define MC13783_REG_REGULATORSETTING0_VSIMVSEL_M (1 << 14) |
| 47 | #define MC13783_REG_REGULATORSETTING0_VESIMVSEL_M (1 << 15) |
| 48 | #define MC13783_REG_REGULATORSETTING0_VCAMVSEL_M (7 << 16) |
| 49 | |
| 50 | #define MC13783_REG_REGULATORSETTING1 31 |
| 51 | #define MC13783_REG_REGULATORSETTING1_VVIBVSEL 0 |
| 52 | #define MC13783_REG_REGULATORSETTING1_VRF1VSEL 2 |
| 53 | #define MC13783_REG_REGULATORSETTING1_VRF2VSEL 4 |
| 54 | #define MC13783_REG_REGULATORSETTING1_VMMC1VSEL 6 |
| 55 | #define MC13783_REG_REGULATORSETTING1_VMMC2VSEL 9 |
| 56 | |
| 57 | #define MC13783_REG_REGULATORSETTING1_VVIBVSEL_M (3 << 0) |
| 58 | #define MC13783_REG_REGULATORSETTING1_VRF1VSEL_M (3 << 2) |
| 59 | #define MC13783_REG_REGULATORSETTING1_VRF2VSEL_M (3 << 4) |
| 60 | #define MC13783_REG_REGULATORSETTING1_VMMC1VSEL_M (7 << 6) |
| 61 | #define MC13783_REG_REGULATORSETTING1_VMMC2VSEL_M (7 << 9) |
Uwe Kleine-König | a10099b | 2009-11-10 09:18:07 +0100 | [diff] [blame] | 62 | |
| 63 | #define MC13783_REG_REGULATORMODE0 32 |
| 64 | #define MC13783_REG_REGULATORMODE0_VAUDIOEN (1 << 0) |
| 65 | #define MC13783_REG_REGULATORMODE0_VIOHIEN (1 << 3) |
| 66 | #define MC13783_REG_REGULATORMODE0_VIOLOEN (1 << 6) |
| 67 | #define MC13783_REG_REGULATORMODE0_VDIGEN (1 << 9) |
| 68 | #define MC13783_REG_REGULATORMODE0_VGENEN (1 << 12) |
| 69 | #define MC13783_REG_REGULATORMODE0_VRFDIGEN (1 << 15) |
| 70 | #define MC13783_REG_REGULATORMODE0_VRFREFEN (1 << 18) |
| 71 | #define MC13783_REG_REGULATORMODE0_VRFCPEN (1 << 21) |
| 72 | |
| 73 | #define MC13783_REG_REGULATORMODE1 33 |
| 74 | #define MC13783_REG_REGULATORMODE1_VSIMEN (1 << 0) |
| 75 | #define MC13783_REG_REGULATORMODE1_VESIMEN (1 << 3) |
| 76 | #define MC13783_REG_REGULATORMODE1_VCAMEN (1 << 6) |
| 77 | #define MC13783_REG_REGULATORMODE1_VRFBGEN (1 << 9) |
| 78 | #define MC13783_REG_REGULATORMODE1_VVIBEN (1 << 11) |
| 79 | #define MC13783_REG_REGULATORMODE1_VRF1EN (1 << 12) |
| 80 | #define MC13783_REG_REGULATORMODE1_VRF2EN (1 << 15) |
| 81 | #define MC13783_REG_REGULATORMODE1_VMMC1EN (1 << 18) |
| 82 | #define MC13783_REG_REGULATORMODE1_VMMC2EN (1 << 21) |
| 83 | |
| 84 | #define MC13783_REG_POWERMISC 34 |
| 85 | #define MC13783_REG_POWERMISC_GPO1EN (1 << 6) |
| 86 | #define MC13783_REG_POWERMISC_GPO2EN (1 << 8) |
| 87 | #define MC13783_REG_POWERMISC_GPO3EN (1 << 10) |
| 88 | #define MC13783_REG_POWERMISC_GPO4EN (1 << 12) |
Alberto Panizzo | f4b97b3 | 2010-01-19 12:48:54 +0100 | [diff] [blame] | 89 | #define MC13783_REG_POWERMISC_PWGT1SPIEN (1 << 15) |
| 90 | #define MC13783_REG_POWERMISC_PWGT2SPIEN (1 << 16) |
| 91 | |
| 92 | #define MC13783_REG_POWERMISC_PWGTSPI_M (3 << 15) |
| 93 | |
Uwe Kleine-König | a10099b | 2009-11-10 09:18:07 +0100 | [diff] [blame] | 94 | |
Alberto Panizzo | 1bd588f | 2009-12-14 18:26:38 +0100 | [diff] [blame] | 95 | /* Voltage Values */ |
Mark Brown | 6220b87 | 2010-11-29 15:57:48 +0000 | [diff] [blame] | 96 | static const int mc13783_sw3_val[] = { |
Alberto Panizzo | 1bd588f | 2009-12-14 18:26:38 +0100 | [diff] [blame] | 97 | 5000000, 5000000, 5000000, 5500000, |
| 98 | }; |
| 99 | |
Mark Brown | 6220b87 | 2010-11-29 15:57:48 +0000 | [diff] [blame] | 100 | static const int mc13783_vaudio_val[] = { |
Alberto Panizzo | 1bd588f | 2009-12-14 18:26:38 +0100 | [diff] [blame] | 101 | 2775000, |
| 102 | }; |
| 103 | |
Mark Brown | 6220b87 | 2010-11-29 15:57:48 +0000 | [diff] [blame] | 104 | static const int mc13783_viohi_val[] = { |
Alberto Panizzo | 1bd588f | 2009-12-14 18:26:38 +0100 | [diff] [blame] | 105 | 2775000, |
| 106 | }; |
| 107 | |
Mark Brown | 6220b87 | 2010-11-29 15:57:48 +0000 | [diff] [blame] | 108 | static const int mc13783_violo_val[] = { |
Alberto Panizzo | 1bd588f | 2009-12-14 18:26:38 +0100 | [diff] [blame] | 109 | 1200000, 1300000, 1500000, 1800000, |
| 110 | }; |
| 111 | |
Mark Brown | 6220b87 | 2010-11-29 15:57:48 +0000 | [diff] [blame] | 112 | static const int mc13783_vdig_val[] = { |
Alberto Panizzo | 1bd588f | 2009-12-14 18:26:38 +0100 | [diff] [blame] | 113 | 1200000, 1300000, 1500000, 1800000, |
| 114 | }; |
| 115 | |
Mark Brown | 6220b87 | 2010-11-29 15:57:48 +0000 | [diff] [blame] | 116 | static const int mc13783_vgen_val[] = { |
Alberto Panizzo | 1bd588f | 2009-12-14 18:26:38 +0100 | [diff] [blame] | 117 | 1200000, 1300000, 1500000, 1800000, |
| 118 | 1100000, 2000000, 2775000, 2400000, |
| 119 | }; |
| 120 | |
Mark Brown | 6220b87 | 2010-11-29 15:57:48 +0000 | [diff] [blame] | 121 | static const int mc13783_vrfdig_val[] = { |
Alberto Panizzo | 1bd588f | 2009-12-14 18:26:38 +0100 | [diff] [blame] | 122 | 1200000, 1500000, 1800000, 1875000, |
| 123 | }; |
| 124 | |
Mark Brown | 6220b87 | 2010-11-29 15:57:48 +0000 | [diff] [blame] | 125 | static const int mc13783_vrfref_val[] = { |
Alberto Panizzo | 1bd588f | 2009-12-14 18:26:38 +0100 | [diff] [blame] | 126 | 2475000, 2600000, 2700000, 2775000, |
| 127 | }; |
| 128 | |
Mark Brown | 6220b87 | 2010-11-29 15:57:48 +0000 | [diff] [blame] | 129 | static const int mc13783_vrfcp_val[] = { |
Alberto Panizzo | 1bd588f | 2009-12-14 18:26:38 +0100 | [diff] [blame] | 130 | 2700000, 2775000, |
| 131 | }; |
| 132 | |
Mark Brown | 6220b87 | 2010-11-29 15:57:48 +0000 | [diff] [blame] | 133 | static const int mc13783_vsim_val[] = { |
Alberto Panizzo | 1bd588f | 2009-12-14 18:26:38 +0100 | [diff] [blame] | 134 | 1800000, 2900000, 3000000, |
| 135 | }; |
| 136 | |
Mark Brown | 6220b87 | 2010-11-29 15:57:48 +0000 | [diff] [blame] | 137 | static const int mc13783_vesim_val[] = { |
Alberto Panizzo | 1bd588f | 2009-12-14 18:26:38 +0100 | [diff] [blame] | 138 | 1800000, 2900000, |
| 139 | }; |
| 140 | |
Mark Brown | 6220b87 | 2010-11-29 15:57:48 +0000 | [diff] [blame] | 141 | static const int mc13783_vcam_val[] = { |
Alberto Panizzo | 1bd588f | 2009-12-14 18:26:38 +0100 | [diff] [blame] | 142 | 1500000, 1800000, 2500000, 2550000, |
| 143 | 2600000, 2750000, 2800000, 3000000, |
| 144 | }; |
| 145 | |
Mark Brown | 6220b87 | 2010-11-29 15:57:48 +0000 | [diff] [blame] | 146 | static const int mc13783_vrfbg_val[] = { |
Alberto Panizzo | 1bd588f | 2009-12-14 18:26:38 +0100 | [diff] [blame] | 147 | 1250000, |
| 148 | }; |
| 149 | |
Mark Brown | 6220b87 | 2010-11-29 15:57:48 +0000 | [diff] [blame] | 150 | static const int mc13783_vvib_val[] = { |
Alberto Panizzo | 1bd588f | 2009-12-14 18:26:38 +0100 | [diff] [blame] | 151 | 1300000, 1800000, 2000000, 3000000, |
| 152 | }; |
| 153 | |
Mark Brown | 6220b87 | 2010-11-29 15:57:48 +0000 | [diff] [blame] | 154 | static const int mc13783_vmmc_val[] = { |
Alberto Panizzo | 1bd588f | 2009-12-14 18:26:38 +0100 | [diff] [blame] | 155 | 1600000, 1800000, 2000000, 2600000, |
| 156 | 2700000, 2800000, 2900000, 3000000, |
| 157 | }; |
| 158 | |
Mark Brown | 6220b87 | 2010-11-29 15:57:48 +0000 | [diff] [blame] | 159 | static const int mc13783_vrf_val[] = { |
Alberto Panizzo | 1bd588f | 2009-12-14 18:26:38 +0100 | [diff] [blame] | 160 | 1500000, 1875000, 2700000, 2775000, |
Sascha Hauer | 295c08b | 2009-08-19 01:43:50 +0200 | [diff] [blame] | 161 | }; |
| 162 | |
Mark Brown | 6220b87 | 2010-11-29 15:57:48 +0000 | [diff] [blame] | 163 | static const int mc13783_gpo_val[] = { |
Alberto Panizzo | f4b97b3 | 2010-01-19 12:48:54 +0100 | [diff] [blame] | 164 | 3100000, |
| 165 | }; |
| 166 | |
Mark Brown | 6220b87 | 2010-11-29 15:57:48 +0000 | [diff] [blame] | 167 | static const int mc13783_pwgtdrv_val[] = { |
Alberto Panizzo | f4b97b3 | 2010-01-19 12:48:54 +0100 | [diff] [blame] | 168 | 5500000, |
| 169 | }; |
| 170 | |
Alberto Panizzo | f4b97b3 | 2010-01-19 12:48:54 +0100 | [diff] [blame] | 171 | static struct regulator_ops mc13783_gpo_regulator_ops; |
Sascha Hauer | 295c08b | 2009-08-19 01:43:50 +0200 | [diff] [blame] | 172 | |
Yong Shen | 167e3d8 | 2010-12-14 14:00:54 +0800 | [diff] [blame] | 173 | #define MC13783_DEFINE(prefix, name, reg, vsel_reg, voltages) \ |
| 174 | MC13xxx_DEFINE(MC13783_REG_, name, reg, vsel_reg, voltages, \ |
| 175 | mc13xxx_regulator_ops) |
Alberto Panizzo | 1bd588f | 2009-12-14 18:26:38 +0100 | [diff] [blame] | 176 | |
Yong Shen | 167e3d8 | 2010-12-14 14:00:54 +0800 | [diff] [blame] | 177 | #define MC13783_FIXED_DEFINE(prefix, name, reg, voltages) \ |
| 178 | MC13xxx_FIXED_DEFINE(MC13783_REG_, name, reg, voltages, \ |
| 179 | mc13xxx_fixed_regulator_ops) |
Alberto Panizzo | 1bd588f | 2009-12-14 18:26:38 +0100 | [diff] [blame] | 180 | |
Yong Shen | 167e3d8 | 2010-12-14 14:00:54 +0800 | [diff] [blame] | 181 | #define MC13783_GPO_DEFINE(prefix, name, reg, voltages) \ |
| 182 | MC13xxx_GPO_DEFINE(MC13783_REG_, name, reg, voltages, \ |
| 183 | mc13783_gpo_regulator_ops) |
Uwe Kleine-König | a10099b | 2009-11-10 09:18:07 +0100 | [diff] [blame] | 184 | |
Alberto Panizzo | 1bd588f | 2009-12-14 18:26:38 +0100 | [diff] [blame] | 185 | #define MC13783_DEFINE_SW(_name, _reg, _vsel_reg, _voltages) \ |
Yong Shen | 57c78e3 | 2010-12-14 14:00:53 +0800 | [diff] [blame] | 186 | MC13783_DEFINE(REG, _name, _reg, _vsel_reg, _voltages) |
Alberto Panizzo | 1bd588f | 2009-12-14 18:26:38 +0100 | [diff] [blame] | 187 | #define MC13783_DEFINE_REGU(_name, _reg, _vsel_reg, _voltages) \ |
Yong Shen | 57c78e3 | 2010-12-14 14:00:53 +0800 | [diff] [blame] | 188 | MC13783_DEFINE(REG, _name, _reg, _vsel_reg, _voltages) |
Uwe Kleine-König | a10099b | 2009-11-10 09:18:07 +0100 | [diff] [blame] | 189 | |
Yong Shen | 167e3d8 | 2010-12-14 14:00:54 +0800 | [diff] [blame] | 190 | static struct mc13xxx_regulator mc13783_regulators[] = { |
Alberto Panizzo | 1bd588f | 2009-12-14 18:26:38 +0100 | [diff] [blame] | 191 | MC13783_DEFINE_SW(SW3, SWITCHERS5, SWITCHERS5, mc13783_sw3_val), |
Uwe Kleine-König | a10099b | 2009-11-10 09:18:07 +0100 | [diff] [blame] | 192 | |
Yong Shen | 57c78e3 | 2010-12-14 14:00:53 +0800 | [diff] [blame] | 193 | MC13783_FIXED_DEFINE(REG, VAUDIO, REGULATORMODE0, mc13783_vaudio_val), |
| 194 | MC13783_FIXED_DEFINE(REG, VIOHI, REGULATORMODE0, mc13783_viohi_val), |
Alberto Panizzo | 1bd588f | 2009-12-14 18:26:38 +0100 | [diff] [blame] | 195 | MC13783_DEFINE_REGU(VIOLO, REGULATORMODE0, REGULATORSETTING0, \ |
| 196 | mc13783_violo_val), |
| 197 | MC13783_DEFINE_REGU(VDIG, REGULATORMODE0, REGULATORSETTING0, \ |
| 198 | mc13783_vdig_val), |
| 199 | MC13783_DEFINE_REGU(VGEN, REGULATORMODE0, REGULATORSETTING0, \ |
| 200 | mc13783_vgen_val), |
| 201 | MC13783_DEFINE_REGU(VRFDIG, REGULATORMODE0, REGULATORSETTING0, \ |
| 202 | mc13783_vrfdig_val), |
| 203 | MC13783_DEFINE_REGU(VRFREF, REGULATORMODE0, REGULATORSETTING0, \ |
| 204 | mc13783_vrfref_val), |
| 205 | MC13783_DEFINE_REGU(VRFCP, REGULATORMODE0, REGULATORSETTING0, \ |
| 206 | mc13783_vrfcp_val), |
| 207 | MC13783_DEFINE_REGU(VSIM, REGULATORMODE1, REGULATORSETTING0, \ |
| 208 | mc13783_vsim_val), |
| 209 | MC13783_DEFINE_REGU(VESIM, REGULATORMODE1, REGULATORSETTING0, \ |
| 210 | mc13783_vesim_val), |
| 211 | MC13783_DEFINE_REGU(VCAM, REGULATORMODE1, REGULATORSETTING0, \ |
| 212 | mc13783_vcam_val), |
Yong Shen | 57c78e3 | 2010-12-14 14:00:53 +0800 | [diff] [blame] | 213 | MC13783_FIXED_DEFINE(REG, VRFBG, REGULATORMODE1, mc13783_vrfbg_val), |
Alberto Panizzo | 1bd588f | 2009-12-14 18:26:38 +0100 | [diff] [blame] | 214 | MC13783_DEFINE_REGU(VVIB, REGULATORMODE1, REGULATORSETTING1, \ |
| 215 | mc13783_vvib_val), |
| 216 | MC13783_DEFINE_REGU(VRF1, REGULATORMODE1, REGULATORSETTING1, \ |
| 217 | mc13783_vrf_val), |
| 218 | MC13783_DEFINE_REGU(VRF2, REGULATORMODE1, REGULATORSETTING1, \ |
| 219 | mc13783_vrf_val), |
| 220 | MC13783_DEFINE_REGU(VMMC1, REGULATORMODE1, REGULATORSETTING1, \ |
| 221 | mc13783_vmmc_val), |
| 222 | MC13783_DEFINE_REGU(VMMC2, REGULATORMODE1, REGULATORSETTING1, \ |
| 223 | mc13783_vmmc_val), |
Yong Shen | 57c78e3 | 2010-12-14 14:00:53 +0800 | [diff] [blame] | 224 | MC13783_GPO_DEFINE(REG, GPO1, POWERMISC, mc13783_gpo_val), |
| 225 | MC13783_GPO_DEFINE(REG, GPO2, POWERMISC, mc13783_gpo_val), |
| 226 | MC13783_GPO_DEFINE(REG, GPO3, POWERMISC, mc13783_gpo_val), |
| 227 | MC13783_GPO_DEFINE(REG, GPO4, POWERMISC, mc13783_gpo_val), |
| 228 | MC13783_GPO_DEFINE(REG, PWGT1SPI, POWERMISC, mc13783_pwgtdrv_val), |
| 229 | MC13783_GPO_DEFINE(REG, PWGT2SPI, POWERMISC, mc13783_pwgtdrv_val), |
Sascha Hauer | 295c08b | 2009-08-19 01:43:50 +0200 | [diff] [blame] | 230 | }; |
| 231 | |
Yong Shen | 167e3d8 | 2010-12-14 14:00:54 +0800 | [diff] [blame] | 232 | static int mc13783_powermisc_rmw(struct mc13xxx_regulator_priv *priv, u32 mask, |
| 233 | u32 val) |
Sascha Hauer | 295c08b | 2009-08-19 01:43:50 +0200 | [diff] [blame] | 234 | { |
Yong Shen | 167e3d8 | 2010-12-14 14:00:54 +0800 | [diff] [blame] | 235 | struct mc13xxx *mc13783 = priv->mc13xxx; |
Alberto Panizzo | f4b97b3 | 2010-01-19 12:48:54 +0100 | [diff] [blame] | 236 | int ret; |
| 237 | u32 valread; |
| 238 | |
| 239 | BUG_ON(val & ~mask); |
| 240 | |
Yong Shen | 167e3d8 | 2010-12-14 14:00:54 +0800 | [diff] [blame] | 241 | ret = mc13xxx_reg_read(mc13783, MC13783_REG_POWERMISC, &valread); |
Alberto Panizzo | f4b97b3 | 2010-01-19 12:48:54 +0100 | [diff] [blame] | 242 | if (ret) |
| 243 | return ret; |
| 244 | |
| 245 | /* Update the stored state for Power Gates. */ |
| 246 | priv->powermisc_pwgt_state = |
| 247 | (priv->powermisc_pwgt_state & ~mask) | val; |
| 248 | priv->powermisc_pwgt_state &= MC13783_REG_POWERMISC_PWGTSPI_M; |
| 249 | |
| 250 | /* Construct the new register value */ |
| 251 | valread = (valread & ~mask) | val; |
| 252 | /* Overwrite the PWGTxEN with the stored version */ |
| 253 | valread = (valread & ~MC13783_REG_POWERMISC_PWGTSPI_M) | |
| 254 | priv->powermisc_pwgt_state; |
| 255 | |
Yong Shen | 167e3d8 | 2010-12-14 14:00:54 +0800 | [diff] [blame] | 256 | return mc13xxx_reg_write(mc13783, MC13783_REG_POWERMISC, valread); |
Alberto Panizzo | f4b97b3 | 2010-01-19 12:48:54 +0100 | [diff] [blame] | 257 | } |
| 258 | |
| 259 | static int mc13783_gpo_regulator_enable(struct regulator_dev *rdev) |
| 260 | { |
Yong Shen | 167e3d8 | 2010-12-14 14:00:54 +0800 | [diff] [blame] | 261 | struct mc13xxx_regulator_priv *priv = rdev_get_drvdata(rdev); |
| 262 | struct mc13xxx_regulator *mc13xxx_regulators = priv->mc13xxx_regulators; |
Alberto Panizzo | f4b97b3 | 2010-01-19 12:48:54 +0100 | [diff] [blame] | 263 | int id = rdev_get_id(rdev); |
| 264 | int ret; |
Yong Shen | 167e3d8 | 2010-12-14 14:00:54 +0800 | [diff] [blame] | 265 | u32 en_val = mc13xxx_regulators[id].enable_bit; |
Alberto Panizzo | f4b97b3 | 2010-01-19 12:48:54 +0100 | [diff] [blame] | 266 | |
| 267 | dev_dbg(rdev_get_dev(rdev), "%s id: %d\n", __func__, id); |
| 268 | |
| 269 | /* Power Gate enable value is 0 */ |
Yong Shen | 57c78e3 | 2010-12-14 14:00:53 +0800 | [diff] [blame] | 270 | if (id == MC13783_REG_PWGT1SPI || |
| 271 | id == MC13783_REG_PWGT2SPI) |
Alberto Panizzo | f4b97b3 | 2010-01-19 12:48:54 +0100 | [diff] [blame] | 272 | en_val = 0; |
| 273 | |
Yong Shen | 167e3d8 | 2010-12-14 14:00:54 +0800 | [diff] [blame] | 274 | mc13xxx_lock(priv->mc13xxx); |
| 275 | ret = mc13783_powermisc_rmw(priv, mc13xxx_regulators[id].enable_bit, |
Alberto Panizzo | f4b97b3 | 2010-01-19 12:48:54 +0100 | [diff] [blame] | 276 | en_val); |
Yong Shen | 167e3d8 | 2010-12-14 14:00:54 +0800 | [diff] [blame] | 277 | mc13xxx_unlock(priv->mc13xxx); |
Alberto Panizzo | f4b97b3 | 2010-01-19 12:48:54 +0100 | [diff] [blame] | 278 | |
| 279 | return ret; |
| 280 | } |
| 281 | |
| 282 | static int mc13783_gpo_regulator_disable(struct regulator_dev *rdev) |
| 283 | { |
Yong Shen | 167e3d8 | 2010-12-14 14:00:54 +0800 | [diff] [blame] | 284 | struct mc13xxx_regulator_priv *priv = rdev_get_drvdata(rdev); |
| 285 | struct mc13xxx_regulator *mc13xxx_regulators = priv->mc13xxx_regulators; |
Alberto Panizzo | f4b97b3 | 2010-01-19 12:48:54 +0100 | [diff] [blame] | 286 | int id = rdev_get_id(rdev); |
| 287 | int ret; |
| 288 | u32 dis_val = 0; |
| 289 | |
| 290 | dev_dbg(rdev_get_dev(rdev), "%s id: %d\n", __func__, id); |
| 291 | |
| 292 | /* Power Gate disable value is 1 */ |
Yong Shen | 57c78e3 | 2010-12-14 14:00:53 +0800 | [diff] [blame] | 293 | if (id == MC13783_REG_PWGT1SPI || |
| 294 | id == MC13783_REG_PWGT2SPI) |
Yong Shen | 167e3d8 | 2010-12-14 14:00:54 +0800 | [diff] [blame] | 295 | dis_val = mc13xxx_regulators[id].enable_bit; |
Alberto Panizzo | f4b97b3 | 2010-01-19 12:48:54 +0100 | [diff] [blame] | 296 | |
Yong Shen | 167e3d8 | 2010-12-14 14:00:54 +0800 | [diff] [blame] | 297 | mc13xxx_lock(priv->mc13xxx); |
| 298 | ret = mc13783_powermisc_rmw(priv, mc13xxx_regulators[id].enable_bit, |
Alberto Panizzo | f4b97b3 | 2010-01-19 12:48:54 +0100 | [diff] [blame] | 299 | dis_val); |
Yong Shen | 167e3d8 | 2010-12-14 14:00:54 +0800 | [diff] [blame] | 300 | mc13xxx_unlock(priv->mc13xxx); |
Alberto Panizzo | f4b97b3 | 2010-01-19 12:48:54 +0100 | [diff] [blame] | 301 | |
| 302 | return ret; |
| 303 | } |
| 304 | |
| 305 | static int mc13783_gpo_regulator_is_enabled(struct regulator_dev *rdev) |
| 306 | { |
Yong Shen | 167e3d8 | 2010-12-14 14:00:54 +0800 | [diff] [blame] | 307 | struct mc13xxx_regulator_priv *priv = rdev_get_drvdata(rdev); |
| 308 | struct mc13xxx_regulator *mc13xxx_regulators = priv->mc13xxx_regulators; |
Alberto Panizzo | f4b97b3 | 2010-01-19 12:48:54 +0100 | [diff] [blame] | 309 | int ret, id = rdev_get_id(rdev); |
| 310 | unsigned int val; |
| 311 | |
Yong Shen | 167e3d8 | 2010-12-14 14:00:54 +0800 | [diff] [blame] | 312 | mc13xxx_lock(priv->mc13xxx); |
| 313 | ret = mc13xxx_reg_read(priv->mc13xxx, mc13xxx_regulators[id].reg, &val); |
| 314 | mc13xxx_unlock(priv->mc13xxx); |
Alberto Panizzo | f4b97b3 | 2010-01-19 12:48:54 +0100 | [diff] [blame] | 315 | |
| 316 | if (ret) |
| 317 | return ret; |
| 318 | |
| 319 | /* Power Gates state is stored in powermisc_pwgt_state |
| 320 | * where the meaning of bits is negated */ |
| 321 | val = (val & ~MC13783_REG_POWERMISC_PWGTSPI_M) | |
| 322 | (priv->powermisc_pwgt_state ^ MC13783_REG_POWERMISC_PWGTSPI_M); |
| 323 | |
Yong Shen | 167e3d8 | 2010-12-14 14:00:54 +0800 | [diff] [blame] | 324 | return (val & mc13xxx_regulators[id].enable_bit) != 0; |
Alberto Panizzo | f4b97b3 | 2010-01-19 12:48:54 +0100 | [diff] [blame] | 325 | } |
| 326 | |
| 327 | static struct regulator_ops mc13783_gpo_regulator_ops = { |
| 328 | .enable = mc13783_gpo_regulator_enable, |
| 329 | .disable = mc13783_gpo_regulator_disable, |
| 330 | .is_enabled = mc13783_gpo_regulator_is_enabled, |
Yong Shen | 167e3d8 | 2010-12-14 14:00:54 +0800 | [diff] [blame] | 331 | .list_voltage = mc13xxx_regulator_list_voltage, |
| 332 | .set_voltage = mc13xxx_fixed_regulator_set_voltage, |
| 333 | .get_voltage = mc13xxx_fixed_regulator_get_voltage, |
Alberto Panizzo | f4b97b3 | 2010-01-19 12:48:54 +0100 | [diff] [blame] | 334 | }; |
| 335 | |
Sascha Hauer | 295c08b | 2009-08-19 01:43:50 +0200 | [diff] [blame] | 336 | static int __devinit mc13783_regulator_probe(struct platform_device *pdev) |
| 337 | { |
Yong Shen | 167e3d8 | 2010-12-14 14:00:54 +0800 | [diff] [blame] | 338 | struct mc13xxx_regulator_priv *priv; |
| 339 | struct mc13xxx *mc13783 = dev_get_drvdata(pdev->dev.parent); |
Samuel Ortiz | 8f1585a | 2011-09-19 11:33:17 +0200 | [diff] [blame] | 340 | struct mc13xxx_regulator_platform_data *pdata = |
Samuel Ortiz | c8a03c96 | 2011-04-08 01:55:01 +0200 | [diff] [blame] | 341 | dev_get_platdata(&pdev->dev); |
Samuel Ortiz | 8f1585a | 2011-09-19 11:33:17 +0200 | [diff] [blame] | 342 | struct mc13xxx_regulator_init_data *init_data; |
Sascha Hauer | 295c08b | 2009-08-19 01:43:50 +0200 | [diff] [blame] | 343 | int i, ret; |
| 344 | |
Wanlong Gao | c719864 | 2011-04-17 08:53:57 +0800 | [diff] [blame] | 345 | dev_dbg(&pdev->dev, "%s id %d\n", __func__, pdev->id); |
Sascha Hauer | 295c08b | 2009-08-19 01:43:50 +0200 | [diff] [blame] | 346 | |
Uwe Kleine-König | a10099b | 2009-11-10 09:18:07 +0100 | [diff] [blame] | 347 | priv = kzalloc(sizeof(*priv) + |
| 348 | pdata->num_regulators * sizeof(priv->regulators[0]), |
Sascha Hauer | 295c08b | 2009-08-19 01:43:50 +0200 | [diff] [blame] | 349 | GFP_KERNEL); |
| 350 | if (!priv) |
| 351 | return -ENOMEM; |
| 352 | |
Yong Shen | 167e3d8 | 2010-12-14 14:00:54 +0800 | [diff] [blame] | 353 | priv->mc13xxx_regulators = mc13783_regulators; |
| 354 | priv->mc13xxx = mc13783; |
Sascha Hauer | 295c08b | 2009-08-19 01:43:50 +0200 | [diff] [blame] | 355 | |
Uwe Kleine-König | a10099b | 2009-11-10 09:18:07 +0100 | [diff] [blame] | 356 | for (i = 0; i < pdata->num_regulators; i++) { |
| 357 | init_data = &pdata->regulators[i]; |
Sascha Hauer | 295c08b | 2009-08-19 01:43:50 +0200 | [diff] [blame] | 358 | priv->regulators[i] = regulator_register( |
| 359 | &mc13783_regulators[init_data->id].desc, |
| 360 | &pdev->dev, init_data->init_data, priv); |
| 361 | |
| 362 | if (IS_ERR(priv->regulators[i])) { |
| 363 | dev_err(&pdev->dev, "failed to register regulator %s\n", |
| 364 | mc13783_regulators[i].desc.name); |
| 365 | ret = PTR_ERR(priv->regulators[i]); |
| 366 | goto err; |
| 367 | } |
| 368 | } |
| 369 | |
| 370 | platform_set_drvdata(pdev, priv); |
| 371 | |
| 372 | return 0; |
| 373 | err: |
| 374 | while (--i >= 0) |
| 375 | regulator_unregister(priv->regulators[i]); |
| 376 | |
| 377 | kfree(priv); |
| 378 | |
| 379 | return ret; |
| 380 | } |
| 381 | |
| 382 | static int __devexit mc13783_regulator_remove(struct platform_device *pdev) |
| 383 | { |
Yong Shen | 167e3d8 | 2010-12-14 14:00:54 +0800 | [diff] [blame] | 384 | struct mc13xxx_regulator_priv *priv = platform_get_drvdata(pdev); |
Samuel Ortiz | 8f1585a | 2011-09-19 11:33:17 +0200 | [diff] [blame] | 385 | struct mc13xxx_regulator_platform_data *pdata = |
Samuel Ortiz | c8a03c96 | 2011-04-08 01:55:01 +0200 | [diff] [blame] | 386 | dev_get_platdata(&pdev->dev); |
Sascha Hauer | 295c08b | 2009-08-19 01:43:50 +0200 | [diff] [blame] | 387 | int i; |
| 388 | |
Axel Lin | 58d5765 | 2010-04-19 09:58:02 +0800 | [diff] [blame] | 389 | platform_set_drvdata(pdev, NULL); |
| 390 | |
Uwe Kleine-König | a10099b | 2009-11-10 09:18:07 +0100 | [diff] [blame] | 391 | for (i = 0; i < pdata->num_regulators; i++) |
Sascha Hauer | 295c08b | 2009-08-19 01:43:50 +0200 | [diff] [blame] | 392 | regulator_unregister(priv->regulators[i]); |
| 393 | |
Axel Lin | 58d5765 | 2010-04-19 09:58:02 +0800 | [diff] [blame] | 394 | kfree(priv); |
Sascha Hauer | 295c08b | 2009-08-19 01:43:50 +0200 | [diff] [blame] | 395 | return 0; |
| 396 | } |
| 397 | |
| 398 | static struct platform_driver mc13783_regulator_driver = { |
| 399 | .driver = { |
| 400 | .name = "mc13783-regulator", |
| 401 | .owner = THIS_MODULE, |
| 402 | }, |
| 403 | .remove = __devexit_p(mc13783_regulator_remove), |
Alberto Panizzo | 735eb93 | 2009-12-14 18:53:35 +0100 | [diff] [blame] | 404 | .probe = mc13783_regulator_probe, |
Sascha Hauer | 295c08b | 2009-08-19 01:43:50 +0200 | [diff] [blame] | 405 | }; |
| 406 | |
| 407 | static int __init mc13783_regulator_init(void) |
| 408 | { |
Alberto Panizzo | 735eb93 | 2009-12-14 18:53:35 +0100 | [diff] [blame] | 409 | return platform_driver_register(&mc13783_regulator_driver); |
Sascha Hauer | 295c08b | 2009-08-19 01:43:50 +0200 | [diff] [blame] | 410 | } |
| 411 | subsys_initcall(mc13783_regulator_init); |
| 412 | |
| 413 | static void __exit mc13783_regulator_exit(void) |
| 414 | { |
| 415 | platform_driver_unregister(&mc13783_regulator_driver); |
| 416 | } |
| 417 | module_exit(mc13783_regulator_exit); |
| 418 | |
Uwe Kleine-König | a10099b | 2009-11-10 09:18:07 +0100 | [diff] [blame] | 419 | MODULE_LICENSE("GPL v2"); |
Axel Lin | 1dcc434 | 2010-05-06 11:33:36 +0800 | [diff] [blame] | 420 | MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de>"); |
Sascha Hauer | 295c08b | 2009-08-19 01:43:50 +0200 | [diff] [blame] | 421 | MODULE_DESCRIPTION("Regulator Driver for Freescale MC13783 PMIC"); |
| 422 | MODULE_ALIAS("platform:mc13783-regulator"); |