Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 1 | /* |
| 2 | * This is used to for host and peripheral modes of the driver for |
| 3 | * Inventra (Multidrop) Highspeed Dual-Role Controllers: (M)HDRC. |
| 4 | * |
| 5 | * Board initialization should put one of these into dev->platform_data, |
Felipe Balbi | 05ac10d | 2010-12-02 08:49:26 +0200 | [diff] [blame] | 6 | * probably on some platform_device named "musb-hdrc". It encapsulates |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 7 | * key configuration differences between boards. |
| 8 | */ |
| 9 | |
Mark A. Greer | fbfc396 | 2009-04-21 20:52:54 -0700 | [diff] [blame] | 10 | #ifndef __LINUX_USB_MUSB_H |
| 11 | #define __LINUX_USB_MUSB_H |
| 12 | |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 13 | /* The USB role is defined by the connector used on the board, so long as |
| 14 | * standards are being followed. (Developer boards sometimes won't.) |
| 15 | */ |
| 16 | enum musb_mode { |
| 17 | MUSB_UNDEFINED = 0, |
| 18 | MUSB_HOST, /* A or Mini-A connector */ |
| 19 | MUSB_PERIPHERAL, /* B or Mini-B connector */ |
| 20 | MUSB_OTG /* Mini-AB connector */ |
| 21 | }; |
| 22 | |
| 23 | struct clk; |
| 24 | |
Felipe Balbi | e6c213b | 2010-03-12 10:29:06 +0200 | [diff] [blame] | 25 | enum musb_fifo_style { |
| 26 | FIFO_RXTX, |
| 27 | FIFO_TX, |
| 28 | FIFO_RX |
| 29 | } __attribute__ ((packed)); |
| 30 | |
| 31 | enum musb_buf_mode { |
| 32 | BUF_SINGLE, |
| 33 | BUF_DOUBLE |
| 34 | } __attribute__ ((packed)); |
| 35 | |
| 36 | struct musb_fifo_cfg { |
| 37 | u8 hw_ep_num; |
| 38 | enum musb_fifo_style style; |
| 39 | enum musb_buf_mode mode; |
| 40 | u16 maxpacket; |
| 41 | }; |
| 42 | |
| 43 | #define MUSB_EP_FIFO(ep, st, m, pkt) \ |
| 44 | { \ |
| 45 | .hw_ep_num = ep, \ |
| 46 | .style = st, \ |
| 47 | .mode = m, \ |
| 48 | .maxpacket = pkt, \ |
| 49 | } |
| 50 | |
| 51 | #define MUSB_EP_FIFO_SINGLE(ep, st, pkt) \ |
| 52 | MUSB_EP_FIFO(ep, st, BUF_SINGLE, pkt) |
| 53 | |
| 54 | #define MUSB_EP_FIFO_DOUBLE(ep, st, pkt) \ |
| 55 | MUSB_EP_FIFO(ep, st, BUF_DOUBLE, pkt) |
| 56 | |
Felipe Balbi | ca6d1b1 | 2008-08-08 12:40:54 +0300 | [diff] [blame] | 57 | struct musb_hdrc_eps_bits { |
| 58 | const char name[16]; |
| 59 | u8 bits; |
| 60 | }; |
| 61 | |
| 62 | struct musb_hdrc_config { |
Felipe Balbi | e6c213b | 2010-03-12 10:29:06 +0200 | [diff] [blame] | 63 | struct musb_fifo_cfg *fifo_cfg; /* board fifo configuration */ |
| 64 | unsigned fifo_cfg_size; /* size of the fifo configuration */ |
| 65 | |
Felipe Balbi | ca6d1b1 | 2008-08-08 12:40:54 +0300 | [diff] [blame] | 66 | /* MUSB configuration-specific details */ |
| 67 | unsigned multipoint:1; /* multipoint device */ |
Felipe Balbi | c58bfa6 | 2010-01-21 15:33:55 +0200 | [diff] [blame] | 68 | unsigned dyn_fifo:1 __deprecated; /* supports dynamic fifo sizing */ |
| 69 | unsigned soft_con:1 __deprecated; /* soft connect required */ |
| 70 | unsigned utm_16:1 __deprecated; /* utm data witdh is 16 bits */ |
Felipe Balbi | ca6d1b1 | 2008-08-08 12:40:54 +0300 | [diff] [blame] | 71 | unsigned big_endian:1; /* true if CPU uses big-endian */ |
| 72 | unsigned mult_bulk_tx:1; /* Tx ep required for multbulk pkts */ |
| 73 | unsigned mult_bulk_rx:1; /* Rx ep required for multbulk pkts */ |
| 74 | unsigned high_iso_tx:1; /* Tx ep required for HB iso */ |
| 75 | unsigned high_iso_rx:1; /* Rx ep required for HD iso */ |
Felipe Balbi | c58bfa6 | 2010-01-21 15:33:55 +0200 | [diff] [blame] | 76 | unsigned dma:1 __deprecated; /* supports DMA */ |
| 77 | unsigned vendor_req:1 __deprecated; /* vendor registers required */ |
Felipe Balbi | ca6d1b1 | 2008-08-08 12:40:54 +0300 | [diff] [blame] | 78 | |
Daniel Mack | 869c597 | 2013-11-26 13:31:14 +0100 | [diff] [blame] | 79 | /* need to explicitly de-assert the port reset after resume? */ |
| 80 | unsigned host_port_deassert_reset_at_resume:1; |
| 81 | |
Felipe Balbi | ca6d1b1 | 2008-08-08 12:40:54 +0300 | [diff] [blame] | 82 | u8 num_eps; /* number of endpoints _with_ ep0 */ |
Felipe Balbi | c58bfa6 | 2010-01-21 15:33:55 +0200 | [diff] [blame] | 83 | u8 dma_channels __deprecated; /* number of dma channels */ |
Felipe Balbi | ca6d1b1 | 2008-08-08 12:40:54 +0300 | [diff] [blame] | 84 | u8 dyn_fifo_size; /* dynamic size in bytes */ |
Felipe Balbi | c58bfa6 | 2010-01-21 15:33:55 +0200 | [diff] [blame] | 85 | u8 vendor_ctrl __deprecated; /* vendor control reg width */ |
| 86 | u8 vendor_stat __deprecated; /* vendor status reg witdh */ |
| 87 | u8 dma_req_chan __deprecated; /* bitmask for required dma channels */ |
Felipe Balbi | ca6d1b1 | 2008-08-08 12:40:54 +0300 | [diff] [blame] | 88 | u8 ram_bits; /* ram address size */ |
| 89 | |
Felipe Balbi | c58bfa6 | 2010-01-21 15:33:55 +0200 | [diff] [blame] | 90 | struct musb_hdrc_eps_bits *eps_bits __deprecated; |
Bryan Wu | 2ffcdb3 | 2008-12-02 21:33:43 +0200 | [diff] [blame] | 91 | #ifdef CONFIG_BLACKFIN |
Greg Kroah-Hartman | 0858a3a | 2010-05-17 10:58:12 -0700 | [diff] [blame] | 92 | /* A GPIO controlling VRSEL in Blackfin */ |
| 93 | unsigned int gpio_vrsel; |
Cliff Cai | 6ddc6da | 2010-03-12 10:29:10 +0200 | [diff] [blame] | 94 | unsigned int gpio_vrsel_active; |
Bob Liu | 9c75646 | 2010-10-23 05:12:01 -0500 | [diff] [blame] | 95 | /* musb CLKIN in Blackfin in MHZ */ |
| 96 | unsigned char clkin; |
Bryan Wu | 2ffcdb3 | 2008-12-02 21:33:43 +0200 | [diff] [blame] | 97 | #endif |
| 98 | |
Felipe Balbi | ca6d1b1 | 2008-08-08 12:40:54 +0300 | [diff] [blame] | 99 | }; |
| 100 | |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 101 | struct musb_hdrc_platform_data { |
| 102 | /* MUSB_HOST, MUSB_PERIPHERAL, or MUSB_OTG */ |
| 103 | u8 mode; |
| 104 | |
| 105 | /* for clk_get() */ |
| 106 | const char *clock; |
| 107 | |
| 108 | /* (HOST or OTG) switch VBUS on/off */ |
| 109 | int (*set_vbus)(struct device *dev, int is_on); |
| 110 | |
| 111 | /* (HOST or OTG) mA/2 power supplied on (default = 8mA) */ |
| 112 | u8 power; |
| 113 | |
| 114 | /* (PERIPHERAL) mA/2 max power consumed (default = 100mA) */ |
| 115 | u8 min_power; |
| 116 | |
| 117 | /* (HOST or OTG) msec/2 after VBUS on till power good */ |
| 118 | u8 potpgt; |
| 119 | |
Ajay Kumar Gupta | 5fc4e77 | 2009-12-28 13:40:42 +0200 | [diff] [blame] | 120 | /* (HOST or OTG) program PHY for external Vbus */ |
| 121 | unsigned extvbus:1; |
| 122 | |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 123 | /* Power the device on or off */ |
| 124 | int (*set_power)(int state); |
| 125 | |
Felipe Balbi | ca6d1b1 | 2008-08-08 12:40:54 +0300 | [diff] [blame] | 126 | /* MUSB configuration-specific details */ |
| 127 | struct musb_hdrc_config *config; |
Maulik Mankad | 884b8369 | 2010-02-17 14:09:30 -0800 | [diff] [blame] | 128 | |
| 129 | /* Architecture specific board data */ |
| 130 | void *board_data; |
Felipe Balbi | f7ec943 | 2010-12-02 09:48:58 +0200 | [diff] [blame] | 131 | |
| 132 | /* Platform specific struct musb_ops pointer */ |
| 133 | const void *platform_ops; |
Felipe Balbi | 550a737 | 2008-07-24 12:27:36 +0300 | [diff] [blame] | 134 | }; |
| 135 | |
| 136 | |
| 137 | /* TUSB 6010 support */ |
| 138 | |
| 139 | #define TUSB6010_OSCCLK_60 16667 /* psec/clk @ 60.0 MHz */ |
| 140 | #define TUSB6010_REFCLK_24 41667 /* psec/clk @ 24.0 MHz XI */ |
| 141 | #define TUSB6010_REFCLK_19 52083 /* psec/clk @ 19.2 MHz CLKIN */ |
| 142 | |
| 143 | #ifdef CONFIG_ARCH_OMAP2 |
| 144 | |
| 145 | extern int __init tusb6010_setup_interface( |
| 146 | struct musb_hdrc_platform_data *data, |
| 147 | unsigned ps_refclk, unsigned waitpin, |
| 148 | unsigned async_cs, unsigned sync_cs, |
| 149 | unsigned irq, unsigned dmachan); |
| 150 | |
| 151 | extern int tusb6010_platform_retime(unsigned is_refclk); |
| 152 | |
| 153 | #endif /* OMAP2 */ |
Mark A. Greer | fbfc396 | 2009-04-21 20:52:54 -0700 | [diff] [blame] | 154 | |
| 155 | #endif /* __LINUX_USB_MUSB_H */ |