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Felipe Balbi550a7372008-07-24 12:27:36 +03001/*
2 * This is used to for host and peripheral modes of the driver for
3 * Inventra (Multidrop) Highspeed Dual-Role Controllers: (M)HDRC.
4 *
5 * Board initialization should put one of these into dev->platform_data,
Felipe Balbi05ac10d2010-12-02 08:49:26 +02006 * probably on some platform_device named "musb-hdrc". It encapsulates
Felipe Balbi550a7372008-07-24 12:27:36 +03007 * key configuration differences between boards.
8 */
9
Mark A. Greerfbfc3962009-04-21 20:52:54 -070010#ifndef __LINUX_USB_MUSB_H
11#define __LINUX_USB_MUSB_H
12
Felipe Balbi550a7372008-07-24 12:27:36 +030013/* The USB role is defined by the connector used on the board, so long as
14 * standards are being followed. (Developer boards sometimes won't.)
15 */
16enum musb_mode {
17 MUSB_UNDEFINED = 0,
18 MUSB_HOST, /* A or Mini-A connector */
19 MUSB_PERIPHERAL, /* B or Mini-B connector */
20 MUSB_OTG /* Mini-AB connector */
21};
22
23struct clk;
24
Felipe Balbie6c213b2010-03-12 10:29:06 +020025enum musb_fifo_style {
26 FIFO_RXTX,
27 FIFO_TX,
28 FIFO_RX
29} __attribute__ ((packed));
30
31enum musb_buf_mode {
32 BUF_SINGLE,
33 BUF_DOUBLE
34} __attribute__ ((packed));
35
36struct musb_fifo_cfg {
37 u8 hw_ep_num;
38 enum musb_fifo_style style;
39 enum musb_buf_mode mode;
40 u16 maxpacket;
41};
42
43#define MUSB_EP_FIFO(ep, st, m, pkt) \
44{ \
45 .hw_ep_num = ep, \
46 .style = st, \
47 .mode = m, \
48 .maxpacket = pkt, \
49}
50
51#define MUSB_EP_FIFO_SINGLE(ep, st, pkt) \
52 MUSB_EP_FIFO(ep, st, BUF_SINGLE, pkt)
53
54#define MUSB_EP_FIFO_DOUBLE(ep, st, pkt) \
55 MUSB_EP_FIFO(ep, st, BUF_DOUBLE, pkt)
56
Felipe Balbica6d1b12008-08-08 12:40:54 +030057struct musb_hdrc_eps_bits {
58 const char name[16];
59 u8 bits;
60};
61
62struct musb_hdrc_config {
Felipe Balbie6c213b2010-03-12 10:29:06 +020063 struct musb_fifo_cfg *fifo_cfg; /* board fifo configuration */
64 unsigned fifo_cfg_size; /* size of the fifo configuration */
65
Felipe Balbica6d1b12008-08-08 12:40:54 +030066 /* MUSB configuration-specific details */
67 unsigned multipoint:1; /* multipoint device */
Felipe Balbic58bfa62010-01-21 15:33:55 +020068 unsigned dyn_fifo:1 __deprecated; /* supports dynamic fifo sizing */
69 unsigned soft_con:1 __deprecated; /* soft connect required */
70 unsigned utm_16:1 __deprecated; /* utm data witdh is 16 bits */
Felipe Balbica6d1b12008-08-08 12:40:54 +030071 unsigned big_endian:1; /* true if CPU uses big-endian */
72 unsigned mult_bulk_tx:1; /* Tx ep required for multbulk pkts */
73 unsigned mult_bulk_rx:1; /* Rx ep required for multbulk pkts */
74 unsigned high_iso_tx:1; /* Tx ep required for HB iso */
75 unsigned high_iso_rx:1; /* Rx ep required for HD iso */
Felipe Balbic58bfa62010-01-21 15:33:55 +020076 unsigned dma:1 __deprecated; /* supports DMA */
77 unsigned vendor_req:1 __deprecated; /* vendor registers required */
Felipe Balbica6d1b12008-08-08 12:40:54 +030078
Daniel Mack869c5972013-11-26 13:31:14 +010079 /* need to explicitly de-assert the port reset after resume? */
80 unsigned host_port_deassert_reset_at_resume:1;
81
Felipe Balbica6d1b12008-08-08 12:40:54 +030082 u8 num_eps; /* number of endpoints _with_ ep0 */
Felipe Balbic58bfa62010-01-21 15:33:55 +020083 u8 dma_channels __deprecated; /* number of dma channels */
Felipe Balbica6d1b12008-08-08 12:40:54 +030084 u8 dyn_fifo_size; /* dynamic size in bytes */
Felipe Balbic58bfa62010-01-21 15:33:55 +020085 u8 vendor_ctrl __deprecated; /* vendor control reg width */
86 u8 vendor_stat __deprecated; /* vendor status reg witdh */
87 u8 dma_req_chan __deprecated; /* bitmask for required dma channels */
Felipe Balbica6d1b12008-08-08 12:40:54 +030088 u8 ram_bits; /* ram address size */
89
Felipe Balbic58bfa62010-01-21 15:33:55 +020090 struct musb_hdrc_eps_bits *eps_bits __deprecated;
Bryan Wu2ffcdb32008-12-02 21:33:43 +020091#ifdef CONFIG_BLACKFIN
Greg Kroah-Hartman0858a3a2010-05-17 10:58:12 -070092 /* A GPIO controlling VRSEL in Blackfin */
93 unsigned int gpio_vrsel;
Cliff Cai6ddc6da2010-03-12 10:29:10 +020094 unsigned int gpio_vrsel_active;
Bob Liu9c756462010-10-23 05:12:01 -050095 /* musb CLKIN in Blackfin in MHZ */
96 unsigned char clkin;
Bryan Wu2ffcdb32008-12-02 21:33:43 +020097#endif
98
Felipe Balbica6d1b12008-08-08 12:40:54 +030099};
100
Felipe Balbi550a7372008-07-24 12:27:36 +0300101struct musb_hdrc_platform_data {
102 /* MUSB_HOST, MUSB_PERIPHERAL, or MUSB_OTG */
103 u8 mode;
104
105 /* for clk_get() */
106 const char *clock;
107
108 /* (HOST or OTG) switch VBUS on/off */
109 int (*set_vbus)(struct device *dev, int is_on);
110
111 /* (HOST or OTG) mA/2 power supplied on (default = 8mA) */
112 u8 power;
113
114 /* (PERIPHERAL) mA/2 max power consumed (default = 100mA) */
115 u8 min_power;
116
117 /* (HOST or OTG) msec/2 after VBUS on till power good */
118 u8 potpgt;
119
Ajay Kumar Gupta5fc4e772009-12-28 13:40:42 +0200120 /* (HOST or OTG) program PHY for external Vbus */
121 unsigned extvbus:1;
122
Felipe Balbi550a7372008-07-24 12:27:36 +0300123 /* Power the device on or off */
124 int (*set_power)(int state);
125
Felipe Balbica6d1b12008-08-08 12:40:54 +0300126 /* MUSB configuration-specific details */
127 struct musb_hdrc_config *config;
Maulik Mankad884b83692010-02-17 14:09:30 -0800128
129 /* Architecture specific board data */
130 void *board_data;
Felipe Balbif7ec9432010-12-02 09:48:58 +0200131
132 /* Platform specific struct musb_ops pointer */
133 const void *platform_ops;
Felipe Balbi550a7372008-07-24 12:27:36 +0300134};
135
136
137/* TUSB 6010 support */
138
139#define TUSB6010_OSCCLK_60 16667 /* psec/clk @ 60.0 MHz */
140#define TUSB6010_REFCLK_24 41667 /* psec/clk @ 24.0 MHz XI */
141#define TUSB6010_REFCLK_19 52083 /* psec/clk @ 19.2 MHz CLKIN */
142
143#ifdef CONFIG_ARCH_OMAP2
144
145extern int __init tusb6010_setup_interface(
146 struct musb_hdrc_platform_data *data,
147 unsigned ps_refclk, unsigned waitpin,
148 unsigned async_cs, unsigned sync_cs,
149 unsigned irq, unsigned dmachan);
150
151extern int tusb6010_platform_retime(unsigned is_refclk);
152
153#endif /* OMAP2 */
Mark A. Greerfbfc3962009-04-21 20:52:54 -0700154
155#endif /* __LINUX_USB_MUSB_H */