blob: 2517ec576ffc9f91797673f8253074c659df2371 [file] [log] [blame]
Jeeja KPa40e6932015-07-09 15:20:08 +05301/*
2 * skl-pcm.c -ASoC HDA Platform driver file implementing PCM functionality
3 *
4 * Copyright (C) 2014-2015 Intel Corp
5 * Author: Jeeja KP <jeeja.kp@intel.com>
6 *
7 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; version 2 of the License.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
19 *
20 */
21
22#include <linux/pci.h>
23#include <linux/pm_runtime.h>
24#include <sound/pcm_params.h>
25#include <sound/soc.h>
26#include "skl.h"
Jeeja KPb663a8c2015-10-07 11:31:57 +010027#include "skl-topology.h"
Jeeja KPa40e6932015-07-09 15:20:08 +053028
29#define HDA_MONO 1
30#define HDA_STEREO 2
31
32static struct snd_pcm_hardware azx_pcm_hw = {
33 .info = (SNDRV_PCM_INFO_MMAP |
34 SNDRV_PCM_INFO_INTERLEAVED |
35 SNDRV_PCM_INFO_BLOCK_TRANSFER |
36 SNDRV_PCM_INFO_MMAP_VALID |
37 SNDRV_PCM_INFO_PAUSE |
38 SNDRV_PCM_INFO_SYNC_START |
39 SNDRV_PCM_INFO_HAS_WALL_CLOCK | /* legacy */
40 SNDRV_PCM_INFO_HAS_LINK_ATIME |
41 SNDRV_PCM_INFO_NO_PERIOD_WAKEUP),
42 .formats = SNDRV_PCM_FMTBIT_S16_LE,
43 .rates = SNDRV_PCM_RATE_48000,
44 .rate_min = 48000,
45 .rate_max = 48000,
46 .channels_min = 2,
47 .channels_max = 2,
48 .buffer_bytes_max = AZX_MAX_BUF_SIZE,
49 .period_bytes_min = 128,
50 .period_bytes_max = AZX_MAX_BUF_SIZE / 2,
51 .periods_min = 2,
52 .periods_max = AZX_MAX_FRAG,
53 .fifo_size = 0,
54};
55
56static inline
57struct hdac_ext_stream *get_hdac_ext_stream(struct snd_pcm_substream *substream)
58{
59 return substream->runtime->private_data;
60}
61
62static struct hdac_ext_bus *get_bus_ctx(struct snd_pcm_substream *substream)
63{
64 struct hdac_ext_stream *stream = get_hdac_ext_stream(substream);
65 struct hdac_stream *hstream = hdac_stream(stream);
66 struct hdac_bus *bus = hstream->bus;
67
68 return hbus_to_ebus(bus);
69}
70
71static int skl_substream_alloc_pages(struct hdac_ext_bus *ebus,
72 struct snd_pcm_substream *substream,
73 size_t size)
74{
75 struct hdac_ext_stream *stream = get_hdac_ext_stream(substream);
76
77 hdac_stream(stream)->bufsize = 0;
78 hdac_stream(stream)->period_bytes = 0;
79 hdac_stream(stream)->format_val = 0;
80
81 return snd_pcm_lib_malloc_pages(substream, size);
82}
83
84static int skl_substream_free_pages(struct hdac_bus *bus,
85 struct snd_pcm_substream *substream)
86{
87 return snd_pcm_lib_free_pages(substream);
88}
89
90static void skl_set_pcm_constrains(struct hdac_ext_bus *ebus,
91 struct snd_pcm_runtime *runtime)
92{
93 snd_pcm_hw_constraint_integer(runtime, SNDRV_PCM_HW_PARAM_PERIODS);
94
95 /* avoid wrap-around with wall-clock */
96 snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_TIME,
97 20, 178000000);
98}
99
Jeeja KP05057002015-07-09 15:20:11 +0530100static enum hdac_ext_stream_type skl_get_host_stream_type(struct hdac_ext_bus *ebus)
101{
102 if (ebus->ppcap)
103 return HDAC_EXT_STREAM_TYPE_HOST;
104 else
105 return HDAC_EXT_STREAM_TYPE_COUPLED;
106}
107
Jeeja KPa40e6932015-07-09 15:20:08 +0530108static int skl_pcm_open(struct snd_pcm_substream *substream,
109 struct snd_soc_dai *dai)
110{
111 struct hdac_ext_bus *ebus = dev_get_drvdata(dai->dev);
112 struct hdac_ext_stream *stream;
113 struct snd_pcm_runtime *runtime = substream->runtime;
114 struct skl_dma_params *dma_params;
115 int ret;
116
117 dev_dbg(dai->dev, "%s: %s\n", __func__, dai->name);
118 ret = pm_runtime_get_sync(dai->dev);
Jeeja KP9270b7b2015-10-22 23:22:34 +0530119 if (ret < 0)
Jeeja KPa40e6932015-07-09 15:20:08 +0530120 return ret;
121
122 stream = snd_hdac_ext_stream_assign(ebus, substream,
Jeeja KP05057002015-07-09 15:20:11 +0530123 skl_get_host_stream_type(ebus));
Jeeja KPa40e6932015-07-09 15:20:08 +0530124 if (stream == NULL)
125 return -EBUSY;
126
127 skl_set_pcm_constrains(ebus, runtime);
128
129 /*
130 * disable WALLCLOCK timestamps for capture streams
131 * until we figure out how to handle digital inputs
132 */
133 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
134 runtime->hw.info &= ~SNDRV_PCM_INFO_HAS_WALL_CLOCK; /* legacy */
135 runtime->hw.info &= ~SNDRV_PCM_INFO_HAS_LINK_ATIME;
136 }
137
138 runtime->private_data = stream;
139
140 dma_params = kzalloc(sizeof(*dma_params), GFP_KERNEL);
141 if (!dma_params)
142 return -ENOMEM;
143
144 dma_params->stream_tag = hdac_stream(stream)->stream_tag;
145 snd_soc_dai_set_dma_data(dai, substream, dma_params);
146
147 dev_dbg(dai->dev, "stream tag set in dma params=%d\n",
148 dma_params->stream_tag);
149 snd_pcm_set_sync(substream);
150
151 return 0;
152}
153
154static int skl_get_format(struct snd_pcm_substream *substream,
155 struct snd_soc_dai *dai)
156{
157 struct snd_soc_pcm_runtime *rtd = snd_pcm_substream_chip(substream);
158 struct skl_dma_params *dma_params;
Jeeja KP05057002015-07-09 15:20:11 +0530159 struct hdac_ext_bus *ebus = dev_get_drvdata(dai->dev);
Jeeja KPa40e6932015-07-09 15:20:08 +0530160 int format_val = 0;
Jeeja KPa40e6932015-07-09 15:20:08 +0530161
Jeeja KP05057002015-07-09 15:20:11 +0530162 if (ebus->ppcap) {
163 struct snd_pcm_runtime *runtime = substream->runtime;
164
165 format_val = snd_hdac_calc_stream_format(runtime->rate,
166 runtime->channels,
167 runtime->format,
168 32, 0);
169 } else {
170 struct snd_soc_dai *codec_dai = rtd->codec_dai;
171
172 dma_params = snd_soc_dai_get_dma_data(codec_dai, substream);
173 if (dma_params)
174 format_val = dma_params->format;
175 }
Jeeja KPa40e6932015-07-09 15:20:08 +0530176
177 return format_val;
178}
179
180static int skl_pcm_prepare(struct snd_pcm_substream *substream,
181 struct snd_soc_dai *dai)
182{
183 struct hdac_ext_stream *stream = get_hdac_ext_stream(substream);
184 unsigned int format_val;
185 int err;
186
187 dev_dbg(dai->dev, "%s: %s\n", __func__, dai->name);
188 if (hdac_stream(stream)->prepared) {
189 dev_dbg(dai->dev, "already stream is prepared - returning\n");
190 return 0;
191 }
192
193 format_val = skl_get_format(substream, dai);
194 dev_dbg(dai->dev, "stream_tag=%d formatvalue=%d\n",
195 hdac_stream(stream)->stream_tag, format_val);
196 snd_hdac_stream_reset(hdac_stream(stream));
197
198 err = snd_hdac_stream_set_params(hdac_stream(stream), format_val);
199 if (err < 0)
200 return err;
201
202 err = snd_hdac_stream_setup(hdac_stream(stream));
203 if (err < 0)
204 return err;
205
206 hdac_stream(stream)->prepared = 1;
207
208 return err;
209}
210
211static int skl_pcm_hw_params(struct snd_pcm_substream *substream,
212 struct snd_pcm_hw_params *params,
213 struct snd_soc_dai *dai)
214{
215 struct hdac_ext_bus *ebus = dev_get_drvdata(dai->dev);
Jeeja KP05057002015-07-09 15:20:11 +0530216 struct hdac_ext_stream *stream = get_hdac_ext_stream(substream);
Jeeja KPa40e6932015-07-09 15:20:08 +0530217 struct snd_pcm_runtime *runtime = substream->runtime;
Jeeja KPb663a8c2015-10-07 11:31:57 +0100218 struct skl_pipe_params p_params = {0};
219 struct skl_module_cfg *m_cfg;
Jeeja KP05057002015-07-09 15:20:11 +0530220 int ret, dma_id;
Jeeja KPa40e6932015-07-09 15:20:08 +0530221
222 dev_dbg(dai->dev, "%s: %s\n", __func__, dai->name);
223 ret = skl_substream_alloc_pages(ebus, substream,
224 params_buffer_bytes(params));
225 if (ret < 0)
226 return ret;
227
228 dev_dbg(dai->dev, "format_val, rate=%d, ch=%d, format=%d\n",
229 runtime->rate, runtime->channels, runtime->format);
230
Jeeja KP05057002015-07-09 15:20:11 +0530231 dma_id = hdac_stream(stream)->stream_tag - 1;
232 dev_dbg(dai->dev, "dma_id=%d\n", dma_id);
233
Jeeja KPb663a8c2015-10-07 11:31:57 +0100234 p_params.s_fmt = snd_pcm_format_width(params_format(params));
235 p_params.ch = params_channels(params);
236 p_params.s_freq = params_rate(params);
237 p_params.host_dma_id = dma_id;
238 p_params.stream = substream->stream;
239
240 m_cfg = skl_tplg_fe_get_cpr_module(dai, p_params.stream);
241 if (m_cfg)
242 skl_tplg_update_pipe_params(dai->dev, m_cfg, &p_params);
243
Jeeja KPa40e6932015-07-09 15:20:08 +0530244 return 0;
245}
246
247static void skl_pcm_close(struct snd_pcm_substream *substream,
248 struct snd_soc_dai *dai)
249{
250 struct hdac_ext_stream *stream = get_hdac_ext_stream(substream);
Jeeja KP05057002015-07-09 15:20:11 +0530251 struct hdac_ext_bus *ebus = dev_get_drvdata(dai->dev);
Jeeja KPa40e6932015-07-09 15:20:08 +0530252 struct skl_dma_params *dma_params = NULL;
253
254 dev_dbg(dai->dev, "%s: %s\n", __func__, dai->name);
Jeeja KP05057002015-07-09 15:20:11 +0530255
256 snd_hdac_ext_stream_release(stream, skl_get_host_stream_type(ebus));
Jeeja KPa40e6932015-07-09 15:20:08 +0530257
258 dma_params = snd_soc_dai_get_dma_data(dai, substream);
259 /*
260 * now we should set this to NULL as we are freeing by the
261 * dma_params
262 */
263 snd_soc_dai_set_dma_data(dai, substream, NULL);
264
265 pm_runtime_mark_last_busy(dai->dev);
266 pm_runtime_put_autosuspend(dai->dev);
267 kfree(dma_params);
268}
269
270static int skl_pcm_hw_free(struct snd_pcm_substream *substream,
271 struct snd_soc_dai *dai)
272{
273 struct hdac_ext_bus *ebus = dev_get_drvdata(dai->dev);
274 struct hdac_ext_stream *stream = get_hdac_ext_stream(substream);
275
276 dev_dbg(dai->dev, "%s: %s\n", __func__, dai->name);
277
278 snd_hdac_stream_cleanup(hdac_stream(stream));
279 hdac_stream(stream)->prepared = 0;
280
281 return skl_substream_free_pages(ebus_to_hbus(ebus), substream);
282}
283
Jeeja KPb663a8c2015-10-07 11:31:57 +0100284static int skl_be_hw_params(struct snd_pcm_substream *substream,
285 struct snd_pcm_hw_params *params,
286 struct snd_soc_dai *dai)
287{
288 struct skl_pipe_params p_params = {0};
289
290 p_params.s_fmt = snd_pcm_format_width(params_format(params));
291 p_params.ch = params_channels(params);
292 p_params.s_freq = params_rate(params);
293 p_params.stream = substream->stream;
Jeeja KPb663a8c2015-10-07 11:31:57 +0100294
Jeeja KP4bd073f2015-10-27 09:22:45 +0900295 return skl_tplg_be_update_params(dai, &p_params);
Jeeja KPb663a8c2015-10-07 11:31:57 +0100296}
297
Jeeja KPd1730c32015-10-27 09:22:53 +0900298static int skl_decoupled_trigger(struct snd_pcm_substream *substream,
299 int cmd)
300{
301 struct hdac_ext_bus *ebus = get_bus_ctx(substream);
302 struct hdac_bus *bus = ebus_to_hbus(ebus);
303 struct hdac_ext_stream *stream;
304 int start;
305 unsigned long cookie;
306 struct hdac_stream *hstr;
307
308 stream = get_hdac_ext_stream(substream);
309 hstr = hdac_stream(stream);
310
311 if (!hstr->prepared)
312 return -EPIPE;
313
314 switch (cmd) {
315 case SNDRV_PCM_TRIGGER_START:
316 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
317 case SNDRV_PCM_TRIGGER_RESUME:
318 start = 1;
319 break;
320
321 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
322 case SNDRV_PCM_TRIGGER_SUSPEND:
323 case SNDRV_PCM_TRIGGER_STOP:
324 start = 0;
325 break;
326
327 default:
328 return -EINVAL;
329 }
330
331 spin_lock_irqsave(&bus->reg_lock, cookie);
332
333 if (start) {
334 snd_hdac_stream_start(hdac_stream(stream), true);
335 snd_hdac_stream_timecounter_init(hstr, 0);
336 } else {
337 snd_hdac_stream_stop(hdac_stream(stream));
338 }
339
340 spin_unlock_irqrestore(&bus->reg_lock, cookie);
341
342 return 0;
343}
344
Jeeja KPb663a8c2015-10-07 11:31:57 +0100345static int skl_pcm_trigger(struct snd_pcm_substream *substream, int cmd,
346 struct snd_soc_dai *dai)
347{
348 struct skl *skl = get_skl_ctx(dai->dev);
349 struct skl_sst *ctx = skl->skl_sst;
350 struct skl_module_cfg *mconfig;
Jeeja KPd1730c32015-10-27 09:22:53 +0900351 int ret;
Jeeja KPb663a8c2015-10-07 11:31:57 +0100352
353 mconfig = skl_tplg_fe_get_cpr_module(dai, substream->stream);
354 if (!mconfig)
355 return -EIO;
356
357 switch (cmd) {
Jeeja KPd1730c32015-10-27 09:22:53 +0900358 case SNDRV_PCM_TRIGGER_START:
Jeeja KPb663a8c2015-10-07 11:31:57 +0100359 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
360 case SNDRV_PCM_TRIGGER_RESUME:
Jeeja KPd1730c32015-10-27 09:22:53 +0900361 /*
362 * Start HOST DMA and Start FE Pipe.This is to make sure that
363 * there are no underrun/overrun in the case when the FE
364 * pipeline is started but there is a delay in starting the
365 * DMA channel on the host.
366 */
367 ret = skl_decoupled_trigger(substream, cmd);
368 if (ret < 0)
369 return ret;
Jeeja KPb663a8c2015-10-07 11:31:57 +0100370 return skl_run_pipe(ctx, mconfig->pipe);
Jeeja KPd1730c32015-10-27 09:22:53 +0900371 break;
Jeeja KPb663a8c2015-10-07 11:31:57 +0100372
373 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
374 case SNDRV_PCM_TRIGGER_SUSPEND:
Jeeja KPd1730c32015-10-27 09:22:53 +0900375 case SNDRV_PCM_TRIGGER_STOP:
376 /*
377 * Stop FE Pipe first and stop DMA. This is to make sure that
378 * there are no underrun/overrun in the case if there is a delay
379 * between the two operations.
380 */
381 ret = skl_stop_pipe(ctx, mconfig->pipe);
382 if (ret < 0)
383 return ret;
384
385 ret = skl_decoupled_trigger(substream, cmd);
386 break;
Jeeja KPb663a8c2015-10-07 11:31:57 +0100387
388 default:
Jeeja KPd1730c32015-10-27 09:22:53 +0900389 return -EINVAL;
Jeeja KPb663a8c2015-10-07 11:31:57 +0100390 }
Jeeja KPd1730c32015-10-27 09:22:53 +0900391
392 return 0;
Jeeja KPb663a8c2015-10-07 11:31:57 +0100393}
394
Jeeja KP05057002015-07-09 15:20:11 +0530395static int skl_link_hw_params(struct snd_pcm_substream *substream,
396 struct snd_pcm_hw_params *params,
397 struct snd_soc_dai *dai)
398{
399 struct hdac_ext_bus *ebus = dev_get_drvdata(dai->dev);
400 struct hdac_ext_stream *link_dev;
401 struct snd_soc_pcm_runtime *rtd = snd_pcm_substream_chip(substream);
402 struct skl_dma_params *dma_params;
403 struct snd_soc_dai *codec_dai = rtd->codec_dai;
Jeeja KPb663a8c2015-10-07 11:31:57 +0100404 struct skl_pipe_params p_params = {0};
Jeeja KP05057002015-07-09 15:20:11 +0530405
Jeeja KP05057002015-07-09 15:20:11 +0530406 link_dev = snd_hdac_ext_stream_assign(ebus, substream,
407 HDAC_EXT_STREAM_TYPE_LINK);
408 if (!link_dev)
409 return -EBUSY;
410
411 snd_soc_dai_set_dma_data(dai, substream, (void *)link_dev);
412
413 /* set the stream tag in the codec dai dma params */
414 dma_params = (struct skl_dma_params *)
415 snd_soc_dai_get_dma_data(codec_dai, substream);
416 if (dma_params)
417 dma_params->stream_tag = hdac_stream(link_dev)->stream_tag;
418 snd_soc_dai_set_dma_data(codec_dai, substream, (void *)dma_params);
Jeeja KPb663a8c2015-10-07 11:31:57 +0100419
420 p_params.s_fmt = snd_pcm_format_width(params_format(params));
421 p_params.ch = params_channels(params);
422 p_params.s_freq = params_rate(params);
423 p_params.stream = substream->stream;
424 p_params.link_dma_id = hdac_stream(link_dev)->stream_tag - 1;
425
Jeeja KP4bd073f2015-10-27 09:22:45 +0900426 return skl_tplg_be_update_params(dai, &p_params);
Jeeja KP05057002015-07-09 15:20:11 +0530427}
428
429static int skl_link_pcm_prepare(struct snd_pcm_substream *substream,
430 struct snd_soc_dai *dai)
431{
432 struct snd_soc_pcm_runtime *rtd = snd_pcm_substream_chip(substream);
433 struct hdac_ext_bus *ebus = dev_get_drvdata(dai->dev);
434 struct hdac_ext_stream *link_dev =
435 snd_soc_dai_get_dma_data(dai, substream);
436 unsigned int format_val = 0;
437 struct skl_dma_params *dma_params;
438 struct snd_soc_dai *codec_dai = rtd->codec_dai;
Jeeja KP05057002015-07-09 15:20:11 +0530439 struct hdac_ext_link *link;
440
Jeeja KP05057002015-07-09 15:20:11 +0530441 if (link_dev->link_prepared) {
442 dev_dbg(dai->dev, "already stream is prepared - returning\n");
443 return 0;
444 }
Jeeja KP05057002015-07-09 15:20:11 +0530445
446 dma_params = (struct skl_dma_params *)
447 snd_soc_dai_get_dma_data(codec_dai, substream);
448 if (dma_params)
449 format_val = dma_params->format;
450 dev_dbg(dai->dev, "stream_tag=%d formatvalue=%d codec_dai_name=%s\n",
451 hdac_stream(link_dev)->stream_tag, format_val, codec_dai->name);
452
453 snd_hdac_ext_link_stream_reset(link_dev);
454
455 snd_hdac_ext_link_stream_setup(link_dev, format_val);
456
457 link = snd_hdac_ext_bus_get_link(ebus, rtd->codec->component.name);
458 if (!link)
459 return -EINVAL;
460
461 snd_hdac_ext_link_set_stream_id(link, hdac_stream(link_dev)->stream_tag);
462 link_dev->link_prepared = 1;
463
464 return 0;
465}
466
467static int skl_link_pcm_trigger(struct snd_pcm_substream *substream,
468 int cmd, struct snd_soc_dai *dai)
469{
470 struct hdac_ext_stream *link_dev =
471 snd_soc_dai_get_dma_data(dai, substream);
472
473 dev_dbg(dai->dev, "In %s cmd=%d\n", __func__, cmd);
474 switch (cmd) {
475 case SNDRV_PCM_TRIGGER_START:
476 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
477 case SNDRV_PCM_TRIGGER_RESUME:
478 snd_hdac_ext_link_stream_start(link_dev);
479 break;
480
481 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
482 case SNDRV_PCM_TRIGGER_SUSPEND:
483 case SNDRV_PCM_TRIGGER_STOP:
484 snd_hdac_ext_link_stream_clear(link_dev);
485 break;
486
487 default:
488 return -EINVAL;
489 }
490 return 0;
491}
492
493static int skl_link_hw_free(struct snd_pcm_substream *substream,
494 struct snd_soc_dai *dai)
495{
496 struct hdac_ext_bus *ebus = dev_get_drvdata(dai->dev);
497 struct snd_soc_pcm_runtime *rtd = snd_pcm_substream_chip(substream);
498 struct hdac_ext_stream *link_dev =
499 snd_soc_dai_get_dma_data(dai, substream);
500 struct hdac_ext_link *link;
501
502 dev_dbg(dai->dev, "%s: %s\n", __func__, dai->name);
503
504 link_dev->link_prepared = 0;
505
506 link = snd_hdac_ext_bus_get_link(ebus, rtd->codec->component.name);
507 if (!link)
508 return -EINVAL;
509
510 snd_hdac_ext_link_clear_stream_id(link, hdac_stream(link_dev)->stream_tag);
511 snd_hdac_ext_stream_release(link_dev, HDAC_EXT_STREAM_TYPE_LINK);
512 return 0;
513}
514
Jeeja KPb663a8c2015-10-07 11:31:57 +0100515static int skl_be_startup(struct snd_pcm_substream *substream,
Jeeja KP05057002015-07-09 15:20:11 +0530516 struct snd_soc_dai *dai)
517{
518 return pm_runtime_get_sync(dai->dev);
519}
520
Jeeja KPb663a8c2015-10-07 11:31:57 +0100521static void skl_be_shutdown(struct snd_pcm_substream *substream,
Jeeja KP05057002015-07-09 15:20:11 +0530522 struct snd_soc_dai *dai)
523{
524 pm_runtime_mark_last_busy(dai->dev);
525 pm_runtime_put_autosuspend(dai->dev);
526}
527
Jeeja KPa40e6932015-07-09 15:20:08 +0530528static struct snd_soc_dai_ops skl_pcm_dai_ops = {
529 .startup = skl_pcm_open,
530 .shutdown = skl_pcm_close,
531 .prepare = skl_pcm_prepare,
532 .hw_params = skl_pcm_hw_params,
533 .hw_free = skl_pcm_hw_free,
Jeeja KPb663a8c2015-10-07 11:31:57 +0100534 .trigger = skl_pcm_trigger,
Jeeja KPa40e6932015-07-09 15:20:08 +0530535};
536
Jeeja KP05057002015-07-09 15:20:11 +0530537static struct snd_soc_dai_ops skl_dmic_dai_ops = {
Jeeja KPb663a8c2015-10-07 11:31:57 +0100538 .startup = skl_be_startup,
539 .hw_params = skl_be_hw_params,
540 .shutdown = skl_be_shutdown,
541};
542
543static struct snd_soc_dai_ops skl_be_ssp_dai_ops = {
544 .startup = skl_be_startup,
545 .hw_params = skl_be_hw_params,
546 .shutdown = skl_be_shutdown,
Jeeja KP05057002015-07-09 15:20:11 +0530547};
548
549static struct snd_soc_dai_ops skl_link_dai_ops = {
Jeeja KPb663a8c2015-10-07 11:31:57 +0100550 .startup = skl_be_startup,
Jeeja KP05057002015-07-09 15:20:11 +0530551 .prepare = skl_link_pcm_prepare,
552 .hw_params = skl_link_hw_params,
553 .hw_free = skl_link_hw_free,
554 .trigger = skl_link_pcm_trigger,
Jeeja KPb663a8c2015-10-07 11:31:57 +0100555 .shutdown = skl_be_shutdown,
Jeeja KP05057002015-07-09 15:20:11 +0530556};
557
Jeeja KPa40e6932015-07-09 15:20:08 +0530558static struct snd_soc_dai_driver skl_platform_dai[] = {
559{
560 .name = "System Pin",
561 .ops = &skl_pcm_dai_ops,
562 .playback = {
563 .stream_name = "System Playback",
564 .channels_min = HDA_MONO,
565 .channels_max = HDA_STEREO,
566 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_8000,
567 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE,
568 },
569 .capture = {
570 .stream_name = "System Capture",
571 .channels_min = HDA_MONO,
572 .channels_max = HDA_STEREO,
573 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_16000,
574 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE,
575 },
576},
577{
Jeeja KP05057002015-07-09 15:20:11 +0530578 .name = "Reference Pin",
579 .ops = &skl_pcm_dai_ops,
580 .capture = {
581 .stream_name = "Reference Capture",
582 .channels_min = HDA_MONO,
583 .channels_max = HDA_STEREO,
584 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_16000,
585 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE,
586 },
587},
588{
Jeeja KPa40e6932015-07-09 15:20:08 +0530589 .name = "Deepbuffer Pin",
590 .ops = &skl_pcm_dai_ops,
591 .playback = {
592 .stream_name = "Deepbuffer Playback",
593 .channels_min = HDA_STEREO,
594 .channels_max = HDA_STEREO,
595 .rates = SNDRV_PCM_RATE_48000,
596 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE,
597 },
598},
599{
600 .name = "LowLatency Pin",
601 .ops = &skl_pcm_dai_ops,
602 .playback = {
603 .stream_name = "Low Latency Playback",
604 .channels_min = HDA_STEREO,
605 .channels_max = HDA_STEREO,
606 .rates = SNDRV_PCM_RATE_48000,
607 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE,
608 },
609},
Jeeja KP05057002015-07-09 15:20:11 +0530610/* BE CPU Dais */
611{
Jeeja KPb663a8c2015-10-07 11:31:57 +0100612 .name = "SSP0 Pin",
613 .ops = &skl_be_ssp_dai_ops,
614 .playback = {
615 .stream_name = "ssp0 Tx",
616 .channels_min = HDA_STEREO,
617 .channels_max = HDA_STEREO,
618 .rates = SNDRV_PCM_RATE_48000,
619 .formats = SNDRV_PCM_FMTBIT_S16_LE,
620 },
621 .capture = {
622 .stream_name = "ssp0 Rx",
623 .channels_min = HDA_STEREO,
624 .channels_max = HDA_STEREO,
625 .rates = SNDRV_PCM_RATE_48000,
626 .formats = SNDRV_PCM_FMTBIT_S16_LE,
627 },
628},
629{
Jeeja KP05057002015-07-09 15:20:11 +0530630 .name = "iDisp Pin",
631 .ops = &skl_link_dai_ops,
632 .playback = {
633 .stream_name = "iDisp Tx",
634 .channels_min = HDA_STEREO,
635 .channels_max = HDA_STEREO,
636 .rates = SNDRV_PCM_RATE_8000|SNDRV_PCM_RATE_16000|SNDRV_PCM_RATE_48000,
637 .formats = SNDRV_PCM_FMTBIT_S16_LE,
638 },
639},
640{
641 .name = "DMIC01 Pin",
642 .ops = &skl_dmic_dai_ops,
643 .capture = {
644 .stream_name = "DMIC01 Rx",
645 .channels_min = HDA_STEREO,
646 .channels_max = HDA_STEREO,
647 .rates = SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_16000,
648 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE,
649 },
650},
651{
Jeeja KP05057002015-07-09 15:20:11 +0530652 .name = "HD-Codec Pin",
653 .ops = &skl_link_dai_ops,
654 .playback = {
655 .stream_name = "HD-Codec Tx",
656 .channels_min = HDA_STEREO,
657 .channels_max = HDA_STEREO,
658 .rates = SNDRV_PCM_RATE_48000,
659 .formats = SNDRV_PCM_FMTBIT_S16_LE,
660 },
661 .capture = {
662 .stream_name = "HD-Codec Rx",
663 .channels_min = HDA_STEREO,
664 .channels_max = HDA_STEREO,
665 .rates = SNDRV_PCM_RATE_48000,
666 .formats = SNDRV_PCM_FMTBIT_S16_LE,
667 },
668},
Jeeja KPa40e6932015-07-09 15:20:08 +0530669};
670
671static int skl_platform_open(struct snd_pcm_substream *substream)
672{
673 struct snd_pcm_runtime *runtime;
674 struct snd_soc_pcm_runtime *rtd = substream->private_data;
675 struct snd_soc_dai_link *dai_link = rtd->dai_link;
676
677 dev_dbg(rtd->cpu_dai->dev, "In %s:%s\n", __func__,
678 dai_link->cpu_dai_name);
679
680 runtime = substream->runtime;
681 snd_soc_set_runtime_hwparams(substream, &azx_pcm_hw);
682
683 return 0;
684}
685
Jeeja KPb663a8c2015-10-07 11:31:57 +0100686static int skl_coupled_trigger(struct snd_pcm_substream *substream,
Jeeja KPa40e6932015-07-09 15:20:08 +0530687 int cmd)
688{
689 struct hdac_ext_bus *ebus = get_bus_ctx(substream);
690 struct hdac_bus *bus = ebus_to_hbus(ebus);
691 struct hdac_ext_stream *stream;
692 struct snd_pcm_substream *s;
693 bool start;
694 int sbits = 0;
695 unsigned long cookie;
696 struct hdac_stream *hstr;
697
698 stream = get_hdac_ext_stream(substream);
699 hstr = hdac_stream(stream);
700
701 dev_dbg(bus->dev, "In %s cmd=%d\n", __func__, cmd);
702
703 if (!hstr->prepared)
704 return -EPIPE;
705
706 switch (cmd) {
707 case SNDRV_PCM_TRIGGER_START:
708 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
709 case SNDRV_PCM_TRIGGER_RESUME:
710 start = true;
711 break;
712
713 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
714 case SNDRV_PCM_TRIGGER_SUSPEND:
715 case SNDRV_PCM_TRIGGER_STOP:
716 start = false;
717 break;
718
719 default:
720 return -EINVAL;
721 }
722
723 snd_pcm_group_for_each_entry(s, substream) {
724 if (s->pcm->card != substream->pcm->card)
725 continue;
726 stream = get_hdac_ext_stream(s);
727 sbits |= 1 << hdac_stream(stream)->index;
728 snd_pcm_trigger_done(s, substream);
729 }
730
731 spin_lock_irqsave(&bus->reg_lock, cookie);
732
733 /* first, set SYNC bits of corresponding streams */
734 snd_hdac_stream_sync_trigger(hstr, true, sbits, AZX_REG_SSYNC);
735
736 snd_pcm_group_for_each_entry(s, substream) {
737 if (s->pcm->card != substream->pcm->card)
738 continue;
739 stream = get_hdac_ext_stream(s);
740 if (start)
741 snd_hdac_stream_start(hdac_stream(stream), true);
742 else
743 snd_hdac_stream_stop(hdac_stream(stream));
744 }
745 spin_unlock_irqrestore(&bus->reg_lock, cookie);
746
747 snd_hdac_stream_sync(hstr, start, sbits);
748
749 spin_lock_irqsave(&bus->reg_lock, cookie);
750
751 /* reset SYNC bits */
752 snd_hdac_stream_sync_trigger(hstr, false, sbits, AZX_REG_SSYNC);
753 if (start)
754 snd_hdac_stream_timecounter_init(hstr, sbits);
755 spin_unlock_irqrestore(&bus->reg_lock, cookie);
756
757 return 0;
758}
759
Jeeja KP05057002015-07-09 15:20:11 +0530760static int skl_platform_pcm_trigger(struct snd_pcm_substream *substream,
761 int cmd)
762{
763 struct hdac_ext_bus *ebus = get_bus_ctx(substream);
764
Jeeja KPd1730c32015-10-27 09:22:53 +0900765 if (!ebus->ppcap)
Jeeja KPb663a8c2015-10-07 11:31:57 +0100766 return skl_coupled_trigger(substream, cmd);
Jeeja KPd1730c32015-10-27 09:22:53 +0900767
768 return 0;
Jeeja KP05057002015-07-09 15:20:11 +0530769}
770
Jeeja KPa40e6932015-07-09 15:20:08 +0530771/* calculate runtime delay from LPIB */
772static int skl_get_delay_from_lpib(struct hdac_ext_bus *ebus,
773 struct hdac_ext_stream *sstream,
774 unsigned int pos)
775{
776 struct hdac_bus *bus = ebus_to_hbus(ebus);
777 struct hdac_stream *hstream = hdac_stream(sstream);
778 struct snd_pcm_substream *substream = hstream->substream;
779 int stream = substream->stream;
780 unsigned int lpib_pos = snd_hdac_stream_get_pos_lpib(hstream);
781 int delay;
782
783 if (stream == SNDRV_PCM_STREAM_PLAYBACK)
784 delay = pos - lpib_pos;
785 else
786 delay = lpib_pos - pos;
787
788 if (delay < 0) {
789 if (delay >= hstream->delay_negative_threshold)
790 delay = 0;
791 else
792 delay += hstream->bufsize;
793 }
794
795 if (delay >= hstream->period_bytes) {
796 dev_info(bus->dev,
797 "Unstable LPIB (%d >= %d); disabling LPIB delay counting\n",
798 delay, hstream->period_bytes);
799 delay = 0;
800 }
801
802 return bytes_to_frames(substream->runtime, delay);
803}
804
805static unsigned int skl_get_position(struct hdac_ext_stream *hstream,
806 int codec_delay)
807{
808 struct hdac_stream *hstr = hdac_stream(hstream);
809 struct snd_pcm_substream *substream = hstr->substream;
810 struct hdac_ext_bus *ebus = get_bus_ctx(substream);
811 unsigned int pos;
812 int delay;
813
814 /* use the position buffer as default */
815 pos = snd_hdac_stream_get_pos_posbuf(hdac_stream(hstream));
816
817 if (pos >= hdac_stream(hstream)->bufsize)
818 pos = 0;
819
820 if (substream->runtime) {
821 delay = skl_get_delay_from_lpib(ebus, hstream, pos)
822 + codec_delay;
823 substream->runtime->delay += delay;
824 }
825
826 return pos;
827}
828
829static snd_pcm_uframes_t skl_platform_pcm_pointer
830 (struct snd_pcm_substream *substream)
831{
832 struct hdac_ext_stream *hstream = get_hdac_ext_stream(substream);
833
834 return bytes_to_frames(substream->runtime,
835 skl_get_position(hstream, 0));
836}
837
838static u64 skl_adjust_codec_delay(struct snd_pcm_substream *substream,
839 u64 nsec)
840{
841 struct snd_soc_pcm_runtime *rtd = snd_pcm_substream_chip(substream);
842 struct snd_soc_dai *codec_dai = rtd->codec_dai;
843 u64 codec_frames, codec_nsecs;
844
845 if (!codec_dai->driver->ops->delay)
846 return nsec;
847
848 codec_frames = codec_dai->driver->ops->delay(substream, codec_dai);
849 codec_nsecs = div_u64(codec_frames * 1000000000LL,
850 substream->runtime->rate);
851
852 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
853 return nsec + codec_nsecs;
854
855 return (nsec > codec_nsecs) ? nsec - codec_nsecs : 0;
856}
857
858static int skl_get_time_info(struct snd_pcm_substream *substream,
859 struct timespec *system_ts, struct timespec *audio_ts,
860 struct snd_pcm_audio_tstamp_config *audio_tstamp_config,
861 struct snd_pcm_audio_tstamp_report *audio_tstamp_report)
862{
863 struct hdac_ext_stream *sstream = get_hdac_ext_stream(substream);
864 struct hdac_stream *hstr = hdac_stream(sstream);
865 u64 nsec;
866
867 if ((substream->runtime->hw.info & SNDRV_PCM_INFO_HAS_LINK_ATIME) &&
868 (audio_tstamp_config->type_requested == SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK)) {
869
870 snd_pcm_gettime(substream->runtime, system_ts);
871
872 nsec = timecounter_read(&hstr->tc);
873 nsec = div_u64(nsec, 3); /* can be optimized */
874 if (audio_tstamp_config->report_delay)
875 nsec = skl_adjust_codec_delay(substream, nsec);
876
877 *audio_ts = ns_to_timespec(nsec);
878
879 audio_tstamp_report->actual_type = SNDRV_PCM_AUDIO_TSTAMP_TYPE_LINK;
880 audio_tstamp_report->accuracy_report = 1; /* rest of struct is valid */
881 audio_tstamp_report->accuracy = 42; /* 24MHzWallClk == 42ns resolution */
882
883 } else {
884 audio_tstamp_report->actual_type = SNDRV_PCM_AUDIO_TSTAMP_TYPE_DEFAULT;
885 }
886
887 return 0;
888}
889
890static struct snd_pcm_ops skl_platform_ops = {
891 .open = skl_platform_open,
892 .ioctl = snd_pcm_lib_ioctl,
893 .trigger = skl_platform_pcm_trigger,
894 .pointer = skl_platform_pcm_pointer,
895 .get_time_info = skl_get_time_info,
896 .mmap = snd_pcm_lib_default_mmap,
897 .page = snd_pcm_sgbuf_ops_page,
898};
899
900static void skl_pcm_free(struct snd_pcm *pcm)
901{
902 snd_pcm_lib_preallocate_free_for_all(pcm);
903}
904
905#define MAX_PREALLOC_SIZE (32 * 1024 * 1024)
906
907static int skl_pcm_new(struct snd_soc_pcm_runtime *rtd)
908{
909 struct snd_soc_dai *dai = rtd->cpu_dai;
910 struct hdac_ext_bus *ebus = dev_get_drvdata(dai->dev);
911 struct snd_pcm *pcm = rtd->pcm;
912 unsigned int size;
913 int retval = 0;
914 struct skl *skl = ebus_to_skl(ebus);
915
916 if (dai->driver->playback.channels_min ||
917 dai->driver->capture.channels_min) {
918 /* buffer pre-allocation */
919 size = CONFIG_SND_HDA_PREALLOC_SIZE * 1024;
920 if (size > MAX_PREALLOC_SIZE)
921 size = MAX_PREALLOC_SIZE;
922 retval = snd_pcm_lib_preallocate_pages_for_all(pcm,
923 SNDRV_DMA_TYPE_DEV_SG,
924 snd_dma_pci_data(skl->pci),
925 size, MAX_PREALLOC_SIZE);
926 if (retval) {
927 dev_err(dai->dev, "dma buffer allocationf fail\n");
928 return retval;
929 }
930 }
931
932 return retval;
933}
934
Jeeja KPb663a8c2015-10-07 11:31:57 +0100935static int skl_platform_soc_probe(struct snd_soc_platform *platform)
936{
937 struct hdac_ext_bus *ebus = dev_get_drvdata(platform->dev);
938
939 if (ebus->ppcap)
940 return skl_tplg_init(platform, ebus);
941
942 return 0;
943}
Jeeja KPa40e6932015-07-09 15:20:08 +0530944static struct snd_soc_platform_driver skl_platform_drv = {
Jeeja KPb663a8c2015-10-07 11:31:57 +0100945 .probe = skl_platform_soc_probe,
Jeeja KPa40e6932015-07-09 15:20:08 +0530946 .ops = &skl_platform_ops,
947 .pcm_new = skl_pcm_new,
948 .pcm_free = skl_pcm_free,
949};
950
951static const struct snd_soc_component_driver skl_component = {
952 .name = "pcm",
953};
954
955int skl_platform_register(struct device *dev)
956{
957 int ret;
Jeeja KPb663a8c2015-10-07 11:31:57 +0100958 struct hdac_ext_bus *ebus = dev_get_drvdata(dev);
959 struct skl *skl = ebus_to_skl(ebus);
960
961 INIT_LIST_HEAD(&skl->ppl_list);
Jeeja KPa40e6932015-07-09 15:20:08 +0530962
963 ret = snd_soc_register_platform(dev, &skl_platform_drv);
964 if (ret) {
965 dev_err(dev, "soc platform registration failed %d\n", ret);
966 return ret;
967 }
968 ret = snd_soc_register_component(dev, &skl_component,
969 skl_platform_dai,
970 ARRAY_SIZE(skl_platform_dai));
971 if (ret) {
972 dev_err(dev, "soc component registration failed %d\n", ret);
973 snd_soc_unregister_platform(dev);
974 }
975
976 return ret;
977
978}
979
980int skl_platform_unregister(struct device *dev)
981{
982 snd_soc_unregister_component(dev);
983 snd_soc_unregister_platform(dev);
984 return 0;
985}