blob: 3455f833e473c8a053898c4e96e540612dd1d10e [file] [log] [blame]
Dimitris Papastamos9fabe242011-09-19 14:34:00 +01001/*
2 * Register cache access API
3 *
4 * Copyright 2011 Wolfson Microelectronics plc
5 *
6 * Author: Dimitris Papastamos <dp@opensource.wolfsonmicro.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include <linux/slab.h>
Paul Gortmaker1b6bc322011-05-27 07:12:15 -040014#include <linux/export.h>
Paul Gortmaker51990e82012-01-22 11:23:42 -050015#include <linux/device.h>
Dimitris Papastamos9fabe242011-09-19 14:34:00 +010016#include <trace/events/regmap.h>
Mark Brownf094fea2011-10-04 22:05:47 +010017#include <linux/bsearch.h>
Dimitris Papastamosc08604b2011-10-03 10:50:14 +010018#include <linux/sort.h>
Dimitris Papastamos9fabe242011-09-19 14:34:00 +010019
20#include "internal.h"
21
22static const struct regcache_ops *cache_types[] = {
Dimitris Papastamos28644c802011-09-19 14:34:02 +010023 &regcache_rbtree_ops,
Dimitris Papastamos2cbbb572011-09-19 14:34:03 +010024 &regcache_lzo_ops,
Mark Brown2ac902c2012-12-19 14:51:55 +000025 &regcache_flat_ops,
Dimitris Papastamos9fabe242011-09-19 14:34:00 +010026};
27
28static int regcache_hw_init(struct regmap *map)
29{
30 int i, j;
31 int ret;
32 int count;
33 unsigned int val;
34 void *tmp_buf;
35
36 if (!map->num_reg_defaults_raw)
37 return -EINVAL;
38
39 if (!map->reg_defaults_raw) {
Laxman Dewangandf00c792012-02-17 18:57:26 +053040 u32 cache_bypass = map->cache_bypass;
Dimitris Papastamos9fabe242011-09-19 14:34:00 +010041 dev_warn(map->dev, "No cache defaults, reading back from HW\n");
Laxman Dewangandf00c792012-02-17 18:57:26 +053042
43 /* Bypass the cache access till data read from HW*/
44 map->cache_bypass = 1;
Dimitris Papastamos9fabe242011-09-19 14:34:00 +010045 tmp_buf = kmalloc(map->cache_size_raw, GFP_KERNEL);
46 if (!tmp_buf)
47 return -EINVAL;
Mark Browneb4cb762013-02-21 18:39:47 +000048 ret = regmap_raw_read(map, 0, tmp_buf,
49 map->num_reg_defaults_raw);
Laxman Dewangandf00c792012-02-17 18:57:26 +053050 map->cache_bypass = cache_bypass;
Dimitris Papastamos9fabe242011-09-19 14:34:00 +010051 if (ret < 0) {
52 kfree(tmp_buf);
53 return ret;
54 }
55 map->reg_defaults_raw = tmp_buf;
56 map->cache_free = 1;
57 }
58
59 /* calculate the size of reg_defaults */
60 for (count = 0, i = 0; i < map->num_reg_defaults_raw; i++) {
Mark Brown879082c2013-02-21 18:03:13 +000061 val = regcache_get_val(map, map->reg_defaults_raw, i);
Stephen Warrenf01ee602012-04-09 13:40:24 -060062 if (regmap_volatile(map, i * map->reg_stride))
Dimitris Papastamos9fabe242011-09-19 14:34:00 +010063 continue;
64 count++;
65 }
66
67 map->reg_defaults = kmalloc(count * sizeof(struct reg_default),
68 GFP_KERNEL);
Lars-Peter Clausen021cd612011-11-14 10:40:16 +010069 if (!map->reg_defaults) {
70 ret = -ENOMEM;
71 goto err_free;
72 }
Dimitris Papastamos9fabe242011-09-19 14:34:00 +010073
74 /* fill the reg_defaults */
75 map->num_reg_defaults = count;
76 for (i = 0, j = 0; i < map->num_reg_defaults_raw; i++) {
Mark Brown879082c2013-02-21 18:03:13 +000077 val = regcache_get_val(map, map->reg_defaults_raw, i);
Stephen Warrenf01ee602012-04-09 13:40:24 -060078 if (regmap_volatile(map, i * map->reg_stride))
Dimitris Papastamos9fabe242011-09-19 14:34:00 +010079 continue;
Stephen Warrenf01ee602012-04-09 13:40:24 -060080 map->reg_defaults[j].reg = i * map->reg_stride;
Dimitris Papastamos9fabe242011-09-19 14:34:00 +010081 map->reg_defaults[j].def = val;
82 j++;
83 }
84
85 return 0;
Lars-Peter Clausen021cd612011-11-14 10:40:16 +010086
87err_free:
88 if (map->cache_free)
89 kfree(map->reg_defaults_raw);
90
91 return ret;
Dimitris Papastamos9fabe242011-09-19 14:34:00 +010092}
93
Lars-Peter Clausene5e3b8a2011-11-16 16:28:16 +010094int regcache_init(struct regmap *map, const struct regmap_config *config)
Dimitris Papastamos9fabe242011-09-19 14:34:00 +010095{
96 int ret;
97 int i;
98 void *tmp_buf;
99
Stephen Warrenf01ee602012-04-09 13:40:24 -0600100 for (i = 0; i < config->num_reg_defaults; i++)
101 if (config->reg_defaults[i].reg % map->reg_stride)
102 return -EINVAL;
103
Mark Browne7a6db32011-09-19 16:08:03 +0100104 if (map->cache_type == REGCACHE_NONE) {
105 map->cache_bypass = true;
Dimitris Papastamos9fabe242011-09-19 14:34:00 +0100106 return 0;
Mark Browne7a6db32011-09-19 16:08:03 +0100107 }
Dimitris Papastamos9fabe242011-09-19 14:34:00 +0100108
109 for (i = 0; i < ARRAY_SIZE(cache_types); i++)
110 if (cache_types[i]->type == map->cache_type)
111 break;
112
113 if (i == ARRAY_SIZE(cache_types)) {
114 dev_err(map->dev, "Could not match compress type: %d\n",
115 map->cache_type);
116 return -EINVAL;
117 }
118
Lars-Peter Clausene5e3b8a2011-11-16 16:28:16 +0100119 map->num_reg_defaults = config->num_reg_defaults;
120 map->num_reg_defaults_raw = config->num_reg_defaults_raw;
121 map->reg_defaults_raw = config->reg_defaults_raw;
Lars-Peter Clausen064d4db2011-11-16 20:34:03 +0100122 map->cache_word_size = DIV_ROUND_UP(config->val_bits, 8);
123 map->cache_size_raw = map->cache_word_size * config->num_reg_defaults_raw;
Mark Brown78493f22013-03-29 19:18:59 +0000124 map->cache_present = NULL;
125 map->cache_present_nbits = 0;
Lars-Peter Clausene5e3b8a2011-11-16 16:28:16 +0100126
Dimitris Papastamos9fabe242011-09-19 14:34:00 +0100127 map->cache = NULL;
128 map->cache_ops = cache_types[i];
129
130 if (!map->cache_ops->read ||
131 !map->cache_ops->write ||
132 !map->cache_ops->name)
133 return -EINVAL;
134
135 /* We still need to ensure that the reg_defaults
136 * won't vanish from under us. We'll need to make
137 * a copy of it.
138 */
Lars-Peter Clausen720e4612011-11-16 16:28:17 +0100139 if (config->reg_defaults) {
Dimitris Papastamos9fabe242011-09-19 14:34:00 +0100140 if (!map->num_reg_defaults)
141 return -EINVAL;
Lars-Peter Clausen720e4612011-11-16 16:28:17 +0100142 tmp_buf = kmemdup(config->reg_defaults, map->num_reg_defaults *
Dimitris Papastamos9fabe242011-09-19 14:34:00 +0100143 sizeof(struct reg_default), GFP_KERNEL);
144 if (!tmp_buf)
145 return -ENOMEM;
146 map->reg_defaults = tmp_buf;
Mark Brown8528bdd2011-10-09 13:13:58 +0100147 } else if (map->num_reg_defaults_raw) {
Mark Brown5fcd2562011-09-29 15:24:54 +0100148 /* Some devices such as PMICs don't have cache defaults,
Dimitris Papastamos9fabe242011-09-19 14:34:00 +0100149 * we cope with this by reading back the HW registers and
150 * crafting the cache defaults by hand.
151 */
152 ret = regcache_hw_init(map);
153 if (ret < 0)
154 return ret;
155 }
156
157 if (!map->max_register)
158 map->max_register = map->num_reg_defaults_raw;
159
160 if (map->cache_ops->init) {
161 dev_dbg(map->dev, "Initializing %s cache\n",
162 map->cache_ops->name);
Lars-Peter Clausenbd061c72011-11-14 10:40:17 +0100163 ret = map->cache_ops->init(map);
164 if (ret)
165 goto err_free;
Dimitris Papastamos9fabe242011-09-19 14:34:00 +0100166 }
167 return 0;
Lars-Peter Clausenbd061c72011-11-14 10:40:17 +0100168
169err_free:
170 kfree(map->reg_defaults);
171 if (map->cache_free)
172 kfree(map->reg_defaults_raw);
173
174 return ret;
Dimitris Papastamos9fabe242011-09-19 14:34:00 +0100175}
176
177void regcache_exit(struct regmap *map)
178{
179 if (map->cache_type == REGCACHE_NONE)
180 return;
181
182 BUG_ON(!map->cache_ops);
183
Mark Brown78493f22013-03-29 19:18:59 +0000184 kfree(map->cache_present);
Dimitris Papastamos9fabe242011-09-19 14:34:00 +0100185 kfree(map->reg_defaults);
186 if (map->cache_free)
187 kfree(map->reg_defaults_raw);
188
189 if (map->cache_ops->exit) {
190 dev_dbg(map->dev, "Destroying %s cache\n",
191 map->cache_ops->name);
192 map->cache_ops->exit(map);
193 }
194}
195
196/**
197 * regcache_read: Fetch the value of a given register from the cache.
198 *
199 * @map: map to configure.
200 * @reg: The register index.
201 * @value: The value to be returned.
202 *
203 * Return a negative value on failure, 0 on success.
204 */
205int regcache_read(struct regmap *map,
206 unsigned int reg, unsigned int *value)
207{
Mark Brownbc7ee552011-11-30 14:27:08 +0000208 int ret;
209
Dimitris Papastamos9fabe242011-09-19 14:34:00 +0100210 if (map->cache_type == REGCACHE_NONE)
211 return -ENOSYS;
212
213 BUG_ON(!map->cache_ops);
214
Mark Brownbc7ee552011-11-30 14:27:08 +0000215 if (!regmap_volatile(map, reg)) {
216 ret = map->cache_ops->read(map, reg, value);
217
218 if (ret == 0)
219 trace_regmap_reg_read_cache(map->dev, reg, *value);
220
221 return ret;
222 }
Dimitris Papastamos9fabe242011-09-19 14:34:00 +0100223
224 return -EINVAL;
225}
Dimitris Papastamos9fabe242011-09-19 14:34:00 +0100226
227/**
228 * regcache_write: Set the value of a given register in the cache.
229 *
230 * @map: map to configure.
231 * @reg: The register index.
232 * @value: The new register value.
233 *
234 * Return a negative value on failure, 0 on success.
235 */
236int regcache_write(struct regmap *map,
237 unsigned int reg, unsigned int value)
238{
239 if (map->cache_type == REGCACHE_NONE)
240 return 0;
241
242 BUG_ON(!map->cache_ops);
243
244 if (!regmap_writeable(map, reg))
245 return -EIO;
246
247 if (!regmap_volatile(map, reg))
248 return map->cache_ops->write(map, reg, value);
249
250 return 0;
251}
Dimitris Papastamos9fabe242011-09-19 14:34:00 +0100252
Maarten ter Huurned856fce2013-06-03 00:15:26 +0200253static int regcache_default_sync(struct regmap *map, unsigned int min,
254 unsigned int max)
255{
256 unsigned int reg;
257
258 for (reg = min; reg <= max; reg++) {
259 unsigned int val;
260 int ret;
261
262 if (regmap_volatile(map, reg))
263 continue;
264
265 ret = regcache_read(map, reg, &val);
266 if (ret)
267 return ret;
268
269 /* Is this the hardware default? If so skip. */
270 ret = regcache_lookup_reg(map, reg);
271 if (ret >= 0 && val == map->reg_defaults[ret].def)
272 continue;
273
274 map->cache_bypass = 1;
275 ret = _regmap_write(map, reg, val);
276 map->cache_bypass = 0;
277 if (ret)
278 return ret;
279 dev_dbg(map->dev, "Synced register %#x, value %#x\n", reg, val);
280 }
281
282 return 0;
283}
284
Dimitris Papastamos9fabe242011-09-19 14:34:00 +0100285/**
286 * regcache_sync: Sync the register cache with the hardware.
287 *
288 * @map: map to configure.
289 *
290 * Any registers that should not be synced should be marked as
291 * volatile. In general drivers can choose not to use the provided
292 * syncing functionality if they so require.
293 *
294 * Return a negative value on failure, 0 on success.
295 */
296int regcache_sync(struct regmap *map)
297{
Dimitris Papastamos954757d2011-09-27 11:25:06 +0100298 int ret = 0;
Dimitris Papastamos954757d2011-09-27 11:25:06 +0100299 unsigned int i;
Dimitris Papastamos59360082011-09-19 14:34:04 +0100300 const char *name;
Dimitris Papastamosbeb1a102011-09-29 14:36:26 +0100301 unsigned int bypass;
Dimitris Papastamos59360082011-09-19 14:34:04 +0100302
Maarten ter Huurned856fce2013-06-03 00:15:26 +0200303 BUG_ON(!map->cache_ops);
Dimitris Papastamos9fabe242011-09-19 14:34:00 +0100304
Lars-Peter Clausen81485f52013-05-23 15:06:15 +0200305 map->lock(map->lock_arg);
Dimitris Papastamosbeb1a102011-09-29 14:36:26 +0100306 /* Remember the initial bypass state */
307 bypass = map->cache_bypass;
Dimitris Papastamos954757d2011-09-27 11:25:06 +0100308 dev_dbg(map->dev, "Syncing %s cache\n",
309 map->cache_ops->name);
310 name = map->cache_ops->name;
311 trace_regcache_sync(map->dev, name, "start");
Mark Brown22f0d902012-01-21 12:01:14 +0000312
Mark Brown8ae0d7e2011-10-26 10:34:22 +0200313 if (!map->cache_dirty)
314 goto out;
Mark Brownd9db7622012-01-25 21:06:33 +0000315
Mark Brown22f0d902012-01-21 12:01:14 +0000316 /* Apply any patch first */
Mark Brown8a892d62012-01-25 21:05:48 +0000317 map->cache_bypass = 1;
Mark Brown22f0d902012-01-21 12:01:14 +0000318 for (i = 0; i < map->patch_regs; i++) {
Stephen Warrenf01ee602012-04-09 13:40:24 -0600319 if (map->patch[i].reg % map->reg_stride) {
320 ret = -EINVAL;
321 goto out;
322 }
Mark Brown22f0d902012-01-21 12:01:14 +0000323 ret = _regmap_write(map, map->patch[i].reg, map->patch[i].def);
324 if (ret != 0) {
325 dev_err(map->dev, "Failed to write %x = %x: %d\n",
326 map->patch[i].reg, map->patch[i].def, ret);
327 goto out;
328 }
329 }
Mark Brown8a892d62012-01-25 21:05:48 +0000330 map->cache_bypass = 0;
Mark Brown22f0d902012-01-21 12:01:14 +0000331
Maarten ter Huurned856fce2013-06-03 00:15:26 +0200332 if (map->cache_ops->sync)
333 ret = map->cache_ops->sync(map, 0, map->max_register);
334 else
335 ret = regcache_default_sync(map, 0, map->max_register);
Dimitris Papastamos954757d2011-09-27 11:25:06 +0100336
Mark Brown6ff73732012-02-23 22:05:59 +0000337 if (ret == 0)
338 map->cache_dirty = false;
339
Dimitris Papastamos954757d2011-09-27 11:25:06 +0100340out:
341 trace_regcache_sync(map->dev, name, "stop");
Dimitris Papastamosbeb1a102011-09-29 14:36:26 +0100342 /* Restore the bypass state */
343 map->cache_bypass = bypass;
Lars-Peter Clausen81485f52013-05-23 15:06:15 +0200344 map->unlock(map->lock_arg);
Dimitris Papastamos954757d2011-09-27 11:25:06 +0100345
346 return ret;
Dimitris Papastamos9fabe242011-09-19 14:34:00 +0100347}
348EXPORT_SYMBOL_GPL(regcache_sync);
349
Mark Brown92afb282011-09-19 18:22:14 +0100350/**
Mark Brown4d4cfd12012-02-23 20:53:37 +0000351 * regcache_sync_region: Sync part of the register cache with the hardware.
352 *
353 * @map: map to sync.
354 * @min: first register to sync
355 * @max: last register to sync
356 *
357 * Write all non-default register values in the specified region to
358 * the hardware.
359 *
360 * Return a negative value on failure, 0 on success.
361 */
362int regcache_sync_region(struct regmap *map, unsigned int min,
363 unsigned int max)
364{
365 int ret = 0;
366 const char *name;
367 unsigned int bypass;
368
Maarten ter Huurned856fce2013-06-03 00:15:26 +0200369 BUG_ON(!map->cache_ops);
Mark Brown4d4cfd12012-02-23 20:53:37 +0000370
Lars-Peter Clausen81485f52013-05-23 15:06:15 +0200371 map->lock(map->lock_arg);
Mark Brown4d4cfd12012-02-23 20:53:37 +0000372
373 /* Remember the initial bypass state */
374 bypass = map->cache_bypass;
375
376 name = map->cache_ops->name;
377 dev_dbg(map->dev, "Syncing %s cache from %d-%d\n", name, min, max);
378
379 trace_regcache_sync(map->dev, name, "start region");
380
381 if (!map->cache_dirty)
382 goto out;
383
Maarten ter Huurned856fce2013-06-03 00:15:26 +0200384 if (map->cache_ops->sync)
385 ret = map->cache_ops->sync(map, min, max);
386 else
387 ret = regcache_default_sync(map, min, max);
Mark Brown4d4cfd12012-02-23 20:53:37 +0000388
389out:
390 trace_regcache_sync(map->dev, name, "stop region");
391 /* Restore the bypass state */
392 map->cache_bypass = bypass;
Lars-Peter Clausen81485f52013-05-23 15:06:15 +0200393 map->unlock(map->lock_arg);
Mark Brown4d4cfd12012-02-23 20:53:37 +0000394
395 return ret;
396}
Mark Browne466de02012-04-03 13:08:53 +0100397EXPORT_SYMBOL_GPL(regcache_sync_region);
Mark Brown4d4cfd12012-02-23 20:53:37 +0000398
399/**
Mark Brown697e85b2013-05-08 13:55:22 +0100400 * regcache_drop_region: Discard part of the register cache
401 *
402 * @map: map to operate on
403 * @min: first register to discard
404 * @max: last register to discard
405 *
406 * Discard part of the register cache.
407 *
408 * Return a negative value on failure, 0 on success.
409 */
410int regcache_drop_region(struct regmap *map, unsigned int min,
411 unsigned int max)
412{
413 unsigned int reg;
414 int ret = 0;
415
416 if (!map->cache_present && !(map->cache_ops && map->cache_ops->drop))
417 return -EINVAL;
418
Lars-Peter Clausen81485f52013-05-23 15:06:15 +0200419 map->lock(map->lock_arg);
Mark Brown697e85b2013-05-08 13:55:22 +0100420
421 trace_regcache_drop_region(map->dev, min, max);
422
423 if (map->cache_present)
424 for (reg = min; reg < max + 1; reg++)
425 clear_bit(reg, map->cache_present);
426
427 if (map->cache_ops && map->cache_ops->drop)
428 ret = map->cache_ops->drop(map, min, max);
429
Lars-Peter Clausen81485f52013-05-23 15:06:15 +0200430 map->unlock(map->lock_arg);
Mark Brown697e85b2013-05-08 13:55:22 +0100431
432 return ret;
433}
434EXPORT_SYMBOL_GPL(regcache_drop_region);
435
436/**
Mark Brown92afb282011-09-19 18:22:14 +0100437 * regcache_cache_only: Put a register map into cache only mode
438 *
439 * @map: map to configure
440 * @cache_only: flag if changes should be written to the hardware
441 *
442 * When a register map is marked as cache only writes to the register
443 * map API will only update the register cache, they will not cause
444 * any hardware changes. This is useful for allowing portions of
445 * drivers to act as though the device were functioning as normal when
446 * it is disabled for power saving reasons.
447 */
448void regcache_cache_only(struct regmap *map, bool enable)
449{
Lars-Peter Clausen81485f52013-05-23 15:06:15 +0200450 map->lock(map->lock_arg);
Dimitris Papastamosac77a762011-09-29 14:36:28 +0100451 WARN_ON(map->cache_bypass && enable);
Mark Brown92afb282011-09-19 18:22:14 +0100452 map->cache_only = enable;
Mark Brown5d5b7d42012-02-23 22:02:57 +0000453 trace_regmap_cache_only(map->dev, enable);
Lars-Peter Clausen81485f52013-05-23 15:06:15 +0200454 map->unlock(map->lock_arg);
Mark Brown92afb282011-09-19 18:22:14 +0100455}
456EXPORT_SYMBOL_GPL(regcache_cache_only);
457
Dimitris Papastamos6eb0f5e2011-09-29 14:36:27 +0100458/**
Mark Brown8ae0d7e2011-10-26 10:34:22 +0200459 * regcache_mark_dirty: Mark the register cache as dirty
460 *
461 * @map: map to mark
462 *
463 * Mark the register cache as dirty, for example due to the device
464 * having been powered down for suspend. If the cache is not marked
465 * as dirty then the cache sync will be suppressed.
466 */
467void regcache_mark_dirty(struct regmap *map)
468{
Lars-Peter Clausen81485f52013-05-23 15:06:15 +0200469 map->lock(map->lock_arg);
Mark Brown8ae0d7e2011-10-26 10:34:22 +0200470 map->cache_dirty = true;
Lars-Peter Clausen81485f52013-05-23 15:06:15 +0200471 map->unlock(map->lock_arg);
Mark Brown8ae0d7e2011-10-26 10:34:22 +0200472}
473EXPORT_SYMBOL_GPL(regcache_mark_dirty);
474
475/**
Dimitris Papastamos6eb0f5e2011-09-29 14:36:27 +0100476 * regcache_cache_bypass: Put a register map into cache bypass mode
477 *
478 * @map: map to configure
Dimitris Papastamos0eef6b02011-10-03 06:54:16 +0100479 * @cache_bypass: flag if changes should not be written to the hardware
Dimitris Papastamos6eb0f5e2011-09-29 14:36:27 +0100480 *
481 * When a register map is marked with the cache bypass option, writes
482 * to the register map API will only update the hardware and not the
483 * the cache directly. This is useful when syncing the cache back to
484 * the hardware.
485 */
486void regcache_cache_bypass(struct regmap *map, bool enable)
487{
Lars-Peter Clausen81485f52013-05-23 15:06:15 +0200488 map->lock(map->lock_arg);
Dimitris Papastamosac77a762011-09-29 14:36:28 +0100489 WARN_ON(map->cache_only && enable);
Dimitris Papastamos6eb0f5e2011-09-29 14:36:27 +0100490 map->cache_bypass = enable;
Mark Brown5d5b7d42012-02-23 22:02:57 +0000491 trace_regmap_cache_bypass(map->dev, enable);
Lars-Peter Clausen81485f52013-05-23 15:06:15 +0200492 map->unlock(map->lock_arg);
Dimitris Papastamos6eb0f5e2011-09-29 14:36:27 +0100493}
494EXPORT_SYMBOL_GPL(regcache_cache_bypass);
495
Mark Brown78493f22013-03-29 19:18:59 +0000496int regcache_set_reg_present(struct regmap *map, unsigned int reg)
497{
498 unsigned long *cache_present;
499 unsigned int cache_present_size;
500 unsigned int nregs;
501 int i;
502
503 nregs = reg + 1;
504 cache_present_size = BITS_TO_LONGS(nregs);
505 cache_present_size *= sizeof(long);
506
507 if (!map->cache_present) {
508 cache_present = kmalloc(cache_present_size, GFP_KERNEL);
509 if (!cache_present)
510 return -ENOMEM;
511 bitmap_zero(cache_present, nregs);
512 map->cache_present = cache_present;
513 map->cache_present_nbits = nregs;
514 }
515
516 if (nregs > map->cache_present_nbits) {
517 cache_present = krealloc(map->cache_present,
518 cache_present_size, GFP_KERNEL);
519 if (!cache_present)
520 return -ENOMEM;
521 for (i = 0; i < nregs; i++)
522 if (i >= map->cache_present_nbits)
523 clear_bit(i, cache_present);
524 map->cache_present = cache_present;
525 map->cache_present_nbits = nregs;
526 }
527
528 set_bit(reg, map->cache_present);
529 return 0;
530}
531
Mark Brown879082c2013-02-21 18:03:13 +0000532bool regcache_set_val(struct regmap *map, void *base, unsigned int idx,
533 unsigned int val)
Dimitris Papastamos9fabe242011-09-19 14:34:00 +0100534{
Mark Brown325acab2013-02-21 18:07:01 +0000535 if (regcache_get_val(map, base, idx) == val)
536 return true;
537
Mark Browneb4cb762013-02-21 18:39:47 +0000538 /* Use device native format if possible */
539 if (map->format.format_val) {
540 map->format.format_val(base + (map->cache_word_size * idx),
541 val, 0);
542 return false;
543 }
544
Mark Brown879082c2013-02-21 18:03:13 +0000545 switch (map->cache_word_size) {
Dimitris Papastamos9fabe242011-09-19 14:34:00 +0100546 case 1: {
547 u8 *cache = base;
Dimitris Papastamos9fabe242011-09-19 14:34:00 +0100548 cache[idx] = val;
549 break;
550 }
551 case 2: {
552 u16 *cache = base;
Dimitris Papastamos9fabe242011-09-19 14:34:00 +0100553 cache[idx] = val;
554 break;
555 }
Mark Brown7d5e5252012-02-17 15:58:25 -0800556 case 4: {
557 u32 *cache = base;
Mark Brown7d5e5252012-02-17 15:58:25 -0800558 cache[idx] = val;
559 break;
560 }
Dimitris Papastamos9fabe242011-09-19 14:34:00 +0100561 default:
562 BUG();
563 }
Dimitris Papastamos9fabe242011-09-19 14:34:00 +0100564 return false;
565}
566
Mark Brown879082c2013-02-21 18:03:13 +0000567unsigned int regcache_get_val(struct regmap *map, const void *base,
568 unsigned int idx)
Dimitris Papastamos9fabe242011-09-19 14:34:00 +0100569{
570 if (!base)
571 return -EINVAL;
572
Mark Browneb4cb762013-02-21 18:39:47 +0000573 /* Use device native format if possible */
574 if (map->format.parse_val)
Mark Brown88177962013-03-13 19:29:36 +0000575 return map->format.parse_val(regcache_get_val_addr(map, base,
576 idx));
Mark Browneb4cb762013-02-21 18:39:47 +0000577
Mark Brown879082c2013-02-21 18:03:13 +0000578 switch (map->cache_word_size) {
Dimitris Papastamos9fabe242011-09-19 14:34:00 +0100579 case 1: {
580 const u8 *cache = base;
581 return cache[idx];
582 }
583 case 2: {
584 const u16 *cache = base;
585 return cache[idx];
586 }
Mark Brown7d5e5252012-02-17 15:58:25 -0800587 case 4: {
588 const u32 *cache = base;
589 return cache[idx];
590 }
Dimitris Papastamos9fabe242011-09-19 14:34:00 +0100591 default:
592 BUG();
593 }
594 /* unreachable */
595 return -1;
596}
597
Mark Brownf094fea2011-10-04 22:05:47 +0100598static int regcache_default_cmp(const void *a, const void *b)
Dimitris Papastamosc08604b2011-10-03 10:50:14 +0100599{
600 const struct reg_default *_a = a;
601 const struct reg_default *_b = b;
602
603 return _a->reg - _b->reg;
604}
605
Mark Brownf094fea2011-10-04 22:05:47 +0100606int regcache_lookup_reg(struct regmap *map, unsigned int reg)
607{
608 struct reg_default key;
609 struct reg_default *r;
610
611 key.reg = reg;
612 key.def = 0;
613
614 r = bsearch(&key, map->reg_defaults, map->num_reg_defaults,
615 sizeof(struct reg_default), regcache_default_cmp);
616
617 if (r)
618 return r - map->reg_defaults;
619 else
Mark Brown6e6ace02011-10-09 13:23:31 +0100620 return -ENOENT;
Mark Brownf094fea2011-10-04 22:05:47 +0100621}
Mark Brownf8bd8222013-03-29 19:32:28 +0000622
Mark Browncfdeb8c2013-03-29 20:12:21 +0000623static int regcache_sync_block_single(struct regmap *map, void *block,
624 unsigned int block_base,
625 unsigned int start, unsigned int end)
626{
627 unsigned int i, regtmp, val;
628 int ret;
629
630 for (i = start; i < end; i++) {
631 regtmp = block_base + (i * map->reg_stride);
632
633 if (!regcache_reg_present(map, regtmp))
634 continue;
635
636 val = regcache_get_val(map, block, i);
637
638 /* Is this the hardware default? If so skip. */
639 ret = regcache_lookup_reg(map, regtmp);
640 if (ret >= 0 && val == map->reg_defaults[ret].def)
641 continue;
642
643 map->cache_bypass = 1;
644
645 ret = _regmap_write(map, regtmp, val);
646
647 map->cache_bypass = 0;
648 if (ret != 0)
649 return ret;
650 dev_dbg(map->dev, "Synced register %#x, value %#x\n",
651 regtmp, val);
652 }
653
654 return 0;
655}
656
Mark Brown75a5f892013-03-29 20:50:07 +0000657static int regcache_sync_block_raw_flush(struct regmap *map, const void **data,
658 unsigned int base, unsigned int cur)
659{
660 size_t val_bytes = map->format.val_bytes;
661 int ret, count;
662
663 if (*data == NULL)
664 return 0;
665
666 count = cur - base;
667
Stratos Karafotis96592932013-04-04 19:40:45 +0300668 dev_dbg(map->dev, "Writing %zu bytes for %d registers from 0x%x-0x%x\n",
Mark Brown75a5f892013-03-29 20:50:07 +0000669 count * val_bytes, count, base, cur - 1);
670
671 map->cache_bypass = 1;
672
673 ret = _regmap_raw_write(map, base, *data, count * val_bytes,
674 false);
675
676 map->cache_bypass = 0;
677
678 *data = NULL;
679
680 return ret;
681}
682
Sachin Kamatf52687a2013-04-04 14:36:18 +0530683static int regcache_sync_block_raw(struct regmap *map, void *block,
Mark Browncfdeb8c2013-03-29 20:12:21 +0000684 unsigned int block_base, unsigned int start,
685 unsigned int end)
Mark Brownf8bd8222013-03-29 19:32:28 +0000686{
Mark Brown75a5f892013-03-29 20:50:07 +0000687 unsigned int i, val;
688 unsigned int regtmp = 0;
689 unsigned int base = 0;
690 const void *data = NULL;
Mark Brownf8bd8222013-03-29 19:32:28 +0000691 int ret;
692
693 for (i = start; i < end; i++) {
694 regtmp = block_base + (i * map->reg_stride);
695
Mark Brown75a5f892013-03-29 20:50:07 +0000696 if (!regcache_reg_present(map, regtmp)) {
697 ret = regcache_sync_block_raw_flush(map, &data,
698 base, regtmp);
699 if (ret != 0)
700 return ret;
Mark Brownf8bd8222013-03-29 19:32:28 +0000701 continue;
Mark Brown75a5f892013-03-29 20:50:07 +0000702 }
Mark Brownf8bd8222013-03-29 19:32:28 +0000703
704 val = regcache_get_val(map, block, i);
705
706 /* Is this the hardware default? If so skip. */
707 ret = regcache_lookup_reg(map, regtmp);
Mark Brown75a5f892013-03-29 20:50:07 +0000708 if (ret >= 0 && val == map->reg_defaults[ret].def) {
709 ret = regcache_sync_block_raw_flush(map, &data,
710 base, regtmp);
711 if (ret != 0)
712 return ret;
Mark Brownf8bd8222013-03-29 19:32:28 +0000713 continue;
Mark Brown75a5f892013-03-29 20:50:07 +0000714 }
Mark Brownf8bd8222013-03-29 19:32:28 +0000715
Mark Brown75a5f892013-03-29 20:50:07 +0000716 if (!data) {
717 data = regcache_get_val_addr(map, block, i);
718 base = regtmp;
719 }
Mark Brownf8bd8222013-03-29 19:32:28 +0000720 }
721
Lars-Peter Clausen2d49b592013-08-05 11:21:29 +0200722 return regcache_sync_block_raw_flush(map, &data, base, regtmp +
723 map->reg_stride);
Mark Brownf8bd8222013-03-29 19:32:28 +0000724}
Mark Browncfdeb8c2013-03-29 20:12:21 +0000725
726int regcache_sync_block(struct regmap *map, void *block,
727 unsigned int block_base, unsigned int start,
728 unsigned int end)
729{
730 if (regmap_can_raw_write(map))
731 return regcache_sync_block_raw(map, block, block_base,
732 start, end);
733 else
734 return regcache_sync_block_single(map, block, block_base,
735 start, end);
736}