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Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
Jeff Garzikaf36d7f2005-08-28 20:18:39 -04002 * sata_via.c - VIA Serial ATA controllers
3 *
4 * Maintained by: Jeff Garzik <jgarzik@pobox.com>
5 * Please ALWAYS copy linux-ide@vger.kernel.org
Jeff Garzik5796d1c2007-10-26 00:03:37 -04006 * on emails.
Jeff Garzikaf36d7f2005-08-28 20:18:39 -04007 *
8 * Copyright 2003-2004 Red Hat, Inc. All rights reserved.
9 * Copyright 2003-2004 Jeff Garzik
10 *
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2, or (at your option)
15 * any later version.
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; see the file COPYING. If not, write to
24 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
25 *
26 *
27 * libata documentation is available via 'make {ps|pdf}docs',
28 * as Documentation/DocBook/libata.*
29 *
30 * Hardware documentation available under NDA.
31 *
32 *
Jeff Garzikaf36d7f2005-08-28 20:18:39 -040033 *
Linus Torvalds1da177e2005-04-16 15:20:36 -070034 */
35
36#include <linux/kernel.h>
37#include <linux/module.h>
38#include <linux/pci.h>
39#include <linux/init.h>
40#include <linux/blkdev.h>
41#include <linux/delay.h>
Jeff Garzika9524a72005-10-30 14:39:11 -050042#include <linux/device.h>
Bart Hartgersa55ab492010-02-14 13:04:50 +010043#include <scsi/scsi.h>
44#include <scsi/scsi_cmnd.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070045#include <scsi/scsi_host.h>
46#include <linux/libata.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070047
48#define DRV_NAME "sata_via"
Bart Hartgersa55ab492010-02-14 13:04:50 +010049#define DRV_VERSION "2.6"
Linus Torvalds1da177e2005-04-16 15:20:36 -070050
Tejun Heob9d5b892008-10-22 00:46:36 +090051/*
52 * vt8251 is different from other sata controllers of VIA. It has two
53 * channels, each channel has both Master and Slave slot.
54 */
Linus Torvalds1da177e2005-04-16 15:20:36 -070055enum board_ids_enum {
56 vt6420,
57 vt6421,
Tejun Heob9d5b892008-10-22 00:46:36 +090058 vt8251,
Linus Torvalds1da177e2005-04-16 15:20:36 -070059};
60
61enum {
62 SATA_CHAN_ENAB = 0x40, /* SATA channel enable */
63 SATA_INT_GATE = 0x41, /* SATA interrupt gating */
64 SATA_NATIVE_MODE = 0x42, /* Native mode enable */
Aland73f30e2007-01-08 17:11:13 +000065 PATA_UDMA_TIMING = 0xB3, /* PATA timing for DMA/ cable detect */
66 PATA_PIO_TIMING = 0xAB, /* PATA timing register */
Jeff Garzika84471f2007-02-26 05:51:33 -050067
Linus Torvalds1da177e2005-04-16 15:20:36 -070068 PORT0 = (1 << 1),
69 PORT1 = (1 << 0),
70 ALL_PORTS = PORT0 | PORT1,
Linus Torvalds1da177e2005-04-16 15:20:36 -070071
72 NATIVE_MODE_ALL = (1 << 7) | (1 << 6) | (1 << 5) | (1 << 4),
73
74 SATA_EXT_PHY = (1 << 6), /* 0==use PATA, 1==ext phy */
Linus Torvalds1da177e2005-04-16 15:20:36 -070075};
76
Jeff Garzik5796d1c2007-10-26 00:03:37 -040077static int svia_init_one(struct pci_dev *pdev, const struct pci_device_id *ent);
Tejun Heo82ef04f2008-07-31 17:02:40 +090078static int svia_scr_read(struct ata_link *link, unsigned int sc_reg, u32 *val);
79static int svia_scr_write(struct ata_link *link, unsigned int sc_reg, u32 val);
Tejun Heob9d5b892008-10-22 00:46:36 +090080static int vt8251_scr_read(struct ata_link *link, unsigned int scr, u32 *val);
81static int vt8251_scr_write(struct ata_link *link, unsigned int scr, u32 val);
Tejun Heob78152e2008-10-22 00:45:57 +090082static void svia_tf_load(struct ata_port *ap, const struct ata_taskfile *tf);
Tejun Heo17234242007-01-25 20:46:59 +090083static void svia_noop_freeze(struct ata_port *ap);
Tejun Heoa1efdab2008-03-25 12:22:50 +090084static int vt6420_prereset(struct ata_link *link, unsigned long deadline);
Bart Hartgersa55ab492010-02-14 13:04:50 +010085static void vt6420_bmdma_start(struct ata_queued_cmd *qc);
Jeff Garzika0fcdc02007-03-09 07:24:15 -050086static int vt6421_pata_cable_detect(struct ata_port *ap);
Aland73f30e2007-01-08 17:11:13 +000087static void vt6421_set_pio_mode(struct ata_port *ap, struct ata_device *adev);
88static void vt6421_set_dma_mode(struct ata_port *ap, struct ata_device *adev);
Linus Torvalds1da177e2005-04-16 15:20:36 -070089
Jeff Garzik3b7d6972005-11-10 11:04:11 -050090static const struct pci_device_id svia_pci_tbl[] = {
Luca Pedrielli96bc1032007-01-16 12:55:04 +090091 { PCI_VDEVICE(VIA, 0x5337), vt6420 },
Tejun Heob9d5b892008-10-22 00:46:36 +090092 { PCI_VDEVICE(VIA, 0x0591), vt6420 }, /* 2 sata chnls (Master) */
93 { PCI_VDEVICE(VIA, 0x3149), vt6420 }, /* 2 sata chnls (Master) */
94 { PCI_VDEVICE(VIA, 0x3249), vt6421 }, /* 2 sata chnls, 1 pata chnl */
Jeff Garzik52df0ee2007-05-25 05:02:06 -040095 { PCI_VDEVICE(VIA, 0x5372), vt6420 },
96 { PCI_VDEVICE(VIA, 0x7372), vt6420 },
Tejun Heob9d5b892008-10-22 00:46:36 +090097 { PCI_VDEVICE(VIA, 0x5287), vt8251 }, /* 2 sata chnls (Master/Slave) */
JosephChan@via.com.tw68139522009-01-16 19:44:55 +080098 { PCI_VDEVICE(VIA, 0x9000), vt8251 },
Linus Torvalds1da177e2005-04-16 15:20:36 -070099
100 { } /* terminate list */
101};
102
103static struct pci_driver svia_pci_driver = {
104 .name = DRV_NAME,
105 .id_table = svia_pci_tbl,
106 .probe = svia_init_one,
Tejun Heoe1e143c2007-05-04 15:30:34 +0200107#ifdef CONFIG_PM
108 .suspend = ata_pci_device_suspend,
109 .resume = ata_pci_device_resume,
110#endif
Linus Torvalds1da177e2005-04-16 15:20:36 -0700111 .remove = ata_pci_remove_one,
112};
113
Jeff Garzik193515d2005-11-07 00:59:37 -0500114static struct scsi_host_template svia_sht = {
Tejun Heo68d1d072008-03-25 12:22:49 +0900115 ATA_BMDMA_SHT(DRV_NAME),
Linus Torvalds1da177e2005-04-16 15:20:36 -0700116};
117
Tejun Heob78152e2008-10-22 00:45:57 +0900118static struct ata_port_operations svia_base_ops = {
Tejun Heo029cfd62008-03-25 12:22:49 +0900119 .inherits = &ata_bmdma_port_ops,
Tejun Heob78152e2008-10-22 00:45:57 +0900120 .sff_tf_load = svia_tf_load,
121};
122
123static struct ata_port_operations vt6420_sata_ops = {
124 .inherits = &svia_base_ops,
Tejun Heo17234242007-01-25 20:46:59 +0900125 .freeze = svia_noop_freeze,
Tejun Heoa1efdab2008-03-25 12:22:50 +0900126 .prereset = vt6420_prereset,
Bart Hartgersa55ab492010-02-14 13:04:50 +0100127 .bmdma_start = vt6420_bmdma_start,
Tejun Heoac2164d2006-08-23 01:00:27 +0900128};
129
Tejun Heo029cfd62008-03-25 12:22:49 +0900130static struct ata_port_operations vt6421_pata_ops = {
Tejun Heob78152e2008-10-22 00:45:57 +0900131 .inherits = &svia_base_ops,
Tejun Heo029cfd62008-03-25 12:22:49 +0900132 .cable_detect = vt6421_pata_cable_detect,
Aland73f30e2007-01-08 17:11:13 +0000133 .set_piomode = vt6421_set_pio_mode,
134 .set_dmamode = vt6421_set_dma_mode,
Aland73f30e2007-01-08 17:11:13 +0000135};
136
Tejun Heo029cfd62008-03-25 12:22:49 +0900137static struct ata_port_operations vt6421_sata_ops = {
Tejun Heob78152e2008-10-22 00:45:57 +0900138 .inherits = &svia_base_ops,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700139 .scr_read = svia_scr_read,
140 .scr_write = svia_scr_write,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700141};
142
Tejun Heob9d5b892008-10-22 00:46:36 +0900143static struct ata_port_operations vt8251_ops = {
144 .inherits = &svia_base_ops,
145 .hardreset = sata_std_hardreset,
146 .scr_read = vt8251_scr_read,
147 .scr_write = vt8251_scr_write,
148};
149
Tejun Heoeca25dc2007-04-17 23:44:07 +0900150static const struct ata_port_info vt6420_port_info = {
Sergei Shtylyov9cbe0562011-02-04 22:05:48 +0300151 .flags = ATA_FLAG_SATA,
Erik Inge Bolsø14bdef92009-03-14 21:38:24 +0100152 .pio_mask = ATA_PIO4,
153 .mwdma_mask = ATA_MWDMA2,
Jeff Garzikbf6263a2007-07-09 12:16:50 -0400154 .udma_mask = ATA_UDMA6,
Tejun Heoac2164d2006-08-23 01:00:27 +0900155 .port_ops = &vt6420_sata_ops,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700156};
157
Tejun Heoeca25dc2007-04-17 23:44:07 +0900158static struct ata_port_info vt6421_sport_info = {
Sergei Shtylyov9cbe0562011-02-04 22:05:48 +0300159 .flags = ATA_FLAG_SATA,
Erik Inge Bolsø14bdef92009-03-14 21:38:24 +0100160 .pio_mask = ATA_PIO4,
161 .mwdma_mask = ATA_MWDMA2,
Jeff Garzikbf6263a2007-07-09 12:16:50 -0400162 .udma_mask = ATA_UDMA6,
Tejun Heoeca25dc2007-04-17 23:44:07 +0900163 .port_ops = &vt6421_sata_ops,
164};
165
166static struct ata_port_info vt6421_pport_info = {
Sergei Shtylyov9cbe0562011-02-04 22:05:48 +0300167 .flags = ATA_FLAG_SLAVE_POSS,
Erik Inge Bolsø14bdef92009-03-14 21:38:24 +0100168 .pio_mask = ATA_PIO4,
169 /* No MWDMA */
Jeff Garzikbf6263a2007-07-09 12:16:50 -0400170 .udma_mask = ATA_UDMA6,
Tejun Heoeca25dc2007-04-17 23:44:07 +0900171 .port_ops = &vt6421_pata_ops,
172};
173
Tejun Heob9d5b892008-10-22 00:46:36 +0900174static struct ata_port_info vt8251_port_info = {
Sergei Shtylyov9cbe0562011-02-04 22:05:48 +0300175 .flags = ATA_FLAG_SATA | ATA_FLAG_SLAVE_POSS,
Erik Inge Bolsø14bdef92009-03-14 21:38:24 +0100176 .pio_mask = ATA_PIO4,
177 .mwdma_mask = ATA_MWDMA2,
Tejun Heob9d5b892008-10-22 00:46:36 +0900178 .udma_mask = ATA_UDMA6,
179 .port_ops = &vt8251_ops,
180};
181
Linus Torvalds1da177e2005-04-16 15:20:36 -0700182MODULE_AUTHOR("Jeff Garzik");
183MODULE_DESCRIPTION("SCSI low-level driver for VIA SATA controllers");
184MODULE_LICENSE("GPL");
185MODULE_DEVICE_TABLE(pci, svia_pci_tbl);
186MODULE_VERSION(DRV_VERSION);
187
Tejun Heo82ef04f2008-07-31 17:02:40 +0900188static int svia_scr_read(struct ata_link *link, unsigned int sc_reg, u32 *val)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700189{
190 if (sc_reg > SCR_CONTROL)
Tejun Heoda3dbb12007-07-16 14:29:40 +0900191 return -EINVAL;
Tejun Heo82ef04f2008-07-31 17:02:40 +0900192 *val = ioread32(link->ap->ioaddr.scr_addr + (4 * sc_reg));
Tejun Heoda3dbb12007-07-16 14:29:40 +0900193 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700194}
195
Tejun Heo82ef04f2008-07-31 17:02:40 +0900196static int svia_scr_write(struct ata_link *link, unsigned int sc_reg, u32 val)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700197{
198 if (sc_reg > SCR_CONTROL)
Tejun Heoda3dbb12007-07-16 14:29:40 +0900199 return -EINVAL;
Tejun Heo82ef04f2008-07-31 17:02:40 +0900200 iowrite32(val, link->ap->ioaddr.scr_addr + (4 * sc_reg));
Tejun Heoda3dbb12007-07-16 14:29:40 +0900201 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700202}
203
Tejun Heob9d5b892008-10-22 00:46:36 +0900204static int vt8251_scr_read(struct ata_link *link, unsigned int scr, u32 *val)
205{
206 static const u8 ipm_tbl[] = { 1, 2, 6, 0 };
207 struct pci_dev *pdev = to_pci_dev(link->ap->host->dev);
208 int slot = 2 * link->ap->port_no + link->pmp;
209 u32 v = 0;
210 u8 raw;
211
212 switch (scr) {
213 case SCR_STATUS:
214 pci_read_config_byte(pdev, 0xA0 + slot, &raw);
215
216 /* read the DET field, bit0 and 1 of the config byte */
217 v |= raw & 0x03;
218
219 /* read the SPD field, bit4 of the configure byte */
220 if (raw & (1 << 4))
221 v |= 0x02 << 4;
222 else
223 v |= 0x01 << 4;
224
225 /* read the IPM field, bit2 and 3 of the config byte */
226 v |= ipm_tbl[(raw >> 2) & 0x3];
227 break;
228
229 case SCR_ERROR:
230 /* devices other than 5287 uses 0xA8 as base */
231 WARN_ON(pdev->device != 0x5287);
232 pci_read_config_dword(pdev, 0xB0 + slot * 4, &v);
233 break;
234
235 case SCR_CONTROL:
236 pci_read_config_byte(pdev, 0xA4 + slot, &raw);
237
238 /* read the DET field, bit0 and bit1 */
239 v |= ((raw & 0x02) << 1) | (raw & 0x01);
240
241 /* read the IPM field, bit2 and bit3 */
242 v |= ((raw >> 2) & 0x03) << 8;
243 break;
244
245 default:
246 return -EINVAL;
247 }
248
249 *val = v;
250 return 0;
251}
252
253static int vt8251_scr_write(struct ata_link *link, unsigned int scr, u32 val)
254{
255 struct pci_dev *pdev = to_pci_dev(link->ap->host->dev);
256 int slot = 2 * link->ap->port_no + link->pmp;
257 u32 v = 0;
258
259 switch (scr) {
260 case SCR_ERROR:
261 /* devices other than 5287 uses 0xA8 as base */
262 WARN_ON(pdev->device != 0x5287);
263 pci_write_config_dword(pdev, 0xB0 + slot * 4, val);
264 return 0;
265
266 case SCR_CONTROL:
267 /* set the DET field */
268 v |= ((val & 0x4) >> 1) | (val & 0x1);
269
270 /* set the IPM field */
271 v |= ((val >> 8) & 0x3) << 2;
272
273 pci_write_config_byte(pdev, 0xA4 + slot, v);
274 return 0;
275
276 default:
277 return -EINVAL;
278 }
279}
280
Tejun Heob78152e2008-10-22 00:45:57 +0900281/**
282 * svia_tf_load - send taskfile registers to host controller
283 * @ap: Port to which output is sent
284 * @tf: ATA taskfile register set
285 *
286 * Outputs ATA taskfile to standard ATA host controller.
287 *
288 * This is to fix the internal bug of via chipsets, which will
289 * reset the device register after changing the IEN bit on ctl
290 * register.
291 */
292static void svia_tf_load(struct ata_port *ap, const struct ata_taskfile *tf)
293{
294 struct ata_taskfile ttf;
295
296 if (tf->ctl != ap->last_ctl) {
297 ttf = *tf;
298 ttf.flags |= ATA_TFLAG_DEVICE;
299 tf = &ttf;
300 }
301 ata_sff_tf_load(ap, tf);
302}
303
Tejun Heo17234242007-01-25 20:46:59 +0900304static void svia_noop_freeze(struct ata_port *ap)
305{
306 /* Some VIA controllers choke if ATA_NIEN is manipulated in
307 * certain way. Leave it alone and just clear pending IRQ.
308 */
Tejun Heo5682ed32008-04-07 22:47:16 +0900309 ap->ops->sff_check_status(ap);
Tejun Heo37f65b82010-05-19 22:10:20 +0200310 ata_bmdma_irq_clear(ap);
Tejun Heo17234242007-01-25 20:46:59 +0900311}
312
Tejun Heoac2164d2006-08-23 01:00:27 +0900313/**
314 * vt6420_prereset - prereset for vt6420
Tejun Heocc0680a2007-08-06 18:36:23 +0900315 * @link: target ATA link
Tejun Heod4b2bab2007-02-02 16:50:52 +0900316 * @deadline: deadline jiffies for the operation
Tejun Heoac2164d2006-08-23 01:00:27 +0900317 *
318 * SCR registers on vt6420 are pieces of shit and may hang the
319 * whole machine completely if accessed with the wrong timing.
320 * To avoid such catastrophe, vt6420 doesn't provide generic SCR
321 * access operations, but uses SStatus and SControl only during
322 * boot probing in controlled way.
323 *
324 * As the old (pre EH update) probing code is proven to work, we
325 * strictly follow the access pattern.
326 *
327 * LOCKING:
328 * Kernel thread context (may sleep)
329 *
330 * RETURNS:
331 * 0 on success, -errno otherwise.
332 */
Tejun Heocc0680a2007-08-06 18:36:23 +0900333static int vt6420_prereset(struct ata_link *link, unsigned long deadline)
Tejun Heoac2164d2006-08-23 01:00:27 +0900334{
Tejun Heocc0680a2007-08-06 18:36:23 +0900335 struct ata_port *ap = link->ap;
Tejun Heo9af5c9c2007-08-06 18:36:22 +0900336 struct ata_eh_context *ehc = &ap->link.eh_context;
Tejun Heoac2164d2006-08-23 01:00:27 +0900337 unsigned long timeout = jiffies + (HZ * 5);
338 u32 sstatus, scontrol;
339 int online;
340
341 /* don't do any SCR stuff if we're not loading */
Jeff Garzik68ff6e82006-11-08 07:46:02 -0500342 if (!(ap->pflags & ATA_PFLAG_LOADING))
Tejun Heoac2164d2006-08-23 01:00:27 +0900343 goto skip_scr;
344
Jeff Garzika09060f2007-05-28 08:17:06 -0400345 /* Resume phy. This is the old SATA resume sequence */
Tejun Heo82ef04f2008-07-31 17:02:40 +0900346 svia_scr_write(link, SCR_CONTROL, 0x300);
347 svia_scr_read(link, SCR_CONTROL, &scontrol); /* flush */
Tejun Heoac2164d2006-08-23 01:00:27 +0900348
349 /* wait for phy to become ready, if necessary */
350 do {
Tejun Heo97750ce2010-09-06 17:56:29 +0200351 ata_msleep(link->ap, 200);
Tejun Heo82ef04f2008-07-31 17:02:40 +0900352 svia_scr_read(link, SCR_STATUS, &sstatus);
Tejun Heoda3dbb12007-07-16 14:29:40 +0900353 if ((sstatus & 0xf) != 1)
Tejun Heoac2164d2006-08-23 01:00:27 +0900354 break;
355 } while (time_before(jiffies, timeout));
356
357 /* open code sata_print_link_status() */
Tejun Heo82ef04f2008-07-31 17:02:40 +0900358 svia_scr_read(link, SCR_STATUS, &sstatus);
359 svia_scr_read(link, SCR_CONTROL, &scontrol);
Tejun Heoac2164d2006-08-23 01:00:27 +0900360
361 online = (sstatus & 0xf) == 0x3;
362
Joe Perchesa9a79df2011-04-15 15:51:59 -0700363 ata_port_info(ap,
364 "SATA link %s 1.5 Gbps (SStatus %X SControl %X)\n",
365 online ? "up" : "down", sstatus, scontrol);
Tejun Heoac2164d2006-08-23 01:00:27 +0900366
367 /* SStatus is read one more time */
Tejun Heo82ef04f2008-07-31 17:02:40 +0900368 svia_scr_read(link, SCR_STATUS, &sstatus);
Tejun Heoac2164d2006-08-23 01:00:27 +0900369
370 if (!online) {
371 /* tell EH to bail */
Tejun Heocf480622008-01-24 00:05:14 +0900372 ehc->i.action &= ~ATA_EH_RESET;
Tejun Heoac2164d2006-08-23 01:00:27 +0900373 return 0;
374 }
375
376 skip_scr:
377 /* wait for !BSY */
Tejun Heo705e76b2008-04-07 22:47:19 +0900378 ata_sff_wait_ready(link, deadline);
Tejun Heoac2164d2006-08-23 01:00:27 +0900379
380 return 0;
381}
382
Bart Hartgersa55ab492010-02-14 13:04:50 +0100383static void vt6420_bmdma_start(struct ata_queued_cmd *qc)
384{
385 struct ata_port *ap = qc->ap;
386 if ((qc->tf.command == ATA_CMD_PACKET) &&
387 (qc->scsicmd->sc_data_direction == DMA_TO_DEVICE)) {
388 /* Prevents corruption on some ATAPI burners */
389 ata_sff_pause(ap);
390 }
391 ata_bmdma_start(qc);
392}
393
Jeff Garzika0fcdc02007-03-09 07:24:15 -0500394static int vt6421_pata_cable_detect(struct ata_port *ap)
Aland73f30e2007-01-08 17:11:13 +0000395{
396 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
397 u8 tmp;
398
399 pci_read_config_byte(pdev, PATA_UDMA_TIMING, &tmp);
400 if (tmp & 0x10)
Jeff Garzika0fcdc02007-03-09 07:24:15 -0500401 return ATA_CBL_PATA40;
402 return ATA_CBL_PATA80;
Aland73f30e2007-01-08 17:11:13 +0000403}
404
405static void vt6421_set_pio_mode(struct ata_port *ap, struct ata_device *adev)
406{
407 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
408 static const u8 pio_bits[] = { 0xA8, 0x65, 0x65, 0x31, 0x20 };
Bart Hartgers02d1d612010-01-17 00:56:54 +0100409 pci_write_config_byte(pdev, PATA_PIO_TIMING - adev->devno,
410 pio_bits[adev->pio_mode - XFER_PIO_0]);
Aland73f30e2007-01-08 17:11:13 +0000411}
412
413static void vt6421_set_dma_mode(struct ata_port *ap, struct ata_device *adev)
414{
415 struct pci_dev *pdev = to_pci_dev(ap->host->dev);
416 static const u8 udma_bits[] = { 0xEE, 0xE8, 0xE6, 0xE4, 0xE2, 0xE1, 0xE0, 0xE0 };
Bart Hartgers02d1d612010-01-17 00:56:54 +0100417 pci_write_config_byte(pdev, PATA_UDMA_TIMING - adev->devno,
418 udma_bits[adev->dma_mode - XFER_UDMA_0]);
Aland73f30e2007-01-08 17:11:13 +0000419}
420
Linus Torvalds1da177e2005-04-16 15:20:36 -0700421static const unsigned int svia_bar_sizes[] = {
422 8, 4, 8, 4, 16, 256
423};
424
425static const unsigned int vt6421_bar_sizes[] = {
426 16, 16, 16, 16, 32, 128
427};
428
Jeff Garzik5796d1c2007-10-26 00:03:37 -0400429static void __iomem *svia_scr_addr(void __iomem *addr, unsigned int port)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700430{
431 return addr + (port * 128);
432}
433
Jeff Garzik5796d1c2007-10-26 00:03:37 -0400434static void __iomem *vt6421_scr_addr(void __iomem *addr, unsigned int port)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700435{
436 return addr + (port * 64);
437}
438
Tejun Heoeca25dc2007-04-17 23:44:07 +0900439static void vt6421_init_addrs(struct ata_port *ap)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700440{
Tejun Heoeca25dc2007-04-17 23:44:07 +0900441 void __iomem * const * iomap = ap->host->iomap;
442 void __iomem *reg_addr = iomap[ap->port_no];
443 void __iomem *bmdma_addr = iomap[4] + (ap->port_no * 8);
444 struct ata_ioports *ioaddr = &ap->ioaddr;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700445
Tejun Heoeca25dc2007-04-17 23:44:07 +0900446 ioaddr->cmd_addr = reg_addr;
447 ioaddr->altstatus_addr =
448 ioaddr->ctl_addr = (void __iomem *)
Tejun Heo0d5ff562007-02-01 15:06:36 +0900449 ((unsigned long)(reg_addr + 8) | ATA_PCI_CTL_OFS);
Tejun Heoeca25dc2007-04-17 23:44:07 +0900450 ioaddr->bmdma_addr = bmdma_addr;
451 ioaddr->scr_addr = vt6421_scr_addr(iomap[5], ap->port_no);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700452
Tejun Heo9363c382008-04-07 22:47:16 +0900453 ata_sff_std_ports(ioaddr);
Tejun Heocbcdd872007-08-18 13:14:55 +0900454
455 ata_port_pbar_desc(ap, ap->port_no, -1, "port");
456 ata_port_pbar_desc(ap, 4, ap->port_no * 8, "bmdma");
Linus Torvalds1da177e2005-04-16 15:20:36 -0700457}
458
Tejun Heoeca25dc2007-04-17 23:44:07 +0900459static int vt6420_prepare_host(struct pci_dev *pdev, struct ata_host **r_host)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700460{
Tejun Heoeca25dc2007-04-17 23:44:07 +0900461 const struct ata_port_info *ppi[] = { &vt6420_port_info, NULL };
462 struct ata_host *host;
463 int rc;
Jeff Garzikf20b16f2006-12-11 11:14:06 -0500464
Tejun Heo1c5afdf2010-05-19 22:10:22 +0200465 rc = ata_pci_bmdma_prepare_host(pdev, ppi, &host);
Tejun Heoeca25dc2007-04-17 23:44:07 +0900466 if (rc)
467 return rc;
468 *r_host = host;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700469
Tejun Heoeca25dc2007-04-17 23:44:07 +0900470 rc = pcim_iomap_regions(pdev, 1 << 5, DRV_NAME);
471 if (rc) {
Joe Perchesa44fec12011-04-15 15:51:58 -0700472 dev_err(&pdev->dev, "failed to iomap PCI BAR 5\n");
Tejun Heoeca25dc2007-04-17 23:44:07 +0900473 return rc;
Tejun Heoe1be5d72007-02-20 20:01:53 +0900474 }
475
Tejun Heoeca25dc2007-04-17 23:44:07 +0900476 host->ports[0]->ioaddr.scr_addr = svia_scr_addr(host->iomap[5], 0);
477 host->ports[1]->ioaddr.scr_addr = svia_scr_addr(host->iomap[5], 1);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700478
Tejun Heoeca25dc2007-04-17 23:44:07 +0900479 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700480}
481
Tejun Heoeca25dc2007-04-17 23:44:07 +0900482static int vt6421_prepare_host(struct pci_dev *pdev, struct ata_host **r_host)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700483{
Tejun Heoeca25dc2007-04-17 23:44:07 +0900484 const struct ata_port_info *ppi[] =
485 { &vt6421_sport_info, &vt6421_sport_info, &vt6421_pport_info };
486 struct ata_host *host;
487 int i, rc;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700488
Tejun Heoeca25dc2007-04-17 23:44:07 +0900489 *r_host = host = ata_host_alloc_pinfo(&pdev->dev, ppi, ARRAY_SIZE(ppi));
490 if (!host) {
Joe Perchesa44fec12011-04-15 15:51:58 -0700491 dev_err(&pdev->dev, "failed to allocate host\n");
Tejun Heoeca25dc2007-04-17 23:44:07 +0900492 return -ENOMEM;
493 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700494
Tejun Heo8fd7d1b2007-05-17 13:37:12 +0200495 rc = pcim_iomap_regions(pdev, 0x3f, DRV_NAME);
Tejun Heoeca25dc2007-04-17 23:44:07 +0900496 if (rc) {
Joe Perchesa44fec12011-04-15 15:51:58 -0700497 dev_err(&pdev->dev, "failed to request/iomap PCI BARs (errno=%d)\n",
498 rc);
Tejun Heoeca25dc2007-04-17 23:44:07 +0900499 return rc;
500 }
501 host->iomap = pcim_iomap_table(pdev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700502
Tejun Heoeca25dc2007-04-17 23:44:07 +0900503 for (i = 0; i < host->n_ports; i++)
504 vt6421_init_addrs(host->ports[i]);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700505
Tejun Heoeca25dc2007-04-17 23:44:07 +0900506 rc = pci_set_dma_mask(pdev, ATA_DMA_MASK);
507 if (rc)
508 return rc;
509 rc = pci_set_consistent_dma_mask(pdev, ATA_DMA_MASK);
510 if (rc)
511 return rc;
Tejun Heoe1be5d72007-02-20 20:01:53 +0900512
Tejun Heoeca25dc2007-04-17 23:44:07 +0900513 return 0;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700514}
515
Tejun Heob9d5b892008-10-22 00:46:36 +0900516static int vt8251_prepare_host(struct pci_dev *pdev, struct ata_host **r_host)
517{
518 const struct ata_port_info *ppi[] = { &vt8251_port_info, NULL };
519 struct ata_host *host;
520 int i, rc;
521
Tejun Heo1c5afdf2010-05-19 22:10:22 +0200522 rc = ata_pci_bmdma_prepare_host(pdev, ppi, &host);
Tejun Heob9d5b892008-10-22 00:46:36 +0900523 if (rc)
524 return rc;
525 *r_host = host;
526
527 rc = pcim_iomap_regions(pdev, 1 << 5, DRV_NAME);
528 if (rc) {
Joe Perchesa44fec12011-04-15 15:51:58 -0700529 dev_err(&pdev->dev, "failed to iomap PCI BAR 5\n");
Tejun Heob9d5b892008-10-22 00:46:36 +0900530 return rc;
531 }
532
533 /* 8251 hosts four sata ports as M/S of the two channels */
534 for (i = 0; i < host->n_ports; i++)
535 ata_slave_link_init(host->ports[i]);
536
537 return 0;
538}
539
Tejun Heob1353e42010-11-19 15:29:19 +0100540static void svia_configure(struct pci_dev *pdev, int board_id)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700541{
542 u8 tmp8;
543
544 pci_read_config_byte(pdev, PCI_INTERRUPT_LINE, &tmp8);
Joe Perchesa44fec12011-04-15 15:51:58 -0700545 dev_info(&pdev->dev, "routed to hard irq line %d\n",
546 (int) (tmp8 & 0xf0) == 0xf0 ? 0 : tmp8 & 0x0f);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700547
548 /* make sure SATA channels are enabled */
549 pci_read_config_byte(pdev, SATA_CHAN_ENAB, &tmp8);
550 if ((tmp8 & ALL_PORTS) != ALL_PORTS) {
Joe Perches5b933e62011-04-15 15:52:01 -0700551 dev_dbg(&pdev->dev, "enabling SATA channels (0x%x)\n",
552 (int)tmp8);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700553 tmp8 |= ALL_PORTS;
554 pci_write_config_byte(pdev, SATA_CHAN_ENAB, tmp8);
555 }
556
557 /* make sure interrupts for each channel sent to us */
558 pci_read_config_byte(pdev, SATA_INT_GATE, &tmp8);
559 if ((tmp8 & ALL_PORTS) != ALL_PORTS) {
Joe Perches5b933e62011-04-15 15:52:01 -0700560 dev_dbg(&pdev->dev, "enabling SATA channel interrupts (0x%x)\n",
561 (int) tmp8);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700562 tmp8 |= ALL_PORTS;
563 pci_write_config_byte(pdev, SATA_INT_GATE, tmp8);
564 }
565
566 /* make sure native mode is enabled */
567 pci_read_config_byte(pdev, SATA_NATIVE_MODE, &tmp8);
568 if ((tmp8 & NATIVE_MODE_ALL) != NATIVE_MODE_ALL) {
Joe Perches5b933e62011-04-15 15:52:01 -0700569 dev_dbg(&pdev->dev,
570 "enabling SATA channel native mode (0x%x)\n",
571 (int) tmp8);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700572 tmp8 |= NATIVE_MODE_ALL;
573 pci_write_config_byte(pdev, SATA_NATIVE_MODE, tmp8);
574 }
Tejun Heo8b27ff42010-05-31 16:26:48 +0200575
576 /*
Tejun Heob1353e42010-11-19 15:29:19 +0100577 * vt6420/1 has problems talking to some drives. The following
Tejun Heob475a3b2010-06-03 11:35:03 +0200578 * is the fix from Joseph Chan <JosephChan@via.com.tw>.
579 *
580 * When host issues HOLD, device may send up to 20DW of data
581 * before acknowledging it with HOLDA and the host should be
582 * able to buffer them in FIFO. Unfortunately, some WD drives
Lucas De Marchi25985ed2011-03-30 22:57:33 -0300583 * send up to 40DW before acknowledging HOLD and, in the
Tejun Heob475a3b2010-06-03 11:35:03 +0200584 * default configuration, this ends up overflowing vt6421's
585 * FIFO, making the controller abort the transaction with
586 * R_ERR.
587 *
588 * Rx52[2] is the internal 128DW FIFO Flow control watermark
589 * adjusting mechanism enable bit and the default value 0
590 * means host will issue HOLD to device when the left FIFO
591 * size goes below 32DW. Setting it to 1 makes the watermark
592 * 64DW.
Tejun Heo8b27ff42010-05-31 16:26:48 +0200593 *
594 * https://bugzilla.kernel.org/show_bug.cgi?id=15173
Tejun Heob475a3b2010-06-03 11:35:03 +0200595 * http://article.gmane.org/gmane.linux.ide/46352
Tejun Heob1353e42010-11-19 15:29:19 +0100596 * http://thread.gmane.org/gmane.linux.kernel/1062139
Tejun Heo8b27ff42010-05-31 16:26:48 +0200597 */
Tejun Heob1353e42010-11-19 15:29:19 +0100598 if (board_id == vt6420 || board_id == vt6421) {
Tejun Heo8b27ff42010-05-31 16:26:48 +0200599 pci_read_config_byte(pdev, 0x52, &tmp8);
600 tmp8 |= 1 << 2;
601 pci_write_config_byte(pdev, 0x52, tmp8);
602 }
Linus Torvalds1da177e2005-04-16 15:20:36 -0700603}
604
Jeff Garzik5796d1c2007-10-26 00:03:37 -0400605static int svia_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700606{
Linus Torvalds1da177e2005-04-16 15:20:36 -0700607 unsigned int i;
608 int rc;
Jeff Garzikf1c22942009-04-13 04:09:34 -0400609 struct ata_host *host = NULL;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700610 int board_id = (int) ent->driver_data;
Al Virob4482a42007-10-14 19:35:40 +0100611 const unsigned *bar_sizes;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700612
Joe Perches06296a12011-04-15 15:52:00 -0700613 ata_print_version_once(&pdev->dev, DRV_VERSION);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700614
Tejun Heo24dc5f32007-01-20 16:00:28 +0900615 rc = pcim_enable_device(pdev);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700616 if (rc)
617 return rc;
618
Tejun Heob9d5b892008-10-22 00:46:36 +0900619 if (board_id == vt6421)
Linus Torvalds1da177e2005-04-16 15:20:36 -0700620 bar_sizes = &vt6421_bar_sizes[0];
Tejun Heob9d5b892008-10-22 00:46:36 +0900621 else
622 bar_sizes = &svia_bar_sizes[0];
Linus Torvalds1da177e2005-04-16 15:20:36 -0700623
624 for (i = 0; i < ARRAY_SIZE(svia_bar_sizes); i++)
625 if ((pci_resource_start(pdev, i) == 0) ||
626 (pci_resource_len(pdev, i) < bar_sizes[i])) {
Joe Perchesa44fec12011-04-15 15:51:58 -0700627 dev_err(&pdev->dev,
Greg Kroah-Hartmane29419f2006-06-12 15:20:16 -0700628 "invalid PCI BAR %u (sz 0x%llx, val 0x%llx)\n",
629 i,
Jeff Garzik5796d1c2007-10-26 00:03:37 -0400630 (unsigned long long)pci_resource_start(pdev, i),
631 (unsigned long long)pci_resource_len(pdev, i));
Tejun Heo24dc5f32007-01-20 16:00:28 +0900632 return -ENODEV;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700633 }
634
Tejun Heob9d5b892008-10-22 00:46:36 +0900635 switch (board_id) {
636 case vt6420:
Tejun Heoeca25dc2007-04-17 23:44:07 +0900637 rc = vt6420_prepare_host(pdev, &host);
Tejun Heob9d5b892008-10-22 00:46:36 +0900638 break;
639 case vt6421:
Tejun Heoeca25dc2007-04-17 23:44:07 +0900640 rc = vt6421_prepare_host(pdev, &host);
Tejun Heob9d5b892008-10-22 00:46:36 +0900641 break;
642 case vt8251:
643 rc = vt8251_prepare_host(pdev, &host);
644 break;
645 default:
Marcin Slusarz554d4912008-11-02 22:18:52 +0100646 rc = -EINVAL;
Tejun Heob9d5b892008-10-22 00:46:36 +0900647 }
Marcin Slusarz554d4912008-11-02 22:18:52 +0100648 if (rc)
649 return rc;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700650
Tejun Heob1353e42010-11-19 15:29:19 +0100651 svia_configure(pdev, board_id);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700652
653 pci_set_master(pdev);
Tejun Heoc3b28892010-05-19 22:10:21 +0200654 return ata_host_activate(host, pdev->irq, ata_bmdma_interrupt,
Tejun Heo9363c382008-04-07 22:47:16 +0900655 IRQF_SHARED, &svia_sht);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700656}
657
Axel Lin2fc75da2012-04-19 13:43:05 +0800658module_pci_driver(svia_pci_driver);