blob: e1ea4f625f7a455795c07cc7d5e155edfbb2bd95 [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 1992 Linus Torvalds
Ralf Baechle89742e52007-10-18 13:51:15 +01007 * Copyright (C) 1994 - 2001, 2003, 07 Ralf Baechle
Linus Torvalds1da177e2005-04-16 15:20:36 -07008 */
Ralf Baechle584d98b2007-10-11 23:46:09 +01009#include <linux/clockchips.h>
Ralf Baechle334955e2011-06-01 19:04:57 +010010#include <linux/i8253.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070011#include <linux/init.h>
12#include <linux/interrupt.h>
13#include <linux/kernel.h>
Ralf Baechle631330f2009-06-19 14:05:26 +010014#include <linux/smp.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070015#include <linux/spinlock.h>
David Howellsca4d3e672010-10-07 14:08:54 +010016#include <linux/irq.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070017
Thomas Bogendoerferea202c62007-08-25 11:01:50 +020018#include <asm/irq_cpu.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070019#include <asm/i8259.h>
20#include <asm/io.h>
21#include <asm/jazz.h>
Thomas Bogendoerferea202c62007-08-25 11:01:50 +020022#include <asm/pgtable.h>
Ralf Baechle3d18c982011-11-28 16:11:28 +000023#include <asm/tlbmisc.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070024
Ralf Baechle4a41abe52010-02-27 12:53:31 +010025static DEFINE_RAW_SPINLOCK(r4030_lock);
Linus Torvalds1da177e2005-04-16 15:20:36 -070026
Thomas Gleixnerdb00bed2011-03-23 21:08:52 +000027static void enable_r4030_irq(struct irq_data *d)
Linus Torvalds1da177e2005-04-16 15:20:36 -070028{
Thomas Gleixnerdb00bed2011-03-23 21:08:52 +000029 unsigned int mask = 1 << (d->irq - JAZZ_IRQ_START);
Linus Torvalds1da177e2005-04-16 15:20:36 -070030 unsigned long flags;
31
Ralf Baechle4a41abe52010-02-27 12:53:31 +010032 raw_spin_lock_irqsave(&r4030_lock, flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -070033 mask |= r4030_read_reg16(JAZZ_IO_IRQ_ENABLE);
34 r4030_write_reg16(JAZZ_IO_IRQ_ENABLE, mask);
Ralf Baechle4a41abe52010-02-27 12:53:31 +010035 raw_spin_unlock_irqrestore(&r4030_lock, flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -070036}
37
Thomas Gleixnerdb00bed2011-03-23 21:08:52 +000038void disable_r4030_irq(struct irq_data *d)
Linus Torvalds1da177e2005-04-16 15:20:36 -070039{
Thomas Gleixnerdb00bed2011-03-23 21:08:52 +000040 unsigned int mask = ~(1 << (d->irq - JAZZ_IRQ_START));
Linus Torvalds1da177e2005-04-16 15:20:36 -070041 unsigned long flags;
42
Ralf Baechle4a41abe52010-02-27 12:53:31 +010043 raw_spin_lock_irqsave(&r4030_lock, flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -070044 mask &= r4030_read_reg16(JAZZ_IO_IRQ_ENABLE);
45 r4030_write_reg16(JAZZ_IO_IRQ_ENABLE, mask);
Ralf Baechle4a41abe52010-02-27 12:53:31 +010046 raw_spin_unlock_irqrestore(&r4030_lock, flags);
Linus Torvalds1da177e2005-04-16 15:20:36 -070047}
48
Ralf Baechle94dee172006-07-02 14:41:42 +010049static struct irq_chip r4030_irq_type = {
Atsushi Nemoto70d21cd2007-01-15 00:07:25 +090050 .name = "R4030",
Thomas Gleixnerdb00bed2011-03-23 21:08:52 +000051 .irq_mask = disable_r4030_irq,
52 .irq_unmask = enable_r4030_irq,
Linus Torvalds1da177e2005-04-16 15:20:36 -070053};
54
55void __init init_r4030_ints(void)
56{
57 int i;
58
Thomas Bogendoerferea202c62007-08-25 11:01:50 +020059 for (i = JAZZ_IRQ_START; i <= JAZZ_IRQ_END; i++)
Thomas Gleixnere4ec7982011-03-27 15:19:28 +020060 irq_set_chip_and_handler(i, &r4030_irq_type, handle_level_irq);
Linus Torvalds1da177e2005-04-16 15:20:36 -070061
62 r4030_write_reg16(JAZZ_IO_IRQ_ENABLE, 0);
63 r4030_read_reg16(JAZZ_IO_IRQ_SOURCE); /* clear pending IRQs */
64 r4030_read_reg32(JAZZ_R4030_INVAL_ADDR); /* clear error bits */
65}
66
67/*
68 * On systems with i8259-style interrupt controllers we assume for
69 * driver compatibility reasons interrupts 0 - 15 to be the i8259
70 * interrupts even if the hardware uses a different interrupt numbering.
71 */
72void __init arch_init_irq(void)
73{
Thomas Bogendoerferea202c62007-08-25 11:01:50 +020074 /*
75 * this is a hack to get back the still needed wired mapping
76 * killed by init_mm()
77 */
78
79 /* Map 0xe0000000 -> 0x0:800005C0, 0xe0010000 -> 0x1:30000580 */
80 add_wired_entry(0x02000017, 0x03c00017, 0xe0000000, PM_64K);
81 /* Map 0xe2000000 -> 0x0:900005C0, 0xe3010000 -> 0x0:910005C0 */
82 add_wired_entry(0x02400017, 0x02440017, 0xe2000000, PM_16M);
83 /* Map 0xe4000000 -> 0x0:600005C0, 0xe4100000 -> 400005C0 */
84 add_wired_entry(0x01800017, 0x01000017, 0xe4000000, PM_4M);
85
Linus Torvalds1da177e2005-04-16 15:20:36 -070086 init_i8259_irqs(); /* Integrated i8259 */
Thomas Bogendoerferea202c62007-08-25 11:01:50 +020087 mips_cpu_irq_init();
Linus Torvalds1da177e2005-04-16 15:20:36 -070088 init_r4030_ints();
89
Thomas Bogendoerferea202c62007-08-25 11:01:50 +020090 change_c0_status(ST0_IM, IE_IRQ2 | IE_IRQ1);
Ralf Baechlee4ac58a2006-04-03 17:56:36 +010091}
92
Ralf Baechle937a8012006-10-07 19:44:33 +010093asmlinkage void plat_irq_dispatch(void)
Ralf Baechlee4ac58a2006-04-03 17:56:36 +010094{
Thiemo Seufer119537c2007-03-19 00:13:37 +000095 unsigned int pending = read_c0_cause() & read_c0_status();
Thomas Bogendoerferea202c62007-08-25 11:01:50 +020096 unsigned int irq;
Ralf Baechlee4ac58a2006-04-03 17:56:36 +010097
Thomas Bogendoerferea202c62007-08-25 11:01:50 +020098 if (pending & IE_IRQ4) {
Ralf Baechlee4ac58a2006-04-03 17:56:36 +010099 r4030_read_reg32(JAZZ_TIMER_REGISTER);
Ralf Baechle937a8012006-10-07 19:44:33 +0100100 do_IRQ(JAZZ_TIMER_IRQ);
Thomas Bogendoerfer3be51f72007-11-02 11:17:13 +0100101 } else if (pending & IE_IRQ2) {
102 irq = *(volatile u8 *)JAZZ_EISA_IRQ_ACK;
103 do_IRQ(irq);
104 } else if (pending & IE_IRQ1) {
Thomas Bogendoerferea202c62007-08-25 11:01:50 +0200105 irq = *(volatile u8 *)JAZZ_IO_IRQ_SOURCE >> 2;
106 if (likely(irq > 0))
107 do_IRQ(irq + JAZZ_IRQ_START - 1);
108 else
109 panic("Unimplemented loc_no_irq handler");
Ralf Baechlee4ac58a2006-04-03 17:56:36 +0100110 }
111}
Ralf Baechle584d98b2007-10-11 23:46:09 +0100112
113static void r4030_set_mode(enum clock_event_mode mode,
Ralf Baechle70342282013-01-22 12:59:30 +0100114 struct clock_event_device *evt)
Ralf Baechle584d98b2007-10-11 23:46:09 +0100115{
116 /* Nothing to do ... */
117}
118
119struct clock_event_device r4030_clockevent = {
120 .name = "r4030",
121 .features = CLOCK_EVT_FEAT_PERIODIC,
Thomas Bogendoerfer3be51f72007-11-02 11:17:13 +0100122 .rating = 300,
Ralf Baechle584d98b2007-10-11 23:46:09 +0100123 .irq = JAZZ_TIMER_IRQ,
Ralf Baechle584d98b2007-10-11 23:46:09 +0100124 .set_mode = r4030_set_mode,
125};
126
127static irqreturn_t r4030_timer_interrupt(int irq, void *dev_id)
128{
Thomas Bogendoerfer3be51f72007-11-02 11:17:13 +0100129 struct clock_event_device *cd = dev_id;
Ralf Baechle584d98b2007-10-11 23:46:09 +0100130
Thomas Bogendoerfer3be51f72007-11-02 11:17:13 +0100131 cd->event_handler(cd);
Ralf Baechle584d98b2007-10-11 23:46:09 +0100132 return IRQ_HANDLED;
133}
134
135static struct irqaction r4030_timer_irqaction = {
136 .handler = r4030_timer_interrupt,
Yong Zhang8b5690f2011-11-22 14:38:03 +0000137 .flags = IRQF_TIMER,
Thomas Bogendoerfer3be51f72007-11-02 11:17:13 +0100138 .name = "R4030 timer",
Ralf Baechle584d98b2007-10-11 23:46:09 +0100139};
140
Ralf Baechle89742e52007-10-18 13:51:15 +0100141void __init plat_time_init(void)
Ralf Baechle584d98b2007-10-11 23:46:09 +0100142{
Thomas Bogendoerfer3be51f72007-11-02 11:17:13 +0100143 struct clock_event_device *cd = &r4030_clockevent;
144 struct irqaction *action = &r4030_timer_irqaction;
145 unsigned int cpu = smp_processor_id();
Ralf Baechle584d98b2007-10-11 23:46:09 +0100146
147 BUG_ON(HZ != 100);
148
Ralf Baechle70342282013-01-22 12:59:30 +0100149 cd->cpumask = cpumask_of(cpu);
Thomas Bogendoerfer3be51f72007-11-02 11:17:13 +0100150 clockevents_register_device(cd);
151 action->dev_id = cd;
152 setup_irq(JAZZ_TIMER_IRQ, action);
153
Ralf Baechle584d98b2007-10-11 23:46:09 +0100154 /*
155 * Set clock to 100Hz.
156 *
157 * The R4030 timer receives an input clock of 1kHz which is divieded by
158 * a programmable 4-bit divider. This makes it fairly inflexible.
159 */
160 r4030_write_reg32(JAZZ_TIMER_INTERVAL, 9);
Ralf Baechle89742e52007-10-18 13:51:15 +0100161 setup_pit_timer();
Ralf Baechle584d98b2007-10-11 23:46:09 +0100162}