Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 1 | /* |
| 2 | * Atmel MultiMedia Card Interface driver |
| 3 | * |
| 4 | * Copyright (C) 2004-2008 Atmel Corporation |
| 5 | * |
| 6 | * This program is free software; you can redistribute it and/or modify |
| 7 | * it under the terms of the GNU General Public License version 2 as |
| 8 | * published by the Free Software Foundation. |
| 9 | */ |
| 10 | #include <linux/blkdev.h> |
| 11 | #include <linux/clk.h> |
Haavard Skinnemoen | deec9ae | 2008-07-24 14:18:59 +0200 | [diff] [blame] | 12 | #include <linux/debugfs.h> |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 13 | #include <linux/device.h> |
Haavard Skinnemoen | 65e8b08 | 2008-07-30 20:29:03 +0200 | [diff] [blame] | 14 | #include <linux/dmaengine.h> |
| 15 | #include <linux/dma-mapping.h> |
Ben Nizette | fbfca4b | 2008-07-18 16:48:09 +1000 | [diff] [blame] | 16 | #include <linux/err.h> |
David Brownell | 3c26e17 | 2008-07-27 02:34:45 -0700 | [diff] [blame] | 17 | #include <linux/gpio.h> |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 18 | #include <linux/init.h> |
| 19 | #include <linux/interrupt.h> |
Pramod Gurav | 7bca646 | 2014-09-23 18:21:48 +0530 | [diff] [blame] | 20 | #include <linux/io.h> |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 21 | #include <linux/ioport.h> |
| 22 | #include <linux/module.h> |
Ludovic Desroches | e919fd2 | 2012-07-24 15:30:03 +0200 | [diff] [blame] | 23 | #include <linux/of.h> |
| 24 | #include <linux/of_device.h> |
| 25 | #include <linux/of_gpio.h> |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 26 | #include <linux/platform_device.h> |
| 27 | #include <linux/scatterlist.h> |
Haavard Skinnemoen | deec9ae | 2008-07-24 14:18:59 +0200 | [diff] [blame] | 28 | #include <linux/seq_file.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 29 | #include <linux/slab.h> |
Haavard Skinnemoen | deec9ae | 2008-07-24 14:18:59 +0200 | [diff] [blame] | 30 | #include <linux/stat.h> |
Viresh Kumar | e2b35f3 | 2012-02-01 16:12:27 +0530 | [diff] [blame] | 31 | #include <linux/types.h> |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 32 | |
| 33 | #include <linux/mmc/host.h> |
Nicolas Ferre | 2f1d791 | 2010-12-10 19:14:32 +0100 | [diff] [blame] | 34 | #include <linux/mmc/sdio.h> |
Nicolas Ferre | 2635d1b | 2009-12-14 18:01:30 -0800 | [diff] [blame] | 35 | |
Nicolas Ferre | c42aa77 | 2008-11-20 15:59:12 +0100 | [diff] [blame] | 36 | #include <linux/atmel-mci.h> |
Ludovic Desroches | 796211b | 2011-08-11 15:25:44 +0000 | [diff] [blame] | 37 | #include <linux/atmel_pdc.h> |
Wenyou Yang | ae552ab | 2014-10-30 12:00:41 +0800 | [diff] [blame] | 38 | #include <linux/pm.h> |
| 39 | #include <linux/pm_runtime.h> |
Wenyou Yang | b5b64fa | 2014-11-07 08:48:13 +0800 | [diff] [blame] | 40 | #include <linux/pinctrl/consumer.h> |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 41 | |
Arnd Bergmann | bf614c7 | 2014-06-05 23:14:38 +0200 | [diff] [blame] | 42 | #include <asm/cacheflush.h> |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 43 | #include <asm/io.h> |
| 44 | #include <asm/unaligned.h> |
| 45 | |
ludovic.desroches@atmel.com | ec8fc9c | 2015-11-23 16:27:30 +0100 | [diff] [blame] | 46 | /* |
| 47 | * Superset of MCI IP registers integrated in Atmel AVR32 and AT91 Processors |
| 48 | * Registers and bitfields marked with [2] are only available in MCI2 |
| 49 | */ |
| 50 | |
| 51 | /* MCI Register Definitions */ |
| 52 | #define ATMCI_CR 0x0000 /* Control */ |
| 53 | #define ATMCI_CR_MCIEN BIT(0) /* MCI Enable */ |
| 54 | #define ATMCI_CR_MCIDIS BIT(1) /* MCI Disable */ |
| 55 | #define ATMCI_CR_PWSEN BIT(2) /* Power Save Enable */ |
| 56 | #define ATMCI_CR_PWSDIS BIT(3) /* Power Save Disable */ |
| 57 | #define ATMCI_CR_SWRST BIT(7) /* Software Reset */ |
| 58 | #define ATMCI_MR 0x0004 /* Mode */ |
| 59 | #define ATMCI_MR_CLKDIV(x) ((x) << 0) /* Clock Divider */ |
| 60 | #define ATMCI_MR_PWSDIV(x) ((x) << 8) /* Power Saving Divider */ |
| 61 | #define ATMCI_MR_RDPROOF BIT(11) /* Read Proof */ |
| 62 | #define ATMCI_MR_WRPROOF BIT(12) /* Write Proof */ |
| 63 | #define ATMCI_MR_PDCFBYTE BIT(13) /* Force Byte Transfer */ |
| 64 | #define ATMCI_MR_PDCPADV BIT(14) /* Padding Value */ |
| 65 | #define ATMCI_MR_PDCMODE BIT(15) /* PDC-oriented Mode */ |
| 66 | #define ATMCI_MR_CLKODD(x) ((x) << 16) /* LSB of Clock Divider */ |
| 67 | #define ATMCI_DTOR 0x0008 /* Data Timeout */ |
| 68 | #define ATMCI_DTOCYC(x) ((x) << 0) /* Data Timeout Cycles */ |
| 69 | #define ATMCI_DTOMUL(x) ((x) << 4) /* Data Timeout Multiplier */ |
| 70 | #define ATMCI_SDCR 0x000c /* SD Card / SDIO */ |
| 71 | #define ATMCI_SDCSEL_SLOT_A (0 << 0) /* Select SD slot A */ |
| 72 | #define ATMCI_SDCSEL_SLOT_B (1 << 0) /* Select SD slot A */ |
| 73 | #define ATMCI_SDCSEL_MASK (3 << 0) |
| 74 | #define ATMCI_SDCBUS_1BIT (0 << 6) /* 1-bit data bus */ |
| 75 | #define ATMCI_SDCBUS_4BIT (2 << 6) /* 4-bit data bus */ |
| 76 | #define ATMCI_SDCBUS_8BIT (3 << 6) /* 8-bit data bus[2] */ |
| 77 | #define ATMCI_SDCBUS_MASK (3 << 6) |
| 78 | #define ATMCI_ARGR 0x0010 /* Command Argument */ |
| 79 | #define ATMCI_CMDR 0x0014 /* Command */ |
| 80 | #define ATMCI_CMDR_CMDNB(x) ((x) << 0) /* Command Opcode */ |
| 81 | #define ATMCI_CMDR_RSPTYP_NONE (0 << 6) /* No response */ |
| 82 | #define ATMCI_CMDR_RSPTYP_48BIT (1 << 6) /* 48-bit response */ |
| 83 | #define ATMCI_CMDR_RSPTYP_136BIT (2 << 6) /* 136-bit response */ |
| 84 | #define ATMCI_CMDR_SPCMD_INIT (1 << 8) /* Initialization command */ |
| 85 | #define ATMCI_CMDR_SPCMD_SYNC (2 << 8) /* Synchronized command */ |
| 86 | #define ATMCI_CMDR_SPCMD_INT (4 << 8) /* Interrupt command */ |
| 87 | #define ATMCI_CMDR_SPCMD_INTRESP (5 << 8) /* Interrupt response */ |
| 88 | #define ATMCI_CMDR_OPDCMD (1 << 11) /* Open Drain */ |
| 89 | #define ATMCI_CMDR_MAXLAT_5CYC (0 << 12) /* Max latency 5 cycles */ |
| 90 | #define ATMCI_CMDR_MAXLAT_64CYC (1 << 12) /* Max latency 64 cycles */ |
| 91 | #define ATMCI_CMDR_START_XFER (1 << 16) /* Start data transfer */ |
| 92 | #define ATMCI_CMDR_STOP_XFER (2 << 16) /* Stop data transfer */ |
| 93 | #define ATMCI_CMDR_TRDIR_WRITE (0 << 18) /* Write data */ |
| 94 | #define ATMCI_CMDR_TRDIR_READ (1 << 18) /* Read data */ |
| 95 | #define ATMCI_CMDR_BLOCK (0 << 19) /* Single-block transfer */ |
| 96 | #define ATMCI_CMDR_MULTI_BLOCK (1 << 19) /* Multi-block transfer */ |
| 97 | #define ATMCI_CMDR_STREAM (2 << 19) /* MMC Stream transfer */ |
| 98 | #define ATMCI_CMDR_SDIO_BYTE (4 << 19) /* SDIO Byte transfer */ |
| 99 | #define ATMCI_CMDR_SDIO_BLOCK (5 << 19) /* SDIO Block transfer */ |
| 100 | #define ATMCI_CMDR_SDIO_SUSPEND (1 << 24) /* SDIO Suspend Command */ |
| 101 | #define ATMCI_CMDR_SDIO_RESUME (2 << 24) /* SDIO Resume Command */ |
| 102 | #define ATMCI_BLKR 0x0018 /* Block */ |
| 103 | #define ATMCI_BCNT(x) ((x) << 0) /* Data Block Count */ |
| 104 | #define ATMCI_BLKLEN(x) ((x) << 16) /* Data Block Length */ |
| 105 | #define ATMCI_CSTOR 0x001c /* Completion Signal Timeout[2] */ |
| 106 | #define ATMCI_CSTOCYC(x) ((x) << 0) /* CST cycles */ |
| 107 | #define ATMCI_CSTOMUL(x) ((x) << 4) /* CST multiplier */ |
| 108 | #define ATMCI_RSPR 0x0020 /* Response 0 */ |
| 109 | #define ATMCI_RSPR1 0x0024 /* Response 1 */ |
| 110 | #define ATMCI_RSPR2 0x0028 /* Response 2 */ |
| 111 | #define ATMCI_RSPR3 0x002c /* Response 3 */ |
| 112 | #define ATMCI_RDR 0x0030 /* Receive Data */ |
| 113 | #define ATMCI_TDR 0x0034 /* Transmit Data */ |
| 114 | #define ATMCI_SR 0x0040 /* Status */ |
| 115 | #define ATMCI_IER 0x0044 /* Interrupt Enable */ |
| 116 | #define ATMCI_IDR 0x0048 /* Interrupt Disable */ |
| 117 | #define ATMCI_IMR 0x004c /* Interrupt Mask */ |
| 118 | #define ATMCI_CMDRDY BIT(0) /* Command Ready */ |
| 119 | #define ATMCI_RXRDY BIT(1) /* Receiver Ready */ |
| 120 | #define ATMCI_TXRDY BIT(2) /* Transmitter Ready */ |
| 121 | #define ATMCI_BLKE BIT(3) /* Data Block Ended */ |
| 122 | #define ATMCI_DTIP BIT(4) /* Data Transfer In Progress */ |
| 123 | #define ATMCI_NOTBUSY BIT(5) /* Data Not Busy */ |
| 124 | #define ATMCI_ENDRX BIT(6) /* End of RX Buffer */ |
| 125 | #define ATMCI_ENDTX BIT(7) /* End of TX Buffer */ |
| 126 | #define ATMCI_SDIOIRQA BIT(8) /* SDIO IRQ in slot A */ |
| 127 | #define ATMCI_SDIOIRQB BIT(9) /* SDIO IRQ in slot B */ |
| 128 | #define ATMCI_SDIOWAIT BIT(12) /* SDIO Read Wait Operation Status */ |
| 129 | #define ATMCI_CSRCV BIT(13) /* CE-ATA Completion Signal Received */ |
| 130 | #define ATMCI_RXBUFF BIT(14) /* RX Buffer Full */ |
| 131 | #define ATMCI_TXBUFE BIT(15) /* TX Buffer Empty */ |
| 132 | #define ATMCI_RINDE BIT(16) /* Response Index Error */ |
| 133 | #define ATMCI_RDIRE BIT(17) /* Response Direction Error */ |
| 134 | #define ATMCI_RCRCE BIT(18) /* Response CRC Error */ |
| 135 | #define ATMCI_RENDE BIT(19) /* Response End Bit Error */ |
| 136 | #define ATMCI_RTOE BIT(20) /* Response Time-Out Error */ |
| 137 | #define ATMCI_DCRCE BIT(21) /* Data CRC Error */ |
| 138 | #define ATMCI_DTOE BIT(22) /* Data Time-Out Error */ |
| 139 | #define ATMCI_CSTOE BIT(23) /* Completion Signal Time-out Error */ |
| 140 | #define ATMCI_BLKOVRE BIT(24) /* DMA Block Overrun Error */ |
| 141 | #define ATMCI_DMADONE BIT(25) /* DMA Transfer Done */ |
| 142 | #define ATMCI_FIFOEMPTY BIT(26) /* FIFO Empty Flag */ |
| 143 | #define ATMCI_XFRDONE BIT(27) /* Transfer Done Flag */ |
| 144 | #define ATMCI_ACKRCV BIT(28) /* Boot Operation Acknowledge Received */ |
| 145 | #define ATMCI_ACKRCVE BIT(29) /* Boot Operation Acknowledge Error */ |
| 146 | #define ATMCI_OVRE BIT(30) /* RX Overrun Error */ |
| 147 | #define ATMCI_UNRE BIT(31) /* TX Underrun Error */ |
| 148 | #define ATMCI_DMA 0x0050 /* DMA Configuration[2] */ |
| 149 | #define ATMCI_DMA_OFFSET(x) ((x) << 0) /* DMA Write Buffer Offset */ |
| 150 | #define ATMCI_DMA_CHKSIZE(x) ((x) << 4) /* DMA Channel Read and Write Chunk Size */ |
| 151 | #define ATMCI_DMAEN BIT(8) /* DMA Hardware Handshaking Enable */ |
| 152 | #define ATMCI_CFG 0x0054 /* Configuration[2] */ |
| 153 | #define ATMCI_CFG_FIFOMODE_1DATA BIT(0) /* MCI Internal FIFO control mode */ |
| 154 | #define ATMCI_CFG_FERRCTRL_COR BIT(4) /* Flow Error flag reset control mode */ |
| 155 | #define ATMCI_CFG_HSMODE BIT(8) /* High Speed Mode */ |
| 156 | #define ATMCI_CFG_LSYNC BIT(12) /* Synchronize on the last block */ |
| 157 | #define ATMCI_WPMR 0x00e4 /* Write Protection Mode[2] */ |
| 158 | #define ATMCI_WP_EN BIT(0) /* WP Enable */ |
| 159 | #define ATMCI_WP_KEY (0x4d4349 << 8) /* WP Key */ |
| 160 | #define ATMCI_WPSR 0x00e8 /* Write Protection Status[2] */ |
| 161 | #define ATMCI_GET_WP_VS(x) ((x) & 0x0f) |
| 162 | #define ATMCI_GET_WP_VSRC(x) (((x) >> 8) & 0xffff) |
| 163 | #define ATMCI_VERSION 0x00FC /* Version */ |
| 164 | #define ATMCI_FIFO_APERTURE 0x0200 /* FIFO Aperture[2] */ |
| 165 | |
| 166 | /* This is not including the FIFO Aperture on MCI2 */ |
| 167 | #define ATMCI_REGS_SIZE 0x100 |
| 168 | |
| 169 | /* Register access macros */ |
| 170 | #define atmci_readl(port, reg) \ |
| 171 | __raw_readl((port)->regs + reg) |
| 172 | #define atmci_writel(port, reg, value) \ |
| 173 | __raw_writel((value), (port)->regs + reg) |
| 174 | |
| 175 | /* On AVR chips the Peripheral DMA Controller is not connected to MCI. */ |
| 176 | #ifdef CONFIG_AVR32 |
| 177 | # define ATMCI_PDC_CONNECTED 0 |
| 178 | #else |
| 179 | # define ATMCI_PDC_CONNECTED 1 |
| 180 | #endif |
| 181 | |
Wenyou Yang | ae552ab | 2014-10-30 12:00:41 +0800 | [diff] [blame] | 182 | #define AUTOSUSPEND_DELAY 50 |
| 183 | |
Ludovic Desroches | 2c96a29 | 2011-08-11 15:25:41 +0000 | [diff] [blame] | 184 | #define ATMCI_DATA_ERROR_FLAGS (ATMCI_DCRCE | ATMCI_DTOE | ATMCI_OVRE | ATMCI_UNRE) |
Haavard Skinnemoen | 65e8b08 | 2008-07-30 20:29:03 +0200 | [diff] [blame] | 185 | #define ATMCI_DMA_THRESHOLD 16 |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 186 | |
| 187 | enum { |
Ludovic Desroches | f517754 | 2012-05-16 15:25:59 +0200 | [diff] [blame] | 188 | EVENT_CMD_RDY = 0, |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 189 | EVENT_XFER_COMPLETE, |
Ludovic Desroches | f517754 | 2012-05-16 15:25:59 +0200 | [diff] [blame] | 190 | EVENT_NOTBUSY, |
Haavard Skinnemoen | c06ad25 | 2008-07-31 14:49:16 +0200 | [diff] [blame] | 191 | EVENT_DATA_ERROR, |
| 192 | }; |
| 193 | |
| 194 | enum atmel_mci_state { |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 195 | STATE_IDLE = 0, |
| 196 | STATE_SENDING_CMD, |
Ludovic Desroches | f517754 | 2012-05-16 15:25:59 +0200 | [diff] [blame] | 197 | STATE_DATA_XFER, |
| 198 | STATE_WAITING_NOTBUSY, |
Haavard Skinnemoen | c06ad25 | 2008-07-31 14:49:16 +0200 | [diff] [blame] | 199 | STATE_SENDING_STOP, |
Ludovic Desroches | f517754 | 2012-05-16 15:25:59 +0200 | [diff] [blame] | 200 | STATE_END_REQUEST, |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 201 | }; |
| 202 | |
Ludovic Desroches | 796211b | 2011-08-11 15:25:44 +0000 | [diff] [blame] | 203 | enum atmci_xfer_dir { |
| 204 | XFER_RECEIVE = 0, |
| 205 | XFER_TRANSMIT, |
| 206 | }; |
| 207 | |
| 208 | enum atmci_pdc_buf { |
| 209 | PDC_FIRST_BUF = 0, |
| 210 | PDC_SECOND_BUF, |
| 211 | }; |
| 212 | |
| 213 | struct atmel_mci_caps { |
Hein_Tibosch | ccdfe61 | 2012-08-30 16:34:38 +0000 | [diff] [blame] | 214 | bool has_dma_conf_reg; |
Ludovic Desroches | 796211b | 2011-08-11 15:25:44 +0000 | [diff] [blame] | 215 | bool has_pdc; |
| 216 | bool has_cfg_reg; |
| 217 | bool has_cstor_reg; |
| 218 | bool has_highspeed; |
| 219 | bool has_rwproof; |
Ludovic Desroches | faf8180 | 2012-03-21 16:41:23 +0100 | [diff] [blame] | 220 | bool has_odd_clk_div; |
Ludovic Desroches | 24011f3 | 2012-05-16 15:26:00 +0200 | [diff] [blame] | 221 | bool has_bad_data_ordering; |
| 222 | bool need_reset_after_xfer; |
| 223 | bool need_blksz_mul_4; |
Ludovic Desroches | 077d407 | 2012-07-24 11:42:04 +0200 | [diff] [blame] | 224 | bool need_notbusy_for_read_ops; |
Ludovic Desroches | 796211b | 2011-08-11 15:25:44 +0000 | [diff] [blame] | 225 | }; |
| 226 | |
Haavard Skinnemoen | 65e8b08 | 2008-07-30 20:29:03 +0200 | [diff] [blame] | 227 | struct atmel_mci_dma { |
Haavard Skinnemoen | 65e8b08 | 2008-07-30 20:29:03 +0200 | [diff] [blame] | 228 | struct dma_chan *chan; |
| 229 | struct dma_async_tx_descriptor *data_desc; |
Haavard Skinnemoen | 65e8b08 | 2008-07-30 20:29:03 +0200 | [diff] [blame] | 230 | }; |
| 231 | |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 232 | /** |
| 233 | * struct atmel_mci - MMC controller state shared between all slots |
| 234 | * @lock: Spinlock protecting the queue and associated data. |
| 235 | * @regs: Pointer to MMIO registers. |
Ludovic Desroches | 796211b | 2011-08-11 15:25:44 +0000 | [diff] [blame] | 236 | * @sg: Scatterlist entry currently being processed by PIO or PDC code. |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 237 | * @pio_offset: Offset into the current scatterlist entry. |
Ludovic Desroches | 7a90dcc | 2012-05-16 15:25:58 +0200 | [diff] [blame] | 238 | * @buffer: Buffer used if we don't have the r/w proof capability. We |
| 239 | * don't have the time to switch pdc buffers so we have to use only |
| 240 | * one buffer for the full transaction. |
| 241 | * @buf_size: size of the buffer. |
| 242 | * @phys_buf_addr: buffer address needed for pdc. |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 243 | * @cur_slot: The slot which is currently using the controller. |
| 244 | * @mrq: The request currently being processed on @cur_slot, |
| 245 | * or NULL if the controller is idle. |
| 246 | * @cmd: The command currently being sent to the card, or NULL. |
| 247 | * @data: The data currently being transferred, or NULL if no data |
| 248 | * transfer is in progress. |
Ludovic Desroches | 796211b | 2011-08-11 15:25:44 +0000 | [diff] [blame] | 249 | * @data_size: just data->blocks * data->blksz. |
Haavard Skinnemoen | 65e8b08 | 2008-07-30 20:29:03 +0200 | [diff] [blame] | 250 | * @dma: DMA client state. |
| 251 | * @data_chan: DMA channel being used for the current data transfer. |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 252 | * @cmd_status: Snapshot of SR taken upon completion of the current |
| 253 | * command. Only valid when EVENT_CMD_COMPLETE is pending. |
| 254 | * @data_status: Snapshot of SR taken upon completion of the current |
| 255 | * data transfer. Only valid when EVENT_DATA_COMPLETE or |
| 256 | * EVENT_DATA_ERROR is pending. |
| 257 | * @stop_cmdr: Value to be loaded into CMDR when the stop command is |
| 258 | * to be sent. |
| 259 | * @tasklet: Tasklet running the request state machine. |
| 260 | * @pending_events: Bitmask of events flagged by the interrupt handler |
| 261 | * to be processed by the tasklet. |
| 262 | * @completed_events: Bitmask of events which the state machine has |
| 263 | * processed. |
| 264 | * @state: Tasklet state. |
| 265 | * @queue: List of slots waiting for access to the controller. |
| 266 | * @need_clock_update: Update the clock rate before the next request. |
| 267 | * @need_reset: Reset controller before next request. |
Ludovic Desroches | 24011f3 | 2012-05-16 15:26:00 +0200 | [diff] [blame] | 268 | * @timer: Timer to balance the data timeout error flag which cannot rise. |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 269 | * @mode_reg: Value of the MR register. |
Nicolas Ferre | 74791a2 | 2009-12-14 18:01:31 -0800 | [diff] [blame] | 270 | * @cfg_reg: Value of the CFG register. |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 271 | * @bus_hz: The rate of @mck in Hz. This forms the basis for MMC bus |
| 272 | * rate and timeout calculations. |
| 273 | * @mapbase: Physical address of the MMIO registers. |
| 274 | * @mck: The peripheral bus clock hooked up to the MMC controller. |
| 275 | * @pdev: Platform device associated with the MMC controller. |
| 276 | * @slot: Slots sharing this MMC controller. |
Ludovic Desroches | 796211b | 2011-08-11 15:25:44 +0000 | [diff] [blame] | 277 | * @caps: MCI capabilities depending on MCI version. |
| 278 | * @prepare_data: function to setup MCI before data transfer which |
| 279 | * depends on MCI capabilities. |
| 280 | * @submit_data: function to start data transfer which depends on MCI |
| 281 | * capabilities. |
| 282 | * @stop_transfer: function to stop data transfer which depends on MCI |
| 283 | * capabilities. |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 284 | * |
| 285 | * Locking |
| 286 | * ======= |
| 287 | * |
| 288 | * @lock is a softirq-safe spinlock protecting @queue as well as |
| 289 | * @cur_slot, @mrq and @state. These must always be updated |
| 290 | * at the same time while holding @lock. |
| 291 | * |
| 292 | * @lock also protects mode_reg and need_clock_update since these are |
| 293 | * used to synchronize mode register updates with the queue |
| 294 | * processing. |
| 295 | * |
| 296 | * The @mrq field of struct atmel_mci_slot is also protected by @lock, |
| 297 | * and must always be written at the same time as the slot is added to |
| 298 | * @queue. |
| 299 | * |
| 300 | * @pending_events and @completed_events are accessed using atomic bit |
| 301 | * operations, so they don't need any locking. |
| 302 | * |
| 303 | * None of the fields touched by the interrupt handler need any |
| 304 | * locking. However, ordering is important: Before EVENT_DATA_ERROR or |
| 305 | * EVENT_DATA_COMPLETE is set in @pending_events, all data-related |
| 306 | * interrupts must be disabled and @data_status updated with a |
| 307 | * snapshot of SR. Similarly, before EVENT_CMD_COMPLETE is set, the |
Lucas De Marchi | 25985ed | 2011-03-30 22:57:33 -0300 | [diff] [blame] | 308 | * CMDRDY interrupt must be disabled and @cmd_status updated with a |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 309 | * snapshot of SR, and before EVENT_XFER_COMPLETE can be set, the |
| 310 | * bytes_xfered field of @data must be written. This is ensured by |
| 311 | * using barriers. |
| 312 | */ |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 313 | struct atmel_mci { |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 314 | spinlock_t lock; |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 315 | void __iomem *regs; |
| 316 | |
| 317 | struct scatterlist *sg; |
Terry Barnaby | bdbc5d0 | 2013-04-08 12:05:47 -0400 | [diff] [blame] | 318 | unsigned int sg_len; |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 319 | unsigned int pio_offset; |
Ludovic Desroches | 7a90dcc | 2012-05-16 15:25:58 +0200 | [diff] [blame] | 320 | unsigned int *buffer; |
| 321 | unsigned int buf_size; |
| 322 | dma_addr_t buf_phys_addr; |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 323 | |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 324 | struct atmel_mci_slot *cur_slot; |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 325 | struct mmc_request *mrq; |
| 326 | struct mmc_command *cmd; |
| 327 | struct mmc_data *data; |
Ludovic Desroches | 796211b | 2011-08-11 15:25:44 +0000 | [diff] [blame] | 328 | unsigned int data_size; |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 329 | |
Haavard Skinnemoen | 65e8b08 | 2008-07-30 20:29:03 +0200 | [diff] [blame] | 330 | struct atmel_mci_dma dma; |
| 331 | struct dma_chan *data_chan; |
Viresh Kumar | e2b35f3 | 2012-02-01 16:12:27 +0530 | [diff] [blame] | 332 | struct dma_slave_config dma_conf; |
Haavard Skinnemoen | 65e8b08 | 2008-07-30 20:29:03 +0200 | [diff] [blame] | 333 | |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 334 | u32 cmd_status; |
| 335 | u32 data_status; |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 336 | u32 stop_cmdr; |
| 337 | |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 338 | struct tasklet_struct tasklet; |
| 339 | unsigned long pending_events; |
| 340 | unsigned long completed_events; |
Haavard Skinnemoen | c06ad25 | 2008-07-31 14:49:16 +0200 | [diff] [blame] | 341 | enum atmel_mci_state state; |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 342 | struct list_head queue; |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 343 | |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 344 | bool need_clock_update; |
| 345 | bool need_reset; |
Ludovic Desroches | 24011f3 | 2012-05-16 15:26:00 +0200 | [diff] [blame] | 346 | struct timer_list timer; |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 347 | u32 mode_reg; |
Nicolas Ferre | 74791a2 | 2009-12-14 18:01:31 -0800 | [diff] [blame] | 348 | u32 cfg_reg; |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 349 | unsigned long bus_hz; |
| 350 | unsigned long mapbase; |
| 351 | struct clk *mck; |
| 352 | struct platform_device *pdev; |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 353 | |
Ludovic Desroches | 2c96a29 | 2011-08-11 15:25:41 +0000 | [diff] [blame] | 354 | struct atmel_mci_slot *slot[ATMCI_MAX_NR_SLOTS]; |
Ludovic Desroches | 796211b | 2011-08-11 15:25:44 +0000 | [diff] [blame] | 355 | |
| 356 | struct atmel_mci_caps caps; |
| 357 | |
| 358 | u32 (*prepare_data)(struct atmel_mci *host, struct mmc_data *data); |
| 359 | void (*submit_data)(struct atmel_mci *host, struct mmc_data *data); |
| 360 | void (*stop_transfer)(struct atmel_mci *host); |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 361 | }; |
| 362 | |
| 363 | /** |
| 364 | * struct atmel_mci_slot - MMC slot state |
| 365 | * @mmc: The mmc_host representing this slot. |
| 366 | * @host: The MMC controller this slot is using. |
| 367 | * @sdc_reg: Value of SDCR to be written before using this slot. |
Anders Grahn | 88ff82e | 2010-05-26 14:42:01 -0700 | [diff] [blame] | 368 | * @sdio_irq: SDIO irq mask for this slot. |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 369 | * @mrq: mmc_request currently being processed or waiting to be |
| 370 | * processed, or NULL when the slot is idle. |
| 371 | * @queue_node: List node for placing this node in the @queue list of |
| 372 | * &struct atmel_mci. |
| 373 | * @clock: Clock rate configured by set_ios(). Protected by host->lock. |
| 374 | * @flags: Random state bits associated with the slot. |
| 375 | * @detect_pin: GPIO pin used for card detection, or negative if not |
| 376 | * available. |
| 377 | * @wp_pin: GPIO pin used for card write protect sending, or negative |
| 378 | * if not available. |
Jonas Larsson | 1c1452b | 2009-03-31 11:16:48 +0200 | [diff] [blame] | 379 | * @detect_is_active_high: The state of the detect pin when it is active. |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 380 | * @detect_timer: Timer used for debouncing @detect_pin interrupts. |
| 381 | */ |
| 382 | struct atmel_mci_slot { |
| 383 | struct mmc_host *mmc; |
| 384 | struct atmel_mci *host; |
| 385 | |
| 386 | u32 sdc_reg; |
Anders Grahn | 88ff82e | 2010-05-26 14:42:01 -0700 | [diff] [blame] | 387 | u32 sdio_irq; |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 388 | |
| 389 | struct mmc_request *mrq; |
| 390 | struct list_head queue_node; |
| 391 | |
| 392 | unsigned int clock; |
| 393 | unsigned long flags; |
| 394 | #define ATMCI_CARD_PRESENT 0 |
| 395 | #define ATMCI_CARD_NEED_INIT 1 |
| 396 | #define ATMCI_SHUTDOWN 2 |
| 397 | |
| 398 | int detect_pin; |
| 399 | int wp_pin; |
Jonas Larsson | 1c1452b | 2009-03-31 11:16:48 +0200 | [diff] [blame] | 400 | bool detect_is_active_high; |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 401 | |
| 402 | struct timer_list detect_timer; |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 403 | }; |
| 404 | |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 405 | #define atmci_test_and_clear_pending(host, event) \ |
| 406 | test_and_clear_bit(event, &host->pending_events) |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 407 | #define atmci_set_completed(host, event) \ |
| 408 | set_bit(event, &host->completed_events) |
| 409 | #define atmci_set_pending(host, event) \ |
| 410 | set_bit(event, &host->pending_events) |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 411 | |
Haavard Skinnemoen | deec9ae | 2008-07-24 14:18:59 +0200 | [diff] [blame] | 412 | /* |
| 413 | * The debugfs stuff below is mostly optimized away when |
| 414 | * CONFIG_DEBUG_FS is not set. |
| 415 | */ |
| 416 | static int atmci_req_show(struct seq_file *s, void *v) |
| 417 | { |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 418 | struct atmel_mci_slot *slot = s->private; |
| 419 | struct mmc_request *mrq; |
Haavard Skinnemoen | deec9ae | 2008-07-24 14:18:59 +0200 | [diff] [blame] | 420 | struct mmc_command *cmd; |
| 421 | struct mmc_command *stop; |
| 422 | struct mmc_data *data; |
| 423 | |
| 424 | /* Make sure we get a consistent snapshot */ |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 425 | spin_lock_bh(&slot->host->lock); |
| 426 | mrq = slot->mrq; |
Haavard Skinnemoen | deec9ae | 2008-07-24 14:18:59 +0200 | [diff] [blame] | 427 | |
| 428 | if (mrq) { |
| 429 | cmd = mrq->cmd; |
| 430 | data = mrq->data; |
| 431 | stop = mrq->stop; |
| 432 | |
| 433 | if (cmd) |
| 434 | seq_printf(s, |
| 435 | "CMD%u(0x%x) flg %x rsp %x %x %x %x err %d\n", |
| 436 | cmd->opcode, cmd->arg, cmd->flags, |
| 437 | cmd->resp[0], cmd->resp[1], cmd->resp[2], |
Nicolas Ferre | d586ebb | 2010-05-11 14:06:50 -0700 | [diff] [blame] | 438 | cmd->resp[3], cmd->error); |
Haavard Skinnemoen | deec9ae | 2008-07-24 14:18:59 +0200 | [diff] [blame] | 439 | if (data) |
| 440 | seq_printf(s, "DATA %u / %u * %u flg %x err %d\n", |
| 441 | data->bytes_xfered, data->blocks, |
| 442 | data->blksz, data->flags, data->error); |
| 443 | if (stop) |
| 444 | seq_printf(s, |
| 445 | "CMD%u(0x%x) flg %x rsp %x %x %x %x err %d\n", |
| 446 | stop->opcode, stop->arg, stop->flags, |
| 447 | stop->resp[0], stop->resp[1], stop->resp[2], |
Nicolas Ferre | d586ebb | 2010-05-11 14:06:50 -0700 | [diff] [blame] | 448 | stop->resp[3], stop->error); |
Haavard Skinnemoen | deec9ae | 2008-07-24 14:18:59 +0200 | [diff] [blame] | 449 | } |
| 450 | |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 451 | spin_unlock_bh(&slot->host->lock); |
Haavard Skinnemoen | deec9ae | 2008-07-24 14:18:59 +0200 | [diff] [blame] | 452 | |
| 453 | return 0; |
| 454 | } |
| 455 | |
| 456 | static int atmci_req_open(struct inode *inode, struct file *file) |
| 457 | { |
| 458 | return single_open(file, atmci_req_show, inode->i_private); |
| 459 | } |
| 460 | |
| 461 | static const struct file_operations atmci_req_fops = { |
| 462 | .owner = THIS_MODULE, |
| 463 | .open = atmci_req_open, |
| 464 | .read = seq_read, |
| 465 | .llseek = seq_lseek, |
| 466 | .release = single_release, |
| 467 | }; |
| 468 | |
| 469 | static void atmci_show_status_reg(struct seq_file *s, |
| 470 | const char *regname, u32 value) |
| 471 | { |
| 472 | static const char *sr_bit[] = { |
| 473 | [0] = "CMDRDY", |
| 474 | [1] = "RXRDY", |
| 475 | [2] = "TXRDY", |
| 476 | [3] = "BLKE", |
| 477 | [4] = "DTIP", |
| 478 | [5] = "NOTBUSY", |
Rob Emanuele | 04d699c | 2009-09-22 16:45:19 -0700 | [diff] [blame] | 479 | [6] = "ENDRX", |
| 480 | [7] = "ENDTX", |
Haavard Skinnemoen | deec9ae | 2008-07-24 14:18:59 +0200 | [diff] [blame] | 481 | [8] = "SDIOIRQA", |
| 482 | [9] = "SDIOIRQB", |
Rob Emanuele | 04d699c | 2009-09-22 16:45:19 -0700 | [diff] [blame] | 483 | [12] = "SDIOWAIT", |
| 484 | [14] = "RXBUFF", |
| 485 | [15] = "TXBUFE", |
Haavard Skinnemoen | deec9ae | 2008-07-24 14:18:59 +0200 | [diff] [blame] | 486 | [16] = "RINDE", |
| 487 | [17] = "RDIRE", |
| 488 | [18] = "RCRCE", |
| 489 | [19] = "RENDE", |
| 490 | [20] = "RTOE", |
| 491 | [21] = "DCRCE", |
| 492 | [22] = "DTOE", |
Rob Emanuele | 04d699c | 2009-09-22 16:45:19 -0700 | [diff] [blame] | 493 | [23] = "CSTOE", |
| 494 | [24] = "BLKOVRE", |
| 495 | [25] = "DMADONE", |
| 496 | [26] = "FIFOEMPTY", |
| 497 | [27] = "XFRDONE", |
Haavard Skinnemoen | deec9ae | 2008-07-24 14:18:59 +0200 | [diff] [blame] | 498 | [30] = "OVRE", |
| 499 | [31] = "UNRE", |
| 500 | }; |
| 501 | unsigned int i; |
| 502 | |
| 503 | seq_printf(s, "%s:\t0x%08x", regname, value); |
| 504 | for (i = 0; i < ARRAY_SIZE(sr_bit); i++) { |
| 505 | if (value & (1 << i)) { |
| 506 | if (sr_bit[i]) |
| 507 | seq_printf(s, " %s", sr_bit[i]); |
| 508 | else |
| 509 | seq_puts(s, " UNKNOWN"); |
| 510 | } |
| 511 | } |
| 512 | seq_putc(s, '\n'); |
| 513 | } |
| 514 | |
| 515 | static int atmci_regs_show(struct seq_file *s, void *v) |
| 516 | { |
| 517 | struct atmel_mci *host = s->private; |
| 518 | u32 *buf; |
Boris BREZILLON | b3894f2 | 2013-07-18 09:38:52 +0200 | [diff] [blame] | 519 | int ret = 0; |
| 520 | |
Haavard Skinnemoen | deec9ae | 2008-07-24 14:18:59 +0200 | [diff] [blame] | 521 | |
Ludovic Desroches | 2c96a29 | 2011-08-11 15:25:41 +0000 | [diff] [blame] | 522 | buf = kmalloc(ATMCI_REGS_SIZE, GFP_KERNEL); |
Haavard Skinnemoen | deec9ae | 2008-07-24 14:18:59 +0200 | [diff] [blame] | 523 | if (!buf) |
| 524 | return -ENOMEM; |
| 525 | |
Wenyou Yang | ae552ab | 2014-10-30 12:00:41 +0800 | [diff] [blame] | 526 | pm_runtime_get_sync(&host->pdev->dev); |
| 527 | |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 528 | /* |
| 529 | * Grab a more or less consistent snapshot. Note that we're |
| 530 | * not disabling interrupts, so IMR and SR may not be |
| 531 | * consistent. |
| 532 | */ |
| 533 | spin_lock_bh(&host->lock); |
Ludovic Desroches | 2c96a29 | 2011-08-11 15:25:41 +0000 | [diff] [blame] | 534 | memcpy_fromio(buf, host->regs, ATMCI_REGS_SIZE); |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 535 | spin_unlock_bh(&host->lock); |
Haavard Skinnemoen | deec9ae | 2008-07-24 14:18:59 +0200 | [diff] [blame] | 536 | |
Wenyou Yang | ae552ab | 2014-10-30 12:00:41 +0800 | [diff] [blame] | 537 | pm_runtime_mark_last_busy(&host->pdev->dev); |
| 538 | pm_runtime_put_autosuspend(&host->pdev->dev); |
Boris BREZILLON | b3894f2 | 2013-07-18 09:38:52 +0200 | [diff] [blame] | 539 | |
Nicolas Ferre | 8a4de07 | 2012-07-06 12:11:51 +0200 | [diff] [blame] | 540 | seq_printf(s, "MR:\t0x%08x%s%s ", |
Ludovic Desroches | 2c96a29 | 2011-08-11 15:25:41 +0000 | [diff] [blame] | 541 | buf[ATMCI_MR / 4], |
| 542 | buf[ATMCI_MR / 4] & ATMCI_MR_RDPROOF ? " RDPROOF" : "", |
Nicolas Ferre | 8a4de07 | 2012-07-06 12:11:51 +0200 | [diff] [blame] | 543 | buf[ATMCI_MR / 4] & ATMCI_MR_WRPROOF ? " WRPROOF" : ""); |
| 544 | if (host->caps.has_odd_clk_div) |
| 545 | seq_printf(s, "{CLKDIV,CLKODD}=%u\n", |
| 546 | ((buf[ATMCI_MR / 4] & 0xff) << 1) |
| 547 | | ((buf[ATMCI_MR / 4] >> 16) & 1)); |
| 548 | else |
| 549 | seq_printf(s, "CLKDIV=%u\n", |
| 550 | (buf[ATMCI_MR / 4] & 0xff)); |
Ludovic Desroches | 2c96a29 | 2011-08-11 15:25:41 +0000 | [diff] [blame] | 551 | seq_printf(s, "DTOR:\t0x%08x\n", buf[ATMCI_DTOR / 4]); |
| 552 | seq_printf(s, "SDCR:\t0x%08x\n", buf[ATMCI_SDCR / 4]); |
| 553 | seq_printf(s, "ARGR:\t0x%08x\n", buf[ATMCI_ARGR / 4]); |
Haavard Skinnemoen | deec9ae | 2008-07-24 14:18:59 +0200 | [diff] [blame] | 554 | seq_printf(s, "BLKR:\t0x%08x BCNT=%u BLKLEN=%u\n", |
Ludovic Desroches | 2c96a29 | 2011-08-11 15:25:41 +0000 | [diff] [blame] | 555 | buf[ATMCI_BLKR / 4], |
| 556 | buf[ATMCI_BLKR / 4] & 0xffff, |
| 557 | (buf[ATMCI_BLKR / 4] >> 16) & 0xffff); |
Ludovic Desroches | 796211b | 2011-08-11 15:25:44 +0000 | [diff] [blame] | 558 | if (host->caps.has_cstor_reg) |
Ludovic Desroches | 2c96a29 | 2011-08-11 15:25:41 +0000 | [diff] [blame] | 559 | seq_printf(s, "CSTOR:\t0x%08x\n", buf[ATMCI_CSTOR / 4]); |
Haavard Skinnemoen | deec9ae | 2008-07-24 14:18:59 +0200 | [diff] [blame] | 560 | |
| 561 | /* Don't read RSPR and RDR; it will consume the data there */ |
| 562 | |
Ludovic Desroches | 2c96a29 | 2011-08-11 15:25:41 +0000 | [diff] [blame] | 563 | atmci_show_status_reg(s, "SR", buf[ATMCI_SR / 4]); |
| 564 | atmci_show_status_reg(s, "IMR", buf[ATMCI_IMR / 4]); |
Haavard Skinnemoen | deec9ae | 2008-07-24 14:18:59 +0200 | [diff] [blame] | 565 | |
Hein_Tibosch | ccdfe61 | 2012-08-30 16:34:38 +0000 | [diff] [blame] | 566 | if (host->caps.has_dma_conf_reg) { |
Nicolas Ferre | 74791a2 | 2009-12-14 18:01:31 -0800 | [diff] [blame] | 567 | u32 val; |
| 568 | |
Ludovic Desroches | 2c96a29 | 2011-08-11 15:25:41 +0000 | [diff] [blame] | 569 | val = buf[ATMCI_DMA / 4]; |
Nicolas Ferre | 74791a2 | 2009-12-14 18:01:31 -0800 | [diff] [blame] | 570 | seq_printf(s, "DMA:\t0x%08x OFFSET=%u CHKSIZE=%u%s\n", |
| 571 | val, val & 3, |
| 572 | ((val >> 4) & 3) ? |
| 573 | 1 << (((val >> 4) & 3) + 1) : 1, |
Ludovic Desroches | 2c96a29 | 2011-08-11 15:25:41 +0000 | [diff] [blame] | 574 | val & ATMCI_DMAEN ? " DMAEN" : ""); |
Ludovic Desroches | 796211b | 2011-08-11 15:25:44 +0000 | [diff] [blame] | 575 | } |
| 576 | if (host->caps.has_cfg_reg) { |
| 577 | u32 val; |
Nicolas Ferre | 74791a2 | 2009-12-14 18:01:31 -0800 | [diff] [blame] | 578 | |
Ludovic Desroches | 2c96a29 | 2011-08-11 15:25:41 +0000 | [diff] [blame] | 579 | val = buf[ATMCI_CFG / 4]; |
Nicolas Ferre | 74791a2 | 2009-12-14 18:01:31 -0800 | [diff] [blame] | 580 | seq_printf(s, "CFG:\t0x%08x%s%s%s%s\n", |
| 581 | val, |
Ludovic Desroches | 2c96a29 | 2011-08-11 15:25:41 +0000 | [diff] [blame] | 582 | val & ATMCI_CFG_FIFOMODE_1DATA ? " FIFOMODE_ONE_DATA" : "", |
| 583 | val & ATMCI_CFG_FERRCTRL_COR ? " FERRCTRL_CLEAR_ON_READ" : "", |
| 584 | val & ATMCI_CFG_HSMODE ? " HSMODE" : "", |
| 585 | val & ATMCI_CFG_LSYNC ? " LSYNC" : ""); |
Nicolas Ferre | 74791a2 | 2009-12-14 18:01:31 -0800 | [diff] [blame] | 586 | } |
| 587 | |
Haavard Skinnemoen | b17339a | 2008-09-19 21:09:28 +0200 | [diff] [blame] | 588 | kfree(buf); |
| 589 | |
Boris BREZILLON | b3894f2 | 2013-07-18 09:38:52 +0200 | [diff] [blame] | 590 | return ret; |
Haavard Skinnemoen | deec9ae | 2008-07-24 14:18:59 +0200 | [diff] [blame] | 591 | } |
| 592 | |
| 593 | static int atmci_regs_open(struct inode *inode, struct file *file) |
| 594 | { |
| 595 | return single_open(file, atmci_regs_show, inode->i_private); |
| 596 | } |
| 597 | |
| 598 | static const struct file_operations atmci_regs_fops = { |
| 599 | .owner = THIS_MODULE, |
| 600 | .open = atmci_regs_open, |
| 601 | .read = seq_read, |
| 602 | .llseek = seq_lseek, |
| 603 | .release = single_release, |
| 604 | }; |
| 605 | |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 606 | static void atmci_init_debugfs(struct atmel_mci_slot *slot) |
Haavard Skinnemoen | deec9ae | 2008-07-24 14:18:59 +0200 | [diff] [blame] | 607 | { |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 608 | struct mmc_host *mmc = slot->mmc; |
| 609 | struct atmel_mci *host = slot->host; |
| 610 | struct dentry *root; |
| 611 | struct dentry *node; |
Haavard Skinnemoen | deec9ae | 2008-07-24 14:18:59 +0200 | [diff] [blame] | 612 | |
Haavard Skinnemoen | deec9ae | 2008-07-24 14:18:59 +0200 | [diff] [blame] | 613 | root = mmc->debugfs_root; |
| 614 | if (!root) |
| 615 | return; |
| 616 | |
| 617 | node = debugfs_create_file("regs", S_IRUSR, root, host, |
| 618 | &atmci_regs_fops); |
| 619 | if (IS_ERR(node)) |
| 620 | return; |
| 621 | if (!node) |
| 622 | goto err; |
| 623 | |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 624 | node = debugfs_create_file("req", S_IRUSR, root, slot, &atmci_req_fops); |
Haavard Skinnemoen | deec9ae | 2008-07-24 14:18:59 +0200 | [diff] [blame] | 625 | if (!node) |
| 626 | goto err; |
| 627 | |
Haavard Skinnemoen | c06ad25 | 2008-07-31 14:49:16 +0200 | [diff] [blame] | 628 | node = debugfs_create_u32("state", S_IRUSR, root, (u32 *)&host->state); |
| 629 | if (!node) |
| 630 | goto err; |
| 631 | |
Haavard Skinnemoen | deec9ae | 2008-07-24 14:18:59 +0200 | [diff] [blame] | 632 | node = debugfs_create_x32("pending_events", S_IRUSR, root, |
| 633 | (u32 *)&host->pending_events); |
| 634 | if (!node) |
| 635 | goto err; |
| 636 | |
| 637 | node = debugfs_create_x32("completed_events", S_IRUSR, root, |
| 638 | (u32 *)&host->completed_events); |
| 639 | if (!node) |
| 640 | goto err; |
| 641 | |
| 642 | return; |
| 643 | |
| 644 | err: |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 645 | dev_err(&mmc->class_dev, "failed to initialize debugfs for slot\n"); |
Haavard Skinnemoen | deec9ae | 2008-07-24 14:18:59 +0200 | [diff] [blame] | 646 | } |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 647 | |
Ludovic Desroches | e919fd2 | 2012-07-24 15:30:03 +0200 | [diff] [blame] | 648 | #if defined(CONFIG_OF) |
| 649 | static const struct of_device_id atmci_dt_ids[] = { |
| 650 | { .compatible = "atmel,hsmci" }, |
| 651 | { /* sentinel */ } |
| 652 | }; |
| 653 | |
| 654 | MODULE_DEVICE_TABLE(of, atmci_dt_ids); |
| 655 | |
Bill Pemberton | c3be1ef | 2012-11-19 13:23:06 -0500 | [diff] [blame] | 656 | static struct mci_platform_data* |
Ludovic Desroches | e919fd2 | 2012-07-24 15:30:03 +0200 | [diff] [blame] | 657 | atmci_of_init(struct platform_device *pdev) |
| 658 | { |
| 659 | struct device_node *np = pdev->dev.of_node; |
| 660 | struct device_node *cnp; |
| 661 | struct mci_platform_data *pdata; |
| 662 | u32 slot_id; |
| 663 | |
| 664 | if (!np) { |
| 665 | dev_err(&pdev->dev, "device node not found\n"); |
| 666 | return ERR_PTR(-EINVAL); |
| 667 | } |
| 668 | |
| 669 | pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL); |
| 670 | if (!pdata) { |
| 671 | dev_err(&pdev->dev, "could not allocate memory for pdata\n"); |
| 672 | return ERR_PTR(-ENOMEM); |
| 673 | } |
| 674 | |
| 675 | for_each_child_of_node(np, cnp) { |
| 676 | if (of_property_read_u32(cnp, "reg", &slot_id)) { |
| 677 | dev_warn(&pdev->dev, "reg property is missing for %s\n", |
| 678 | cnp->full_name); |
| 679 | continue; |
| 680 | } |
| 681 | |
| 682 | if (slot_id >= ATMCI_MAX_NR_SLOTS) { |
| 683 | dev_warn(&pdev->dev, "can't have more than %d slots\n", |
| 684 | ATMCI_MAX_NR_SLOTS); |
| 685 | break; |
| 686 | } |
| 687 | |
| 688 | if (of_property_read_u32(cnp, "bus-width", |
| 689 | &pdata->slot[slot_id].bus_width)) |
| 690 | pdata->slot[slot_id].bus_width = 1; |
| 691 | |
| 692 | pdata->slot[slot_id].detect_pin = |
| 693 | of_get_named_gpio(cnp, "cd-gpios", 0); |
| 694 | |
| 695 | pdata->slot[slot_id].detect_is_active_high = |
| 696 | of_property_read_bool(cnp, "cd-inverted"); |
| 697 | |
Timo Kokkonen | 76d5556 | 2014-11-03 13:12:59 +0200 | [diff] [blame] | 698 | pdata->slot[slot_id].non_removable = |
| 699 | of_property_read_bool(cnp, "non-removable"); |
| 700 | |
Ludovic Desroches | e919fd2 | 2012-07-24 15:30:03 +0200 | [diff] [blame] | 701 | pdata->slot[slot_id].wp_pin = |
| 702 | of_get_named_gpio(cnp, "wp-gpios", 0); |
| 703 | } |
| 704 | |
| 705 | return pdata; |
| 706 | } |
| 707 | #else /* CONFIG_OF */ |
| 708 | static inline struct mci_platform_data* |
| 709 | atmci_of_init(struct platform_device *dev) |
| 710 | { |
| 711 | return ERR_PTR(-EINVAL); |
| 712 | } |
| 713 | #endif |
| 714 | |
Ludovic Desroches | 7a90dcc | 2012-05-16 15:25:58 +0200 | [diff] [blame] | 715 | static inline unsigned int atmci_get_version(struct atmel_mci *host) |
| 716 | { |
| 717 | return atmci_readl(host, ATMCI_VERSION) & 0x00000fff; |
| 718 | } |
| 719 | |
ludovic.desroches@atmel.com | 447dc0d | 2015-11-23 16:27:32 +0100 | [diff] [blame] | 720 | /* |
| 721 | * Fix sconfig's burst size according to atmel MCI. We need to convert them as: |
| 722 | * 1 -> 0, 4 -> 1, 8 -> 2, 16 -> 3. |
| 723 | * With version 0x600, we need to convert them as: 1 -> 0, 2 -> 1, 4 -> 2, |
| 724 | * 8 -> 3, 16 -> 4. |
| 725 | * |
| 726 | * This can be done by finding most significant bit set. |
| 727 | */ |
| 728 | static inline unsigned int atmci_convert_chksize(struct atmel_mci *host, |
| 729 | unsigned int maxburst) |
| 730 | { |
| 731 | unsigned int version = atmci_get_version(host); |
| 732 | unsigned int offset = 2; |
| 733 | |
| 734 | if (version >= 0x600) |
| 735 | offset = 1; |
| 736 | |
| 737 | if (maxburst > 1) |
| 738 | return fls(maxburst) - offset; |
| 739 | else |
| 740 | return 0; |
| 741 | } |
| 742 | |
Ludovic Desroches | 24011f3 | 2012-05-16 15:26:00 +0200 | [diff] [blame] | 743 | static void atmci_timeout_timer(unsigned long data) |
| 744 | { |
| 745 | struct atmel_mci *host; |
| 746 | |
| 747 | host = (struct atmel_mci *)data; |
| 748 | |
| 749 | dev_dbg(&host->pdev->dev, "software timeout\n"); |
| 750 | |
| 751 | if (host->mrq->cmd->data) { |
| 752 | host->mrq->cmd->data->error = -ETIMEDOUT; |
| 753 | host->data = NULL; |
Ludovic Desroches | c1fa342 | 2013-09-09 17:29:56 +0200 | [diff] [blame] | 754 | /* |
| 755 | * With some SDIO modules, sometimes DMA transfer hangs. If |
| 756 | * stop_transfer() is not called then the DMA request is not |
| 757 | * removed, following ones are queued and never computed. |
| 758 | */ |
| 759 | if (host->state == STATE_DATA_XFER) |
| 760 | host->stop_transfer(host); |
Ludovic Desroches | 24011f3 | 2012-05-16 15:26:00 +0200 | [diff] [blame] | 761 | } else { |
| 762 | host->mrq->cmd->error = -ETIMEDOUT; |
| 763 | host->cmd = NULL; |
| 764 | } |
| 765 | host->need_reset = 1; |
| 766 | host->state = STATE_END_REQUEST; |
| 767 | smp_wmb(); |
| 768 | tasklet_schedule(&host->tasklet); |
| 769 | } |
| 770 | |
Ludovic Desroches | 2c96a29 | 2011-08-11 15:25:41 +0000 | [diff] [blame] | 771 | static inline unsigned int atmci_ns_to_clocks(struct atmel_mci *host, |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 772 | unsigned int ns) |
| 773 | { |
Ludovic Desroches | 66292ad | 2012-03-28 12:28:33 +0200 | [diff] [blame] | 774 | /* |
| 775 | * It is easier here to use us instead of ns for the timeout, |
| 776 | * it prevents from overflows during calculation. |
| 777 | */ |
| 778 | unsigned int us = DIV_ROUND_UP(ns, 1000); |
| 779 | |
| 780 | /* Maximum clock frequency is host->bus_hz/2 */ |
| 781 | return us * (DIV_ROUND_UP(host->bus_hz, 2000000)); |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 782 | } |
| 783 | |
| 784 | static void atmci_set_timeout(struct atmel_mci *host, |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 785 | struct atmel_mci_slot *slot, struct mmc_data *data) |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 786 | { |
| 787 | static unsigned dtomul_to_shift[] = { |
| 788 | 0, 4, 7, 8, 10, 12, 16, 20 |
| 789 | }; |
| 790 | unsigned timeout; |
| 791 | unsigned dtocyc; |
| 792 | unsigned dtomul; |
| 793 | |
Ludovic Desroches | 2c96a29 | 2011-08-11 15:25:41 +0000 | [diff] [blame] | 794 | timeout = atmci_ns_to_clocks(host, data->timeout_ns) |
| 795 | + data->timeout_clks; |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 796 | |
| 797 | for (dtomul = 0; dtomul < 8; dtomul++) { |
| 798 | unsigned shift = dtomul_to_shift[dtomul]; |
| 799 | dtocyc = (timeout + (1 << shift) - 1) >> shift; |
| 800 | if (dtocyc < 15) |
| 801 | break; |
| 802 | } |
| 803 | |
| 804 | if (dtomul >= 8) { |
| 805 | dtomul = 7; |
| 806 | dtocyc = 15; |
| 807 | } |
| 808 | |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 809 | dev_vdbg(&slot->mmc->class_dev, "setting timeout to %u cycles\n", |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 810 | dtocyc << dtomul_to_shift[dtomul]); |
Ludovic Desroches | 03fc9a7 | 2011-08-11 15:25:42 +0000 | [diff] [blame] | 811 | atmci_writel(host, ATMCI_DTOR, (ATMCI_DTOMUL(dtomul) | ATMCI_DTOCYC(dtocyc))); |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 812 | } |
| 813 | |
| 814 | /* |
| 815 | * Return mask with command flags to be enabled for this command. |
| 816 | */ |
| 817 | static u32 atmci_prepare_command(struct mmc_host *mmc, |
| 818 | struct mmc_command *cmd) |
| 819 | { |
| 820 | struct mmc_data *data; |
| 821 | u32 cmdr; |
| 822 | |
| 823 | cmd->error = -EINPROGRESS; |
| 824 | |
Ludovic Desroches | 2c96a29 | 2011-08-11 15:25:41 +0000 | [diff] [blame] | 825 | cmdr = ATMCI_CMDR_CMDNB(cmd->opcode); |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 826 | |
| 827 | if (cmd->flags & MMC_RSP_PRESENT) { |
| 828 | if (cmd->flags & MMC_RSP_136) |
Ludovic Desroches | 2c96a29 | 2011-08-11 15:25:41 +0000 | [diff] [blame] | 829 | cmdr |= ATMCI_CMDR_RSPTYP_136BIT; |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 830 | else |
Ludovic Desroches | 2c96a29 | 2011-08-11 15:25:41 +0000 | [diff] [blame] | 831 | cmdr |= ATMCI_CMDR_RSPTYP_48BIT; |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 832 | } |
| 833 | |
| 834 | /* |
| 835 | * This should really be MAXLAT_5 for CMD2 and ACMD41, but |
| 836 | * it's too difficult to determine whether this is an ACMD or |
| 837 | * not. Better make it 64. |
| 838 | */ |
Ludovic Desroches | 2c96a29 | 2011-08-11 15:25:41 +0000 | [diff] [blame] | 839 | cmdr |= ATMCI_CMDR_MAXLAT_64CYC; |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 840 | |
| 841 | if (mmc->ios.bus_mode == MMC_BUSMODE_OPENDRAIN) |
Ludovic Desroches | 2c96a29 | 2011-08-11 15:25:41 +0000 | [diff] [blame] | 842 | cmdr |= ATMCI_CMDR_OPDCMD; |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 843 | |
| 844 | data = cmd->data; |
| 845 | if (data) { |
Ludovic Desroches | 2c96a29 | 2011-08-11 15:25:41 +0000 | [diff] [blame] | 846 | cmdr |= ATMCI_CMDR_START_XFER; |
Nicolas Ferre | 2f1d791 | 2010-12-10 19:14:32 +0100 | [diff] [blame] | 847 | |
| 848 | if (cmd->opcode == SD_IO_RW_EXTENDED) { |
Ludovic Desroches | 2c96a29 | 2011-08-11 15:25:41 +0000 | [diff] [blame] | 849 | cmdr |= ATMCI_CMDR_SDIO_BLOCK; |
Nicolas Ferre | 2f1d791 | 2010-12-10 19:14:32 +0100 | [diff] [blame] | 850 | } else { |
Jaehoon Chung | fd551d9 | 2016-02-01 21:07:26 +0900 | [diff] [blame] | 851 | if (data->blocks > 1) |
Ludovic Desroches | 2c96a29 | 2011-08-11 15:25:41 +0000 | [diff] [blame] | 852 | cmdr |= ATMCI_CMDR_MULTI_BLOCK; |
Nicolas Ferre | 2f1d791 | 2010-12-10 19:14:32 +0100 | [diff] [blame] | 853 | else |
Ludovic Desroches | 2c96a29 | 2011-08-11 15:25:41 +0000 | [diff] [blame] | 854 | cmdr |= ATMCI_CMDR_BLOCK; |
Nicolas Ferre | 2f1d791 | 2010-12-10 19:14:32 +0100 | [diff] [blame] | 855 | } |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 856 | |
| 857 | if (data->flags & MMC_DATA_READ) |
Ludovic Desroches | 2c96a29 | 2011-08-11 15:25:41 +0000 | [diff] [blame] | 858 | cmdr |= ATMCI_CMDR_TRDIR_READ; |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 859 | } |
| 860 | |
| 861 | return cmdr; |
| 862 | } |
| 863 | |
Ludovic Desroches | 11d1488 | 2011-08-11 15:25:45 +0000 | [diff] [blame] | 864 | static void atmci_send_command(struct atmel_mci *host, |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 865 | struct mmc_command *cmd, u32 cmd_flags) |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 866 | { |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 867 | WARN_ON(host->cmd); |
| 868 | host->cmd = cmd; |
| 869 | |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 870 | dev_vdbg(&host->pdev->dev, |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 871 | "start command: ARGR=0x%08x CMDR=0x%08x\n", |
| 872 | cmd->arg, cmd_flags); |
| 873 | |
Ludovic Desroches | 03fc9a7 | 2011-08-11 15:25:42 +0000 | [diff] [blame] | 874 | atmci_writel(host, ATMCI_ARGR, cmd->arg); |
| 875 | atmci_writel(host, ATMCI_CMDR, cmd_flags); |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 876 | } |
| 877 | |
Ludovic Desroches | 2c96a29 | 2011-08-11 15:25:41 +0000 | [diff] [blame] | 878 | static void atmci_send_stop_cmd(struct atmel_mci *host, struct mmc_data *data) |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 879 | { |
Ludovic Desroches | 6801c41 | 2012-05-16 15:26:01 +0200 | [diff] [blame] | 880 | dev_dbg(&host->pdev->dev, "send stop command\n"); |
Ludovic Desroches | 11d1488 | 2011-08-11 15:25:45 +0000 | [diff] [blame] | 881 | atmci_send_command(host, data->stop, host->stop_cmdr); |
Ludovic Desroches | 03fc9a7 | 2011-08-11 15:25:42 +0000 | [diff] [blame] | 882 | atmci_writel(host, ATMCI_IER, ATMCI_CMDRDY); |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 883 | } |
| 884 | |
Ludovic Desroches | 796211b | 2011-08-11 15:25:44 +0000 | [diff] [blame] | 885 | /* |
| 886 | * Configure given PDC buffer taking care of alignement issues. |
| 887 | * Update host->data_size and host->sg. |
| 888 | */ |
| 889 | static void atmci_pdc_set_single_buf(struct atmel_mci *host, |
| 890 | enum atmci_xfer_dir dir, enum atmci_pdc_buf buf_nb) |
Haavard Skinnemoen | 65e8b08 | 2008-07-30 20:29:03 +0200 | [diff] [blame] | 891 | { |
Ludovic Desroches | 796211b | 2011-08-11 15:25:44 +0000 | [diff] [blame] | 892 | u32 pointer_reg, counter_reg; |
Ludovic Desroches | 7a90dcc | 2012-05-16 15:25:58 +0200 | [diff] [blame] | 893 | unsigned int buf_size; |
Haavard Skinnemoen | 65e8b08 | 2008-07-30 20:29:03 +0200 | [diff] [blame] | 894 | |
Ludovic Desroches | 796211b | 2011-08-11 15:25:44 +0000 | [diff] [blame] | 895 | if (dir == XFER_RECEIVE) { |
| 896 | pointer_reg = ATMEL_PDC_RPR; |
| 897 | counter_reg = ATMEL_PDC_RCR; |
| 898 | } else { |
| 899 | pointer_reg = ATMEL_PDC_TPR; |
| 900 | counter_reg = ATMEL_PDC_TCR; |
| 901 | } |
| 902 | |
| 903 | if (buf_nb == PDC_SECOND_BUF) { |
Ludovic Desroches | 1ebbe3d | 2011-08-11 15:25:46 +0000 | [diff] [blame] | 904 | pointer_reg += ATMEL_PDC_SCND_BUF_OFF; |
| 905 | counter_reg += ATMEL_PDC_SCND_BUF_OFF; |
Ludovic Desroches | 796211b | 2011-08-11 15:25:44 +0000 | [diff] [blame] | 906 | } |
| 907 | |
Ludovic Desroches | 7a90dcc | 2012-05-16 15:25:58 +0200 | [diff] [blame] | 908 | if (!host->caps.has_rwproof) { |
| 909 | buf_size = host->buf_size; |
| 910 | atmci_writel(host, pointer_reg, host->buf_phys_addr); |
| 911 | } else { |
| 912 | buf_size = sg_dma_len(host->sg); |
| 913 | atmci_writel(host, pointer_reg, sg_dma_address(host->sg)); |
| 914 | } |
| 915 | |
| 916 | if (host->data_size <= buf_size) { |
Ludovic Desroches | 796211b | 2011-08-11 15:25:44 +0000 | [diff] [blame] | 917 | if (host->data_size & 0x3) { |
| 918 | /* If size is different from modulo 4, transfer bytes */ |
| 919 | atmci_writel(host, counter_reg, host->data_size); |
| 920 | atmci_writel(host, ATMCI_MR, host->mode_reg | ATMCI_MR_PDCFBYTE); |
| 921 | } else { |
| 922 | /* Else transfer 32-bits words */ |
| 923 | atmci_writel(host, counter_reg, host->data_size / 4); |
| 924 | } |
| 925 | host->data_size = 0; |
| 926 | } else { |
| 927 | /* We assume the size of a page is 32-bits aligned */ |
Ludovic Desroches | 341fa4c | 2011-08-11 15:25:47 +0000 | [diff] [blame] | 928 | atmci_writel(host, counter_reg, sg_dma_len(host->sg) / 4); |
| 929 | host->data_size -= sg_dma_len(host->sg); |
Ludovic Desroches | 796211b | 2011-08-11 15:25:44 +0000 | [diff] [blame] | 930 | if (host->data_size) |
| 931 | host->sg = sg_next(host->sg); |
| 932 | } |
Haavard Skinnemoen | 65e8b08 | 2008-07-30 20:29:03 +0200 | [diff] [blame] | 933 | } |
| 934 | |
Ludovic Desroches | 796211b | 2011-08-11 15:25:44 +0000 | [diff] [blame] | 935 | /* |
| 936 | * Configure PDC buffer according to the data size ie configuring one or two |
| 937 | * buffers. Don't use this function if you want to configure only the second |
| 938 | * buffer. In this case, use atmci_pdc_set_single_buf. |
| 939 | */ |
| 940 | static void atmci_pdc_set_both_buf(struct atmel_mci *host, int dir) |
Haavard Skinnemoen | 65e8b08 | 2008-07-30 20:29:03 +0200 | [diff] [blame] | 941 | { |
Ludovic Desroches | 796211b | 2011-08-11 15:25:44 +0000 | [diff] [blame] | 942 | atmci_pdc_set_single_buf(host, dir, PDC_FIRST_BUF); |
| 943 | if (host->data_size) |
| 944 | atmci_pdc_set_single_buf(host, dir, PDC_SECOND_BUF); |
| 945 | } |
Haavard Skinnemoen | 65e8b08 | 2008-07-30 20:29:03 +0200 | [diff] [blame] | 946 | |
Ludovic Desroches | 796211b | 2011-08-11 15:25:44 +0000 | [diff] [blame] | 947 | /* |
| 948 | * Unmap sg lists, called when transfer is finished. |
| 949 | */ |
| 950 | static void atmci_pdc_cleanup(struct atmel_mci *host) |
| 951 | { |
| 952 | struct mmc_data *data = host->data; |
| 953 | |
| 954 | if (data) |
| 955 | dma_unmap_sg(&host->pdev->dev, |
| 956 | data->sg, data->sg_len, |
| 957 | ((data->flags & MMC_DATA_WRITE) |
| 958 | ? DMA_TO_DEVICE : DMA_FROM_DEVICE)); |
| 959 | } |
| 960 | |
| 961 | /* |
| 962 | * Disable PDC transfers. Update pending flags to EVENT_XFER_COMPLETE after |
| 963 | * having received ATMCI_TXBUFE or ATMCI_RXBUFF interrupt. Enable ATMCI_NOTBUSY |
| 964 | * interrupt needed for both transfer directions. |
| 965 | */ |
| 966 | static void atmci_pdc_complete(struct atmel_mci *host) |
| 967 | { |
Ludovic Desroches | 7a90dcc | 2012-05-16 15:25:58 +0200 | [diff] [blame] | 968 | int transfer_size = host->data->blocks * host->data->blksz; |
Ludovic Desroches | 24011f3 | 2012-05-16 15:26:00 +0200 | [diff] [blame] | 969 | int i; |
Ludovic Desroches | 7a90dcc | 2012-05-16 15:25:58 +0200 | [diff] [blame] | 970 | |
Ludovic Desroches | 796211b | 2011-08-11 15:25:44 +0000 | [diff] [blame] | 971 | atmci_writel(host, ATMEL_PDC_PTCR, ATMEL_PDC_RXTDIS | ATMEL_PDC_TXTDIS); |
Ludovic Desroches | 7a90dcc | 2012-05-16 15:25:58 +0200 | [diff] [blame] | 972 | |
| 973 | if ((!host->caps.has_rwproof) |
Ludovic Desroches | 24011f3 | 2012-05-16 15:26:00 +0200 | [diff] [blame] | 974 | && (host->data->flags & MMC_DATA_READ)) { |
| 975 | if (host->caps.has_bad_data_ordering) |
| 976 | for (i = 0; i < transfer_size; i++) |
| 977 | host->buffer[i] = swab32(host->buffer[i]); |
Ludovic Desroches | 7a90dcc | 2012-05-16 15:25:58 +0200 | [diff] [blame] | 978 | sg_copy_from_buffer(host->data->sg, host->data->sg_len, |
| 979 | host->buffer, transfer_size); |
Ludovic Desroches | 24011f3 | 2012-05-16 15:26:00 +0200 | [diff] [blame] | 980 | } |
Ludovic Desroches | 7a90dcc | 2012-05-16 15:25:58 +0200 | [diff] [blame] | 981 | |
Ludovic Desroches | 796211b | 2011-08-11 15:25:44 +0000 | [diff] [blame] | 982 | atmci_pdc_cleanup(host); |
| 983 | |
Alexandre Belloni | 6e9e406 | 2014-05-06 17:43:26 +0200 | [diff] [blame] | 984 | dev_dbg(&host->pdev->dev, "(%s) set pending xfer complete\n", __func__); |
| 985 | atmci_set_pending(host, EVENT_XFER_COMPLETE); |
| 986 | tasklet_schedule(&host->tasklet); |
Haavard Skinnemoen | 65e8b08 | 2008-07-30 20:29:03 +0200 | [diff] [blame] | 987 | } |
| 988 | |
Ludovic Desroches | 796211b | 2011-08-11 15:25:44 +0000 | [diff] [blame] | 989 | static void atmci_dma_cleanup(struct atmel_mci *host) |
| 990 | { |
| 991 | struct mmc_data *data = host->data; |
| 992 | |
| 993 | if (data) |
| 994 | dma_unmap_sg(host->dma.chan->device->dev, |
| 995 | data->sg, data->sg_len, |
| 996 | ((data->flags & MMC_DATA_WRITE) |
| 997 | ? DMA_TO_DEVICE : DMA_FROM_DEVICE)); |
| 998 | } |
| 999 | |
| 1000 | /* |
| 1001 | * This function is called by the DMA driver from tasklet context. |
| 1002 | */ |
Haavard Skinnemoen | 65e8b08 | 2008-07-30 20:29:03 +0200 | [diff] [blame] | 1003 | static void atmci_dma_complete(void *arg) |
| 1004 | { |
| 1005 | struct atmel_mci *host = arg; |
| 1006 | struct mmc_data *data = host->data; |
| 1007 | |
| 1008 | dev_vdbg(&host->pdev->dev, "DMA complete\n"); |
| 1009 | |
Hein_Tibosch | ccdfe61 | 2012-08-30 16:34:38 +0000 | [diff] [blame] | 1010 | if (host->caps.has_dma_conf_reg) |
Nicolas Ferre | 74791a2 | 2009-12-14 18:01:31 -0800 | [diff] [blame] | 1011 | /* Disable DMA hardware handshaking on MCI */ |
Ludovic Desroches | 03fc9a7 | 2011-08-11 15:25:42 +0000 | [diff] [blame] | 1012 | atmci_writel(host, ATMCI_DMA, atmci_readl(host, ATMCI_DMA) & ~ATMCI_DMAEN); |
Nicolas Ferre | 74791a2 | 2009-12-14 18:01:31 -0800 | [diff] [blame] | 1013 | |
Haavard Skinnemoen | 65e8b08 | 2008-07-30 20:29:03 +0200 | [diff] [blame] | 1014 | atmci_dma_cleanup(host); |
| 1015 | |
| 1016 | /* |
| 1017 | * If the card was removed, data will be NULL. No point trying |
| 1018 | * to send the stop command or waiting for NBUSY in this case. |
| 1019 | */ |
| 1020 | if (data) { |
Ludovic Desroches | 6801c41 | 2012-05-16 15:26:01 +0200 | [diff] [blame] | 1021 | dev_dbg(&host->pdev->dev, |
| 1022 | "(%s) set pending xfer complete\n", __func__); |
Haavard Skinnemoen | 65e8b08 | 2008-07-30 20:29:03 +0200 | [diff] [blame] | 1023 | atmci_set_pending(host, EVENT_XFER_COMPLETE); |
| 1024 | tasklet_schedule(&host->tasklet); |
| 1025 | |
| 1026 | /* |
| 1027 | * Regardless of what the documentation says, we have |
| 1028 | * to wait for NOTBUSY even after block read |
| 1029 | * operations. |
| 1030 | * |
| 1031 | * When the DMA transfer is complete, the controller |
| 1032 | * may still be reading the CRC from the card, i.e. |
| 1033 | * the data transfer is still in progress and we |
| 1034 | * haven't seen all the potential error bits yet. |
| 1035 | * |
| 1036 | * The interrupt handler will schedule a different |
| 1037 | * tasklet to finish things up when the data transfer |
| 1038 | * is completely done. |
| 1039 | * |
| 1040 | * We may not complete the mmc request here anyway |
| 1041 | * because the mmc layer may call back and cause us to |
| 1042 | * violate the "don't submit new operations from the |
| 1043 | * completion callback" rule of the dma engine |
| 1044 | * framework. |
| 1045 | */ |
Ludovic Desroches | 03fc9a7 | 2011-08-11 15:25:42 +0000 | [diff] [blame] | 1046 | atmci_writel(host, ATMCI_IER, ATMCI_NOTBUSY); |
Haavard Skinnemoen | 65e8b08 | 2008-07-30 20:29:03 +0200 | [diff] [blame] | 1047 | } |
| 1048 | } |
| 1049 | |
Ludovic Desroches | 796211b | 2011-08-11 15:25:44 +0000 | [diff] [blame] | 1050 | /* |
| 1051 | * Returns a mask of interrupt flags to be enabled after the whole |
| 1052 | * request has been prepared. |
| 1053 | */ |
| 1054 | static u32 atmci_prepare_data(struct atmel_mci *host, struct mmc_data *data) |
| 1055 | { |
| 1056 | u32 iflags; |
| 1057 | |
| 1058 | data->error = -EINPROGRESS; |
| 1059 | |
| 1060 | host->sg = data->sg; |
Terry Barnaby | bdbc5d0 | 2013-04-08 12:05:47 -0400 | [diff] [blame] | 1061 | host->sg_len = data->sg_len; |
Ludovic Desroches | 796211b | 2011-08-11 15:25:44 +0000 | [diff] [blame] | 1062 | host->data = data; |
| 1063 | host->data_chan = NULL; |
| 1064 | |
| 1065 | iflags = ATMCI_DATA_ERROR_FLAGS; |
| 1066 | |
| 1067 | /* |
| 1068 | * Errata: MMC data write operation with less than 12 |
| 1069 | * bytes is impossible. |
| 1070 | * |
| 1071 | * Errata: MCI Transmit Data Register (TDR) FIFO |
| 1072 | * corruption when length is not multiple of 4. |
| 1073 | */ |
| 1074 | if (data->blocks * data->blksz < 12 |
| 1075 | || (data->blocks * data->blksz) & 3) |
| 1076 | host->need_reset = true; |
| 1077 | |
| 1078 | host->pio_offset = 0; |
| 1079 | if (data->flags & MMC_DATA_READ) |
| 1080 | iflags |= ATMCI_RXRDY; |
| 1081 | else |
| 1082 | iflags |= ATMCI_TXRDY; |
| 1083 | |
| 1084 | return iflags; |
| 1085 | } |
| 1086 | |
| 1087 | /* |
| 1088 | * Set interrupt flags and set block length into the MCI mode register even |
| 1089 | * if this value is also accessible in the MCI block register. It seems to be |
| 1090 | * necessary before the High Speed MCI version. It also map sg and configure |
| 1091 | * PDC registers. |
| 1092 | */ |
| 1093 | static u32 |
| 1094 | atmci_prepare_data_pdc(struct atmel_mci *host, struct mmc_data *data) |
| 1095 | { |
| 1096 | u32 iflags, tmp; |
| 1097 | unsigned int sg_len; |
| 1098 | enum dma_data_direction dir; |
Ludovic Desroches | 24011f3 | 2012-05-16 15:26:00 +0200 | [diff] [blame] | 1099 | int i; |
Ludovic Desroches | 796211b | 2011-08-11 15:25:44 +0000 | [diff] [blame] | 1100 | |
| 1101 | data->error = -EINPROGRESS; |
| 1102 | |
| 1103 | host->data = data; |
| 1104 | host->sg = data->sg; |
| 1105 | iflags = ATMCI_DATA_ERROR_FLAGS; |
| 1106 | |
| 1107 | /* Enable pdc mode */ |
| 1108 | atmci_writel(host, ATMCI_MR, host->mode_reg | ATMCI_MR_PDCMODE); |
| 1109 | |
| 1110 | if (data->flags & MMC_DATA_READ) { |
| 1111 | dir = DMA_FROM_DEVICE; |
| 1112 | iflags |= ATMCI_ENDRX | ATMCI_RXBUFF; |
| 1113 | } else { |
| 1114 | dir = DMA_TO_DEVICE; |
Ludovic Desroches | f517754 | 2012-05-16 15:25:59 +0200 | [diff] [blame] | 1115 | iflags |= ATMCI_ENDTX | ATMCI_TXBUFE | ATMCI_BLKE; |
Ludovic Desroches | 796211b | 2011-08-11 15:25:44 +0000 | [diff] [blame] | 1116 | } |
| 1117 | |
| 1118 | /* Set BLKLEN */ |
| 1119 | tmp = atmci_readl(host, ATMCI_MR); |
| 1120 | tmp &= 0x0000ffff; |
| 1121 | tmp |= ATMCI_BLKLEN(data->blksz); |
| 1122 | atmci_writel(host, ATMCI_MR, tmp); |
| 1123 | |
| 1124 | /* Configure PDC */ |
| 1125 | host->data_size = data->blocks * data->blksz; |
| 1126 | sg_len = dma_map_sg(&host->pdev->dev, data->sg, data->sg_len, dir); |
Ludovic Desroches | 7a90dcc | 2012-05-16 15:25:58 +0200 | [diff] [blame] | 1127 | |
| 1128 | if ((!host->caps.has_rwproof) |
Ludovic Desroches | 24011f3 | 2012-05-16 15:26:00 +0200 | [diff] [blame] | 1129 | && (host->data->flags & MMC_DATA_WRITE)) { |
Ludovic Desroches | 7a90dcc | 2012-05-16 15:25:58 +0200 | [diff] [blame] | 1130 | sg_copy_to_buffer(host->data->sg, host->data->sg_len, |
| 1131 | host->buffer, host->data_size); |
Ludovic Desroches | 24011f3 | 2012-05-16 15:26:00 +0200 | [diff] [blame] | 1132 | if (host->caps.has_bad_data_ordering) |
| 1133 | for (i = 0; i < host->data_size; i++) |
| 1134 | host->buffer[i] = swab32(host->buffer[i]); |
| 1135 | } |
Ludovic Desroches | 7a90dcc | 2012-05-16 15:25:58 +0200 | [diff] [blame] | 1136 | |
Ludovic Desroches | 796211b | 2011-08-11 15:25:44 +0000 | [diff] [blame] | 1137 | if (host->data_size) |
| 1138 | atmci_pdc_set_both_buf(host, |
| 1139 | ((dir == DMA_FROM_DEVICE) ? XFER_RECEIVE : XFER_TRANSMIT)); |
| 1140 | |
| 1141 | return iflags; |
| 1142 | } |
| 1143 | |
| 1144 | static u32 |
Nicolas Ferre | 74791a2 | 2009-12-14 18:01:31 -0800 | [diff] [blame] | 1145 | atmci_prepare_data_dma(struct atmel_mci *host, struct mmc_data *data) |
Haavard Skinnemoen | 65e8b08 | 2008-07-30 20:29:03 +0200 | [diff] [blame] | 1146 | { |
| 1147 | struct dma_chan *chan; |
| 1148 | struct dma_async_tx_descriptor *desc; |
| 1149 | struct scatterlist *sg; |
| 1150 | unsigned int i; |
| 1151 | enum dma_data_direction direction; |
Vinod Koul | e0d23ef | 2011-11-17 14:54:38 +0530 | [diff] [blame] | 1152 | enum dma_transfer_direction slave_dirn; |
Atsushi Nemoto | 657a77fa | 2009-09-08 17:53:05 -0700 | [diff] [blame] | 1153 | unsigned int sglen; |
Nicolas Ferre | 693e5e2 | 2012-06-06 12:19:44 +0200 | [diff] [blame] | 1154 | u32 maxburst; |
Ludovic Desroches | 796211b | 2011-08-11 15:25:44 +0000 | [diff] [blame] | 1155 | u32 iflags; |
| 1156 | |
| 1157 | data->error = -EINPROGRESS; |
| 1158 | |
| 1159 | WARN_ON(host->data); |
| 1160 | host->sg = NULL; |
| 1161 | host->data = data; |
| 1162 | |
| 1163 | iflags = ATMCI_DATA_ERROR_FLAGS; |
Haavard Skinnemoen | 65e8b08 | 2008-07-30 20:29:03 +0200 | [diff] [blame] | 1164 | |
| 1165 | /* |
| 1166 | * We don't do DMA on "complex" transfers, i.e. with |
| 1167 | * non-word-aligned buffers or lengths. Also, we don't bother |
| 1168 | * with all the DMA setup overhead for short transfers. |
| 1169 | */ |
Ludovic Desroches | 796211b | 2011-08-11 15:25:44 +0000 | [diff] [blame] | 1170 | if (data->blocks * data->blksz < ATMCI_DMA_THRESHOLD) |
| 1171 | return atmci_prepare_data(host, data); |
Haavard Skinnemoen | 65e8b08 | 2008-07-30 20:29:03 +0200 | [diff] [blame] | 1172 | if (data->blksz & 3) |
Ludovic Desroches | 796211b | 2011-08-11 15:25:44 +0000 | [diff] [blame] | 1173 | return atmci_prepare_data(host, data); |
Haavard Skinnemoen | 65e8b08 | 2008-07-30 20:29:03 +0200 | [diff] [blame] | 1174 | |
| 1175 | for_each_sg(data->sg, sg, data->sg_len, i) { |
| 1176 | if (sg->offset & 3 || sg->length & 3) |
Ludovic Desroches | 796211b | 2011-08-11 15:25:44 +0000 | [diff] [blame] | 1177 | return atmci_prepare_data(host, data); |
Haavard Skinnemoen | 65e8b08 | 2008-07-30 20:29:03 +0200 | [diff] [blame] | 1178 | } |
| 1179 | |
| 1180 | /* If we don't have a channel, we can't do DMA */ |
| 1181 | chan = host->dma.chan; |
Dan Williams | 6f49a57 | 2009-01-06 11:38:14 -0700 | [diff] [blame] | 1182 | if (chan) |
Haavard Skinnemoen | 65e8b08 | 2008-07-30 20:29:03 +0200 | [diff] [blame] | 1183 | host->data_chan = chan; |
Haavard Skinnemoen | 65e8b08 | 2008-07-30 20:29:03 +0200 | [diff] [blame] | 1184 | |
| 1185 | if (!chan) |
| 1186 | return -ENODEV; |
| 1187 | |
Vinod Koul | e0d23ef | 2011-11-17 14:54:38 +0530 | [diff] [blame] | 1188 | if (data->flags & MMC_DATA_READ) { |
Haavard Skinnemoen | 65e8b08 | 2008-07-30 20:29:03 +0200 | [diff] [blame] | 1189 | direction = DMA_FROM_DEVICE; |
Viresh Kumar | e2b35f3 | 2012-02-01 16:12:27 +0530 | [diff] [blame] | 1190 | host->dma_conf.direction = slave_dirn = DMA_DEV_TO_MEM; |
ludovic.desroches@atmel.com | 447dc0d | 2015-11-23 16:27:32 +0100 | [diff] [blame] | 1191 | maxburst = atmci_convert_chksize(host, |
| 1192 | host->dma_conf.src_maxburst); |
Vinod Koul | e0d23ef | 2011-11-17 14:54:38 +0530 | [diff] [blame] | 1193 | } else { |
Haavard Skinnemoen | 65e8b08 | 2008-07-30 20:29:03 +0200 | [diff] [blame] | 1194 | direction = DMA_TO_DEVICE; |
Viresh Kumar | e2b35f3 | 2012-02-01 16:12:27 +0530 | [diff] [blame] | 1195 | host->dma_conf.direction = slave_dirn = DMA_MEM_TO_DEV; |
ludovic.desroches@atmel.com | 447dc0d | 2015-11-23 16:27:32 +0100 | [diff] [blame] | 1196 | maxburst = atmci_convert_chksize(host, |
| 1197 | host->dma_conf.dst_maxburst); |
Vinod Koul | e0d23ef | 2011-11-17 14:54:38 +0530 | [diff] [blame] | 1198 | } |
Haavard Skinnemoen | 65e8b08 | 2008-07-30 20:29:03 +0200 | [diff] [blame] | 1199 | |
Hein_Tibosch | ccdfe61 | 2012-08-30 16:34:38 +0000 | [diff] [blame] | 1200 | if (host->caps.has_dma_conf_reg) |
| 1201 | atmci_writel(host, ATMCI_DMA, ATMCI_DMA_CHKSIZE(maxburst) | |
| 1202 | ATMCI_DMAEN); |
Nicolas Ferre | 693e5e2 | 2012-06-06 12:19:44 +0200 | [diff] [blame] | 1203 | |
Linus Walleij | 266ac3f | 2011-02-10 16:08:06 +0100 | [diff] [blame] | 1204 | sglen = dma_map_sg(chan->device->dev, data->sg, |
Ludovic Desroches | 796211b | 2011-08-11 15:25:44 +0000 | [diff] [blame] | 1205 | data->sg_len, direction); |
Linus Walleij | 88ce4db3 | 2011-02-10 16:08:16 +0100 | [diff] [blame] | 1206 | |
Viresh Kumar | e2b35f3 | 2012-02-01 16:12:27 +0530 | [diff] [blame] | 1207 | dmaengine_slave_config(chan, &host->dma_conf); |
Alexandre Bounine | 1605282 | 2012-03-08 16:11:18 -0500 | [diff] [blame] | 1208 | desc = dmaengine_prep_slave_sg(chan, |
Vinod Koul | e0d23ef | 2011-11-17 14:54:38 +0530 | [diff] [blame] | 1209 | data->sg, sglen, slave_dirn, |
Haavard Skinnemoen | 65e8b08 | 2008-07-30 20:29:03 +0200 | [diff] [blame] | 1210 | DMA_PREP_INTERRUPT | DMA_CTRL_ACK); |
| 1211 | if (!desc) |
Atsushi Nemoto | 657a77fa | 2009-09-08 17:53:05 -0700 | [diff] [blame] | 1212 | goto unmap_exit; |
Haavard Skinnemoen | 65e8b08 | 2008-07-30 20:29:03 +0200 | [diff] [blame] | 1213 | |
| 1214 | host->dma.data_desc = desc; |
| 1215 | desc->callback = atmci_dma_complete; |
| 1216 | desc->callback_param = host; |
Haavard Skinnemoen | 65e8b08 | 2008-07-30 20:29:03 +0200 | [diff] [blame] | 1217 | |
Ludovic Desroches | 796211b | 2011-08-11 15:25:44 +0000 | [diff] [blame] | 1218 | return iflags; |
Atsushi Nemoto | 657a77fa | 2009-09-08 17:53:05 -0700 | [diff] [blame] | 1219 | unmap_exit: |
Linus Walleij | 88ce4db3 | 2011-02-10 16:08:16 +0100 | [diff] [blame] | 1220 | dma_unmap_sg(chan->device->dev, data->sg, data->sg_len, direction); |
Atsushi Nemoto | 657a77fa | 2009-09-08 17:53:05 -0700 | [diff] [blame] | 1221 | return -ENOMEM; |
Haavard Skinnemoen | 65e8b08 | 2008-07-30 20:29:03 +0200 | [diff] [blame] | 1222 | } |
| 1223 | |
Ludovic Desroches | 796211b | 2011-08-11 15:25:44 +0000 | [diff] [blame] | 1224 | static void |
| 1225 | atmci_submit_data(struct atmel_mci *host, struct mmc_data *data) |
| 1226 | { |
| 1227 | return; |
| 1228 | } |
| 1229 | |
| 1230 | /* |
| 1231 | * Start PDC according to transfer direction. |
| 1232 | */ |
| 1233 | static void |
| 1234 | atmci_submit_data_pdc(struct atmel_mci *host, struct mmc_data *data) |
| 1235 | { |
| 1236 | if (data->flags & MMC_DATA_READ) |
| 1237 | atmci_writel(host, ATMEL_PDC_PTCR, ATMEL_PDC_RXTEN); |
| 1238 | else |
| 1239 | atmci_writel(host, ATMEL_PDC_PTCR, ATMEL_PDC_TXTEN); |
| 1240 | } |
| 1241 | |
| 1242 | static void |
| 1243 | atmci_submit_data_dma(struct atmel_mci *host, struct mmc_data *data) |
Nicolas Ferre | 74791a2 | 2009-12-14 18:01:31 -0800 | [diff] [blame] | 1244 | { |
| 1245 | struct dma_chan *chan = host->data_chan; |
| 1246 | struct dma_async_tx_descriptor *desc = host->dma.data_desc; |
| 1247 | |
| 1248 | if (chan) { |
Linus Walleij | 5328906 | 2011-02-10 16:08:26 +0100 | [diff] [blame] | 1249 | dmaengine_submit(desc); |
| 1250 | dma_async_issue_pending(chan); |
Nicolas Ferre | 74791a2 | 2009-12-14 18:01:31 -0800 | [diff] [blame] | 1251 | } |
| 1252 | } |
| 1253 | |
Ludovic Desroches | 796211b | 2011-08-11 15:25:44 +0000 | [diff] [blame] | 1254 | static void atmci_stop_transfer(struct atmel_mci *host) |
Haavard Skinnemoen | 65e8b08 | 2008-07-30 20:29:03 +0200 | [diff] [blame] | 1255 | { |
Ludovic Desroches | 6801c41 | 2012-05-16 15:26:01 +0200 | [diff] [blame] | 1256 | dev_dbg(&host->pdev->dev, |
| 1257 | "(%s) set pending xfer complete\n", __func__); |
Haavard Skinnemoen | 65e8b08 | 2008-07-30 20:29:03 +0200 | [diff] [blame] | 1258 | atmci_set_pending(host, EVENT_XFER_COMPLETE); |
Ludovic Desroches | 03fc9a7 | 2011-08-11 15:25:42 +0000 | [diff] [blame] | 1259 | atmci_writel(host, ATMCI_IER, ATMCI_NOTBUSY); |
Haavard Skinnemoen | 65e8b08 | 2008-07-30 20:29:03 +0200 | [diff] [blame] | 1260 | } |
| 1261 | |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 1262 | /* |
Masanari Iida | 7122bbb | 2012-08-05 23:25:40 +0900 | [diff] [blame] | 1263 | * Stop data transfer because error(s) occurred. |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 1264 | */ |
Ludovic Desroches | 796211b | 2011-08-11 15:25:44 +0000 | [diff] [blame] | 1265 | static void atmci_stop_transfer_pdc(struct atmel_mci *host) |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 1266 | { |
Ludovic Desroches | f517754 | 2012-05-16 15:25:59 +0200 | [diff] [blame] | 1267 | atmci_writel(host, ATMEL_PDC_PTCR, ATMEL_PDC_RXTDIS | ATMEL_PDC_TXTDIS); |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 1268 | } |
| 1269 | |
Ludovic Desroches | 796211b | 2011-08-11 15:25:44 +0000 | [diff] [blame] | 1270 | static void atmci_stop_transfer_dma(struct atmel_mci *host) |
| 1271 | { |
| 1272 | struct dma_chan *chan = host->data_chan; |
| 1273 | |
| 1274 | if (chan) { |
| 1275 | dmaengine_terminate_all(chan); |
| 1276 | atmci_dma_cleanup(host); |
| 1277 | } else { |
| 1278 | /* Data transfer was stopped by the interrupt handler */ |
Ludovic Desroches | 6801c41 | 2012-05-16 15:26:01 +0200 | [diff] [blame] | 1279 | dev_dbg(&host->pdev->dev, |
| 1280 | "(%s) set pending xfer complete\n", __func__); |
Ludovic Desroches | 796211b | 2011-08-11 15:25:44 +0000 | [diff] [blame] | 1281 | atmci_set_pending(host, EVENT_XFER_COMPLETE); |
| 1282 | atmci_writel(host, ATMCI_IER, ATMCI_NOTBUSY); |
| 1283 | } |
| 1284 | } |
| 1285 | |
| 1286 | /* |
| 1287 | * Start a request: prepare data if needed, prepare the command and activate |
| 1288 | * interrupts. |
| 1289 | */ |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 1290 | static void atmci_start_request(struct atmel_mci *host, |
| 1291 | struct atmel_mci_slot *slot) |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 1292 | { |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 1293 | struct mmc_request *mrq; |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 1294 | struct mmc_command *cmd; |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 1295 | struct mmc_data *data; |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 1296 | u32 iflags; |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 1297 | u32 cmdflags; |
| 1298 | |
| 1299 | mrq = slot->mrq; |
| 1300 | host->cur_slot = slot; |
| 1301 | host->mrq = mrq; |
| 1302 | |
| 1303 | host->pending_events = 0; |
| 1304 | host->completed_events = 0; |
Ludovic Desroches | f517754 | 2012-05-16 15:25:59 +0200 | [diff] [blame] | 1305 | host->cmd_status = 0; |
Haavard Skinnemoen | ca55f46 | 2008-10-05 15:16:59 +0200 | [diff] [blame] | 1306 | host->data_status = 0; |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 1307 | |
Ludovic Desroches | 6801c41 | 2012-05-16 15:26:01 +0200 | [diff] [blame] | 1308 | dev_dbg(&host->pdev->dev, "start request: cmd %u\n", mrq->cmd->opcode); |
| 1309 | |
Ludovic Desroches | 24011f3 | 2012-05-16 15:26:00 +0200 | [diff] [blame] | 1310 | if (host->need_reset || host->caps.need_reset_after_xfer) { |
Ludovic Desroches | 18ee684 | 2012-02-09 11:55:29 +0100 | [diff] [blame] | 1311 | iflags = atmci_readl(host, ATMCI_IMR); |
| 1312 | iflags &= (ATMCI_SDIOIRQA | ATMCI_SDIOIRQB); |
Ludovic Desroches | 03fc9a7 | 2011-08-11 15:25:42 +0000 | [diff] [blame] | 1313 | atmci_writel(host, ATMCI_CR, ATMCI_CR_SWRST); |
| 1314 | atmci_writel(host, ATMCI_CR, ATMCI_CR_MCIEN); |
| 1315 | atmci_writel(host, ATMCI_MR, host->mode_reg); |
Ludovic Desroches | 796211b | 2011-08-11 15:25:44 +0000 | [diff] [blame] | 1316 | if (host->caps.has_cfg_reg) |
Ludovic Desroches | 03fc9a7 | 2011-08-11 15:25:42 +0000 | [diff] [blame] | 1317 | atmci_writel(host, ATMCI_CFG, host->cfg_reg); |
Ludovic Desroches | 18ee684 | 2012-02-09 11:55:29 +0100 | [diff] [blame] | 1318 | atmci_writel(host, ATMCI_IER, iflags); |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 1319 | host->need_reset = false; |
| 1320 | } |
Ludovic Desroches | 03fc9a7 | 2011-08-11 15:25:42 +0000 | [diff] [blame] | 1321 | atmci_writel(host, ATMCI_SDCR, slot->sdc_reg); |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 1322 | |
Ludovic Desroches | 03fc9a7 | 2011-08-11 15:25:42 +0000 | [diff] [blame] | 1323 | iflags = atmci_readl(host, ATMCI_IMR); |
Ludovic Desroches | 2c96a29 | 2011-08-11 15:25:41 +0000 | [diff] [blame] | 1324 | if (iflags & ~(ATMCI_SDIOIRQA | ATMCI_SDIOIRQB)) |
Ludovic Desroches | f517754 | 2012-05-16 15:25:59 +0200 | [diff] [blame] | 1325 | dev_dbg(&slot->mmc->class_dev, "WARNING: IMR=0x%08x\n", |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 1326 | iflags); |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 1327 | |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 1328 | if (unlikely(test_and_clear_bit(ATMCI_CARD_NEED_INIT, &slot->flags))) { |
| 1329 | /* Send init sequence (74 clock cycles) */ |
Ludovic Desroches | 03fc9a7 | 2011-08-11 15:25:42 +0000 | [diff] [blame] | 1330 | atmci_writel(host, ATMCI_CMDR, ATMCI_CMDR_SPCMD_INIT); |
| 1331 | while (!(atmci_readl(host, ATMCI_SR) & ATMCI_CMDRDY)) |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 1332 | cpu_relax(); |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 1333 | } |
Nicolas Ferre | 74791a2 | 2009-12-14 18:01:31 -0800 | [diff] [blame] | 1334 | iflags = 0; |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 1335 | data = mrq->data; |
| 1336 | if (data) { |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 1337 | atmci_set_timeout(host, slot, data); |
Haavard Skinnemoen | a252e3e | 2008-10-03 14:46:17 +0200 | [diff] [blame] | 1338 | |
| 1339 | /* Must set block count/size before sending command */ |
Ludovic Desroches | 03fc9a7 | 2011-08-11 15:25:42 +0000 | [diff] [blame] | 1340 | atmci_writel(host, ATMCI_BLKR, ATMCI_BCNT(data->blocks) |
Ludovic Desroches | 2c96a29 | 2011-08-11 15:25:41 +0000 | [diff] [blame] | 1341 | | ATMCI_BLKLEN(data->blksz)); |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 1342 | dev_vdbg(&slot->mmc->class_dev, "BLKR=0x%08x\n", |
Ludovic Desroches | 2c96a29 | 2011-08-11 15:25:41 +0000 | [diff] [blame] | 1343 | ATMCI_BCNT(data->blocks) | ATMCI_BLKLEN(data->blksz)); |
Nicolas Ferre | 74791a2 | 2009-12-14 18:01:31 -0800 | [diff] [blame] | 1344 | |
Ludovic Desroches | 796211b | 2011-08-11 15:25:44 +0000 | [diff] [blame] | 1345 | iflags |= host->prepare_data(host, data); |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 1346 | } |
| 1347 | |
Ludovic Desroches | 2c96a29 | 2011-08-11 15:25:41 +0000 | [diff] [blame] | 1348 | iflags |= ATMCI_CMDRDY; |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 1349 | cmd = mrq->cmd; |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 1350 | cmdflags = atmci_prepare_command(slot->mmc, cmd); |
Ludovic Desroches | 66b512e | 2013-11-20 16:01:11 +0100 | [diff] [blame] | 1351 | |
| 1352 | /* |
| 1353 | * DMA transfer should be started before sending the command to avoid |
| 1354 | * unexpected errors especially for read operations in SDIO mode. |
| 1355 | * Unfortunately, in PDC mode, command has to be sent before starting |
| 1356 | * the transfer. |
| 1357 | */ |
| 1358 | if (host->submit_data != &atmci_submit_data_dma) |
| 1359 | atmci_send_command(host, cmd, cmdflags); |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 1360 | |
| 1361 | if (data) |
Ludovic Desroches | 796211b | 2011-08-11 15:25:44 +0000 | [diff] [blame] | 1362 | host->submit_data(host, data); |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 1363 | |
Ludovic Desroches | 66b512e | 2013-11-20 16:01:11 +0100 | [diff] [blame] | 1364 | if (host->submit_data == &atmci_submit_data_dma) |
| 1365 | atmci_send_command(host, cmd, cmdflags); |
| 1366 | |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 1367 | if (mrq->stop) { |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 1368 | host->stop_cmdr = atmci_prepare_command(slot->mmc, mrq->stop); |
Ludovic Desroches | 2c96a29 | 2011-08-11 15:25:41 +0000 | [diff] [blame] | 1369 | host->stop_cmdr |= ATMCI_CMDR_STOP_XFER; |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 1370 | if (!(data->flags & MMC_DATA_WRITE)) |
Ludovic Desroches | 2c96a29 | 2011-08-11 15:25:41 +0000 | [diff] [blame] | 1371 | host->stop_cmdr |= ATMCI_CMDR_TRDIR_READ; |
Jaehoon Chung | fd551d9 | 2016-02-01 21:07:26 +0900 | [diff] [blame] | 1372 | host->stop_cmdr |= ATMCI_CMDR_MULTI_BLOCK; |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 1373 | } |
| 1374 | |
| 1375 | /* |
| 1376 | * We could have enabled interrupts earlier, but I suspect |
| 1377 | * that would open up a nice can of interesting race |
| 1378 | * conditions (e.g. command and data complete, but stop not |
| 1379 | * prepared yet.) |
| 1380 | */ |
Ludovic Desroches | 03fc9a7 | 2011-08-11 15:25:42 +0000 | [diff] [blame] | 1381 | atmci_writel(host, ATMCI_IER, iflags); |
Ludovic Desroches | 24011f3 | 2012-05-16 15:26:00 +0200 | [diff] [blame] | 1382 | |
| 1383 | mod_timer(&host->timer, jiffies + msecs_to_jiffies(2000)); |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 1384 | } |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 1385 | |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 1386 | static void atmci_queue_request(struct atmel_mci *host, |
| 1387 | struct atmel_mci_slot *slot, struct mmc_request *mrq) |
| 1388 | { |
| 1389 | dev_vdbg(&slot->mmc->class_dev, "queue request: state=%d\n", |
| 1390 | host->state); |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 1391 | |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 1392 | spin_lock_bh(&host->lock); |
| 1393 | slot->mrq = mrq; |
| 1394 | if (host->state == STATE_IDLE) { |
| 1395 | host->state = STATE_SENDING_CMD; |
| 1396 | atmci_start_request(host, slot); |
| 1397 | } else { |
Ludovic Desroches | 6801c41 | 2012-05-16 15:26:01 +0200 | [diff] [blame] | 1398 | dev_dbg(&host->pdev->dev, "queue request\n"); |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 1399 | list_add_tail(&slot->queue_node, &host->queue); |
| 1400 | } |
| 1401 | spin_unlock_bh(&host->lock); |
| 1402 | } |
| 1403 | |
| 1404 | static void atmci_request(struct mmc_host *mmc, struct mmc_request *mrq) |
| 1405 | { |
| 1406 | struct atmel_mci_slot *slot = mmc_priv(mmc); |
| 1407 | struct atmel_mci *host = slot->host; |
| 1408 | struct mmc_data *data; |
| 1409 | |
| 1410 | WARN_ON(slot->mrq); |
Ludovic Desroches | 6801c41 | 2012-05-16 15:26:01 +0200 | [diff] [blame] | 1411 | dev_dbg(&host->pdev->dev, "MRQ: cmd %u\n", mrq->cmd->opcode); |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 1412 | |
Wenyou Yang | ae552ab | 2014-10-30 12:00:41 +0800 | [diff] [blame] | 1413 | pm_runtime_get_sync(&host->pdev->dev); |
| 1414 | |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 1415 | /* |
| 1416 | * We may "know" the card is gone even though there's still an |
| 1417 | * electrical connection. If so, we really need to communicate |
| 1418 | * this to the MMC core since there won't be any more |
| 1419 | * interrupts as the card is completely removed. Otherwise, |
| 1420 | * the MMC core might believe the card is still there even |
| 1421 | * though the card was just removed very slowly. |
| 1422 | */ |
| 1423 | if (!test_bit(ATMCI_CARD_PRESENT, &slot->flags)) { |
| 1424 | mrq->cmd->error = -ENOMEDIUM; |
| 1425 | mmc_request_done(mmc, mrq); |
| 1426 | return; |
| 1427 | } |
| 1428 | |
| 1429 | /* We don't support multiple blocks of weird lengths. */ |
| 1430 | data = mrq->data; |
| 1431 | if (data && data->blocks > 1 && data->blksz & 3) { |
| 1432 | mrq->cmd->error = -EINVAL; |
| 1433 | mmc_request_done(mmc, mrq); |
| 1434 | } |
| 1435 | |
| 1436 | atmci_queue_request(host, slot, mrq); |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 1437 | } |
| 1438 | |
| 1439 | static void atmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) |
| 1440 | { |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 1441 | struct atmel_mci_slot *slot = mmc_priv(mmc); |
| 1442 | struct atmel_mci *host = slot->host; |
| 1443 | unsigned int i; |
Wenyou Yang | ae552ab | 2014-10-30 12:00:41 +0800 | [diff] [blame] | 1444 | |
| 1445 | pm_runtime_get_sync(&host->pdev->dev); |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 1446 | |
Ludovic Desroches | 2c96a29 | 2011-08-11 15:25:41 +0000 | [diff] [blame] | 1447 | slot->sdc_reg &= ~ATMCI_SDCBUS_MASK; |
Haavard Skinnemoen | 945533b | 2008-10-03 17:48:16 +0200 | [diff] [blame] | 1448 | switch (ios->bus_width) { |
| 1449 | case MMC_BUS_WIDTH_1: |
Ludovic Desroches | 2c96a29 | 2011-08-11 15:25:41 +0000 | [diff] [blame] | 1450 | slot->sdc_reg |= ATMCI_SDCBUS_1BIT; |
Haavard Skinnemoen | 945533b | 2008-10-03 17:48:16 +0200 | [diff] [blame] | 1451 | break; |
| 1452 | case MMC_BUS_WIDTH_4: |
Ludovic Desroches | 2c96a29 | 2011-08-11 15:25:41 +0000 | [diff] [blame] | 1453 | slot->sdc_reg |= ATMCI_SDCBUS_4BIT; |
Haavard Skinnemoen | 945533b | 2008-10-03 17:48:16 +0200 | [diff] [blame] | 1454 | break; |
| 1455 | } |
| 1456 | |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 1457 | if (ios->clock) { |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 1458 | unsigned int clock_min = ~0U; |
Ludovic Desroches | 60c8f78 | 2015-05-06 15:16:46 +0200 | [diff] [blame] | 1459 | int clkdiv; |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 1460 | |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 1461 | spin_lock_bh(&host->lock); |
| 1462 | if (!host->mode_reg) { |
Ludovic Desroches | 03fc9a7 | 2011-08-11 15:25:42 +0000 | [diff] [blame] | 1463 | atmci_writel(host, ATMCI_CR, ATMCI_CR_SWRST); |
| 1464 | atmci_writel(host, ATMCI_CR, ATMCI_CR_MCIEN); |
Ludovic Desroches | 796211b | 2011-08-11 15:25:44 +0000 | [diff] [blame] | 1465 | if (host->caps.has_cfg_reg) |
Ludovic Desroches | 03fc9a7 | 2011-08-11 15:25:42 +0000 | [diff] [blame] | 1466 | atmci_writel(host, ATMCI_CFG, host->cfg_reg); |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 1467 | } |
Haavard Skinnemoen | 945533b | 2008-10-03 17:48:16 +0200 | [diff] [blame] | 1468 | |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 1469 | /* |
| 1470 | * Use mirror of ios->clock to prevent race with mmc |
| 1471 | * core ios update when finding the minimum. |
| 1472 | */ |
| 1473 | slot->clock = ios->clock; |
Ludovic Desroches | 2c96a29 | 2011-08-11 15:25:41 +0000 | [diff] [blame] | 1474 | for (i = 0; i < ATMCI_MAX_NR_SLOTS; i++) { |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 1475 | if (host->slot[i] && host->slot[i]->clock |
| 1476 | && host->slot[i]->clock < clock_min) |
| 1477 | clock_min = host->slot[i]->clock; |
| 1478 | } |
| 1479 | |
| 1480 | /* Calculate clock divider */ |
Ludovic Desroches | faf8180 | 2012-03-21 16:41:23 +0100 | [diff] [blame] | 1481 | if (host->caps.has_odd_clk_div) { |
| 1482 | clkdiv = DIV_ROUND_UP(host->bus_hz, clock_min) - 2; |
Ludovic Desroches | 60c8f78 | 2015-05-06 15:16:46 +0200 | [diff] [blame] | 1483 | if (clkdiv < 0) { |
| 1484 | dev_warn(&mmc->class_dev, |
| 1485 | "clock %u too fast; using %lu\n", |
| 1486 | clock_min, host->bus_hz / 2); |
| 1487 | clkdiv = 0; |
| 1488 | } else if (clkdiv > 511) { |
Ludovic Desroches | faf8180 | 2012-03-21 16:41:23 +0100 | [diff] [blame] | 1489 | dev_warn(&mmc->class_dev, |
| 1490 | "clock %u too slow; using %lu\n", |
| 1491 | clock_min, host->bus_hz / (511 + 2)); |
| 1492 | clkdiv = 511; |
| 1493 | } |
| 1494 | host->mode_reg = ATMCI_MR_CLKDIV(clkdiv >> 1) |
| 1495 | | ATMCI_MR_CLKODD(clkdiv & 1); |
| 1496 | } else { |
| 1497 | clkdiv = DIV_ROUND_UP(host->bus_hz, 2 * clock_min) - 1; |
| 1498 | if (clkdiv > 255) { |
| 1499 | dev_warn(&mmc->class_dev, |
| 1500 | "clock %u too slow; using %lu\n", |
| 1501 | clock_min, host->bus_hz / (2 * 256)); |
| 1502 | clkdiv = 255; |
| 1503 | } |
| 1504 | host->mode_reg = ATMCI_MR_CLKDIV(clkdiv); |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 1505 | } |
| 1506 | |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 1507 | /* |
| 1508 | * WRPROOF and RDPROOF prevent overruns/underruns by |
| 1509 | * stopping the clock when the FIFO is full/empty. |
| 1510 | * This state is not expected to last for long. |
| 1511 | */ |
Ludovic Desroches | 796211b | 2011-08-11 15:25:44 +0000 | [diff] [blame] | 1512 | if (host->caps.has_rwproof) |
Ludovic Desroches | 2c96a29 | 2011-08-11 15:25:41 +0000 | [diff] [blame] | 1513 | host->mode_reg |= (ATMCI_MR_WRPROOF | ATMCI_MR_RDPROOF); |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 1514 | |
Ludovic Desroches | 796211b | 2011-08-11 15:25:44 +0000 | [diff] [blame] | 1515 | if (host->caps.has_cfg_reg) { |
Nicolas Ferre | 99ddffd | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 1516 | /* setup High Speed mode in relation with card capacity */ |
| 1517 | if (ios->timing == MMC_TIMING_SD_HS) |
Ludovic Desroches | 2c96a29 | 2011-08-11 15:25:41 +0000 | [diff] [blame] | 1518 | host->cfg_reg |= ATMCI_CFG_HSMODE; |
Nicolas Ferre | 99ddffd | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 1519 | else |
Ludovic Desroches | 2c96a29 | 2011-08-11 15:25:41 +0000 | [diff] [blame] | 1520 | host->cfg_reg &= ~ATMCI_CFG_HSMODE; |
Nicolas Ferre | 99ddffd | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 1521 | } |
| 1522 | |
| 1523 | if (list_empty(&host->queue)) { |
Ludovic Desroches | 03fc9a7 | 2011-08-11 15:25:42 +0000 | [diff] [blame] | 1524 | atmci_writel(host, ATMCI_MR, host->mode_reg); |
Ludovic Desroches | 796211b | 2011-08-11 15:25:44 +0000 | [diff] [blame] | 1525 | if (host->caps.has_cfg_reg) |
Ludovic Desroches | 03fc9a7 | 2011-08-11 15:25:42 +0000 | [diff] [blame] | 1526 | atmci_writel(host, ATMCI_CFG, host->cfg_reg); |
Nicolas Ferre | 99ddffd | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 1527 | } else { |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 1528 | host->need_clock_update = true; |
Nicolas Ferre | 99ddffd | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 1529 | } |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 1530 | |
| 1531 | spin_unlock_bh(&host->lock); |
Haavard Skinnemoen | 945533b | 2008-10-03 17:48:16 +0200 | [diff] [blame] | 1532 | } else { |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 1533 | bool any_slot_active = false; |
| 1534 | |
| 1535 | spin_lock_bh(&host->lock); |
| 1536 | slot->clock = 0; |
Ludovic Desroches | 2c96a29 | 2011-08-11 15:25:41 +0000 | [diff] [blame] | 1537 | for (i = 0; i < ATMCI_MAX_NR_SLOTS; i++) { |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 1538 | if (host->slot[i] && host->slot[i]->clock) { |
| 1539 | any_slot_active = true; |
| 1540 | break; |
| 1541 | } |
Haavard Skinnemoen | 945533b | 2008-10-03 17:48:16 +0200 | [diff] [blame] | 1542 | } |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 1543 | if (!any_slot_active) { |
Ludovic Desroches | 03fc9a7 | 2011-08-11 15:25:42 +0000 | [diff] [blame] | 1544 | atmci_writel(host, ATMCI_CR, ATMCI_CR_MCIDIS); |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 1545 | if (host->mode_reg) { |
Ludovic Desroches | 03fc9a7 | 2011-08-11 15:25:42 +0000 | [diff] [blame] | 1546 | atmci_readl(host, ATMCI_MR); |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 1547 | } |
| 1548 | host->mode_reg = 0; |
| 1549 | } |
| 1550 | spin_unlock_bh(&host->lock); |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 1551 | } |
| 1552 | |
| 1553 | switch (ios->power_mode) { |
Alexandre Belloni | 9e7861f | 2013-10-17 12:46:48 +0200 | [diff] [blame] | 1554 | case MMC_POWER_OFF: |
| 1555 | if (!IS_ERR(mmc->supply.vmmc)) |
| 1556 | mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, 0); |
| 1557 | break; |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 1558 | case MMC_POWER_UP: |
| 1559 | set_bit(ATMCI_CARD_NEED_INIT, &slot->flags); |
Alexandre Belloni | 9e7861f | 2013-10-17 12:46:48 +0200 | [diff] [blame] | 1560 | if (!IS_ERR(mmc->supply.vmmc)) |
| 1561 | mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, ios->vdd); |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 1562 | break; |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 1563 | default: |
| 1564 | /* |
| 1565 | * TODO: None of the currently available AVR32-based |
| 1566 | * boards allow MMC power to be turned off. Implement |
| 1567 | * power control when this can be tested properly. |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 1568 | * |
| 1569 | * We also need to hook this into the clock management |
| 1570 | * somehow so that newly inserted cards aren't |
| 1571 | * subjected to a fast clock before we have a chance |
| 1572 | * to figure out what the maximum rate is. Currently, |
| 1573 | * there's no way to avoid this, and there never will |
| 1574 | * be for boards that don't support power control. |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 1575 | */ |
| 1576 | break; |
| 1577 | } |
Wenyou Yang | ae552ab | 2014-10-30 12:00:41 +0800 | [diff] [blame] | 1578 | |
| 1579 | pm_runtime_mark_last_busy(&host->pdev->dev); |
| 1580 | pm_runtime_put_autosuspend(&host->pdev->dev); |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 1581 | } |
| 1582 | |
| 1583 | static int atmci_get_ro(struct mmc_host *mmc) |
| 1584 | { |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 1585 | int read_only = -ENOSYS; |
| 1586 | struct atmel_mci_slot *slot = mmc_priv(mmc); |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 1587 | |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 1588 | if (gpio_is_valid(slot->wp_pin)) { |
| 1589 | read_only = gpio_get_value(slot->wp_pin); |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 1590 | dev_dbg(&mmc->class_dev, "card is %s\n", |
| 1591 | read_only ? "read-only" : "read-write"); |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 1592 | } |
| 1593 | |
| 1594 | return read_only; |
| 1595 | } |
| 1596 | |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 1597 | static int atmci_get_cd(struct mmc_host *mmc) |
| 1598 | { |
| 1599 | int present = -ENOSYS; |
| 1600 | struct atmel_mci_slot *slot = mmc_priv(mmc); |
| 1601 | |
| 1602 | if (gpio_is_valid(slot->detect_pin)) { |
Jonas Larsson | 1c1452b | 2009-03-31 11:16:48 +0200 | [diff] [blame] | 1603 | present = !(gpio_get_value(slot->detect_pin) ^ |
| 1604 | slot->detect_is_active_high); |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 1605 | dev_dbg(&mmc->class_dev, "card is %spresent\n", |
| 1606 | present ? "" : "not "); |
| 1607 | } |
| 1608 | |
| 1609 | return present; |
| 1610 | } |
| 1611 | |
Anders Grahn | 88ff82e | 2010-05-26 14:42:01 -0700 | [diff] [blame] | 1612 | static void atmci_enable_sdio_irq(struct mmc_host *mmc, int enable) |
| 1613 | { |
| 1614 | struct atmel_mci_slot *slot = mmc_priv(mmc); |
| 1615 | struct atmel_mci *host = slot->host; |
| 1616 | |
| 1617 | if (enable) |
Ludovic Desroches | 03fc9a7 | 2011-08-11 15:25:42 +0000 | [diff] [blame] | 1618 | atmci_writel(host, ATMCI_IER, slot->sdio_irq); |
Anders Grahn | 88ff82e | 2010-05-26 14:42:01 -0700 | [diff] [blame] | 1619 | else |
Ludovic Desroches | 03fc9a7 | 2011-08-11 15:25:42 +0000 | [diff] [blame] | 1620 | atmci_writel(host, ATMCI_IDR, slot->sdio_irq); |
Anders Grahn | 88ff82e | 2010-05-26 14:42:01 -0700 | [diff] [blame] | 1621 | } |
| 1622 | |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 1623 | static const struct mmc_host_ops atmci_ops = { |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 1624 | .request = atmci_request, |
| 1625 | .set_ios = atmci_set_ios, |
| 1626 | .get_ro = atmci_get_ro, |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 1627 | .get_cd = atmci_get_cd, |
Anders Grahn | 88ff82e | 2010-05-26 14:42:01 -0700 | [diff] [blame] | 1628 | .enable_sdio_irq = atmci_enable_sdio_irq, |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 1629 | }; |
| 1630 | |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 1631 | /* Called with host->lock held */ |
| 1632 | static void atmci_request_end(struct atmel_mci *host, struct mmc_request *mrq) |
| 1633 | __releases(&host->lock) |
| 1634 | __acquires(&host->lock) |
| 1635 | { |
| 1636 | struct atmel_mci_slot *slot = NULL; |
| 1637 | struct mmc_host *prev_mmc = host->cur_slot->mmc; |
| 1638 | |
| 1639 | WARN_ON(host->cmd || host->data); |
| 1640 | |
| 1641 | /* |
| 1642 | * Update the MMC clock rate if necessary. This may be |
| 1643 | * necessary if set_ios() is called when a different slot is |
Lucas De Marchi | 25985ed | 2011-03-30 22:57:33 -0300 | [diff] [blame] | 1644 | * busy transferring data. |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 1645 | */ |
Nicolas Ferre | 99ddffd | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 1646 | if (host->need_clock_update) { |
Ludovic Desroches | 03fc9a7 | 2011-08-11 15:25:42 +0000 | [diff] [blame] | 1647 | atmci_writel(host, ATMCI_MR, host->mode_reg); |
Ludovic Desroches | 796211b | 2011-08-11 15:25:44 +0000 | [diff] [blame] | 1648 | if (host->caps.has_cfg_reg) |
Ludovic Desroches | 03fc9a7 | 2011-08-11 15:25:42 +0000 | [diff] [blame] | 1649 | atmci_writel(host, ATMCI_CFG, host->cfg_reg); |
Nicolas Ferre | 99ddffd | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 1650 | } |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 1651 | |
| 1652 | host->cur_slot->mrq = NULL; |
| 1653 | host->mrq = NULL; |
| 1654 | if (!list_empty(&host->queue)) { |
| 1655 | slot = list_entry(host->queue.next, |
| 1656 | struct atmel_mci_slot, queue_node); |
| 1657 | list_del(&slot->queue_node); |
| 1658 | dev_vdbg(&host->pdev->dev, "list not empty: %s is next\n", |
| 1659 | mmc_hostname(slot->mmc)); |
| 1660 | host->state = STATE_SENDING_CMD; |
| 1661 | atmci_start_request(host, slot); |
| 1662 | } else { |
| 1663 | dev_vdbg(&host->pdev->dev, "list empty\n"); |
| 1664 | host->state = STATE_IDLE; |
| 1665 | } |
| 1666 | |
Ludovic Desroches | 24011f3 | 2012-05-16 15:26:00 +0200 | [diff] [blame] | 1667 | del_timer(&host->timer); |
| 1668 | |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 1669 | spin_unlock(&host->lock); |
| 1670 | mmc_request_done(prev_mmc, mrq); |
| 1671 | spin_lock(&host->lock); |
Wenyou Yang | ae552ab | 2014-10-30 12:00:41 +0800 | [diff] [blame] | 1672 | |
| 1673 | pm_runtime_mark_last_busy(&host->pdev->dev); |
| 1674 | pm_runtime_put_autosuspend(&host->pdev->dev); |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 1675 | } |
| 1676 | |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 1677 | static void atmci_command_complete(struct atmel_mci *host, |
Haavard Skinnemoen | c06ad25 | 2008-07-31 14:49:16 +0200 | [diff] [blame] | 1678 | struct mmc_command *cmd) |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 1679 | { |
Haavard Skinnemoen | c06ad25 | 2008-07-31 14:49:16 +0200 | [diff] [blame] | 1680 | u32 status = host->cmd_status; |
| 1681 | |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 1682 | /* Read the response from the card (up to 16 bytes) */ |
Ludovic Desroches | 03fc9a7 | 2011-08-11 15:25:42 +0000 | [diff] [blame] | 1683 | cmd->resp[0] = atmci_readl(host, ATMCI_RSPR); |
| 1684 | cmd->resp[1] = atmci_readl(host, ATMCI_RSPR); |
| 1685 | cmd->resp[2] = atmci_readl(host, ATMCI_RSPR); |
| 1686 | cmd->resp[3] = atmci_readl(host, ATMCI_RSPR); |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 1687 | |
Ludovic Desroches | 2c96a29 | 2011-08-11 15:25:41 +0000 | [diff] [blame] | 1688 | if (status & ATMCI_RTOE) |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 1689 | cmd->error = -ETIMEDOUT; |
Ludovic Desroches | 2c96a29 | 2011-08-11 15:25:41 +0000 | [diff] [blame] | 1690 | else if ((cmd->flags & MMC_RSP_CRC) && (status & ATMCI_RCRCE)) |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 1691 | cmd->error = -EILSEQ; |
Ludovic Desroches | 2c96a29 | 2011-08-11 15:25:41 +0000 | [diff] [blame] | 1692 | else if (status & (ATMCI_RINDE | ATMCI_RDIRE | ATMCI_RENDE)) |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 1693 | cmd->error = -EIO; |
Ludovic Desroches | 24011f3 | 2012-05-16 15:26:00 +0200 | [diff] [blame] | 1694 | else if (host->mrq->data && (host->mrq->data->blksz & 3)) { |
| 1695 | if (host->caps.need_blksz_mul_4) { |
| 1696 | cmd->error = -EINVAL; |
| 1697 | host->need_reset = 1; |
| 1698 | } |
| 1699 | } else |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 1700 | cmd->error = 0; |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 1701 | } |
| 1702 | |
| 1703 | static void atmci_detect_change(unsigned long data) |
| 1704 | { |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 1705 | struct atmel_mci_slot *slot = (struct atmel_mci_slot *)data; |
| 1706 | bool present; |
| 1707 | bool present_old; |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 1708 | |
| 1709 | /* |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 1710 | * atmci_cleanup_slot() sets the ATMCI_SHUTDOWN flag before |
| 1711 | * freeing the interrupt. We must not re-enable the interrupt |
| 1712 | * if it has been freed, and if we're shutting down, it |
| 1713 | * doesn't really matter whether the card is present or not. |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 1714 | */ |
| 1715 | smp_rmb(); |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 1716 | if (test_bit(ATMCI_SHUTDOWN, &slot->flags)) |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 1717 | return; |
| 1718 | |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 1719 | enable_irq(gpio_to_irq(slot->detect_pin)); |
Jonas Larsson | 1c1452b | 2009-03-31 11:16:48 +0200 | [diff] [blame] | 1720 | present = !(gpio_get_value(slot->detect_pin) ^ |
| 1721 | slot->detect_is_active_high); |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 1722 | present_old = test_bit(ATMCI_CARD_PRESENT, &slot->flags); |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 1723 | |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 1724 | dev_vdbg(&slot->mmc->class_dev, "detect change: %d (was %d)\n", |
| 1725 | present, present_old); |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 1726 | |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 1727 | if (present != present_old) { |
| 1728 | struct atmel_mci *host = slot->host; |
| 1729 | struct mmc_request *mrq; |
| 1730 | |
| 1731 | dev_dbg(&slot->mmc->class_dev, "card %s\n", |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 1732 | present ? "inserted" : "removed"); |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 1733 | |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 1734 | spin_lock(&host->lock); |
| 1735 | |
| 1736 | if (!present) |
| 1737 | clear_bit(ATMCI_CARD_PRESENT, &slot->flags); |
| 1738 | else |
| 1739 | set_bit(ATMCI_CARD_PRESENT, &slot->flags); |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 1740 | |
| 1741 | /* Clean up queue if present */ |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 1742 | mrq = slot->mrq; |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 1743 | if (mrq) { |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 1744 | if (mrq == host->mrq) { |
| 1745 | /* |
| 1746 | * Reset controller to terminate any ongoing |
| 1747 | * commands or data transfers. |
| 1748 | */ |
Ludovic Desroches | 03fc9a7 | 2011-08-11 15:25:42 +0000 | [diff] [blame] | 1749 | atmci_writel(host, ATMCI_CR, ATMCI_CR_SWRST); |
| 1750 | atmci_writel(host, ATMCI_CR, ATMCI_CR_MCIEN); |
| 1751 | atmci_writel(host, ATMCI_MR, host->mode_reg); |
Ludovic Desroches | 796211b | 2011-08-11 15:25:44 +0000 | [diff] [blame] | 1752 | if (host->caps.has_cfg_reg) |
Ludovic Desroches | 03fc9a7 | 2011-08-11 15:25:42 +0000 | [diff] [blame] | 1753 | atmci_writel(host, ATMCI_CFG, host->cfg_reg); |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 1754 | |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 1755 | host->data = NULL; |
| 1756 | host->cmd = NULL; |
Haavard Skinnemoen | c06ad25 | 2008-07-31 14:49:16 +0200 | [diff] [blame] | 1757 | |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 1758 | switch (host->state) { |
| 1759 | case STATE_IDLE: |
Haavard Skinnemoen | c06ad25 | 2008-07-31 14:49:16 +0200 | [diff] [blame] | 1760 | break; |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 1761 | case STATE_SENDING_CMD: |
| 1762 | mrq->cmd->error = -ENOMEDIUM; |
Ludovic Desroches | f517754 | 2012-05-16 15:25:59 +0200 | [diff] [blame] | 1763 | if (mrq->data) |
| 1764 | host->stop_transfer(host); |
| 1765 | break; |
| 1766 | case STATE_DATA_XFER: |
Haavard Skinnemoen | c06ad25 | 2008-07-31 14:49:16 +0200 | [diff] [blame] | 1767 | mrq->data->error = -ENOMEDIUM; |
Ludovic Desroches | 796211b | 2011-08-11 15:25:44 +0000 | [diff] [blame] | 1768 | host->stop_transfer(host); |
Haavard Skinnemoen | c06ad25 | 2008-07-31 14:49:16 +0200 | [diff] [blame] | 1769 | break; |
Ludovic Desroches | f517754 | 2012-05-16 15:25:59 +0200 | [diff] [blame] | 1770 | case STATE_WAITING_NOTBUSY: |
| 1771 | mrq->data->error = -ENOMEDIUM; |
| 1772 | break; |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 1773 | case STATE_SENDING_STOP: |
| 1774 | mrq->stop->error = -ENOMEDIUM; |
| 1775 | break; |
Ludovic Desroches | f517754 | 2012-05-16 15:25:59 +0200 | [diff] [blame] | 1776 | case STATE_END_REQUEST: |
| 1777 | break; |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 1778 | } |
| 1779 | |
| 1780 | atmci_request_end(host, mrq); |
| 1781 | } else { |
| 1782 | list_del(&slot->queue_node); |
| 1783 | mrq->cmd->error = -ENOMEDIUM; |
| 1784 | if (mrq->data) |
| 1785 | mrq->data->error = -ENOMEDIUM; |
| 1786 | if (mrq->stop) |
| 1787 | mrq->stop->error = -ENOMEDIUM; |
| 1788 | |
| 1789 | spin_unlock(&host->lock); |
| 1790 | mmc_request_done(slot->mmc, mrq); |
| 1791 | spin_lock(&host->lock); |
Haavard Skinnemoen | c06ad25 | 2008-07-31 14:49:16 +0200 | [diff] [blame] | 1792 | } |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 1793 | } |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 1794 | spin_unlock(&host->lock); |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 1795 | |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 1796 | mmc_detect_change(slot->mmc, 0); |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 1797 | } |
| 1798 | } |
| 1799 | |
| 1800 | static void atmci_tasklet_func(unsigned long priv) |
| 1801 | { |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 1802 | struct atmel_mci *host = (struct atmel_mci *)priv; |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 1803 | struct mmc_request *mrq = host->mrq; |
| 1804 | struct mmc_data *data = host->data; |
Haavard Skinnemoen | c06ad25 | 2008-07-31 14:49:16 +0200 | [diff] [blame] | 1805 | enum atmel_mci_state state = host->state; |
| 1806 | enum atmel_mci_state prev_state; |
| 1807 | u32 status; |
| 1808 | |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 1809 | spin_lock(&host->lock); |
| 1810 | |
Haavard Skinnemoen | c06ad25 | 2008-07-31 14:49:16 +0200 | [diff] [blame] | 1811 | state = host->state; |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 1812 | |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 1813 | dev_vdbg(&host->pdev->dev, |
Haavard Skinnemoen | c06ad25 | 2008-07-31 14:49:16 +0200 | [diff] [blame] | 1814 | "tasklet: state %u pending/completed/mask %lx/%lx/%x\n", |
| 1815 | state, host->pending_events, host->completed_events, |
Ludovic Desroches | 03fc9a7 | 2011-08-11 15:25:42 +0000 | [diff] [blame] | 1816 | atmci_readl(host, ATMCI_IMR)); |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 1817 | |
Haavard Skinnemoen | c06ad25 | 2008-07-31 14:49:16 +0200 | [diff] [blame] | 1818 | do { |
| 1819 | prev_state = state; |
Ludovic Desroches | 6801c41 | 2012-05-16 15:26:01 +0200 | [diff] [blame] | 1820 | dev_dbg(&host->pdev->dev, "FSM: state=%d\n", state); |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 1821 | |
Haavard Skinnemoen | c06ad25 | 2008-07-31 14:49:16 +0200 | [diff] [blame] | 1822 | switch (state) { |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 1823 | case STATE_IDLE: |
| 1824 | break; |
| 1825 | |
Haavard Skinnemoen | c06ad25 | 2008-07-31 14:49:16 +0200 | [diff] [blame] | 1826 | case STATE_SENDING_CMD: |
Ludovic Desroches | f517754 | 2012-05-16 15:25:59 +0200 | [diff] [blame] | 1827 | /* |
| 1828 | * Command has been sent, we are waiting for command |
| 1829 | * ready. Then we have three next states possible: |
| 1830 | * END_REQUEST by default, WAITING_NOTBUSY if it's a |
| 1831 | * command needing it or DATA_XFER if there is data. |
| 1832 | */ |
Ludovic Desroches | 6801c41 | 2012-05-16 15:26:01 +0200 | [diff] [blame] | 1833 | dev_dbg(&host->pdev->dev, "FSM: cmd ready?\n"); |
Haavard Skinnemoen | c06ad25 | 2008-07-31 14:49:16 +0200 | [diff] [blame] | 1834 | if (!atmci_test_and_clear_pending(host, |
Ludovic Desroches | f517754 | 2012-05-16 15:25:59 +0200 | [diff] [blame] | 1835 | EVENT_CMD_RDY)) |
Haavard Skinnemoen | c06ad25 | 2008-07-31 14:49:16 +0200 | [diff] [blame] | 1836 | break; |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 1837 | |
Ludovic Desroches | 6801c41 | 2012-05-16 15:26:01 +0200 | [diff] [blame] | 1838 | dev_dbg(&host->pdev->dev, "set completed cmd ready\n"); |
Haavard Skinnemoen | c06ad25 | 2008-07-31 14:49:16 +0200 | [diff] [blame] | 1839 | host->cmd = NULL; |
Ludovic Desroches | f517754 | 2012-05-16 15:25:59 +0200 | [diff] [blame] | 1840 | atmci_set_completed(host, EVENT_CMD_RDY); |
Haavard Skinnemoen | c06ad25 | 2008-07-31 14:49:16 +0200 | [diff] [blame] | 1841 | atmci_command_complete(host, mrq->cmd); |
Ludovic Desroches | f517754 | 2012-05-16 15:25:59 +0200 | [diff] [blame] | 1842 | if (mrq->data) { |
Ludovic Desroches | 6801c41 | 2012-05-16 15:26:01 +0200 | [diff] [blame] | 1843 | dev_dbg(&host->pdev->dev, |
| 1844 | "command with data transfer"); |
Ludovic Desroches | f517754 | 2012-05-16 15:25:59 +0200 | [diff] [blame] | 1845 | /* |
| 1846 | * If there is a command error don't start |
| 1847 | * data transfer. |
| 1848 | */ |
| 1849 | if (mrq->cmd->error) { |
| 1850 | host->stop_transfer(host); |
| 1851 | host->data = NULL; |
| 1852 | atmci_writel(host, ATMCI_IDR, |
| 1853 | ATMCI_TXRDY | ATMCI_RXRDY |
| 1854 | | ATMCI_DATA_ERROR_FLAGS); |
| 1855 | state = STATE_END_REQUEST; |
| 1856 | } else |
| 1857 | state = STATE_DATA_XFER; |
| 1858 | } else if ((!mrq->data) && (mrq->cmd->flags & MMC_RSP_BUSY)) { |
Ludovic Desroches | 6801c41 | 2012-05-16 15:26:01 +0200 | [diff] [blame] | 1859 | dev_dbg(&host->pdev->dev, |
| 1860 | "command response need waiting notbusy"); |
Ludovic Desroches | f517754 | 2012-05-16 15:25:59 +0200 | [diff] [blame] | 1861 | atmci_writel(host, ATMCI_IER, ATMCI_NOTBUSY); |
| 1862 | state = STATE_WAITING_NOTBUSY; |
| 1863 | } else |
| 1864 | state = STATE_END_REQUEST; |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 1865 | |
Ludovic Desroches | f517754 | 2012-05-16 15:25:59 +0200 | [diff] [blame] | 1866 | break; |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 1867 | |
Ludovic Desroches | f517754 | 2012-05-16 15:25:59 +0200 | [diff] [blame] | 1868 | case STATE_DATA_XFER: |
Haavard Skinnemoen | c06ad25 | 2008-07-31 14:49:16 +0200 | [diff] [blame] | 1869 | if (atmci_test_and_clear_pending(host, |
| 1870 | EVENT_DATA_ERROR)) { |
Ludovic Desroches | 6801c41 | 2012-05-16 15:26:01 +0200 | [diff] [blame] | 1871 | dev_dbg(&host->pdev->dev, "set completed data error\n"); |
Ludovic Desroches | f517754 | 2012-05-16 15:25:59 +0200 | [diff] [blame] | 1872 | atmci_set_completed(host, EVENT_DATA_ERROR); |
| 1873 | state = STATE_END_REQUEST; |
Haavard Skinnemoen | c06ad25 | 2008-07-31 14:49:16 +0200 | [diff] [blame] | 1874 | break; |
| 1875 | } |
| 1876 | |
Ludovic Desroches | f517754 | 2012-05-16 15:25:59 +0200 | [diff] [blame] | 1877 | /* |
| 1878 | * A data transfer is in progress. The event expected |
| 1879 | * to move to the next state depends of data transfer |
| 1880 | * type (PDC or DMA). Once transfer done we can move |
| 1881 | * to the next step which is WAITING_NOTBUSY in write |
| 1882 | * case and directly SENDING_STOP in read case. |
| 1883 | */ |
Ludovic Desroches | 6801c41 | 2012-05-16 15:26:01 +0200 | [diff] [blame] | 1884 | dev_dbg(&host->pdev->dev, "FSM: xfer complete?\n"); |
Haavard Skinnemoen | c06ad25 | 2008-07-31 14:49:16 +0200 | [diff] [blame] | 1885 | if (!atmci_test_and_clear_pending(host, |
| 1886 | EVENT_XFER_COMPLETE)) |
| 1887 | break; |
| 1888 | |
Ludovic Desroches | 6801c41 | 2012-05-16 15:26:01 +0200 | [diff] [blame] | 1889 | dev_dbg(&host->pdev->dev, |
| 1890 | "(%s) set completed xfer complete\n", |
| 1891 | __func__); |
Haavard Skinnemoen | c06ad25 | 2008-07-31 14:49:16 +0200 | [diff] [blame] | 1892 | atmci_set_completed(host, EVENT_XFER_COMPLETE); |
Haavard Skinnemoen | c06ad25 | 2008-07-31 14:49:16 +0200 | [diff] [blame] | 1893 | |
Ludovic Desroches | 077d407 | 2012-07-24 11:42:04 +0200 | [diff] [blame] | 1894 | if (host->caps.need_notbusy_for_read_ops || |
| 1895 | (host->data->flags & MMC_DATA_WRITE)) { |
Ludovic Desroches | f517754 | 2012-05-16 15:25:59 +0200 | [diff] [blame] | 1896 | atmci_writel(host, ATMCI_IER, ATMCI_NOTBUSY); |
| 1897 | state = STATE_WAITING_NOTBUSY; |
| 1898 | } else if (host->mrq->stop) { |
| 1899 | atmci_writel(host, ATMCI_IER, ATMCI_CMDRDY); |
| 1900 | atmci_send_stop_cmd(host, data); |
| 1901 | state = STATE_SENDING_STOP; |
Haavard Skinnemoen | c06ad25 | 2008-07-31 14:49:16 +0200 | [diff] [blame] | 1902 | } else { |
Ludovic Desroches | f517754 | 2012-05-16 15:25:59 +0200 | [diff] [blame] | 1903 | host->data = NULL; |
Haavard Skinnemoen | c06ad25 | 2008-07-31 14:49:16 +0200 | [diff] [blame] | 1904 | data->bytes_xfered = data->blocks * data->blksz; |
| 1905 | data->error = 0; |
Ludovic Desroches | f517754 | 2012-05-16 15:25:59 +0200 | [diff] [blame] | 1906 | state = STATE_END_REQUEST; |
Haavard Skinnemoen | c06ad25 | 2008-07-31 14:49:16 +0200 | [diff] [blame] | 1907 | } |
Ludovic Desroches | f517754 | 2012-05-16 15:25:59 +0200 | [diff] [blame] | 1908 | break; |
Haavard Skinnemoen | c06ad25 | 2008-07-31 14:49:16 +0200 | [diff] [blame] | 1909 | |
Ludovic Desroches | f517754 | 2012-05-16 15:25:59 +0200 | [diff] [blame] | 1910 | case STATE_WAITING_NOTBUSY: |
| 1911 | /* |
| 1912 | * We can be in the state for two reasons: a command |
| 1913 | * requiring waiting not busy signal (stop command |
| 1914 | * included) or a write operation. In the latest case, |
| 1915 | * we need to send a stop command. |
| 1916 | */ |
Ludovic Desroches | 6801c41 | 2012-05-16 15:26:01 +0200 | [diff] [blame] | 1917 | dev_dbg(&host->pdev->dev, "FSM: not busy?\n"); |
Ludovic Desroches | f517754 | 2012-05-16 15:25:59 +0200 | [diff] [blame] | 1918 | if (!atmci_test_and_clear_pending(host, |
| 1919 | EVENT_NOTBUSY)) |
| 1920 | break; |
Haavard Skinnemoen | c06ad25 | 2008-07-31 14:49:16 +0200 | [diff] [blame] | 1921 | |
Ludovic Desroches | 6801c41 | 2012-05-16 15:26:01 +0200 | [diff] [blame] | 1922 | dev_dbg(&host->pdev->dev, "set completed not busy\n"); |
Ludovic Desroches | f517754 | 2012-05-16 15:25:59 +0200 | [diff] [blame] | 1923 | atmci_set_completed(host, EVENT_NOTBUSY); |
| 1924 | |
| 1925 | if (host->data) { |
| 1926 | /* |
| 1927 | * For some commands such as CMD53, even if |
| 1928 | * there is data transfer, there is no stop |
| 1929 | * command to send. |
| 1930 | */ |
| 1931 | if (host->mrq->stop) { |
| 1932 | atmci_writel(host, ATMCI_IER, |
| 1933 | ATMCI_CMDRDY); |
| 1934 | atmci_send_stop_cmd(host, data); |
| 1935 | state = STATE_SENDING_STOP; |
| 1936 | } else { |
| 1937 | host->data = NULL; |
| 1938 | data->bytes_xfered = data->blocks |
| 1939 | * data->blksz; |
| 1940 | data->error = 0; |
| 1941 | state = STATE_END_REQUEST; |
| 1942 | } |
| 1943 | } else |
| 1944 | state = STATE_END_REQUEST; |
| 1945 | break; |
Haavard Skinnemoen | c06ad25 | 2008-07-31 14:49:16 +0200 | [diff] [blame] | 1946 | |
| 1947 | case STATE_SENDING_STOP: |
Ludovic Desroches | f517754 | 2012-05-16 15:25:59 +0200 | [diff] [blame] | 1948 | /* |
| 1949 | * In this state, it is important to set host->data to |
| 1950 | * NULL (which is tested in the waiting notbusy state) |
| 1951 | * in order to go to the end request state instead of |
| 1952 | * sending stop again. |
| 1953 | */ |
Ludovic Desroches | 6801c41 | 2012-05-16 15:26:01 +0200 | [diff] [blame] | 1954 | dev_dbg(&host->pdev->dev, "FSM: cmd ready?\n"); |
Haavard Skinnemoen | c06ad25 | 2008-07-31 14:49:16 +0200 | [diff] [blame] | 1955 | if (!atmci_test_and_clear_pending(host, |
Ludovic Desroches | f517754 | 2012-05-16 15:25:59 +0200 | [diff] [blame] | 1956 | EVENT_CMD_RDY)) |
Haavard Skinnemoen | c06ad25 | 2008-07-31 14:49:16 +0200 | [diff] [blame] | 1957 | break; |
| 1958 | |
Ludovic Desroches | 6801c41 | 2012-05-16 15:26:01 +0200 | [diff] [blame] | 1959 | dev_dbg(&host->pdev->dev, "FSM: cmd ready\n"); |
Haavard Skinnemoen | c06ad25 | 2008-07-31 14:49:16 +0200 | [diff] [blame] | 1960 | host->cmd = NULL; |
Ludovic Desroches | f517754 | 2012-05-16 15:25:59 +0200 | [diff] [blame] | 1961 | data->bytes_xfered = data->blocks * data->blksz; |
| 1962 | data->error = 0; |
Haavard Skinnemoen | c06ad25 | 2008-07-31 14:49:16 +0200 | [diff] [blame] | 1963 | atmci_command_complete(host, mrq->stop); |
Ludovic Desroches | f517754 | 2012-05-16 15:25:59 +0200 | [diff] [blame] | 1964 | if (mrq->stop->error) { |
| 1965 | host->stop_transfer(host); |
| 1966 | atmci_writel(host, ATMCI_IDR, |
| 1967 | ATMCI_TXRDY | ATMCI_RXRDY |
| 1968 | | ATMCI_DATA_ERROR_FLAGS); |
| 1969 | state = STATE_END_REQUEST; |
| 1970 | } else { |
| 1971 | atmci_writel(host, ATMCI_IER, ATMCI_NOTBUSY); |
| 1972 | state = STATE_WAITING_NOTBUSY; |
| 1973 | } |
Nicolas Ferre | 41b4e9a | 2012-07-06 11:58:33 +0200 | [diff] [blame] | 1974 | host->data = NULL; |
Ludovic Desroches | f517754 | 2012-05-16 15:25:59 +0200 | [diff] [blame] | 1975 | break; |
| 1976 | |
| 1977 | case STATE_END_REQUEST: |
| 1978 | atmci_writel(host, ATMCI_IDR, ATMCI_TXRDY | ATMCI_RXRDY |
| 1979 | | ATMCI_DATA_ERROR_FLAGS); |
| 1980 | status = host->data_status; |
| 1981 | if (unlikely(status)) { |
| 1982 | host->stop_transfer(host); |
| 1983 | host->data = NULL; |
Rodolfo Giometti | fbd986c | 2013-09-09 17:31:59 +0200 | [diff] [blame] | 1984 | if (data) { |
| 1985 | if (status & ATMCI_DTOE) { |
| 1986 | data->error = -ETIMEDOUT; |
| 1987 | } else if (status & ATMCI_DCRCE) { |
| 1988 | data->error = -EILSEQ; |
| 1989 | } else { |
| 1990 | data->error = -EIO; |
| 1991 | } |
Ludovic Desroches | f517754 | 2012-05-16 15:25:59 +0200 | [diff] [blame] | 1992 | } |
| 1993 | } |
| 1994 | |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 1995 | atmci_request_end(host, host->mrq); |
Ludovic Desroches | f517754 | 2012-05-16 15:25:59 +0200 | [diff] [blame] | 1996 | state = STATE_IDLE; |
Haavard Skinnemoen | c06ad25 | 2008-07-31 14:49:16 +0200 | [diff] [blame] | 1997 | break; |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 1998 | } |
Haavard Skinnemoen | c06ad25 | 2008-07-31 14:49:16 +0200 | [diff] [blame] | 1999 | } while (state != prev_state); |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 2000 | |
Haavard Skinnemoen | c06ad25 | 2008-07-31 14:49:16 +0200 | [diff] [blame] | 2001 | host->state = state; |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 2002 | |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 2003 | spin_unlock(&host->lock); |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 2004 | } |
| 2005 | |
| 2006 | static void atmci_read_data_pio(struct atmel_mci *host) |
| 2007 | { |
| 2008 | struct scatterlist *sg = host->sg; |
| 2009 | void *buf = sg_virt(sg); |
| 2010 | unsigned int offset = host->pio_offset; |
| 2011 | struct mmc_data *data = host->data; |
| 2012 | u32 value; |
| 2013 | u32 status; |
| 2014 | unsigned int nbytes = 0; |
| 2015 | |
| 2016 | do { |
Ludovic Desroches | 03fc9a7 | 2011-08-11 15:25:42 +0000 | [diff] [blame] | 2017 | value = atmci_readl(host, ATMCI_RDR); |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 2018 | if (likely(offset + 4 <= sg->length)) { |
| 2019 | put_unaligned(value, (u32 *)(buf + offset)); |
| 2020 | |
| 2021 | offset += 4; |
| 2022 | nbytes += 4; |
| 2023 | |
| 2024 | if (offset == sg->length) { |
Haavard Skinnemoen | 5e7184a | 2008-10-05 15:27:50 +0200 | [diff] [blame] | 2025 | flush_dcache_page(sg_page(sg)); |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 2026 | host->sg = sg = sg_next(sg); |
Terry Barnaby | bdbc5d0 | 2013-04-08 12:05:47 -0400 | [diff] [blame] | 2027 | host->sg_len--; |
| 2028 | if (!sg || !host->sg_len) |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 2029 | goto done; |
| 2030 | |
| 2031 | offset = 0; |
| 2032 | buf = sg_virt(sg); |
| 2033 | } |
| 2034 | } else { |
| 2035 | unsigned int remaining = sg->length - offset; |
| 2036 | memcpy(buf + offset, &value, remaining); |
| 2037 | nbytes += remaining; |
| 2038 | |
| 2039 | flush_dcache_page(sg_page(sg)); |
| 2040 | host->sg = sg = sg_next(sg); |
Terry Barnaby | bdbc5d0 | 2013-04-08 12:05:47 -0400 | [diff] [blame] | 2041 | host->sg_len--; |
| 2042 | if (!sg || !host->sg_len) |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 2043 | goto done; |
| 2044 | |
| 2045 | offset = 4 - remaining; |
| 2046 | buf = sg_virt(sg); |
| 2047 | memcpy(buf, (u8 *)&value + remaining, offset); |
| 2048 | nbytes += offset; |
| 2049 | } |
| 2050 | |
Ludovic Desroches | 03fc9a7 | 2011-08-11 15:25:42 +0000 | [diff] [blame] | 2051 | status = atmci_readl(host, ATMCI_SR); |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 2052 | if (status & ATMCI_DATA_ERROR_FLAGS) { |
Ludovic Desroches | 03fc9a7 | 2011-08-11 15:25:42 +0000 | [diff] [blame] | 2053 | atmci_writel(host, ATMCI_IDR, (ATMCI_NOTBUSY | ATMCI_RXRDY |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 2054 | | ATMCI_DATA_ERROR_FLAGS)); |
| 2055 | host->data_status = status; |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 2056 | data->bytes_xfered += nbytes; |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 2057 | return; |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 2058 | } |
Ludovic Desroches | 2c96a29 | 2011-08-11 15:25:41 +0000 | [diff] [blame] | 2059 | } while (status & ATMCI_RXRDY); |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 2060 | |
| 2061 | host->pio_offset = offset; |
| 2062 | data->bytes_xfered += nbytes; |
| 2063 | |
| 2064 | return; |
| 2065 | |
| 2066 | done: |
Ludovic Desroches | 03fc9a7 | 2011-08-11 15:25:42 +0000 | [diff] [blame] | 2067 | atmci_writel(host, ATMCI_IDR, ATMCI_RXRDY); |
| 2068 | atmci_writel(host, ATMCI_IER, ATMCI_NOTBUSY); |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 2069 | data->bytes_xfered += nbytes; |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 2070 | smp_wmb(); |
Haavard Skinnemoen | c06ad25 | 2008-07-31 14:49:16 +0200 | [diff] [blame] | 2071 | atmci_set_pending(host, EVENT_XFER_COMPLETE); |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 2072 | } |
| 2073 | |
| 2074 | static void atmci_write_data_pio(struct atmel_mci *host) |
| 2075 | { |
| 2076 | struct scatterlist *sg = host->sg; |
| 2077 | void *buf = sg_virt(sg); |
| 2078 | unsigned int offset = host->pio_offset; |
| 2079 | struct mmc_data *data = host->data; |
| 2080 | u32 value; |
| 2081 | u32 status; |
| 2082 | unsigned int nbytes = 0; |
| 2083 | |
| 2084 | do { |
| 2085 | if (likely(offset + 4 <= sg->length)) { |
| 2086 | value = get_unaligned((u32 *)(buf + offset)); |
Ludovic Desroches | 03fc9a7 | 2011-08-11 15:25:42 +0000 | [diff] [blame] | 2087 | atmci_writel(host, ATMCI_TDR, value); |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 2088 | |
| 2089 | offset += 4; |
| 2090 | nbytes += 4; |
| 2091 | if (offset == sg->length) { |
| 2092 | host->sg = sg = sg_next(sg); |
Terry Barnaby | bdbc5d0 | 2013-04-08 12:05:47 -0400 | [diff] [blame] | 2093 | host->sg_len--; |
| 2094 | if (!sg || !host->sg_len) |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 2095 | goto done; |
| 2096 | |
| 2097 | offset = 0; |
| 2098 | buf = sg_virt(sg); |
| 2099 | } |
| 2100 | } else { |
| 2101 | unsigned int remaining = sg->length - offset; |
| 2102 | |
| 2103 | value = 0; |
| 2104 | memcpy(&value, buf + offset, remaining); |
| 2105 | nbytes += remaining; |
| 2106 | |
| 2107 | host->sg = sg = sg_next(sg); |
Terry Barnaby | bdbc5d0 | 2013-04-08 12:05:47 -0400 | [diff] [blame] | 2108 | host->sg_len--; |
| 2109 | if (!sg || !host->sg_len) { |
Ludovic Desroches | 03fc9a7 | 2011-08-11 15:25:42 +0000 | [diff] [blame] | 2110 | atmci_writel(host, ATMCI_TDR, value); |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 2111 | goto done; |
| 2112 | } |
| 2113 | |
| 2114 | offset = 4 - remaining; |
| 2115 | buf = sg_virt(sg); |
| 2116 | memcpy((u8 *)&value + remaining, buf, offset); |
Ludovic Desroches | 03fc9a7 | 2011-08-11 15:25:42 +0000 | [diff] [blame] | 2117 | atmci_writel(host, ATMCI_TDR, value); |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 2118 | nbytes += offset; |
| 2119 | } |
| 2120 | |
Ludovic Desroches | 03fc9a7 | 2011-08-11 15:25:42 +0000 | [diff] [blame] | 2121 | status = atmci_readl(host, ATMCI_SR); |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 2122 | if (status & ATMCI_DATA_ERROR_FLAGS) { |
Ludovic Desroches | 03fc9a7 | 2011-08-11 15:25:42 +0000 | [diff] [blame] | 2123 | atmci_writel(host, ATMCI_IDR, (ATMCI_NOTBUSY | ATMCI_TXRDY |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 2124 | | ATMCI_DATA_ERROR_FLAGS)); |
| 2125 | host->data_status = status; |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 2126 | data->bytes_xfered += nbytes; |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 2127 | return; |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 2128 | } |
Ludovic Desroches | 2c96a29 | 2011-08-11 15:25:41 +0000 | [diff] [blame] | 2129 | } while (status & ATMCI_TXRDY); |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 2130 | |
| 2131 | host->pio_offset = offset; |
| 2132 | data->bytes_xfered += nbytes; |
| 2133 | |
| 2134 | return; |
| 2135 | |
| 2136 | done: |
Ludovic Desroches | 03fc9a7 | 2011-08-11 15:25:42 +0000 | [diff] [blame] | 2137 | atmci_writel(host, ATMCI_IDR, ATMCI_TXRDY); |
| 2138 | atmci_writel(host, ATMCI_IER, ATMCI_NOTBUSY); |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 2139 | data->bytes_xfered += nbytes; |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 2140 | smp_wmb(); |
Haavard Skinnemoen | c06ad25 | 2008-07-31 14:49:16 +0200 | [diff] [blame] | 2141 | atmci_set_pending(host, EVENT_XFER_COMPLETE); |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 2142 | } |
| 2143 | |
Anders Grahn | 88ff82e | 2010-05-26 14:42:01 -0700 | [diff] [blame] | 2144 | static void atmci_sdio_interrupt(struct atmel_mci *host, u32 status) |
| 2145 | { |
| 2146 | int i; |
| 2147 | |
Ludovic Desroches | 2c96a29 | 2011-08-11 15:25:41 +0000 | [diff] [blame] | 2148 | for (i = 0; i < ATMCI_MAX_NR_SLOTS; i++) { |
Anders Grahn | 88ff82e | 2010-05-26 14:42:01 -0700 | [diff] [blame] | 2149 | struct atmel_mci_slot *slot = host->slot[i]; |
| 2150 | if (slot && (status & slot->sdio_irq)) { |
| 2151 | mmc_signal_sdio_irq(slot->mmc); |
| 2152 | } |
| 2153 | } |
| 2154 | } |
| 2155 | |
| 2156 | |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 2157 | static irqreturn_t atmci_interrupt(int irq, void *dev_id) |
| 2158 | { |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 2159 | struct atmel_mci *host = dev_id; |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 2160 | u32 status, mask, pending; |
| 2161 | unsigned int pass_count = 0; |
| 2162 | |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 2163 | do { |
Ludovic Desroches | 03fc9a7 | 2011-08-11 15:25:42 +0000 | [diff] [blame] | 2164 | status = atmci_readl(host, ATMCI_SR); |
| 2165 | mask = atmci_readl(host, ATMCI_IMR); |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 2166 | pending = status & mask; |
| 2167 | if (!pending) |
| 2168 | break; |
| 2169 | |
| 2170 | if (pending & ATMCI_DATA_ERROR_FLAGS) { |
Ludovic Desroches | 6801c41 | 2012-05-16 15:26:01 +0200 | [diff] [blame] | 2171 | dev_dbg(&host->pdev->dev, "IRQ: data error\n"); |
Ludovic Desroches | 03fc9a7 | 2011-08-11 15:25:42 +0000 | [diff] [blame] | 2172 | atmci_writel(host, ATMCI_IDR, ATMCI_DATA_ERROR_FLAGS |
Ludovic Desroches | f517754 | 2012-05-16 15:25:59 +0200 | [diff] [blame] | 2173 | | ATMCI_RXRDY | ATMCI_TXRDY |
| 2174 | | ATMCI_ENDRX | ATMCI_ENDTX |
| 2175 | | ATMCI_RXBUFF | ATMCI_TXBUFE); |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 2176 | |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 2177 | host->data_status = status; |
Ludovic Desroches | 6801c41 | 2012-05-16 15:26:01 +0200 | [diff] [blame] | 2178 | dev_dbg(&host->pdev->dev, "set pending data error\n"); |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 2179 | smp_wmb(); |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 2180 | atmci_set_pending(host, EVENT_DATA_ERROR); |
| 2181 | tasklet_schedule(&host->tasklet); |
| 2182 | } |
Ludovic Desroches | 796211b | 2011-08-11 15:25:44 +0000 | [diff] [blame] | 2183 | |
Ludovic Desroches | 796211b | 2011-08-11 15:25:44 +0000 | [diff] [blame] | 2184 | if (pending & ATMCI_TXBUFE) { |
Ludovic Desroches | 6801c41 | 2012-05-16 15:26:01 +0200 | [diff] [blame] | 2185 | dev_dbg(&host->pdev->dev, "IRQ: tx buffer empty\n"); |
Ludovic Desroches | 796211b | 2011-08-11 15:25:44 +0000 | [diff] [blame] | 2186 | atmci_writel(host, ATMCI_IDR, ATMCI_TXBUFE); |
Ludovic Desroches | 7e8ba22 | 2011-08-11 15:25:48 +0000 | [diff] [blame] | 2187 | atmci_writel(host, ATMCI_IDR, ATMCI_ENDTX); |
Ludovic Desroches | 796211b | 2011-08-11 15:25:44 +0000 | [diff] [blame] | 2188 | /* |
| 2189 | * We can receive this interruption before having configured |
| 2190 | * the second pdc buffer, so we need to reconfigure first and |
| 2191 | * second buffers again |
| 2192 | */ |
| 2193 | if (host->data_size) { |
| 2194 | atmci_pdc_set_both_buf(host, XFER_TRANSMIT); |
Ludovic Desroches | 7e8ba22 | 2011-08-11 15:25:48 +0000 | [diff] [blame] | 2195 | atmci_writel(host, ATMCI_IER, ATMCI_ENDTX); |
Ludovic Desroches | 796211b | 2011-08-11 15:25:44 +0000 | [diff] [blame] | 2196 | atmci_writel(host, ATMCI_IER, ATMCI_TXBUFE); |
| 2197 | } else { |
| 2198 | atmci_pdc_complete(host); |
| 2199 | } |
Ludovic Desroches | 7e8ba22 | 2011-08-11 15:25:48 +0000 | [diff] [blame] | 2200 | } else if (pending & ATMCI_ENDTX) { |
Ludovic Desroches | 6801c41 | 2012-05-16 15:26:01 +0200 | [diff] [blame] | 2201 | dev_dbg(&host->pdev->dev, "IRQ: end of tx buffer\n"); |
Ludovic Desroches | 7e8ba22 | 2011-08-11 15:25:48 +0000 | [diff] [blame] | 2202 | atmci_writel(host, ATMCI_IDR, ATMCI_ENDTX); |
| 2203 | |
| 2204 | if (host->data_size) { |
| 2205 | atmci_pdc_set_single_buf(host, |
| 2206 | XFER_TRANSMIT, PDC_SECOND_BUF); |
| 2207 | atmci_writel(host, ATMCI_IER, ATMCI_ENDTX); |
| 2208 | } |
Ludovic Desroches | 796211b | 2011-08-11 15:25:44 +0000 | [diff] [blame] | 2209 | } |
| 2210 | |
Ludovic Desroches | 7e8ba22 | 2011-08-11 15:25:48 +0000 | [diff] [blame] | 2211 | if (pending & ATMCI_RXBUFF) { |
Ludovic Desroches | 6801c41 | 2012-05-16 15:26:01 +0200 | [diff] [blame] | 2212 | dev_dbg(&host->pdev->dev, "IRQ: rx buffer full\n"); |
Ludovic Desroches | 7e8ba22 | 2011-08-11 15:25:48 +0000 | [diff] [blame] | 2213 | atmci_writel(host, ATMCI_IDR, ATMCI_RXBUFF); |
| 2214 | atmci_writel(host, ATMCI_IDR, ATMCI_ENDRX); |
| 2215 | /* |
| 2216 | * We can receive this interruption before having configured |
| 2217 | * the second pdc buffer, so we need to reconfigure first and |
| 2218 | * second buffers again |
| 2219 | */ |
| 2220 | if (host->data_size) { |
| 2221 | atmci_pdc_set_both_buf(host, XFER_RECEIVE); |
| 2222 | atmci_writel(host, ATMCI_IER, ATMCI_ENDRX); |
| 2223 | atmci_writel(host, ATMCI_IER, ATMCI_RXBUFF); |
| 2224 | } else { |
| 2225 | atmci_pdc_complete(host); |
| 2226 | } |
| 2227 | } else if (pending & ATMCI_ENDRX) { |
Ludovic Desroches | 6801c41 | 2012-05-16 15:26:01 +0200 | [diff] [blame] | 2228 | dev_dbg(&host->pdev->dev, "IRQ: end of rx buffer\n"); |
Ludovic Desroches | 796211b | 2011-08-11 15:25:44 +0000 | [diff] [blame] | 2229 | atmci_writel(host, ATMCI_IDR, ATMCI_ENDRX); |
| 2230 | |
| 2231 | if (host->data_size) { |
| 2232 | atmci_pdc_set_single_buf(host, |
| 2233 | XFER_RECEIVE, PDC_SECOND_BUF); |
| 2234 | atmci_writel(host, ATMCI_IER, ATMCI_ENDRX); |
| 2235 | } |
| 2236 | } |
| 2237 | |
Ludovic Desroches | f517754 | 2012-05-16 15:25:59 +0200 | [diff] [blame] | 2238 | /* |
| 2239 | * First mci IPs, so mainly the ones having pdc, have some |
| 2240 | * issues with the notbusy signal. You can't get it after |
| 2241 | * data transmission if you have not sent a stop command. |
| 2242 | * The appropriate workaround is to use the BLKE signal. |
| 2243 | */ |
| 2244 | if (pending & ATMCI_BLKE) { |
Ludovic Desroches | 6801c41 | 2012-05-16 15:26:01 +0200 | [diff] [blame] | 2245 | dev_dbg(&host->pdev->dev, "IRQ: blke\n"); |
Ludovic Desroches | f517754 | 2012-05-16 15:25:59 +0200 | [diff] [blame] | 2246 | atmci_writel(host, ATMCI_IDR, ATMCI_BLKE); |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 2247 | smp_wmb(); |
Ludovic Desroches | 6801c41 | 2012-05-16 15:26:01 +0200 | [diff] [blame] | 2248 | dev_dbg(&host->pdev->dev, "set pending notbusy\n"); |
Ludovic Desroches | f517754 | 2012-05-16 15:25:59 +0200 | [diff] [blame] | 2249 | atmci_set_pending(host, EVENT_NOTBUSY); |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 2250 | tasklet_schedule(&host->tasklet); |
| 2251 | } |
Ludovic Desroches | f517754 | 2012-05-16 15:25:59 +0200 | [diff] [blame] | 2252 | |
| 2253 | if (pending & ATMCI_NOTBUSY) { |
Ludovic Desroches | 6801c41 | 2012-05-16 15:26:01 +0200 | [diff] [blame] | 2254 | dev_dbg(&host->pdev->dev, "IRQ: not_busy\n"); |
Ludovic Desroches | f517754 | 2012-05-16 15:25:59 +0200 | [diff] [blame] | 2255 | atmci_writel(host, ATMCI_IDR, ATMCI_NOTBUSY); |
| 2256 | smp_wmb(); |
Ludovic Desroches | 6801c41 | 2012-05-16 15:26:01 +0200 | [diff] [blame] | 2257 | dev_dbg(&host->pdev->dev, "set pending notbusy\n"); |
Ludovic Desroches | f517754 | 2012-05-16 15:25:59 +0200 | [diff] [blame] | 2258 | atmci_set_pending(host, EVENT_NOTBUSY); |
| 2259 | tasklet_schedule(&host->tasklet); |
| 2260 | } |
| 2261 | |
Ludovic Desroches | 2c96a29 | 2011-08-11 15:25:41 +0000 | [diff] [blame] | 2262 | if (pending & ATMCI_RXRDY) |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 2263 | atmci_read_data_pio(host); |
Ludovic Desroches | 2c96a29 | 2011-08-11 15:25:41 +0000 | [diff] [blame] | 2264 | if (pending & ATMCI_TXRDY) |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 2265 | atmci_write_data_pio(host); |
| 2266 | |
Ludovic Desroches | f517754 | 2012-05-16 15:25:59 +0200 | [diff] [blame] | 2267 | if (pending & ATMCI_CMDRDY) { |
Ludovic Desroches | 6801c41 | 2012-05-16 15:26:01 +0200 | [diff] [blame] | 2268 | dev_dbg(&host->pdev->dev, "IRQ: cmd ready\n"); |
Ludovic Desroches | f517754 | 2012-05-16 15:25:59 +0200 | [diff] [blame] | 2269 | atmci_writel(host, ATMCI_IDR, ATMCI_CMDRDY); |
| 2270 | host->cmd_status = status; |
| 2271 | smp_wmb(); |
Ludovic Desroches | 6801c41 | 2012-05-16 15:26:01 +0200 | [diff] [blame] | 2272 | dev_dbg(&host->pdev->dev, "set pending cmd rdy\n"); |
Ludovic Desroches | f517754 | 2012-05-16 15:25:59 +0200 | [diff] [blame] | 2273 | atmci_set_pending(host, EVENT_CMD_RDY); |
| 2274 | tasklet_schedule(&host->tasklet); |
| 2275 | } |
Anders Grahn | 88ff82e | 2010-05-26 14:42:01 -0700 | [diff] [blame] | 2276 | |
Ludovic Desroches | 2c96a29 | 2011-08-11 15:25:41 +0000 | [diff] [blame] | 2277 | if (pending & (ATMCI_SDIOIRQA | ATMCI_SDIOIRQB)) |
Anders Grahn | 88ff82e | 2010-05-26 14:42:01 -0700 | [diff] [blame] | 2278 | atmci_sdio_interrupt(host, status); |
| 2279 | |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 2280 | } while (pass_count++ < 5); |
| 2281 | |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 2282 | return pass_count ? IRQ_HANDLED : IRQ_NONE; |
| 2283 | } |
| 2284 | |
| 2285 | static irqreturn_t atmci_detect_interrupt(int irq, void *dev_id) |
| 2286 | { |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 2287 | struct atmel_mci_slot *slot = dev_id; |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 2288 | |
| 2289 | /* |
| 2290 | * Disable interrupts until the pin has stabilized and check |
| 2291 | * the state then. Use mod_timer() since we may be in the |
| 2292 | * middle of the timer routine when this interrupt triggers. |
| 2293 | */ |
| 2294 | disable_irq_nosync(irq); |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 2295 | mod_timer(&slot->detect_timer, jiffies + msecs_to_jiffies(20)); |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 2296 | |
| 2297 | return IRQ_HANDLED; |
| 2298 | } |
| 2299 | |
ludovic.desroches@atmel.com | ab050b9 | 2014-12-01 15:35:07 +0100 | [diff] [blame] | 2300 | static int atmci_init_slot(struct atmel_mci *host, |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 2301 | struct mci_slot_pdata *slot_data, unsigned int id, |
Anders Grahn | 88ff82e | 2010-05-26 14:42:01 -0700 | [diff] [blame] | 2302 | u32 sdc_reg, u32 sdio_irq) |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 2303 | { |
| 2304 | struct mmc_host *mmc; |
| 2305 | struct atmel_mci_slot *slot; |
| 2306 | |
| 2307 | mmc = mmc_alloc_host(sizeof(struct atmel_mci_slot), &host->pdev->dev); |
| 2308 | if (!mmc) |
| 2309 | return -ENOMEM; |
| 2310 | |
| 2311 | slot = mmc_priv(mmc); |
| 2312 | slot->mmc = mmc; |
| 2313 | slot->host = host; |
| 2314 | slot->detect_pin = slot_data->detect_pin; |
| 2315 | slot->wp_pin = slot_data->wp_pin; |
Jonas Larsson | 1c1452b | 2009-03-31 11:16:48 +0200 | [diff] [blame] | 2316 | slot->detect_is_active_high = slot_data->detect_is_active_high; |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 2317 | slot->sdc_reg = sdc_reg; |
Anders Grahn | 88ff82e | 2010-05-26 14:42:01 -0700 | [diff] [blame] | 2318 | slot->sdio_irq = sdio_irq; |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 2319 | |
Ludovic Desroches | e919fd2 | 2012-07-24 15:30:03 +0200 | [diff] [blame] | 2320 | dev_dbg(&mmc->class_dev, |
| 2321 | "slot[%u]: bus_width=%u, detect_pin=%d, " |
| 2322 | "detect_is_active_high=%s, wp_pin=%d\n", |
| 2323 | id, slot_data->bus_width, slot_data->detect_pin, |
| 2324 | slot_data->detect_is_active_high ? "true" : "false", |
| 2325 | slot_data->wp_pin); |
| 2326 | |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 2327 | mmc->ops = &atmci_ops; |
| 2328 | mmc->f_min = DIV_ROUND_UP(host->bus_hz, 512); |
| 2329 | mmc->f_max = host->bus_hz / 2; |
| 2330 | mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34; |
Anders Grahn | 88ff82e | 2010-05-26 14:42:01 -0700 | [diff] [blame] | 2331 | if (sdio_irq) |
| 2332 | mmc->caps |= MMC_CAP_SDIO_IRQ; |
Ludovic Desroches | 796211b | 2011-08-11 15:25:44 +0000 | [diff] [blame] | 2333 | if (host->caps.has_highspeed) |
Nicolas Ferre | 99ddffd | 2010-05-26 14:41:59 -0700 | [diff] [blame] | 2334 | mmc->caps |= MMC_CAP_SD_HIGHSPEED; |
Ludovic Desroches | 7a90dcc | 2012-05-16 15:25:58 +0200 | [diff] [blame] | 2335 | /* |
| 2336 | * Without the read/write proof capability, it is strongly suggested to |
| 2337 | * use only one bit for data to prevent fifo underruns and overruns |
| 2338 | * which will corrupt data. |
| 2339 | */ |
| 2340 | if ((slot_data->bus_width >= 4) && host->caps.has_rwproof) |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 2341 | mmc->caps |= MMC_CAP_4_BIT_DATA; |
| 2342 | |
Ludovic Desroches | 7a90dcc | 2012-05-16 15:25:58 +0200 | [diff] [blame] | 2343 | if (atmci_get_version(host) < 0x200) { |
| 2344 | mmc->max_segs = 256; |
| 2345 | mmc->max_blk_size = 4095; |
| 2346 | mmc->max_blk_count = 256; |
| 2347 | mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count; |
| 2348 | mmc->max_seg_size = mmc->max_blk_size * mmc->max_segs; |
| 2349 | } else { |
| 2350 | mmc->max_segs = 64; |
| 2351 | mmc->max_req_size = 32768 * 512; |
| 2352 | mmc->max_blk_size = 32768; |
| 2353 | mmc->max_blk_count = 512; |
| 2354 | } |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 2355 | |
| 2356 | /* Assume card is present initially */ |
| 2357 | set_bit(ATMCI_CARD_PRESENT, &slot->flags); |
| 2358 | if (gpio_is_valid(slot->detect_pin)) { |
Pramod Gurav | 7bca646 | 2014-09-23 18:21:48 +0530 | [diff] [blame] | 2359 | if (devm_gpio_request(&host->pdev->dev, slot->detect_pin, |
| 2360 | "mmc_detect")) { |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 2361 | dev_dbg(&mmc->class_dev, "no detect pin available\n"); |
| 2362 | slot->detect_pin = -EBUSY; |
Jonas Larsson | 1c1452b | 2009-03-31 11:16:48 +0200 | [diff] [blame] | 2363 | } else if (gpio_get_value(slot->detect_pin) ^ |
| 2364 | slot->detect_is_active_high) { |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 2365 | clear_bit(ATMCI_CARD_PRESENT, &slot->flags); |
| 2366 | } |
| 2367 | } |
| 2368 | |
Timo Kokkonen | 76d5556 | 2014-11-03 13:12:59 +0200 | [diff] [blame] | 2369 | if (!gpio_is_valid(slot->detect_pin)) { |
| 2370 | if (slot_data->non_removable) |
| 2371 | mmc->caps |= MMC_CAP_NONREMOVABLE; |
| 2372 | else |
| 2373 | mmc->caps |= MMC_CAP_NEEDS_POLL; |
| 2374 | } |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 2375 | |
| 2376 | if (gpio_is_valid(slot->wp_pin)) { |
Pramod Gurav | 7bca646 | 2014-09-23 18:21:48 +0530 | [diff] [blame] | 2377 | if (devm_gpio_request(&host->pdev->dev, slot->wp_pin, |
| 2378 | "mmc_wp")) { |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 2379 | dev_dbg(&mmc->class_dev, "no WP pin available\n"); |
| 2380 | slot->wp_pin = -EBUSY; |
| 2381 | } |
| 2382 | } |
| 2383 | |
| 2384 | host->slot[id] = slot; |
Alexandre Belloni | 9e7861f | 2013-10-17 12:46:48 +0200 | [diff] [blame] | 2385 | mmc_regulator_get_supply(mmc); |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 2386 | mmc_add_host(mmc); |
| 2387 | |
| 2388 | if (gpio_is_valid(slot->detect_pin)) { |
| 2389 | int ret; |
| 2390 | |
| 2391 | setup_timer(&slot->detect_timer, atmci_detect_change, |
| 2392 | (unsigned long)slot); |
| 2393 | |
| 2394 | ret = request_irq(gpio_to_irq(slot->detect_pin), |
| 2395 | atmci_detect_interrupt, |
| 2396 | IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING, |
| 2397 | "mmc-detect", slot); |
| 2398 | if (ret) { |
| 2399 | dev_dbg(&mmc->class_dev, |
| 2400 | "could not request IRQ %d for detect pin\n", |
| 2401 | gpio_to_irq(slot->detect_pin)); |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 2402 | slot->detect_pin = -EBUSY; |
| 2403 | } |
| 2404 | } |
| 2405 | |
| 2406 | atmci_init_debugfs(slot); |
| 2407 | |
| 2408 | return 0; |
| 2409 | } |
| 2410 | |
Arnd Bergmann | 5fef365 | 2014-09-26 21:34:58 +0200 | [diff] [blame] | 2411 | static void atmci_cleanup_slot(struct atmel_mci_slot *slot, |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 2412 | unsigned int id) |
| 2413 | { |
| 2414 | /* Debugfs stuff is cleaned up by mmc core */ |
| 2415 | |
| 2416 | set_bit(ATMCI_SHUTDOWN, &slot->flags); |
| 2417 | smp_wmb(); |
| 2418 | |
| 2419 | mmc_remove_host(slot->mmc); |
| 2420 | |
| 2421 | if (gpio_is_valid(slot->detect_pin)) { |
| 2422 | int pin = slot->detect_pin; |
| 2423 | |
| 2424 | free_irq(gpio_to_irq(pin), slot); |
| 2425 | del_timer_sync(&slot->detect_timer); |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 2426 | } |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 2427 | |
| 2428 | slot->host->slot[id] = NULL; |
| 2429 | mmc_free_host(slot->mmc); |
| 2430 | } |
| 2431 | |
ludovic.desroches@atmel.com | 467e081 | 2014-12-01 15:35:09 +0100 | [diff] [blame] | 2432 | static int atmci_configure_dma(struct atmel_mci *host) |
Nicolas Ferre | 2635d1b | 2009-12-14 18:01:30 -0800 | [diff] [blame] | 2433 | { |
ludovic.desroches@atmel.com | 467e081 | 2014-12-01 15:35:09 +0100 | [diff] [blame] | 2434 | host->dma.chan = dma_request_slave_channel_reason(&host->pdev->dev, |
| 2435 | "rxtx"); |
Mans Rullgard | 7484378 | 2016-01-09 12:45:10 +0000 | [diff] [blame] | 2436 | |
| 2437 | if (PTR_ERR(host->dma.chan) == -ENODEV) { |
| 2438 | struct mci_platform_data *pdata = host->pdev->dev.platform_data; |
| 2439 | dma_cap_mask_t mask; |
| 2440 | |
Brent Taylor | 93c77d2 | 2016-03-13 00:25:31 -0600 | [diff] [blame] | 2441 | if (!pdata || !pdata->dma_filter) |
Mans Rullgard | 7484378 | 2016-01-09 12:45:10 +0000 | [diff] [blame] | 2442 | return -ENODEV; |
| 2443 | |
| 2444 | dma_cap_zero(mask); |
| 2445 | dma_cap_set(DMA_SLAVE, mask); |
| 2446 | |
| 2447 | host->dma.chan = dma_request_channel(mask, pdata->dma_filter, |
| 2448 | pdata->dma_slave); |
| 2449 | if (!host->dma.chan) |
| 2450 | host->dma.chan = ERR_PTR(-ENODEV); |
| 2451 | } |
| 2452 | |
ludovic.desroches@atmel.com | 467e081 | 2014-12-01 15:35:09 +0100 | [diff] [blame] | 2453 | if (IS_ERR(host->dma.chan)) |
| 2454 | return PTR_ERR(host->dma.chan); |
Nicolas Ferre | 2635d1b | 2009-12-14 18:01:30 -0800 | [diff] [blame] | 2455 | |
ludovic.desroches@atmel.com | 467e081 | 2014-12-01 15:35:09 +0100 | [diff] [blame] | 2456 | dev_info(&host->pdev->dev, "using %s for DMA transfers\n", |
| 2457 | dma_chan_name(host->dma.chan)); |
Viresh Kumar | e2b35f3 | 2012-02-01 16:12:27 +0530 | [diff] [blame] | 2458 | |
ludovic.desroches@atmel.com | 467e081 | 2014-12-01 15:35:09 +0100 | [diff] [blame] | 2459 | host->dma_conf.src_addr = host->mapbase + ATMCI_RDR; |
| 2460 | host->dma_conf.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; |
| 2461 | host->dma_conf.src_maxburst = 1; |
| 2462 | host->dma_conf.dst_addr = host->mapbase + ATMCI_TDR; |
| 2463 | host->dma_conf.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; |
| 2464 | host->dma_conf.dst_maxburst = 1; |
| 2465 | host->dma_conf.device_fc = false; |
| 2466 | |
| 2467 | return 0; |
Nicolas Ferre | 2635d1b | 2009-12-14 18:01:30 -0800 | [diff] [blame] | 2468 | } |
Ludovic Desroches | 796211b | 2011-08-11 15:25:44 +0000 | [diff] [blame] | 2469 | |
Ludovic Desroches | 796211b | 2011-08-11 15:25:44 +0000 | [diff] [blame] | 2470 | /* |
| 2471 | * HSMCI (High Speed MCI) module is not fully compatible with MCI module. |
| 2472 | * HSMCI provides DMA support and a new config register but no more supports |
| 2473 | * PDC. |
| 2474 | */ |
ludovic.desroches@atmel.com | ab050b9 | 2014-12-01 15:35:07 +0100 | [diff] [blame] | 2475 | static void atmci_get_cap(struct atmel_mci *host) |
Ludovic Desroches | 796211b | 2011-08-11 15:25:44 +0000 | [diff] [blame] | 2476 | { |
| 2477 | unsigned int version; |
| 2478 | |
| 2479 | version = atmci_get_version(host); |
| 2480 | dev_info(&host->pdev->dev, |
| 2481 | "version: 0x%x\n", version); |
| 2482 | |
Hein_Tibosch | ccdfe61 | 2012-08-30 16:34:38 +0000 | [diff] [blame] | 2483 | host->caps.has_dma_conf_reg = 0; |
Hein_Tibosch | 6bf2af8 | 2012-08-30 16:34:27 +0000 | [diff] [blame] | 2484 | host->caps.has_pdc = ATMCI_PDC_CONNECTED; |
Ludovic Desroches | 796211b | 2011-08-11 15:25:44 +0000 | [diff] [blame] | 2485 | host->caps.has_cfg_reg = 0; |
| 2486 | host->caps.has_cstor_reg = 0; |
| 2487 | host->caps.has_highspeed = 0; |
| 2488 | host->caps.has_rwproof = 0; |
Ludovic Desroches | faf8180 | 2012-03-21 16:41:23 +0100 | [diff] [blame] | 2489 | host->caps.has_odd_clk_div = 0; |
Ludovic Desroches | 24011f3 | 2012-05-16 15:26:00 +0200 | [diff] [blame] | 2490 | host->caps.has_bad_data_ordering = 1; |
| 2491 | host->caps.need_reset_after_xfer = 1; |
| 2492 | host->caps.need_blksz_mul_4 = 1; |
Ludovic Desroches | 077d407 | 2012-07-24 11:42:04 +0200 | [diff] [blame] | 2493 | host->caps.need_notbusy_for_read_ops = 0; |
Ludovic Desroches | 796211b | 2011-08-11 15:25:44 +0000 | [diff] [blame] | 2494 | |
| 2495 | /* keep only major version number */ |
| 2496 | switch (version & 0xf00) { |
Nicolas Ferre | 215ba39 | 2014-06-12 09:47:45 +0200 | [diff] [blame] | 2497 | case 0x600: |
Ludovic Desroches | 796211b | 2011-08-11 15:25:44 +0000 | [diff] [blame] | 2498 | case 0x500: |
Ludovic Desroches | faf8180 | 2012-03-21 16:41:23 +0100 | [diff] [blame] | 2499 | host->caps.has_odd_clk_div = 1; |
| 2500 | case 0x400: |
| 2501 | case 0x300: |
Hein_Tibosch | ccdfe61 | 2012-08-30 16:34:38 +0000 | [diff] [blame] | 2502 | host->caps.has_dma_conf_reg = 1; |
Ludovic Desroches | faf8180 | 2012-03-21 16:41:23 +0100 | [diff] [blame] | 2503 | host->caps.has_pdc = 0; |
Ludovic Desroches | 796211b | 2011-08-11 15:25:44 +0000 | [diff] [blame] | 2504 | host->caps.has_cfg_reg = 1; |
| 2505 | host->caps.has_cstor_reg = 1; |
| 2506 | host->caps.has_highspeed = 1; |
Ludovic Desroches | faf8180 | 2012-03-21 16:41:23 +0100 | [diff] [blame] | 2507 | case 0x200: |
Ludovic Desroches | 796211b | 2011-08-11 15:25:44 +0000 | [diff] [blame] | 2508 | host->caps.has_rwproof = 1; |
Ludovic Desroches | 24011f3 | 2012-05-16 15:26:00 +0200 | [diff] [blame] | 2509 | host->caps.need_blksz_mul_4 = 0; |
Ludovic Desroches | 077d407 | 2012-07-24 11:42:04 +0200 | [diff] [blame] | 2510 | host->caps.need_notbusy_for_read_ops = 1; |
Ludovic Desroches | faf8180 | 2012-03-21 16:41:23 +0100 | [diff] [blame] | 2511 | case 0x100: |
Ludovic Desroches | 24011f3 | 2012-05-16 15:26:00 +0200 | [diff] [blame] | 2512 | host->caps.has_bad_data_ordering = 0; |
| 2513 | host->caps.need_reset_after_xfer = 0; |
| 2514 | case 0x0: |
Ludovic Desroches | 796211b | 2011-08-11 15:25:44 +0000 | [diff] [blame] | 2515 | break; |
| 2516 | default: |
Ludovic Desroches | faf8180 | 2012-03-21 16:41:23 +0100 | [diff] [blame] | 2517 | host->caps.has_pdc = 0; |
Ludovic Desroches | 796211b | 2011-08-11 15:25:44 +0000 | [diff] [blame] | 2518 | dev_warn(&host->pdev->dev, |
| 2519 | "Unmanaged mci version, set minimum capabilities\n"); |
| 2520 | break; |
| 2521 | } |
| 2522 | } |
Dan Williams | 74465b4 | 2009-01-06 11:38:16 -0700 | [diff] [blame] | 2523 | |
ludovic.desroches@atmel.com | ab050b9 | 2014-12-01 15:35:07 +0100 | [diff] [blame] | 2524 | static int atmci_probe(struct platform_device *pdev) |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 2525 | { |
| 2526 | struct mci_platform_data *pdata; |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 2527 | struct atmel_mci *host; |
| 2528 | struct resource *regs; |
| 2529 | unsigned int nr_slots; |
| 2530 | int irq; |
Pramod Gurav | 528bc78 | 2014-09-23 15:50:06 +0530 | [diff] [blame] | 2531 | int ret, i; |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 2532 | |
| 2533 | regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
| 2534 | if (!regs) |
| 2535 | return -ENXIO; |
| 2536 | pdata = pdev->dev.platform_data; |
Ludovic Desroches | e919fd2 | 2012-07-24 15:30:03 +0200 | [diff] [blame] | 2537 | if (!pdata) { |
| 2538 | pdata = atmci_of_init(pdev); |
| 2539 | if (IS_ERR(pdata)) { |
| 2540 | dev_err(&pdev->dev, "platform data not available\n"); |
| 2541 | return PTR_ERR(pdata); |
| 2542 | } |
| 2543 | } |
| 2544 | |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 2545 | irq = platform_get_irq(pdev, 0); |
| 2546 | if (irq < 0) |
| 2547 | return irq; |
| 2548 | |
Pramod Gurav | 7bca646 | 2014-09-23 18:21:48 +0530 | [diff] [blame] | 2549 | host = devm_kzalloc(&pdev->dev, sizeof(*host), GFP_KERNEL); |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 2550 | if (!host) |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 2551 | return -ENOMEM; |
| 2552 | |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 2553 | host->pdev = pdev; |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 2554 | spin_lock_init(&host->lock); |
| 2555 | INIT_LIST_HEAD(&host->queue); |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 2556 | |
Pramod Gurav | 7bca646 | 2014-09-23 18:21:48 +0530 | [diff] [blame] | 2557 | host->mck = devm_clk_get(&pdev->dev, "mci_clk"); |
| 2558 | if (IS_ERR(host->mck)) |
| 2559 | return PTR_ERR(host->mck); |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 2560 | |
Pramod Gurav | 7bca646 | 2014-09-23 18:21:48 +0530 | [diff] [blame] | 2561 | host->regs = devm_ioremap(&pdev->dev, regs->start, resource_size(regs)); |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 2562 | if (!host->regs) |
Pramod Gurav | 7bca646 | 2014-09-23 18:21:48 +0530 | [diff] [blame] | 2563 | return -ENOMEM; |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 2564 | |
Boris BREZILLON | b3894f2 | 2013-07-18 09:38:52 +0200 | [diff] [blame] | 2565 | ret = clk_prepare_enable(host->mck); |
| 2566 | if (ret) |
Pramod Gurav | 7bca646 | 2014-09-23 18:21:48 +0530 | [diff] [blame] | 2567 | return ret; |
| 2568 | |
Ludovic Desroches | 03fc9a7 | 2011-08-11 15:25:42 +0000 | [diff] [blame] | 2569 | atmci_writel(host, ATMCI_CR, ATMCI_CR_SWRST); |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 2570 | host->bus_hz = clk_get_rate(host->mck); |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 2571 | |
| 2572 | host->mapbase = regs->start; |
| 2573 | |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 2574 | tasklet_init(&host->tasklet, atmci_tasklet_func, (unsigned long)host); |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 2575 | |
Kay Sievers | 89c8aa2 | 2009-02-02 21:08:30 +0100 | [diff] [blame] | 2576 | ret = request_irq(irq, atmci_interrupt, 0, dev_name(&pdev->dev), host); |
Wenyou Yang | ae552ab | 2014-10-30 12:00:41 +0800 | [diff] [blame] | 2577 | if (ret) { |
| 2578 | clk_disable_unprepare(host->mck); |
Pramod Gurav | 7bca646 | 2014-09-23 18:21:48 +0530 | [diff] [blame] | 2579 | return ret; |
Wenyou Yang | ae552ab | 2014-10-30 12:00:41 +0800 | [diff] [blame] | 2580 | } |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 2581 | |
Ludovic Desroches | 796211b | 2011-08-11 15:25:44 +0000 | [diff] [blame] | 2582 | /* Get MCI capabilities and set operations according to it */ |
| 2583 | atmci_get_cap(host); |
ludovic.desroches@atmel.com | 467e081 | 2014-12-01 15:35:09 +0100 | [diff] [blame] | 2584 | ret = atmci_configure_dma(host); |
| 2585 | if (ret == -EPROBE_DEFER) |
| 2586 | goto err_dma_probe_defer; |
| 2587 | if (ret == 0) { |
Ludovic Desroches | 796211b | 2011-08-11 15:25:44 +0000 | [diff] [blame] | 2588 | host->prepare_data = &atmci_prepare_data_dma; |
| 2589 | host->submit_data = &atmci_submit_data_dma; |
| 2590 | host->stop_transfer = &atmci_stop_transfer_dma; |
| 2591 | } else if (host->caps.has_pdc) { |
| 2592 | dev_info(&pdev->dev, "using PDC\n"); |
| 2593 | host->prepare_data = &atmci_prepare_data_pdc; |
| 2594 | host->submit_data = &atmci_submit_data_pdc; |
| 2595 | host->stop_transfer = &atmci_stop_transfer_pdc; |
| 2596 | } else { |
Ludovic Desroches | ef87819 | 2012-02-09 16:33:53 +0100 | [diff] [blame] | 2597 | dev_info(&pdev->dev, "using PIO\n"); |
Ludovic Desroches | 796211b | 2011-08-11 15:25:44 +0000 | [diff] [blame] | 2598 | host->prepare_data = &atmci_prepare_data; |
| 2599 | host->submit_data = &atmci_submit_data; |
| 2600 | host->stop_transfer = &atmci_stop_transfer; |
| 2601 | } |
| 2602 | |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 2603 | platform_set_drvdata(pdev, host); |
| 2604 | |
Ludovic Desroches | b87cc1b | 2012-05-23 15:52:15 +0200 | [diff] [blame] | 2605 | setup_timer(&host->timer, atmci_timeout_timer, (unsigned long)host); |
| 2606 | |
Wenyou Yang | ae552ab | 2014-10-30 12:00:41 +0800 | [diff] [blame] | 2607 | pm_runtime_get_noresume(&pdev->dev); |
| 2608 | pm_runtime_set_active(&pdev->dev); |
| 2609 | pm_runtime_set_autosuspend_delay(&pdev->dev, AUTOSUSPEND_DELAY); |
| 2610 | pm_runtime_use_autosuspend(&pdev->dev); |
| 2611 | pm_runtime_enable(&pdev->dev); |
| 2612 | |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 2613 | /* We need at least one slot to succeed */ |
| 2614 | nr_slots = 0; |
| 2615 | ret = -ENODEV; |
| 2616 | if (pdata->slot[0].bus_width) { |
| 2617 | ret = atmci_init_slot(host, &pdata->slot[0], |
Ludovic Desroches | 2c96a29 | 2011-08-11 15:25:41 +0000 | [diff] [blame] | 2618 | 0, ATMCI_SDCSEL_SLOT_A, ATMCI_SDIOIRQA); |
Ludovic Desroches | 7a90dcc | 2012-05-16 15:25:58 +0200 | [diff] [blame] | 2619 | if (!ret) { |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 2620 | nr_slots++; |
Ludovic Desroches | 7a90dcc | 2012-05-16 15:25:58 +0200 | [diff] [blame] | 2621 | host->buf_size = host->slot[0]->mmc->max_req_size; |
| 2622 | } |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 2623 | } |
| 2624 | if (pdata->slot[1].bus_width) { |
| 2625 | ret = atmci_init_slot(host, &pdata->slot[1], |
Ludovic Desroches | 2c96a29 | 2011-08-11 15:25:41 +0000 | [diff] [blame] | 2626 | 1, ATMCI_SDCSEL_SLOT_B, ATMCI_SDIOIRQB); |
Ludovic Desroches | 7a90dcc | 2012-05-16 15:25:58 +0200 | [diff] [blame] | 2627 | if (!ret) { |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 2628 | nr_slots++; |
Ludovic Desroches | 7a90dcc | 2012-05-16 15:25:58 +0200 | [diff] [blame] | 2629 | if (host->slot[1]->mmc->max_req_size > host->buf_size) |
| 2630 | host->buf_size = |
| 2631 | host->slot[1]->mmc->max_req_size; |
| 2632 | } |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 2633 | } |
| 2634 | |
Rob Emanuele | 04d699c | 2009-09-22 16:45:19 -0700 | [diff] [blame] | 2635 | if (!nr_slots) { |
| 2636 | dev_err(&pdev->dev, "init failed: no slot defined\n"); |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 2637 | goto err_init_slot; |
Rob Emanuele | 04d699c | 2009-09-22 16:45:19 -0700 | [diff] [blame] | 2638 | } |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 2639 | |
Ludovic Desroches | 7a90dcc | 2012-05-16 15:25:58 +0200 | [diff] [blame] | 2640 | if (!host->caps.has_rwproof) { |
| 2641 | host->buffer = dma_alloc_coherent(&pdev->dev, host->buf_size, |
| 2642 | &host->buf_phys_addr, |
| 2643 | GFP_KERNEL); |
| 2644 | if (!host->buffer) { |
| 2645 | ret = -ENOMEM; |
| 2646 | dev_err(&pdev->dev, "buffer allocation failed\n"); |
Pramod Gurav | 528bc78 | 2014-09-23 15:50:06 +0530 | [diff] [blame] | 2647 | goto err_dma_alloc; |
Ludovic Desroches | 7a90dcc | 2012-05-16 15:25:58 +0200 | [diff] [blame] | 2648 | } |
| 2649 | } |
| 2650 | |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 2651 | dev_info(&pdev->dev, |
| 2652 | "Atmel MCI controller at 0x%08lx irq %d, %u slots\n", |
| 2653 | host->mapbase, irq, nr_slots); |
Haavard Skinnemoen | deec9ae | 2008-07-24 14:18:59 +0200 | [diff] [blame] | 2654 | |
Wenyou Yang | ae552ab | 2014-10-30 12:00:41 +0800 | [diff] [blame] | 2655 | pm_runtime_mark_last_busy(&host->pdev->dev); |
| 2656 | pm_runtime_put_autosuspend(&pdev->dev); |
| 2657 | |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 2658 | return 0; |
| 2659 | |
Pramod Gurav | 528bc78 | 2014-09-23 15:50:06 +0530 | [diff] [blame] | 2660 | err_dma_alloc: |
| 2661 | for (i = 0; i < ATMCI_MAX_NR_SLOTS; i++) { |
| 2662 | if (host->slot[i]) |
| 2663 | atmci_cleanup_slot(host->slot[i], i); |
| 2664 | } |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 2665 | err_init_slot: |
Wenyou Yang | ae552ab | 2014-10-30 12:00:41 +0800 | [diff] [blame] | 2666 | clk_disable_unprepare(host->mck); |
| 2667 | |
| 2668 | pm_runtime_disable(&pdev->dev); |
| 2669 | pm_runtime_put_noidle(&pdev->dev); |
| 2670 | |
Pramod Gurav | 528bc78 | 2014-09-23 15:50:06 +0530 | [diff] [blame] | 2671 | del_timer_sync(&host->timer); |
ludovic.desroches@atmel.com | 467e081 | 2014-12-01 15:35:09 +0100 | [diff] [blame] | 2672 | if (!IS_ERR(host->dma.chan)) |
Dan Williams | 74465b4 | 2009-01-06 11:38:16 -0700 | [diff] [blame] | 2673 | dma_release_channel(host->dma.chan); |
ludovic.desroches@atmel.com | 467e081 | 2014-12-01 15:35:09 +0100 | [diff] [blame] | 2674 | err_dma_probe_defer: |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 2675 | free_irq(irq, host); |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 2676 | return ret; |
| 2677 | } |
| 2678 | |
ludovic.desroches@atmel.com | ab050b9 | 2014-12-01 15:35:07 +0100 | [diff] [blame] | 2679 | static int atmci_remove(struct platform_device *pdev) |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 2680 | { |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 2681 | struct atmel_mci *host = platform_get_drvdata(pdev); |
| 2682 | unsigned int i; |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 2683 | |
Wenyou Yang | ae552ab | 2014-10-30 12:00:41 +0800 | [diff] [blame] | 2684 | pm_runtime_get_sync(&pdev->dev); |
| 2685 | |
Ludovic Desroches | 7a90dcc | 2012-05-16 15:25:58 +0200 | [diff] [blame] | 2686 | if (host->buffer) |
| 2687 | dma_free_coherent(&pdev->dev, host->buf_size, |
| 2688 | host->buffer, host->buf_phys_addr); |
| 2689 | |
Ludovic Desroches | 2c96a29 | 2011-08-11 15:25:41 +0000 | [diff] [blame] | 2690 | for (i = 0; i < ATMCI_MAX_NR_SLOTS; i++) { |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 2691 | if (host->slot[i]) |
| 2692 | atmci_cleanup_slot(host->slot[i], i); |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 2693 | } |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 2694 | |
Ludovic Desroches | 03fc9a7 | 2011-08-11 15:25:42 +0000 | [diff] [blame] | 2695 | atmci_writel(host, ATMCI_IDR, ~0UL); |
| 2696 | atmci_writel(host, ATMCI_CR, ATMCI_CR_MCIDIS); |
| 2697 | atmci_readl(host, ATMCI_SR); |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 2698 | |
Pramod Gurav | 528bc78 | 2014-09-23 15:50:06 +0530 | [diff] [blame] | 2699 | del_timer_sync(&host->timer); |
ludovic.desroches@atmel.com | 467e081 | 2014-12-01 15:35:09 +0100 | [diff] [blame] | 2700 | if (!IS_ERR(host->dma.chan)) |
Dan Williams | 74465b4 | 2009-01-06 11:38:16 -0700 | [diff] [blame] | 2701 | dma_release_channel(host->dma.chan); |
Haavard Skinnemoen | 65e8b08 | 2008-07-30 20:29:03 +0200 | [diff] [blame] | 2702 | |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 2703 | free_irq(platform_get_irq(pdev, 0), host); |
Haavard Skinnemoen | 965ebf3 | 2008-09-17 20:53:55 +0200 | [diff] [blame] | 2704 | |
Wenyou Yang | ae552ab | 2014-10-30 12:00:41 +0800 | [diff] [blame] | 2705 | clk_disable_unprepare(host->mck); |
| 2706 | |
| 2707 | pm_runtime_disable(&pdev->dev); |
| 2708 | pm_runtime_put_noidle(&pdev->dev); |
| 2709 | |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 2710 | return 0; |
| 2711 | } |
| 2712 | |
Wenyou Yang | ae552ab | 2014-10-30 12:00:41 +0800 | [diff] [blame] | 2713 | #ifdef CONFIG_PM |
| 2714 | static int atmci_runtime_suspend(struct device *dev) |
| 2715 | { |
| 2716 | struct atmel_mci *host = dev_get_drvdata(dev); |
| 2717 | |
| 2718 | clk_disable_unprepare(host->mck); |
| 2719 | |
Wenyou Yang | b5b64fa | 2014-11-07 08:48:13 +0800 | [diff] [blame] | 2720 | pinctrl_pm_select_sleep_state(dev); |
| 2721 | |
Wenyou Yang | ae552ab | 2014-10-30 12:00:41 +0800 | [diff] [blame] | 2722 | return 0; |
| 2723 | } |
| 2724 | |
| 2725 | static int atmci_runtime_resume(struct device *dev) |
| 2726 | { |
| 2727 | struct atmel_mci *host = dev_get_drvdata(dev); |
| 2728 | |
Wenyou Yang | b5b64fa | 2014-11-07 08:48:13 +0800 | [diff] [blame] | 2729 | pinctrl_pm_select_default_state(dev); |
| 2730 | |
Wenyou Yang | ae552ab | 2014-10-30 12:00:41 +0800 | [diff] [blame] | 2731 | return clk_prepare_enable(host->mck); |
| 2732 | } |
| 2733 | #endif |
| 2734 | |
| 2735 | static const struct dev_pm_ops atmci_dev_pm_ops = { |
| 2736 | SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, |
| 2737 | pm_runtime_force_resume) |
Ludovic Desroches | c3cb6ba | 2014-12-13 00:44:11 +0100 | [diff] [blame] | 2738 | SET_RUNTIME_PM_OPS(atmci_runtime_suspend, atmci_runtime_resume, NULL) |
Wenyou Yang | ae552ab | 2014-10-30 12:00:41 +0800 | [diff] [blame] | 2739 | }; |
| 2740 | |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 2741 | static struct platform_driver atmci_driver = { |
ludovic.desroches@atmel.com | 5e0fe89 | 2014-12-01 15:35:08 +0100 | [diff] [blame] | 2742 | .probe = atmci_probe, |
ludovic.desroches@atmel.com | ab050b9 | 2014-12-01 15:35:07 +0100 | [diff] [blame] | 2743 | .remove = atmci_remove, |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 2744 | .driver = { |
| 2745 | .name = "atmel_mci", |
Ludovic Desroches | e919fd2 | 2012-07-24 15:30:03 +0200 | [diff] [blame] | 2746 | .of_match_table = of_match_ptr(atmci_dt_ids), |
Wenyou Yang | ae552ab | 2014-10-30 12:00:41 +0800 | [diff] [blame] | 2747 | .pm = &atmci_dev_pm_ops, |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 2748 | }, |
| 2749 | }; |
ludovic.desroches@atmel.com | 5e0fe89 | 2014-12-01 15:35:08 +0100 | [diff] [blame] | 2750 | module_platform_driver(atmci_driver); |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 2751 | |
| 2752 | MODULE_DESCRIPTION("Atmel Multimedia Card Interface driver"); |
Jean Delvare | e05503e | 2011-05-18 16:49:24 +0200 | [diff] [blame] | 2753 | MODULE_AUTHOR("Haavard Skinnemoen (Atmel)"); |
Haavard Skinnemoen | 7d2be07 | 2008-06-30 18:35:03 +0200 | [diff] [blame] | 2754 | MODULE_LICENSE("GPL v2"); |