Tony Lindgren | 1dbae81 | 2005-11-10 14:26:51 +0000 | [diff] [blame] | 1 | /* |
| 2 | * linux/arch/arm/mach-omap2/timer-gp.c |
| 3 | * |
| 4 | * OMAP2 GP timer support. |
| 5 | * |
Paul Walmsley | f248076 | 2009-04-23 21:11:10 -0600 | [diff] [blame] | 6 | * Copyright (C) 2009 Nokia Corporation |
| 7 | * |
Kevin Hilman | 5a3a388 | 2007-11-12 23:24:02 -0800 | [diff] [blame] | 8 | * Update to use new clocksource/clockevent layers |
| 9 | * Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com> |
| 10 | * Copyright (C) 2007 MontaVista Software, Inc. |
| 11 | * |
| 12 | * Original driver: |
Tony Lindgren | 1dbae81 | 2005-11-10 14:26:51 +0000 | [diff] [blame] | 13 | * Copyright (C) 2005 Nokia Corporation |
| 14 | * Author: Paul Mundt <paul.mundt@nokia.com> |
Jan Engelhardt | 96de0e2 | 2007-10-19 23:21:04 +0200 | [diff] [blame] | 15 | * Juha Yrjölä <juha.yrjola@nokia.com> |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 16 | * OMAP Dual-mode timer framework support by Timo Teras |
Tony Lindgren | 1dbae81 | 2005-11-10 14:26:51 +0000 | [diff] [blame] | 17 | * |
| 18 | * Some parts based off of TI's 24xx code: |
| 19 | * |
Santosh Shilimkar | 4416907 | 2009-05-28 14:16:04 -0700 | [diff] [blame] | 20 | * Copyright (C) 2004-2009 Texas Instruments, Inc. |
Tony Lindgren | 1dbae81 | 2005-11-10 14:26:51 +0000 | [diff] [blame] | 21 | * |
| 22 | * Roughly modelled after the OMAP1 MPU timer code. |
Santosh Shilimkar | 4416907 | 2009-05-28 14:16:04 -0700 | [diff] [blame] | 23 | * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com> |
Tony Lindgren | 1dbae81 | 2005-11-10 14:26:51 +0000 | [diff] [blame] | 24 | * |
| 25 | * This file is subject to the terms and conditions of the GNU General Public |
| 26 | * License. See the file "COPYING" in the main directory of this archive |
| 27 | * for more details. |
| 28 | */ |
| 29 | #include <linux/init.h> |
| 30 | #include <linux/time.h> |
| 31 | #include <linux/interrupt.h> |
| 32 | #include <linux/err.h> |
Russell King | f8ce254 | 2006-01-07 16:15:52 +0000 | [diff] [blame] | 33 | #include <linux/clk.h> |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 34 | #include <linux/delay.h> |
Dirk Behme | e668729 | 2006-12-06 17:14:00 -0800 | [diff] [blame] | 35 | #include <linux/irq.h> |
Kevin Hilman | 5a3a388 | 2007-11-12 23:24:02 -0800 | [diff] [blame] | 36 | #include <linux/clocksource.h> |
| 37 | #include <linux/clockchips.h> |
Russell King | f8ce254 | 2006-01-07 16:15:52 +0000 | [diff] [blame] | 38 | |
Tony Lindgren | 1dbae81 | 2005-11-10 14:26:51 +0000 | [diff] [blame] | 39 | #include <asm/mach/time.h> |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 40 | #include <mach/dmtimer.h> |
Santosh Shilimkar | 39e1d4c | 2009-04-28 20:52:00 +0530 | [diff] [blame] | 41 | #include <asm/localtimer.h> |
Tony Lindgren | 1dbae81 | 2005-11-10 14:26:51 +0000 | [diff] [blame] | 42 | |
Paul Walmsley | f248076 | 2009-04-23 21:11:10 -0600 | [diff] [blame] | 43 | /* MAX_GPTIMER_ID: number of GPTIMERs on the chip */ |
| 44 | #define MAX_GPTIMER_ID 12 |
| 45 | |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 46 | static struct omap_dm_timer *gptimer; |
Kevin Hilman | 5a3a388 | 2007-11-12 23:24:02 -0800 | [diff] [blame] | 47 | static struct clock_event_device clockevent_gpt; |
Paul Walmsley | f248076 | 2009-04-23 21:11:10 -0600 | [diff] [blame] | 48 | static u8 __initdata gptimer_id = 1; |
| 49 | static u8 __initdata inited; |
Tony Lindgren | 1dbae81 | 2005-11-10 14:26:51 +0000 | [diff] [blame] | 50 | |
Linus Torvalds | 0cd61b6 | 2006-10-06 10:53:39 -0700 | [diff] [blame] | 51 | static irqreturn_t omap2_gp_timer_interrupt(int irq, void *dev_id) |
Tony Lindgren | 1dbae81 | 2005-11-10 14:26:51 +0000 | [diff] [blame] | 52 | { |
Kevin Hilman | 5a3a388 | 2007-11-12 23:24:02 -0800 | [diff] [blame] | 53 | struct omap_dm_timer *gpt = (struct omap_dm_timer *)dev_id; |
| 54 | struct clock_event_device *evt = &clockevent_gpt; |
Tony Lindgren | 1dbae81 | 2005-11-10 14:26:51 +0000 | [diff] [blame] | 55 | |
Kevin Hilman | 5a3a388 | 2007-11-12 23:24:02 -0800 | [diff] [blame] | 56 | omap_dm_timer_write_status(gpt, OMAP_TIMER_INT_OVERFLOW); |
| 57 | |
| 58 | evt->event_handler(evt); |
Tony Lindgren | 1dbae81 | 2005-11-10 14:26:51 +0000 | [diff] [blame] | 59 | return IRQ_HANDLED; |
| 60 | } |
| 61 | |
| 62 | static struct irqaction omap2_gp_timer_irq = { |
| 63 | .name = "gp timer", |
Bernhard Walle | b30faba | 2007-05-08 00:35:39 -0700 | [diff] [blame] | 64 | .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, |
Tony Lindgren | 1dbae81 | 2005-11-10 14:26:51 +0000 | [diff] [blame] | 65 | .handler = omap2_gp_timer_interrupt, |
| 66 | }; |
| 67 | |
Kevin Hilman | 5a3a388 | 2007-11-12 23:24:02 -0800 | [diff] [blame] | 68 | static int omap2_gp_timer_set_next_event(unsigned long cycles, |
| 69 | struct clock_event_device *evt) |
Tony Lindgren | 1dbae81 | 2005-11-10 14:26:51 +0000 | [diff] [blame] | 70 | { |
Richard Woodruff | 3fddd09 | 2008-07-03 12:24:30 +0300 | [diff] [blame] | 71 | omap_dm_timer_set_load_start(gptimer, 0, 0xffffffff - cycles); |
Tony Lindgren | 1dbae81 | 2005-11-10 14:26:51 +0000 | [diff] [blame] | 72 | |
Kevin Hilman | 5a3a388 | 2007-11-12 23:24:02 -0800 | [diff] [blame] | 73 | return 0; |
| 74 | } |
| 75 | |
| 76 | static void omap2_gp_timer_set_mode(enum clock_event_mode mode, |
| 77 | struct clock_event_device *evt) |
| 78 | { |
| 79 | u32 period; |
| 80 | |
| 81 | omap_dm_timer_stop(gptimer); |
| 82 | |
| 83 | switch (mode) { |
| 84 | case CLOCK_EVT_MODE_PERIODIC: |
| 85 | period = clk_get_rate(omap_dm_timer_get_fclk(gptimer)) / HZ; |
| 86 | period -= 1; |
Santosh Shilimkar | 4416907 | 2009-05-28 14:16:04 -0700 | [diff] [blame] | 87 | if (cpu_is_omap44xx()) |
| 88 | period = 0xff; /* FIXME: */ |
Richard Woodruff | 3fddd09 | 2008-07-03 12:24:30 +0300 | [diff] [blame] | 89 | omap_dm_timer_set_load_start(gptimer, 1, 0xffffffff - period); |
Kevin Hilman | 5a3a388 | 2007-11-12 23:24:02 -0800 | [diff] [blame] | 90 | break; |
| 91 | case CLOCK_EVT_MODE_ONESHOT: |
| 92 | break; |
| 93 | case CLOCK_EVT_MODE_UNUSED: |
| 94 | case CLOCK_EVT_MODE_SHUTDOWN: |
| 95 | case CLOCK_EVT_MODE_RESUME: |
| 96 | break; |
| 97 | } |
| 98 | } |
| 99 | |
| 100 | static struct clock_event_device clockevent_gpt = { |
| 101 | .name = "gp timer", |
| 102 | .features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT, |
| 103 | .shift = 32, |
| 104 | .set_next_event = omap2_gp_timer_set_next_event, |
| 105 | .set_mode = omap2_gp_timer_set_mode, |
| 106 | }; |
| 107 | |
Paul Walmsley | f248076 | 2009-04-23 21:11:10 -0600 | [diff] [blame] | 108 | /** |
| 109 | * omap2_gp_clockevent_set_gptimer - set which GPTIMER is used for clockevents |
| 110 | * @id: GPTIMER to use (1..MAX_GPTIMER_ID) |
| 111 | * |
| 112 | * Define the GPTIMER that the system should use for the tick timer. |
| 113 | * Meant to be called from board-*.c files in the event that GPTIMER1, the |
| 114 | * default, is unsuitable. Returns -EINVAL on error or 0 on success. |
| 115 | */ |
| 116 | int __init omap2_gp_clockevent_set_gptimer(u8 id) |
| 117 | { |
| 118 | if (id < 1 || id > MAX_GPTIMER_ID) |
| 119 | return -EINVAL; |
| 120 | |
| 121 | BUG_ON(inited); |
| 122 | |
| 123 | gptimer_id = id; |
| 124 | |
| 125 | return 0; |
| 126 | } |
| 127 | |
Kevin Hilman | 5a3a388 | 2007-11-12 23:24:02 -0800 | [diff] [blame] | 128 | static void __init omap2_gp_clockevent_init(void) |
| 129 | { |
| 130 | u32 tick_rate; |
Paul Walmsley | f248076 | 2009-04-23 21:11:10 -0600 | [diff] [blame] | 131 | int src; |
Kevin Hilman | 5a3a388 | 2007-11-12 23:24:02 -0800 | [diff] [blame] | 132 | |
Paul Walmsley | f248076 | 2009-04-23 21:11:10 -0600 | [diff] [blame] | 133 | inited = 1; |
| 134 | |
| 135 | gptimer = omap_dm_timer_request_specific(gptimer_id); |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 136 | BUG_ON(gptimer == NULL); |
Tony Lindgren | 1dbae81 | 2005-11-10 14:26:51 +0000 | [diff] [blame] | 137 | |
Kevin Hilman | 5a3a388 | 2007-11-12 23:24:02 -0800 | [diff] [blame] | 138 | #if defined(CONFIG_OMAP_32K_TIMER) |
Paul Walmsley | f248076 | 2009-04-23 21:11:10 -0600 | [diff] [blame] | 139 | src = OMAP_TIMER_SRC_32_KHZ; |
Kevin Hilman | 5a3a388 | 2007-11-12 23:24:02 -0800 | [diff] [blame] | 140 | #else |
Paul Walmsley | f248076 | 2009-04-23 21:11:10 -0600 | [diff] [blame] | 141 | src = OMAP_TIMER_SRC_SYS_CLK; |
| 142 | WARN(gptimer_id == 12, "WARNING: GPTIMER12 can only use the " |
| 143 | "secure 32KiHz clock source\n"); |
Kevin Hilman | 5a3a388 | 2007-11-12 23:24:02 -0800 | [diff] [blame] | 144 | #endif |
Paul Walmsley | f248076 | 2009-04-23 21:11:10 -0600 | [diff] [blame] | 145 | |
| 146 | if (gptimer_id != 12) |
| 147 | WARN(IS_ERR_VALUE(omap_dm_timer_set_source(gptimer, src)), |
| 148 | "timer-gp: omap_dm_timer_set_source() failed\n"); |
| 149 | |
Kevin Hilman | 5a3a388 | 2007-11-12 23:24:02 -0800 | [diff] [blame] | 150 | tick_rate = clk_get_rate(omap_dm_timer_get_fclk(gptimer)); |
Santosh Shilimkar | 4416907 | 2009-05-28 14:16:04 -0700 | [diff] [blame] | 151 | if (cpu_is_omap44xx()) |
| 152 | /* Assuming 32kHz clk is driving GPT1 */ |
| 153 | tick_rate = 32768; /* FIXME: */ |
Tony Lindgren | 1dbae81 | 2005-11-10 14:26:51 +0000 | [diff] [blame] | 154 | |
Paul Walmsley | f248076 | 2009-04-23 21:11:10 -0600 | [diff] [blame] | 155 | pr_info("OMAP clockevent source: GPTIMER%d at %u Hz\n", |
| 156 | gptimer_id, tick_rate); |
| 157 | |
Kevin Hilman | 5a3a388 | 2007-11-12 23:24:02 -0800 | [diff] [blame] | 158 | omap2_gp_timer_irq.dev_id = (void *)gptimer; |
Timo Teras | 77900a2 | 2006-06-26 16:16:12 -0700 | [diff] [blame] | 159 | setup_irq(omap_dm_timer_get_irq(gptimer), &omap2_gp_timer_irq); |
Kevin Hilman | 5a3a388 | 2007-11-12 23:24:02 -0800 | [diff] [blame] | 160 | omap_dm_timer_set_int_enable(gptimer, OMAP_TIMER_INT_OVERFLOW); |
| 161 | |
| 162 | clockevent_gpt.mult = div_sc(tick_rate, NSEC_PER_SEC, |
| 163 | clockevent_gpt.shift); |
| 164 | clockevent_gpt.max_delta_ns = |
| 165 | clockevent_delta2ns(0xffffffff, &clockevent_gpt); |
| 166 | clockevent_gpt.min_delta_ns = |
Aaro Koskinen | df88acb | 2009-01-29 08:57:17 -0800 | [diff] [blame] | 167 | clockevent_delta2ns(3, &clockevent_gpt); |
| 168 | /* Timer internal resynch latency. */ |
Kevin Hilman | 5a3a388 | 2007-11-12 23:24:02 -0800 | [diff] [blame] | 169 | |
Rusty Russell | 320ab2b | 2008-12-13 21:20:26 +1030 | [diff] [blame] | 170 | clockevent_gpt.cpumask = cpumask_of(0); |
Kevin Hilman | 5a3a388 | 2007-11-12 23:24:02 -0800 | [diff] [blame] | 171 | clockevents_register_device(&clockevent_gpt); |
| 172 | } |
| 173 | |
Paul Walmsley | f248076 | 2009-04-23 21:11:10 -0600 | [diff] [blame] | 174 | /* Clocksource code */ |
| 175 | |
Kevin Hilman | 5a3a388 | 2007-11-12 23:24:02 -0800 | [diff] [blame] | 176 | #ifdef CONFIG_OMAP_32K_TIMER |
| 177 | /* |
| 178 | * When 32k-timer is enabled, don't use GPTimer for clocksource |
| 179 | * instead, just leave default clocksource which uses the 32k |
| 180 | * sync counter. See clocksource setup in see plat-omap/common.c. |
| 181 | */ |
| 182 | |
| 183 | static inline void __init omap2_gp_clocksource_init(void) {} |
| 184 | #else |
| 185 | /* |
| 186 | * clocksource |
| 187 | */ |
| 188 | static struct omap_dm_timer *gpt_clocksource; |
Magnus Damm | 8e19608 | 2009-04-21 12:24:00 -0700 | [diff] [blame] | 189 | static cycle_t clocksource_read_cycles(struct clocksource *cs) |
Kevin Hilman | 5a3a388 | 2007-11-12 23:24:02 -0800 | [diff] [blame] | 190 | { |
| 191 | return (cycle_t)omap_dm_timer_read_counter(gpt_clocksource); |
| 192 | } |
| 193 | |
| 194 | static struct clocksource clocksource_gpt = { |
| 195 | .name = "gp timer", |
| 196 | .rating = 300, |
| 197 | .read = clocksource_read_cycles, |
| 198 | .mask = CLOCKSOURCE_MASK(32), |
| 199 | .shift = 24, |
| 200 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, |
| 201 | }; |
| 202 | |
| 203 | /* Setup free-running counter for clocksource */ |
| 204 | static void __init omap2_gp_clocksource_init(void) |
| 205 | { |
| 206 | static struct omap_dm_timer *gpt; |
| 207 | u32 tick_rate, tick_period; |
| 208 | static char err1[] __initdata = KERN_ERR |
| 209 | "%s: failed to request dm-timer\n"; |
| 210 | static char err2[] __initdata = KERN_ERR |
| 211 | "%s: can't register clocksource!\n"; |
| 212 | |
| 213 | gpt = omap_dm_timer_request(); |
| 214 | if (!gpt) |
| 215 | printk(err1, clocksource_gpt.name); |
| 216 | gpt_clocksource = gpt; |
| 217 | |
| 218 | omap_dm_timer_set_source(gpt, OMAP_TIMER_SRC_SYS_CLK); |
| 219 | tick_rate = clk_get_rate(omap_dm_timer_get_fclk(gpt)); |
| 220 | tick_period = (tick_rate / HZ) - 1; |
| 221 | |
Richard Woodruff | 3fddd09 | 2008-07-03 12:24:30 +0300 | [diff] [blame] | 222 | omap_dm_timer_set_load_start(gpt, 1, 0); |
Kevin Hilman | 5a3a388 | 2007-11-12 23:24:02 -0800 | [diff] [blame] | 223 | |
| 224 | clocksource_gpt.mult = |
| 225 | clocksource_khz2mult(tick_rate/1000, clocksource_gpt.shift); |
| 226 | if (clocksource_register(&clocksource_gpt)) |
| 227 | printk(err2, clocksource_gpt.name); |
| 228 | } |
| 229 | #endif |
| 230 | |
| 231 | static void __init omap2_gp_timer_init(void) |
| 232 | { |
Santosh Shilimkar | 39e1d4c | 2009-04-28 20:52:00 +0530 | [diff] [blame] | 233 | #ifdef CONFIG_LOCAL_TIMERS |
| 234 | twd_base = IO_ADDRESS(OMAP44XX_LOCAL_TWD_BASE); |
| 235 | #endif |
Kevin Hilman | 5a3a388 | 2007-11-12 23:24:02 -0800 | [diff] [blame] | 236 | omap_dm_timer_init(); |
| 237 | |
| 238 | omap2_gp_clockevent_init(); |
| 239 | omap2_gp_clocksource_init(); |
Tony Lindgren | 1dbae81 | 2005-11-10 14:26:51 +0000 | [diff] [blame] | 240 | } |
| 241 | |
| 242 | struct sys_timer omap_timer = { |
| 243 | .init = omap2_gp_timer_init, |
| 244 | }; |