blob: 0c1f20f570a4e25c392cc24b69fdcb70bca3a3f1 [file] [log] [blame]
Ben Hutchings94e61082008-03-05 16:52:39 +00001#include <linux/delay.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -07002#include <linux/pci.h>
3#include <linux/module.h>
Al Virof6a57032006-10-18 01:47:25 -04004#include <linux/sched.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +09005#include <linux/slab.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -07006#include <linux/ioport.h>
Matthew Wilcox7ea7e982006-10-19 09:41:28 -06007#include <linux/wait.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -07008
Adrian Bunk48b19142005-11-06 01:45:08 +01009#include "pci.h"
10
Linus Torvalds1da177e2005-04-16 15:20:36 -070011/*
12 * This interrupt-safe spinlock protects all accesses to PCI
13 * configuration space.
14 */
15
Thomas Gleixner511dd982010-02-17 14:35:19 +000016static DEFINE_RAW_SPINLOCK(pci_lock);
Linus Torvalds1da177e2005-04-16 15:20:36 -070017
18/*
19 * Wrappers for all PCI configuration access functions. They just check
20 * alignment, do locking and call the low-level functions pointed to
21 * by pci_dev->ops.
22 */
23
24#define PCI_byte_BAD 0
25#define PCI_word_BAD (pos & 1)
26#define PCI_dword_BAD (pos & 3)
27
28#define PCI_OP_READ(size,type,len) \
29int pci_bus_read_config_##size \
30 (struct pci_bus *bus, unsigned int devfn, int pos, type *value) \
31{ \
32 int res; \
33 unsigned long flags; \
34 u32 data = 0; \
35 if (PCI_##size##_BAD) return PCIBIOS_BAD_REGISTER_NUMBER; \
Thomas Gleixner511dd982010-02-17 14:35:19 +000036 raw_spin_lock_irqsave(&pci_lock, flags); \
Linus Torvalds1da177e2005-04-16 15:20:36 -070037 res = bus->ops->read(bus, devfn, pos, len, &data); \
38 *value = (type)data; \
Thomas Gleixner511dd982010-02-17 14:35:19 +000039 raw_spin_unlock_irqrestore(&pci_lock, flags); \
Linus Torvalds1da177e2005-04-16 15:20:36 -070040 return res; \
41}
42
43#define PCI_OP_WRITE(size,type,len) \
44int pci_bus_write_config_##size \
45 (struct pci_bus *bus, unsigned int devfn, int pos, type value) \
46{ \
47 int res; \
48 unsigned long flags; \
49 if (PCI_##size##_BAD) return PCIBIOS_BAD_REGISTER_NUMBER; \
Thomas Gleixner511dd982010-02-17 14:35:19 +000050 raw_spin_lock_irqsave(&pci_lock, flags); \
Linus Torvalds1da177e2005-04-16 15:20:36 -070051 res = bus->ops->write(bus, devfn, pos, len, value); \
Thomas Gleixner511dd982010-02-17 14:35:19 +000052 raw_spin_unlock_irqrestore(&pci_lock, flags); \
Linus Torvalds1da177e2005-04-16 15:20:36 -070053 return res; \
54}
55
56PCI_OP_READ(byte, u8, 1)
57PCI_OP_READ(word, u16, 2)
58PCI_OP_READ(dword, u32, 4)
59PCI_OP_WRITE(byte, u8, 1)
60PCI_OP_WRITE(word, u16, 2)
61PCI_OP_WRITE(dword, u32, 4)
62
63EXPORT_SYMBOL(pci_bus_read_config_byte);
64EXPORT_SYMBOL(pci_bus_read_config_word);
65EXPORT_SYMBOL(pci_bus_read_config_dword);
66EXPORT_SYMBOL(pci_bus_write_config_byte);
67EXPORT_SYMBOL(pci_bus_write_config_word);
68EXPORT_SYMBOL(pci_bus_write_config_dword);
Brian Kinge04b0ea2005-09-27 01:21:55 -070069
Huang Yinga72b46c2009-04-24 10:45:17 +080070/**
71 * pci_bus_set_ops - Set raw operations of pci bus
72 * @bus: pci bus struct
73 * @ops: new raw operations
74 *
75 * Return previous raw operations
76 */
77struct pci_ops *pci_bus_set_ops(struct pci_bus *bus, struct pci_ops *ops)
78{
79 struct pci_ops *old_ops;
80 unsigned long flags;
81
Thomas Gleixner511dd982010-02-17 14:35:19 +000082 raw_spin_lock_irqsave(&pci_lock, flags);
Huang Yinga72b46c2009-04-24 10:45:17 +080083 old_ops = bus->ops;
84 bus->ops = ops;
Thomas Gleixner511dd982010-02-17 14:35:19 +000085 raw_spin_unlock_irqrestore(&pci_lock, flags);
Huang Yinga72b46c2009-04-24 10:45:17 +080086 return old_ops;
87}
88EXPORT_SYMBOL(pci_bus_set_ops);
Stephen Hemminger287d19c2008-12-18 09:17:16 -080089
90/**
91 * pci_read_vpd - Read one entry from Vital Product Data
92 * @dev: pci device struct
93 * @pos: offset in vpd space
94 * @count: number of bytes to read
95 * @buf: pointer to where to store result
96 *
97 */
98ssize_t pci_read_vpd(struct pci_dev *dev, loff_t pos, size_t count, void *buf)
99{
100 if (!dev->vpd || !dev->vpd->ops)
101 return -ENODEV;
102 return dev->vpd->ops->read(dev, pos, count, buf);
103}
104EXPORT_SYMBOL(pci_read_vpd);
105
106/**
107 * pci_write_vpd - Write entry to Vital Product Data
108 * @dev: pci device struct
109 * @pos: offset in vpd space
Randy Dunlapcffb2fa2009-04-10 15:17:50 -0700110 * @count: number of bytes to write
111 * @buf: buffer containing write data
Stephen Hemminger287d19c2008-12-18 09:17:16 -0800112 *
113 */
114ssize_t pci_write_vpd(struct pci_dev *dev, loff_t pos, size_t count, const void *buf)
115{
116 if (!dev->vpd || !dev->vpd->ops)
117 return -ENODEV;
118 return dev->vpd->ops->write(dev, pos, count, buf);
119}
120EXPORT_SYMBOL(pci_write_vpd);
121
Matthew Wilcox7ea7e982006-10-19 09:41:28 -0600122/*
123 * The following routines are to prevent the user from accessing PCI config
124 * space when it's unsafe to do so. Some devices require this during BIST and
125 * we're required to prevent it during D-state transitions.
126 *
127 * We have a bit per device to indicate it's blocked and a global wait queue
128 * for callers to sleep on until devices are unblocked.
129 */
130static DECLARE_WAIT_QUEUE_HEAD(pci_ucfg_wait);
Brian Kinge04b0ea2005-09-27 01:21:55 -0700131
Matthew Wilcox7ea7e982006-10-19 09:41:28 -0600132static noinline void pci_wait_ucfg(struct pci_dev *dev)
133{
134 DECLARE_WAITQUEUE(wait, current);
135
136 __add_wait_queue(&pci_ucfg_wait, &wait);
137 do {
138 set_current_state(TASK_UNINTERRUPTIBLE);
Thomas Gleixner511dd982010-02-17 14:35:19 +0000139 raw_spin_unlock_irq(&pci_lock);
Matthew Wilcox7ea7e982006-10-19 09:41:28 -0600140 schedule();
Thomas Gleixner511dd982010-02-17 14:35:19 +0000141 raw_spin_lock_irq(&pci_lock);
Matthew Wilcox7ea7e982006-10-19 09:41:28 -0600142 } while (dev->block_ucfg_access);
143 __remove_wait_queue(&pci_ucfg_wait, &wait);
Brian Kinge04b0ea2005-09-27 01:21:55 -0700144}
145
146#define PCI_USER_READ_CONFIG(size,type) \
147int pci_user_read_config_##size \
148 (struct pci_dev *dev, int pos, type *val) \
149{ \
Brian Kinge04b0ea2005-09-27 01:21:55 -0700150 int ret = 0; \
151 u32 data = -1; \
152 if (PCI_##size##_BAD) return PCIBIOS_BAD_REGISTER_NUMBER; \
Thomas Gleixner511dd982010-02-17 14:35:19 +0000153 raw_spin_lock_irq(&pci_lock); \
Matthew Wilcox7ea7e982006-10-19 09:41:28 -0600154 if (unlikely(dev->block_ucfg_access)) pci_wait_ucfg(dev); \
155 ret = dev->bus->ops->read(dev->bus, dev->devfn, \
Brian Kinge04b0ea2005-09-27 01:21:55 -0700156 pos, sizeof(type), &data); \
Thomas Gleixner511dd982010-02-17 14:35:19 +0000157 raw_spin_unlock_irq(&pci_lock); \
Brian Kinge04b0ea2005-09-27 01:21:55 -0700158 *val = (type)data; \
159 return ret; \
160}
161
162#define PCI_USER_WRITE_CONFIG(size,type) \
163int pci_user_write_config_##size \
164 (struct pci_dev *dev, int pos, type val) \
165{ \
Brian Kinge04b0ea2005-09-27 01:21:55 -0700166 int ret = -EIO; \
167 if (PCI_##size##_BAD) return PCIBIOS_BAD_REGISTER_NUMBER; \
Thomas Gleixner511dd982010-02-17 14:35:19 +0000168 raw_spin_lock_irq(&pci_lock); \
Matthew Wilcox7ea7e982006-10-19 09:41:28 -0600169 if (unlikely(dev->block_ucfg_access)) pci_wait_ucfg(dev); \
170 ret = dev->bus->ops->write(dev->bus, dev->devfn, \
Brian Kinge04b0ea2005-09-27 01:21:55 -0700171 pos, sizeof(type), val); \
Thomas Gleixner511dd982010-02-17 14:35:19 +0000172 raw_spin_unlock_irq(&pci_lock); \
Brian Kinge04b0ea2005-09-27 01:21:55 -0700173 return ret; \
174}
175
176PCI_USER_READ_CONFIG(byte, u8)
177PCI_USER_READ_CONFIG(word, u16)
178PCI_USER_READ_CONFIG(dword, u32)
179PCI_USER_WRITE_CONFIG(byte, u8)
180PCI_USER_WRITE_CONFIG(word, u16)
181PCI_USER_WRITE_CONFIG(dword, u32)
182
Ben Hutchings94e61082008-03-05 16:52:39 +0000183/* VPD access through PCI 2.2+ VPD capability */
184
185#define PCI_VPD_PCI22_SIZE (PCI_VPD_ADDR_MASK + 1)
186
187struct pci_vpd_pci22 {
188 struct pci_vpd base;
Stephen Hemminger1120f8b2008-12-18 09:17:16 -0800189 struct mutex lock;
190 u16 flag;
Ben Hutchings94e61082008-03-05 16:52:39 +0000191 bool busy;
Stephen Hemminger1120f8b2008-12-18 09:17:16 -0800192 u8 cap;
Ben Hutchings94e61082008-03-05 16:52:39 +0000193};
194
Stephen Hemminger1120f8b2008-12-18 09:17:16 -0800195/*
196 * Wait for last operation to complete.
197 * This code has to spin since there is no other notification from the PCI
198 * hardware. Since the VPD is often implemented by serial attachment to an
199 * EEPROM, it may take many milliseconds to complete.
200 */
Ben Hutchings94e61082008-03-05 16:52:39 +0000201static int pci_vpd_pci22_wait(struct pci_dev *dev)
202{
203 struct pci_vpd_pci22 *vpd =
204 container_of(dev->vpd, struct pci_vpd_pci22, base);
Stephen Hemminger1120f8b2008-12-18 09:17:16 -0800205 unsigned long timeout = jiffies + HZ/20 + 2;
206 u16 status;
Ben Hutchings94e61082008-03-05 16:52:39 +0000207 int ret;
208
209 if (!vpd->busy)
210 return 0;
211
Ben Hutchings94e61082008-03-05 16:52:39 +0000212 for (;;) {
Stephen Hemminger1120f8b2008-12-18 09:17:16 -0800213 ret = pci_user_read_config_word(dev, vpd->cap + PCI_VPD_ADDR,
Ben Hutchings94e61082008-03-05 16:52:39 +0000214 &status);
Stephen Hemminger1120f8b2008-12-18 09:17:16 -0800215 if (ret)
Ben Hutchings94e61082008-03-05 16:52:39 +0000216 return ret;
Stephen Hemminger1120f8b2008-12-18 09:17:16 -0800217
218 if ((status & PCI_VPD_ADDR_F) == vpd->flag) {
Ben Hutchings94e61082008-03-05 16:52:39 +0000219 vpd->busy = false;
220 return 0;
221 }
Stephen Hemminger1120f8b2008-12-18 09:17:16 -0800222
Prarit Bhargava50307182010-05-17 14:25:14 -0400223 if (time_after(jiffies, timeout)) {
224 dev_printk(KERN_DEBUG, &dev->dev,
225 "vpd r/w failed. This is likely a firmware "
226 "bug on this device. Contact the card "
227 "vendor for a firmware update.");
Ben Hutchings94e61082008-03-05 16:52:39 +0000228 return -ETIMEDOUT;
Prarit Bhargava50307182010-05-17 14:25:14 -0400229 }
Stephen Hemminger1120f8b2008-12-18 09:17:16 -0800230 if (fatal_signal_pending(current))
231 return -EINTR;
232 if (!cond_resched())
233 udelay(10);
Ben Hutchings94e61082008-03-05 16:52:39 +0000234 }
235}
236
Stephen Hemminger287d19c2008-12-18 09:17:16 -0800237static ssize_t pci_vpd_pci22_read(struct pci_dev *dev, loff_t pos, size_t count,
238 void *arg)
Ben Hutchings94e61082008-03-05 16:52:39 +0000239{
240 struct pci_vpd_pci22 *vpd =
241 container_of(dev->vpd, struct pci_vpd_pci22, base);
Stephen Hemminger287d19c2008-12-18 09:17:16 -0800242 int ret;
243 loff_t end = pos + count;
244 u8 *buf = arg;
Ben Hutchings94e61082008-03-05 16:52:39 +0000245
Stephen Hemminger287d19c2008-12-18 09:17:16 -0800246 if (pos < 0 || pos > vpd->base.len || end > vpd->base.len)
Ben Hutchings94e61082008-03-05 16:52:39 +0000247 return -EINVAL;
Ben Hutchings94e61082008-03-05 16:52:39 +0000248
Stephen Hemminger1120f8b2008-12-18 09:17:16 -0800249 if (mutex_lock_killable(&vpd->lock))
250 return -EINTR;
251
Ben Hutchings94e61082008-03-05 16:52:39 +0000252 ret = pci_vpd_pci22_wait(dev);
253 if (ret < 0)
254 goto out;
Stephen Hemminger1120f8b2008-12-18 09:17:16 -0800255
Stephen Hemminger287d19c2008-12-18 09:17:16 -0800256 while (pos < end) {
257 u32 val;
258 unsigned int i, skip;
259
260 ret = pci_user_write_config_word(dev, vpd->cap + PCI_VPD_ADDR,
261 pos & ~3);
262 if (ret < 0)
263 break;
264 vpd->busy = true;
265 vpd->flag = PCI_VPD_ADDR_F;
266 ret = pci_vpd_pci22_wait(dev);
267 if (ret < 0)
268 break;
269
270 ret = pci_user_read_config_dword(dev, vpd->cap + PCI_VPD_DATA, &val);
271 if (ret < 0)
272 break;
273
274 skip = pos & 3;
275 for (i = 0; i < sizeof(u32); i++) {
276 if (i >= skip) {
277 *buf++ = val;
278 if (++pos == end)
279 break;
280 }
281 val >>= 8;
282 }
283 }
Ben Hutchings94e61082008-03-05 16:52:39 +0000284out:
Stephen Hemminger1120f8b2008-12-18 09:17:16 -0800285 mutex_unlock(&vpd->lock);
Stephen Hemminger287d19c2008-12-18 09:17:16 -0800286 return ret ? ret : count;
Ben Hutchings94e61082008-03-05 16:52:39 +0000287}
288
Stephen Hemminger287d19c2008-12-18 09:17:16 -0800289static ssize_t pci_vpd_pci22_write(struct pci_dev *dev, loff_t pos, size_t count,
290 const void *arg)
Ben Hutchings94e61082008-03-05 16:52:39 +0000291{
292 struct pci_vpd_pci22 *vpd =
293 container_of(dev->vpd, struct pci_vpd_pci22, base);
Stephen Hemminger287d19c2008-12-18 09:17:16 -0800294 const u8 *buf = arg;
295 loff_t end = pos + count;
Stephen Hemminger1120f8b2008-12-18 09:17:16 -0800296 int ret = 0;
Ben Hutchings94e61082008-03-05 16:52:39 +0000297
Stephen Hemminger287d19c2008-12-18 09:17:16 -0800298 if (pos < 0 || (pos & 3) || (count & 3) || end > vpd->base.len)
Ben Hutchings94e61082008-03-05 16:52:39 +0000299 return -EINVAL;
300
Stephen Hemminger1120f8b2008-12-18 09:17:16 -0800301 if (mutex_lock_killable(&vpd->lock))
302 return -EINTR;
Stephen Hemminger287d19c2008-12-18 09:17:16 -0800303
Ben Hutchings94e61082008-03-05 16:52:39 +0000304 ret = pci_vpd_pci22_wait(dev);
305 if (ret < 0)
306 goto out;
Stephen Hemminger287d19c2008-12-18 09:17:16 -0800307
308 while (pos < end) {
309 u32 val;
310
311 val = *buf++;
312 val |= *buf++ << 8;
313 val |= *buf++ << 16;
314 val |= *buf++ << 24;
315
316 ret = pci_user_write_config_dword(dev, vpd->cap + PCI_VPD_DATA, val);
317 if (ret < 0)
318 break;
319 ret = pci_user_write_config_word(dev, vpd->cap + PCI_VPD_ADDR,
320 pos | PCI_VPD_ADDR_F);
321 if (ret < 0)
322 break;
323
324 vpd->busy = true;
325 vpd->flag = 0;
326 ret = pci_vpd_pci22_wait(dev);
Greg Thelend97ecd82011-04-17 08:22:21 -0700327 if (ret < 0)
328 break;
Stephen Hemminger287d19c2008-12-18 09:17:16 -0800329
330 pos += sizeof(u32);
331 }
Ben Hutchings94e61082008-03-05 16:52:39 +0000332out:
Stephen Hemminger1120f8b2008-12-18 09:17:16 -0800333 mutex_unlock(&vpd->lock);
Stephen Hemminger287d19c2008-12-18 09:17:16 -0800334 return ret ? ret : count;
Ben Hutchings94e61082008-03-05 16:52:39 +0000335}
336
Ben Hutchings94e61082008-03-05 16:52:39 +0000337static void pci_vpd_pci22_release(struct pci_dev *dev)
338{
339 kfree(container_of(dev->vpd, struct pci_vpd_pci22, base));
340}
341
Stephen Hemminger287d19c2008-12-18 09:17:16 -0800342static const struct pci_vpd_ops pci_vpd_pci22_ops = {
Ben Hutchings94e61082008-03-05 16:52:39 +0000343 .read = pci_vpd_pci22_read,
344 .write = pci_vpd_pci22_write,
Ben Hutchings94e61082008-03-05 16:52:39 +0000345 .release = pci_vpd_pci22_release,
346};
347
348int pci_vpd_pci22_init(struct pci_dev *dev)
349{
350 struct pci_vpd_pci22 *vpd;
351 u8 cap;
352
353 cap = pci_find_capability(dev, PCI_CAP_ID_VPD);
354 if (!cap)
355 return -ENODEV;
356 vpd = kzalloc(sizeof(*vpd), GFP_ATOMIC);
357 if (!vpd)
358 return -ENOMEM;
359
Benjamin Li99cb233d2008-07-02 10:59:04 -0700360 vpd->base.len = PCI_VPD_PCI22_SIZE;
Ben Hutchings94e61082008-03-05 16:52:39 +0000361 vpd->base.ops = &pci_vpd_pci22_ops;
Stephen Hemminger1120f8b2008-12-18 09:17:16 -0800362 mutex_init(&vpd->lock);
Ben Hutchings94e61082008-03-05 16:52:39 +0000363 vpd->cap = cap;
364 vpd->busy = false;
365 dev->vpd = &vpd->base;
366 return 0;
367}
368
Brian Kinge04b0ea2005-09-27 01:21:55 -0700369/**
Stephen Hemmingerdb567942008-12-18 09:17:16 -0800370 * pci_vpd_truncate - Set available Vital Product Data size
371 * @dev: pci device struct
372 * @size: available memory in bytes
373 *
374 * Adjust size of available VPD area.
375 */
376int pci_vpd_truncate(struct pci_dev *dev, size_t size)
377{
378 if (!dev->vpd)
379 return -EINVAL;
380
381 /* limited by the access method */
382 if (size > dev->vpd->len)
383 return -EINVAL;
384
385 dev->vpd->len = size;
Anton Vorontsovd407e322009-04-01 02:23:41 +0400386 if (dev->vpd->attr)
387 dev->vpd->attr->size = size;
Stephen Hemmingerdb567942008-12-18 09:17:16 -0800388
389 return 0;
390}
391EXPORT_SYMBOL(pci_vpd_truncate);
392
393/**
Brian Kinge04b0ea2005-09-27 01:21:55 -0700394 * pci_block_user_cfg_access - Block userspace PCI config reads/writes
395 * @dev: pci device struct
396 *
Matthew Wilcox7ea7e982006-10-19 09:41:28 -0600397 * When user access is blocked, any reads or writes to config space will
398 * sleep until access is unblocked again. We don't allow nesting of
399 * block/unblock calls.
400 */
Brian Kinge04b0ea2005-09-27 01:21:55 -0700401void pci_block_user_cfg_access(struct pci_dev *dev)
402{
403 unsigned long flags;
Matthew Wilcox7ea7e982006-10-19 09:41:28 -0600404 int was_blocked;
Brian Kinge04b0ea2005-09-27 01:21:55 -0700405
Thomas Gleixner511dd982010-02-17 14:35:19 +0000406 raw_spin_lock_irqsave(&pci_lock, flags);
Matthew Wilcox7ea7e982006-10-19 09:41:28 -0600407 was_blocked = dev->block_ucfg_access;
Brian Kinge04b0ea2005-09-27 01:21:55 -0700408 dev->block_ucfg_access = 1;
Thomas Gleixner511dd982010-02-17 14:35:19 +0000409 raw_spin_unlock_irqrestore(&pci_lock, flags);
Matthew Wilcox7ea7e982006-10-19 09:41:28 -0600410
411 /* If we BUG() inside the pci_lock, we're guaranteed to hose
412 * the machine */
413 BUG_ON(was_blocked);
Brian Kinge04b0ea2005-09-27 01:21:55 -0700414}
415EXPORT_SYMBOL_GPL(pci_block_user_cfg_access);
416
417/**
418 * pci_unblock_user_cfg_access - Unblock userspace PCI config reads/writes
419 * @dev: pci device struct
420 *
421 * This function allows userspace PCI config accesses to resume.
Matthew Wilcox7ea7e982006-10-19 09:41:28 -0600422 */
Brian Kinge04b0ea2005-09-27 01:21:55 -0700423void pci_unblock_user_cfg_access(struct pci_dev *dev)
424{
425 unsigned long flags;
426
Thomas Gleixner511dd982010-02-17 14:35:19 +0000427 raw_spin_lock_irqsave(&pci_lock, flags);
Matthew Wilcox7ea7e982006-10-19 09:41:28 -0600428
429 /* This indicates a problem in the caller, but we don't need
430 * to kill them, unlike a double-block above. */
431 WARN_ON(!dev->block_ucfg_access);
432
Brian Kinge04b0ea2005-09-27 01:21:55 -0700433 dev->block_ucfg_access = 0;
Matthew Wilcox7ea7e982006-10-19 09:41:28 -0600434 wake_up_all(&pci_ucfg_wait);
Thomas Gleixner511dd982010-02-17 14:35:19 +0000435 raw_spin_unlock_irqrestore(&pci_lock, flags);
Brian Kinge04b0ea2005-09-27 01:21:55 -0700436}
437EXPORT_SYMBOL_GPL(pci_unblock_user_cfg_access);