Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 1 | # |
| 2 | # DMA engine configuration |
| 3 | # |
| 4 | |
Shannon Nelson | 2ed6dc3 | 2007-10-16 01:27:42 -0700 | [diff] [blame] | 5 | menuconfig DMADEVICES |
Haavard Skinnemoen | 6d4f587 | 2007-11-28 16:21:43 -0800 | [diff] [blame] | 6 | bool "DMA Engine support" |
Dan Williams | 04ce9ab | 2009-06-03 14:22:28 -0700 | [diff] [blame] | 7 | depends on HAS_DMA |
Shannon Nelson | 2ed6dc3 | 2007-10-16 01:27:42 -0700 | [diff] [blame] | 8 | help |
Haavard Skinnemoen | 6d4f587 | 2007-11-28 16:21:43 -0800 | [diff] [blame] | 9 | DMA engines can do asynchronous data transfers without |
| 10 | involving the host CPU. Currently, this framework can be |
| 11 | used to offload memory copies in the network stack and |
Dan Williams | 9c402f4 | 2008-06-27 01:21:11 -0700 | [diff] [blame] | 12 | RAID operations in the MD driver. This menu only presents |
| 13 | DMA Device drivers supported by the configured arch, it may |
| 14 | be empty in some cases. |
Chris Leech | c13c826 | 2006-05-23 17:18:44 -0700 | [diff] [blame] | 15 | |
Linus Walleij | 6c664a8 | 2010-02-09 22:34:54 +0100 | [diff] [blame] | 16 | config DMADEVICES_DEBUG |
| 17 | bool "DMA Engine debugging" |
| 18 | depends on DMADEVICES != n |
| 19 | help |
| 20 | This is an option for use by developers; most people should |
| 21 | say N here. This enables DMA engine core and driver debugging. |
| 22 | |
| 23 | config DMADEVICES_VDEBUG |
| 24 | bool "DMA Engine verbose debugging" |
| 25 | depends on DMADEVICES_DEBUG != n |
| 26 | help |
| 27 | This is an option for use by developers; most people should |
| 28 | say N here. This enables deeper (more verbose) debugging of |
| 29 | the DMA engine core and drivers. |
| 30 | |
| 31 | |
Shannon Nelson | 2ed6dc3 | 2007-10-16 01:27:42 -0700 | [diff] [blame] | 32 | if DMADEVICES |
Chris Leech | db21733 | 2006-06-17 21:24:58 -0700 | [diff] [blame] | 33 | |
Chris Leech | 0bbd5f4 | 2006-05-23 17:35:34 -0700 | [diff] [blame] | 34 | comment "DMA Devices" |
| 35 | |
Vinod Koul | 3c21619 | 2015-08-24 13:43:14 +0530 | [diff] [blame] | 36 | #core |
Dan Williams | 5fc6d89 | 2010-10-07 16:44:50 -0700 | [diff] [blame] | 37 | config ASYNC_TX_ENABLE_CHANNEL_SWITCH |
Dan Williams | 138f4c3 | 2009-09-08 17:42:51 -0700 | [diff] [blame] | 38 | bool |
| 39 | |
Vinod Koul | 3c21619 | 2015-08-24 13:43:14 +0530 | [diff] [blame] | 40 | config ARCH_HAS_ASYNC_TX_FIND_CHANNEL |
| 41 | bool |
| 42 | |
| 43 | config DMA_ENGINE |
| 44 | bool |
| 45 | |
| 46 | config DMA_VIRTUAL_CHANNELS |
| 47 | tristate |
| 48 | |
| 49 | config DMA_ACPI |
| 50 | def_bool y |
| 51 | depends on ACPI |
| 52 | |
| 53 | config DMA_OF |
| 54 | def_bool y |
| 55 | depends on OF |
| 56 | select DMA_ENGINE |
| 57 | |
| 58 | #devices |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 59 | config AMBA_PL08X |
| 60 | bool "ARM PrimeCell PL080 or PL081 support" |
Kees Cook | c6a0aec | 2012-10-23 13:01:54 -0700 | [diff] [blame] | 61 | depends on ARM_AMBA |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 62 | select DMA_ENGINE |
Russell King | 083be28 | 2012-05-26 14:09:53 +0100 | [diff] [blame] | 63 | select DMA_VIRTUAL_CHANNELS |
Linus Walleij | e8689e6 | 2010-09-28 15:57:37 +0200 | [diff] [blame] | 64 | help |
| 65 | Platform has a PL08x DMAC device |
| 66 | which can provide DMA engine support |
| 67 | |
Vinod Koul | 3c21619 | 2015-08-24 13:43:14 +0530 | [diff] [blame] | 68 | config AMCC_PPC440SPE_ADMA |
| 69 | tristate "AMCC PPC440SPe ADMA support" |
| 70 | depends on 440SPe || 440SP |
| 71 | select DMA_ENGINE |
| 72 | select DMA_ENGINE_RAID |
| 73 | select ARCH_HAS_ASYNC_TX_FIND_CHANNEL |
| 74 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH |
Joachim Eastwood | e5f4ae8 | 2015-07-11 14:12:06 +0200 | [diff] [blame] | 75 | help |
Vinod Koul | 3c21619 | 2015-08-24 13:43:14 +0530 | [diff] [blame] | 76 | Enable support for the AMCC PPC440SPe RAID engines. |
| 77 | |
| 78 | config AT_HDMAC |
| 79 | tristate "Atmel AHB DMA support" |
| 80 | depends on ARCH_AT91 |
| 81 | select DMA_ENGINE |
| 82 | help |
| 83 | Support the Atmel AHB DMA controller. |
| 84 | |
| 85 | config AT_XDMAC |
| 86 | tristate "Atmel XDMA support" |
| 87 | depends on ARCH_AT91 |
| 88 | select DMA_ENGINE |
| 89 | help |
| 90 | Support the Atmel XDMA controller. |
| 91 | |
| 92 | config AXI_DMAC |
| 93 | tristate "Analog Devices AXI-DMAC DMA support" |
| 94 | depends on MICROBLAZE || NIOS2 || ARCH_ZYNQ || ARCH_SOCFPGA || COMPILE_TEST |
| 95 | select DMA_ENGINE |
| 96 | select DMA_VIRTUAL_CHANNELS |
| 97 | help |
| 98 | Enable support for the Analog Devices AXI-DMAC peripheral. This DMA |
| 99 | controller is often used in Analog Device's reference designs for FPGA |
| 100 | platforms. |
| 101 | |
| 102 | config COH901318 |
| 103 | bool "ST-Ericsson COH901318 DMA support" |
| 104 | select DMA_ENGINE |
Vinod Koul | 6e45037 | 2016-09-02 15:29:49 +0530 | [diff] [blame] | 105 | depends on ARCH_U300 || COMPILE_TEST |
Vinod Koul | 3c21619 | 2015-08-24 13:43:14 +0530 | [diff] [blame] | 106 | help |
| 107 | Enable support for ST-Ericsson COH 901 318 DMA. |
| 108 | |
| 109 | config DMA_BCM2835 |
| 110 | tristate "BCM2835 DMA engine support" |
| 111 | depends on ARCH_BCM2835 |
| 112 | select DMA_ENGINE |
| 113 | select DMA_VIRTUAL_CHANNELS |
| 114 | |
| 115 | config DMA_JZ4740 |
| 116 | tristate "JZ4740 DMA support" |
Vinod Koul | d78d6c0 | 2016-09-02 15:25:11 +0530 | [diff] [blame] | 117 | depends on MACH_JZ4740 || COMPILE_TEST |
Vinod Koul | 3c21619 | 2015-08-24 13:43:14 +0530 | [diff] [blame] | 118 | select DMA_ENGINE |
| 119 | select DMA_VIRTUAL_CHANNELS |
| 120 | |
| 121 | config DMA_JZ4780 |
| 122 | tristate "JZ4780 DMA support" |
Vinod Koul | a952b28 | 2016-09-02 15:27:20 +0530 | [diff] [blame] | 123 | depends on MACH_JZ4780 || COMPILE_TEST |
Vinod Koul | 3c21619 | 2015-08-24 13:43:14 +0530 | [diff] [blame] | 124 | select DMA_ENGINE |
| 125 | select DMA_VIRTUAL_CHANNELS |
| 126 | help |
| 127 | This selects support for the DMA controller in Ingenic JZ4780 SoCs. |
| 128 | If you have a board based on such a SoC and wish to use DMA for |
| 129 | devices which can use the DMA controller, say Y or M here. |
| 130 | |
| 131 | config DMA_OMAP |
| 132 | tristate "OMAP DMA support" |
Peter Ujfalusi | 54ff7a2 | 2016-09-21 15:41:34 +0300 | [diff] [blame] | 133 | depends on ARCH_OMAP || COMPILE_TEST |
Vinod Koul | 3c21619 | 2015-08-24 13:43:14 +0530 | [diff] [blame] | 134 | select DMA_ENGINE |
| 135 | select DMA_VIRTUAL_CHANNELS |
Peter Ujfalusi | 509cf0b | 2016-09-21 15:41:35 +0300 | [diff] [blame] | 136 | select TI_DMA_CROSSBAR if (SOC_DRA7XX || COMPILE_TEST) |
Vinod Koul | 3c21619 | 2015-08-24 13:43:14 +0530 | [diff] [blame] | 137 | |
| 138 | config DMA_SA11X0 |
| 139 | tristate "SA-11x0 DMA support" |
Vinod Koul | 6947c3f | 2016-09-02 15:31:42 +0530 | [diff] [blame] | 140 | depends on ARCH_SA1100 || COMPILE_TEST |
Vinod Koul | 3c21619 | 2015-08-24 13:43:14 +0530 | [diff] [blame] | 141 | select DMA_ENGINE |
| 142 | select DMA_VIRTUAL_CHANNELS |
| 143 | help |
| 144 | Support the DMA engine found on Intel StrongARM SA-1100 and |
| 145 | SA-1110 SoCs. This DMA engine can only be used with on-chip |
| 146 | devices. |
| 147 | |
| 148 | config DMA_SUN4I |
| 149 | tristate "Allwinner A10 DMA SoCs support" |
Linus Torvalds | 3527122 | 2015-09-04 11:10:18 -0700 | [diff] [blame] | 150 | depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I |
Vinod Koul | 3c21619 | 2015-08-24 13:43:14 +0530 | [diff] [blame] | 151 | default (MACH_SUN4I || MACH_SUN5I || MACH_SUN7I) |
| 152 | select DMA_ENGINE |
Vinod Koul | 3c21619 | 2015-08-24 13:43:14 +0530 | [diff] [blame] | 153 | select DMA_VIRTUAL_CHANNELS |
| 154 | help |
| 155 | Enable support for the DMA controller present in the sun4i, |
| 156 | sun5i and sun7i Allwinner ARM SoCs. |
| 157 | |
| 158 | config DMA_SUN6I |
| 159 | tristate "Allwinner A31 SoCs DMA support" |
| 160 | depends on MACH_SUN6I || MACH_SUN8I || COMPILE_TEST |
| 161 | depends on RESET_CONTROLLER |
| 162 | select DMA_ENGINE |
| 163 | select DMA_VIRTUAL_CHANNELS |
| 164 | help |
| 165 | Support for the DMA engine first found in Allwinner A31 SoCs. |
| 166 | |
| 167 | config EP93XX_DMA |
| 168 | bool "Cirrus Logic EP93xx DMA support" |
Vinod Koul | 49ad6d7 | 2016-09-02 15:38:43 +0530 | [diff] [blame] | 169 | depends on ARCH_EP93XX || COMPILE_TEST |
Vinod Koul | 3c21619 | 2015-08-24 13:43:14 +0530 | [diff] [blame] | 170 | select DMA_ENGINE |
| 171 | help |
| 172 | Enable support for the Cirrus Logic EP93xx M2P/M2M DMA controller. |
| 173 | |
| 174 | config FSL_DMA |
| 175 | tristate "Freescale Elo series DMA support" |
| 176 | depends on FSL_SOC |
| 177 | select DMA_ENGINE |
| 178 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH |
| 179 | ---help--- |
| 180 | Enable support for the Freescale Elo series DMA controllers. |
| 181 | The Elo is the DMA controller on some mpc82xx and mpc83xx parts, the |
| 182 | EloPlus is on mpc85xx and mpc86xx and Pxxx parts, and the Elo3 is on |
| 183 | some Txxx and Bxxx parts. |
| 184 | |
| 185 | config FSL_EDMA |
| 186 | tristate "Freescale eDMA engine support" |
| 187 | depends on OF |
| 188 | select DMA_ENGINE |
| 189 | select DMA_VIRTUAL_CHANNELS |
| 190 | help |
| 191 | Support the Freescale eDMA engine with programmable channel |
| 192 | multiplexing capability for DMA request sources(slot). |
| 193 | This module can be found on Freescale Vybrid and LS-1 SoCs. |
| 194 | |
| 195 | config FSL_RAID |
| 196 | tristate "Freescale RAID engine Support" |
| 197 | depends on FSL_SOC && !ASYNC_TX_ENABLE_CHANNEL_SWITCH |
| 198 | select DMA_ENGINE |
| 199 | select DMA_ENGINE_RAID |
| 200 | ---help--- |
| 201 | Enable support for Freescale RAID Engine. RAID Engine is |
| 202 | available on some QorIQ SoCs (like P5020/P5040). It has |
| 203 | the capability to offload memcpy, xor and pq computation |
| 204 | for raid5/6. |
| 205 | |
| 206 | config IMG_MDC_DMA |
| 207 | tristate "IMG MDC support" |
| 208 | depends on MIPS || COMPILE_TEST |
| 209 | depends on MFD_SYSCON |
| 210 | select DMA_ENGINE |
| 211 | select DMA_VIRTUAL_CHANNELS |
| 212 | help |
| 213 | Enable support for the IMG multi-threaded DMA controller (MDC). |
| 214 | |
| 215 | config IMX_DMA |
| 216 | tristate "i.MX DMA support" |
| 217 | depends on ARCH_MXC |
| 218 | select DMA_ENGINE |
| 219 | help |
| 220 | Support the i.MX DMA engine. This engine is integrated into |
| 221 | Freescale i.MX1/21/27 chips. |
| 222 | |
| 223 | config IMX_SDMA |
| 224 | tristate "i.MX SDMA support" |
| 225 | depends on ARCH_MXC |
| 226 | select DMA_ENGINE |
| 227 | help |
| 228 | Support the i.MX SDMA engine. This engine is integrated into |
| 229 | Freescale i.MX25/31/35/51/53/6 chips. |
Joachim Eastwood | e5f4ae8 | 2015-07-11 14:12:06 +0200 | [diff] [blame] | 230 | |
Vinod Koul | 9ab8b4e | 2015-09-21 22:18:45 +0530 | [diff] [blame] | 231 | config INTEL_IDMA64 |
Linus Torvalds | 3527122 | 2015-09-04 11:10:18 -0700 | [diff] [blame] | 232 | tristate "Intel integrated DMA 64-bit support" |
| 233 | select DMA_ENGINE |
| 234 | select DMA_VIRTUAL_CHANNELS |
| 235 | help |
| 236 | Enable DMA support for Intel Low Power Subsystem such as found on |
| 237 | Intel Skylake PCH. |
| 238 | |
Chris Leech | 0bbd5f4 | 2006-05-23 17:35:34 -0700 | [diff] [blame] | 239 | config INTEL_IOATDMA |
| 240 | tristate "Intel I/OAT DMA support" |
Dave Jiang | aaecdeb | 2015-08-20 08:44:09 -0700 | [diff] [blame] | 241 | depends on PCI && X86_64 |
Shannon Nelson | 2ed6dc3 | 2007-10-16 01:27:42 -0700 | [diff] [blame] | 242 | select DMA_ENGINE |
Dan Williams | 3cc377b | 2013-12-09 10:33:16 -0800 | [diff] [blame] | 243 | select DMA_ENGINE_RAID |
Shannon Nelson | 2ed6dc3 | 2007-10-16 01:27:42 -0700 | [diff] [blame] | 244 | select DCA |
| 245 | help |
| 246 | Enable support for the Intel(R) I/OAT DMA engine present |
| 247 | in recent Intel Xeon chipsets. |
| 248 | |
| 249 | Say Y here if you have such a chipset. |
| 250 | |
| 251 | If unsure, say N. |
Dan Williams | c211092 | 2007-01-02 13:52:26 -0700 | [diff] [blame] | 252 | |
| 253 | config INTEL_IOP_ADMA |
Shannon Nelson | 2ed6dc3 | 2007-10-16 01:27:42 -0700 | [diff] [blame] | 254 | tristate "Intel IOP ADMA support" |
| 255 | depends on ARCH_IOP32X || ARCH_IOP33X || ARCH_IOP13XX |
Shannon Nelson | 2ed6dc3 | 2007-10-16 01:27:42 -0700 | [diff] [blame] | 256 | select DMA_ENGINE |
Dan Williams | 5fc6d89 | 2010-10-07 16:44:50 -0700 | [diff] [blame] | 257 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH |
Shannon Nelson | 2ed6dc3 | 2007-10-16 01:27:42 -0700 | [diff] [blame] | 258 | help |
| 259 | Enable support for the Intel(R) IOP Series RAID engines. |
Dan Williams | c211092 | 2007-01-02 13:52:26 -0700 | [diff] [blame] | 260 | |
Vinod Koul | 3c21619 | 2015-08-24 13:43:14 +0530 | [diff] [blame] | 261 | config INTEL_MIC_X100_DMA |
| 262 | tristate "Intel MIC X100 DMA Driver" |
| 263 | depends on 64BIT && X86 && INTEL_MIC_BUS |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 264 | select DMA_ENGINE |
| 265 | help |
Vinod Koul | 3c21619 | 2015-08-24 13:43:14 +0530 | [diff] [blame] | 266 | This enables DMA support for the Intel Many Integrated Core |
| 267 | (MIC) family of PCIe form factor coprocessor X100 devices that |
| 268 | run a 64 bit Linux OS. This driver will be used by both MIC |
| 269 | host and card drivers. |
Nicolas Ferre | dc78baa | 2009-07-03 19:24:33 +0200 | [diff] [blame] | 270 | |
Vinod Koul | 3c21619 | 2015-08-24 13:43:14 +0530 | [diff] [blame] | 271 | If you are building host kernel with a MIC device or a card |
| 272 | kernel for a MIC device, then say M (recommended) or Y, else |
| 273 | say N. If unsure say N. |
| 274 | |
| 275 | More information about the Intel MIC family as well as the Linux |
| 276 | OS and tools for MIC to use with this driver are available from |
| 277 | <http://software.intel.com/en-us/mic-developer>. |
| 278 | |
| 279 | config K3_DMA |
| 280 | tristate "Hisilicon K3 DMA support" |
John Stultz | e39a232 | 2016-08-29 10:30:53 -0700 | [diff] [blame] | 281 | depends on ARCH_HI3xxx || ARCH_HISI || COMPILE_TEST |
Andy Shevchenko | 667dfed | 2015-07-27 18:04:02 +0300 | [diff] [blame] | 282 | select DMA_ENGINE |
| 283 | select DMA_VIRTUAL_CHANNELS |
| 284 | help |
Vinod Koul | 3c21619 | 2015-08-24 13:43:14 +0530 | [diff] [blame] | 285 | Support the DMA engine for Hisilicon K3 platform |
| 286 | devices. |
Andy Shevchenko | 667dfed | 2015-07-27 18:04:02 +0300 | [diff] [blame] | 287 | |
Vinod Koul | 3c21619 | 2015-08-24 13:43:14 +0530 | [diff] [blame] | 288 | config LPC18XX_DMAMUX |
| 289 | bool "NXP LPC18xx/43xx DMA MUX for PL080" |
| 290 | depends on ARCH_LPC18XX || COMPILE_TEST |
| 291 | depends on OF && AMBA_PL08X |
| 292 | select MFD_SYSCON |
| 293 | help |
| 294 | Enable support for DMA on NXP LPC18xx/43xx platforms |
| 295 | with PL080 and multiplexed DMA request lines. |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 296 | |
Vinod Koul | 3c21619 | 2015-08-24 13:43:14 +0530 | [diff] [blame] | 297 | config MMP_PDMA |
| 298 | bool "MMP PDMA support" |
Vinod Koul | cd3a792 | 2016-09-02 15:55:56 +0530 | [diff] [blame] | 299 | depends on ARCH_MMP || ARCH_PXA || COMPILE_TEST |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 300 | select DMA_ENGINE |
| 301 | help |
Vinod Koul | 3c21619 | 2015-08-24 13:43:14 +0530 | [diff] [blame] | 302 | Support the MMP PDMA engine for PXA and MMP platform. |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 303 | |
Vinod Koul | 3c21619 | 2015-08-24 13:43:14 +0530 | [diff] [blame] | 304 | config MMP_TDMA |
| 305 | bool "MMP Two-Channel DMA support" |
Vinod Koul | 93d05f1 | 2016-09-02 15:57:09 +0530 | [diff] [blame] | 306 | depends on ARCH_MMP || COMPILE_TEST |
Ludovic Desroches | e1f7c9e | 2014-10-22 17:22:18 +0200 | [diff] [blame] | 307 | select DMA_ENGINE |
Vinod Koul | 93d05f1 | 2016-09-02 15:57:09 +0530 | [diff] [blame] | 308 | select MMP_SRAM if ARCH_MMP |
Jérémy Lefaure | d661976 | 2016-10-06 17:59:53 -0400 | [diff] [blame] | 309 | select GENERIC_ALLOCATOR |
Ludovic Desroches | e1f7c9e | 2014-10-22 17:22:18 +0200 | [diff] [blame] | 310 | help |
Vinod Koul | 3c21619 | 2015-08-24 13:43:14 +0530 | [diff] [blame] | 311 | Support the MMP Two-Channel DMA engine. |
| 312 | This engine used for MMP Audio DMA and pxa910 SQU. |
| 313 | It needs sram driver under mach-mmp. |
Ludovic Desroches | e1f7c9e | 2014-10-22 17:22:18 +0200 | [diff] [blame] | 314 | |
Vinod Koul | 3c21619 | 2015-08-24 13:43:14 +0530 | [diff] [blame] | 315 | config MOXART_DMA |
| 316 | tristate "MOXART DMA support" |
| 317 | depends on ARCH_MOXART |
Zhang Wei | 173acc7 | 2008-03-01 07:42:48 -0700 | [diff] [blame] | 318 | select DMA_ENGINE |
Vinod Koul | 3c21619 | 2015-08-24 13:43:14 +0530 | [diff] [blame] | 319 | select DMA_VIRTUAL_CHANNELS |
| 320 | help |
| 321 | Enable support for the MOXA ART SoC DMA controller. |
| 322 | |
| 323 | Say Y here if you enabled MMP ADMA, otherwise say N. |
Andy Shevchenko | 2b49e0c | 2015-02-23 16:24:42 +0200 | [diff] [blame] | 324 | |
Piotr Ziecik | 0fb6f73 | 2010-02-05 03:42:52 +0000 | [diff] [blame] | 325 | config MPC512X_DMA |
| 326 | tristate "Freescale MPC512x built-in DMA engine support" |
Ilya Yanok | ba2eea2 | 2010-10-27 01:52:57 +0200 | [diff] [blame] | 327 | depends on PPC_MPC512x || PPC_MPC831x |
Piotr Ziecik | 0fb6f73 | 2010-02-05 03:42:52 +0000 | [diff] [blame] | 328 | select DMA_ENGINE |
| 329 | ---help--- |
| 330 | Enable support for the Freescale MPC512x built-in DMA engine. |
| 331 | |
Saeed Bishara | ff7b047 | 2008-07-08 11:58:36 -0700 | [diff] [blame] | 332 | config MV_XOR |
| 333 | bool "Marvell XOR engine support" |
Gregory CLEMENT | c39290a | 2016-04-29 09:49:08 +0200 | [diff] [blame] | 334 | depends on PLAT_ORION || ARCH_MVEBU || COMPILE_TEST |
Saeed Bishara | ff7b047 | 2008-07-08 11:58:36 -0700 | [diff] [blame] | 335 | select DMA_ENGINE |
Dan Williams | 3cc377b | 2013-12-09 10:33:16 -0800 | [diff] [blame] | 336 | select DMA_ENGINE_RAID |
Dan Williams | 5fc6d89 | 2010-10-07 16:44:50 -0700 | [diff] [blame] | 337 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH |
Saeed Bishara | ff7b047 | 2008-07-08 11:58:36 -0700 | [diff] [blame] | 338 | ---help--- |
| 339 | Enable support for the Marvell XOR engine. |
| 340 | |
Thomas Petazzoni | 19a340b | 2016-06-16 14:28:34 +0200 | [diff] [blame] | 341 | config MV_XOR_V2 |
| 342 | bool "Marvell XOR engine version 2 support " |
| 343 | depends on ARM64 |
| 344 | select DMA_ENGINE |
| 345 | select DMA_ENGINE_RAID |
| 346 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH |
| 347 | select GENERIC_MSI_IRQ_DOMAIN |
| 348 | ---help--- |
| 349 | Enable support for the Marvell version 2 XOR engine. |
| 350 | |
| 351 | This engine provides acceleration for copy, XOR and RAID6 |
| 352 | operations, and is available on Marvell Armada 7K and 8K |
| 353 | platforms. |
| 354 | |
Vinod Koul | 3c21619 | 2015-08-24 13:43:14 +0530 | [diff] [blame] | 355 | config MXS_DMA |
| 356 | bool "MXS DMA support" |
Lothar Waßmann | a02eb37a | 2016-02-11 14:19:54 +0100 | [diff] [blame] | 357 | depends on SOC_IMX23 || SOC_IMX28 || SOC_IMX6Q || SOC_IMX6UL |
Vinod Koul | 3c21619 | 2015-08-24 13:43:14 +0530 | [diff] [blame] | 358 | select STMP_DEVICE |
| 359 | select DMA_ENGINE |
| 360 | help |
| 361 | Support the MXS DMA engine. This engine including APBH-DMA |
Lothar Waßmann | a02eb37a | 2016-02-11 14:19:54 +0100 | [diff] [blame] | 362 | and APBX-DMA is integrated into Freescale |
| 363 | i.MX23/28/MX6Q/MX6DL/MX6UL chips. |
Vinod Koul | 3c21619 | 2015-08-24 13:43:14 +0530 | [diff] [blame] | 364 | |
Guennadi Liakhovetski | 5296b56 | 2009-01-19 15:36:21 -0700 | [diff] [blame] | 365 | config MX3_IPU |
| 366 | bool "MX3x Image Processing Unit support" |
Sascha Hauer | 8e2d41f | 2011-08-24 08:41:09 +0200 | [diff] [blame] | 367 | depends on ARCH_MXC |
Guennadi Liakhovetski | 5296b56 | 2009-01-19 15:36:21 -0700 | [diff] [blame] | 368 | select DMA_ENGINE |
| 369 | default y |
| 370 | help |
| 371 | If you plan to use the Image Processing unit in the i.MX3x, say |
| 372 | Y here. If unsure, select Y. |
| 373 | |
| 374 | config MX3_IPU_IRQS |
| 375 | int "Number of dynamically mapped interrupts for IPU" |
| 376 | depends on MX3_IPU |
| 377 | range 2 137 |
| 378 | default 4 |
| 379 | help |
| 380 | Out of 137 interrupt sources on i.MX31 IPU only very few are used. |
| 381 | To avoid bloating the irq_desc[] array we allocate a sufficient |
| 382 | number of IRQ slots and map them dynamically to specific sources. |
| 383 | |
Vinod Koul | 3c21619 | 2015-08-24 13:43:14 +0530 | [diff] [blame] | 384 | config NBPFAXI_DMA |
| 385 | tristate "Renesas Type-AXI NBPF DMA support" |
| 386 | select DMA_ENGINE |
| 387 | depends on ARM || COMPILE_TEST |
| 388 | help |
| 389 | Support for "Type-AXI" NBPF DMA IPs from Renesas |
| 390 | |
| 391 | config PCH_DMA |
| 392 | tristate "Intel EG20T PCH / LAPIS Semicon IOH(ML7213/ML7223/ML7831) DMA" |
| 393 | depends on PCI && (X86_32 || COMPILE_TEST) |
| 394 | select DMA_ENGINE |
| 395 | help |
| 396 | Enable support for Intel EG20T PCH DMA engine. |
| 397 | |
| 398 | This driver also can be used for LAPIS Semiconductor IOH(Input/ |
| 399 | Output Hub), ML7213, ML7223 and ML7831. |
| 400 | ML7213 IOH is for IVI(In-Vehicle Infotainment) use, ML7223 IOH is |
| 401 | for MP(Media Phone) use and ML7831 IOH is for general purpose use. |
| 402 | ML7213/ML7223/ML7831 is companion chip for Intel Atom E6xx series. |
| 403 | ML7213/ML7223/ML7831 is completely compatible for Intel EG20T PCH. |
| 404 | |
| 405 | config PL330_DMA |
| 406 | tristate "DMA API Driver for PL330" |
| 407 | select DMA_ENGINE |
| 408 | depends on ARM_AMBA |
| 409 | help |
| 410 | Select if your platform has one or more PL330 DMACs. |
| 411 | You need to provide platform specific settings via |
| 412 | platform_data for a dma-pl330 device. |
| 413 | |
Robert Jarzmik | a57e16c | 2015-05-25 23:29:20 +0200 | [diff] [blame] | 414 | config PXA_DMA |
| 415 | bool "PXA DMA support" |
| 416 | depends on (ARCH_MMP || ARCH_PXA) |
| 417 | select DMA_ENGINE |
| 418 | select DMA_VIRTUAL_CHANNELS |
| 419 | help |
| 420 | Support the DMA engine for PXA. It is also compatible with MMP PDMA |
| 421 | platform. The internal DMA IP of all PXA variants is supported, with |
| 422 | 16 to 32 channels for peripheral to memory or memory to memory |
| 423 | transfers. |
| 424 | |
Shrey Vijay | 8322d81 | 2017-08-09 18:00:58 +0530 | [diff] [blame] | 425 | config QCOM_SPS_DMA |
| 426 | tristate "Qualcomm technologies inc DMA driver for sps-BAM" |
| 427 | depends on ARCH_QCOM |
| 428 | select DMA_ENGINE |
| 429 | help |
| 430 | Enable support for Qualcomm technologies inc, BAM DMA engine. |
| 431 | This DMA-engine-driver is a wrapper of the sps-BAM library. DMA |
| 432 | engine callbacks are implemented using the sps-BAM functionality |
| 433 | to access HW. |
| 434 | |
Vinod Koul | 3c21619 | 2015-08-24 13:43:14 +0530 | [diff] [blame] | 435 | config SIRF_DMA |
| 436 | tristate "CSR SiRFprimaII/SiRFmarco DMA support" |
| 437 | depends on ARCH_SIRF |
| 438 | select DMA_ENGINE |
| 439 | help |
| 440 | Enable support for the CSR SiRFprimaII DMA engine. |
| 441 | |
| 442 | config STE_DMA40 |
| 443 | bool "ST-Ericsson DMA40 support" |
| 444 | depends on ARCH_U8500 |
| 445 | select DMA_ENGINE |
| 446 | help |
| 447 | Support for ST-Ericsson DMA40 controller |
| 448 | |
M'boumba Cedric Madianga | d8b4683 | 2015-10-16 15:59:14 +0200 | [diff] [blame] | 449 | config STM32_DMA |
| 450 | bool "STMicroelectronics STM32 DMA support" |
Vinod Koul | 4fbf371 | 2016-09-02 15:57:51 +0530 | [diff] [blame] | 451 | depends on ARCH_STM32 || COMPILE_TEST |
M'boumba Cedric Madianga | d8b4683 | 2015-10-16 15:59:14 +0200 | [diff] [blame] | 452 | select DMA_ENGINE |
M'boumba Cedric Madianga | d8b4683 | 2015-10-16 15:59:14 +0200 | [diff] [blame] | 453 | select DMA_VIRTUAL_CHANNELS |
| 454 | help |
| 455 | Enable support for the on-chip DMA controller on STMicroelectronics |
| 456 | STM32 MCUs. |
| 457 | If you have a board based on such a MCU and wish to use DMA say Y or M |
| 458 | here. |
| 459 | |
Vinod Koul | 3c21619 | 2015-08-24 13:43:14 +0530 | [diff] [blame] | 460 | config S3C24XX_DMAC |
Arnd Bergmann | 9bdca82 | 2015-11-18 22:31:11 +0100 | [diff] [blame] | 461 | bool "Samsung S3C24XX DMA support" |
Vinod Koul | 1609db6 | 2016-09-02 16:00:41 +0530 | [diff] [blame] | 462 | depends on ARCH_S3C24XX || COMPILE_TEST |
Vinod Koul | 3c21619 | 2015-08-24 13:43:14 +0530 | [diff] [blame] | 463 | select DMA_ENGINE |
| 464 | select DMA_VIRTUAL_CHANNELS |
| 465 | help |
| 466 | Support for the Samsung S3C24XX DMA controller driver. The |
| 467 | DMA controller is having multiple DMA channels which can be |
| 468 | configured for different peripherals like audio, UART, SPI. |
| 469 | The DMA controller can transfer data from memory to peripheral, |
| 470 | periphal to memory, periphal to periphal and memory to memory. |
| 471 | |
Atsushi Nemoto | ea76f0b | 2009-04-23 00:40:30 +0900 | [diff] [blame] | 472 | config TXX9_DMAC |
| 473 | tristate "Toshiba TXx9 SoC DMA support" |
| 474 | depends on MACH_TX49XX || MACH_TX39XX |
| 475 | select DMA_ENGINE |
| 476 | help |
| 477 | Support the TXx9 SoC internal DMA controller. This can be |
| 478 | integrated in chips such as the Toshiba TX4927/38/39. |
| 479 | |
Laxman Dewangan | ec8a158 | 2012-06-06 10:55:27 +0530 | [diff] [blame] | 480 | config TEGRA20_APB_DMA |
| 481 | bool "NVIDIA Tegra20 APB DMA support" |
| 482 | depends on ARCH_TEGRA |
| 483 | select DMA_ENGINE |
| 484 | help |
| 485 | Support for the NVIDIA Tegra20 APB DMA controller driver. The |
| 486 | DMA controller is having multiple DMA channel which can be |
| 487 | configured for different peripherals like audio, UART, SPI, |
| 488 | I2C etc which is in APB bus. |
| 489 | This DMA controller transfers data from memory to peripheral fifo |
| 490 | or vice versa. It does not support memory to memory data transfer. |
| 491 | |
Jon Hunter | f46b195 | 2016-05-12 18:02:23 +0100 | [diff] [blame] | 492 | config TEGRA210_ADMA |
| 493 | bool "NVIDIA Tegra210 ADMA support" |
Vinod Koul | 4cd1694 | 2016-09-02 16:01:52 +0530 | [diff] [blame] | 494 | depends on (ARCH_TEGRA_210_SOC || COMPILE_TEST) && PM_CLK |
Jon Hunter | f46b195 | 2016-05-12 18:02:23 +0100 | [diff] [blame] | 495 | select DMA_ENGINE |
| 496 | select DMA_VIRTUAL_CHANNELS |
Jon Hunter | f46b195 | 2016-05-12 18:02:23 +0100 | [diff] [blame] | 497 | help |
| 498 | Support for the NVIDIA Tegra210 ADMA controller driver. The |
| 499 | DMA controller has multiple DMA channels and is used to service |
| 500 | various audio clients in the Tegra210 audio processing engine |
| 501 | (APE). This DMA controller transfers data from memory to |
| 502 | peripheral and vice versa. It does not support memory to |
| 503 | memory data transfer. |
| 504 | |
Richard Röjfors | de5d445 | 2010-03-25 19:44:21 +0100 | [diff] [blame] | 505 | config TIMB_DMA |
| 506 | tristate "Timberdale FPGA DMA support" |
Vinod Koul | 4aa258a | 2016-09-02 16:07:05 +0530 | [diff] [blame] | 507 | depends on MFD_TIMBERDALE || COMPILE_TEST |
Richard Röjfors | de5d445 | 2010-03-25 19:44:21 +0100 | [diff] [blame] | 508 | select DMA_ENGINE |
| 509 | help |
| 510 | Enable support for the Timberdale FPGA DMA engine. |
| 511 | |
Vinod Koul | 3c21619 | 2015-08-24 13:43:14 +0530 | [diff] [blame] | 512 | config TI_CPPI41 |
| 513 | tristate "AM33xx CPPI41 DMA support" |
| 514 | depends on ARCH_OMAP |
Rongjun Ying | ca21a14 | 2011-10-27 19:22:39 -0700 | [diff] [blame] | 515 | select DMA_ENGINE |
| 516 | help |
Vinod Koul | 3c21619 | 2015-08-24 13:43:14 +0530 | [diff] [blame] | 517 | The Communications Port Programming Interface (CPPI) 4.1 DMA engine |
| 518 | is currently used by the USB driver on AM335x platforms. |
| 519 | |
| 520 | config TI_DMA_CROSSBAR |
| 521 | bool |
Rongjun Ying | ca21a14 | 2011-10-27 19:22:39 -0700 | [diff] [blame] | 522 | |
Matt Porter | c2dde5f | 2012-08-22 21:09:34 -0400 | [diff] [blame] | 523 | config TI_EDMA |
Guenter Roeck | 7644804 | 2013-08-22 14:03:24 -0700 | [diff] [blame] | 524 | bool "TI EDMA support" |
Peter Ujfalusi | c5df357 | 2016-09-21 15:41:33 +0300 | [diff] [blame] | 525 | depends on ARCH_DAVINCI || ARCH_OMAP || ARCH_KEYSTONE || COMPILE_TEST |
Matt Porter | c2dde5f | 2012-08-22 21:09:34 -0400 | [diff] [blame] | 526 | select DMA_ENGINE |
| 527 | select DMA_VIRTUAL_CHANNELS |
Peter Ujfalusi | 509cf0b | 2016-09-21 15:41:35 +0300 | [diff] [blame] | 528 | select TI_DMA_CROSSBAR if (ARCH_OMAP || COMPILE_TEST) |
Matt Porter | c2dde5f | 2012-08-22 21:09:34 -0400 | [diff] [blame] | 529 | default n |
| 530 | help |
| 531 | Enable support for the TI EDMA controller. This DMA |
| 532 | engine is found on TI DaVinci and AM33xx parts. |
| 533 | |
Vinod Koul | 3c21619 | 2015-08-24 13:43:14 +0530 | [diff] [blame] | 534 | config XGENE_DMA |
| 535 | tristate "APM X-Gene DMA support" |
| 536 | depends on ARCH_XGENE || COMPILE_TEST |
Jassi Brar | b3040e4 | 2010-05-23 20:28:19 -0700 | [diff] [blame] | 537 | select DMA_ENGINE |
Vinod Koul | 3c21619 | 2015-08-24 13:43:14 +0530 | [diff] [blame] | 538 | select DMA_ENGINE_RAID |
| 539 | select ASYNC_TX_ENABLE_CHANNEL_SWITCH |
Jassi Brar | b3040e4 | 2010-05-23 20:28:19 -0700 | [diff] [blame] | 540 | help |
Vinod Koul | 3c21619 | 2015-08-24 13:43:14 +0530 | [diff] [blame] | 541 | Enable support for the APM X-Gene SoC DMA engine. |
Jonas Jensen | 5f9e685 | 2014-01-17 09:46:05 +0100 | [diff] [blame] | 542 | |
Kedareswara rao Appana | fde57a7 | 2016-06-24 10:51:25 +0530 | [diff] [blame] | 543 | config XILINX_DMA |
| 544 | tristate "Xilinx AXI DMAS Engine" |
Kedareswara rao Appana | b72db40 | 2016-04-06 10:38:08 +0530 | [diff] [blame] | 545 | depends on (ARCH_ZYNQ || MICROBLAZE || ARM64) |
Srikanth Thokala | 9cd4360 | 2014-04-23 20:23:26 +0530 | [diff] [blame] | 546 | select DMA_ENGINE |
| 547 | help |
| 548 | Enable support for Xilinx AXI VDMA Soft IP. |
| 549 | |
Kedareswara rao Appana | fde57a7 | 2016-06-24 10:51:25 +0530 | [diff] [blame] | 550 | AXI VDMA engine provides high-bandwidth direct memory access |
Srikanth Thokala | 9cd4360 | 2014-04-23 20:23:26 +0530 | [diff] [blame] | 551 | between memory and AXI4-Stream video type target |
| 552 | peripherals including peripherals which support AXI4- |
| 553 | Stream Video Protocol. It has two stream interfaces/ |
| 554 | channels, Memory Mapped to Stream (MM2S) and Stream to |
| 555 | Memory Mapped (S2MM) for the data transfers. |
Kedareswara rao Appana | fde57a7 | 2016-06-24 10:51:25 +0530 | [diff] [blame] | 556 | AXI CDMA engine provides high-bandwidth direct memory access |
| 557 | between a memory-mapped source address and a memory-mapped |
| 558 | destination address. |
| 559 | AXI DMA engine provides high-bandwidth one dimensional direct |
| 560 | memory access between memory and AXI4-Stream target peripherals. |
Srikanth Thokala | 9cd4360 | 2014-04-23 20:23:26 +0530 | [diff] [blame] | 561 | |
Kedareswara rao Appana | b0cc417 | 2016-07-01 17:07:06 +0530 | [diff] [blame] | 562 | config XILINX_ZYNQMP_DMA |
| 563 | tristate "Xilinx ZynqMP DMA Engine" |
| 564 | depends on (ARCH_ZYNQ || MICROBLAZE || ARM64) |
| 565 | select DMA_ENGINE |
| 566 | help |
| 567 | Enable support for Xilinx ZynqMP DMA controller. |
Vinod Koul | 5fa422c | 2013-02-12 09:15:02 -0800 | [diff] [blame] | 568 | |
Jun Nie | e3fa984 | 2015-05-05 22:06:08 +0800 | [diff] [blame] | 569 | config ZX_DMA |
| 570 | tristate "ZTE ZX296702 DMA support" |
Vinod Koul | 854d4bd | 2016-09-02 16:10:07 +0530 | [diff] [blame] | 571 | depends on ARCH_ZX || COMPILE_TEST |
Maxime Ripard | 5558593 | 2014-07-17 21:46:16 +0200 | [diff] [blame] | 572 | select DMA_ENGINE |
| 573 | select DMA_VIRTUAL_CHANNELS |
| 574 | help |
Jun Nie | e3fa984 | 2015-05-05 22:06:08 +0800 | [diff] [blame] | 575 | Support the DMA engine for ZTE ZX296702 platform devices. |
Maxime Ripard | 5558593 | 2014-07-17 21:46:16 +0200 | [diff] [blame] | 576 | |
Guennadi Liakhovetski | b45b262 | 2014-07-19 12:48:51 +0200 | [diff] [blame] | 577 | |
Vinod Koul | 3c21619 | 2015-08-24 13:43:14 +0530 | [diff] [blame] | 578 | # driver files |
| 579 | source "drivers/dma/bestcomm/Kconfig" |
Andrew Bresticker | 5689ba7 | 2014-12-11 14:59:17 -0800 | [diff] [blame] | 580 | |
Sinan Kaya | d9b31ef | 2016-02-04 23:34:32 -0500 | [diff] [blame] | 581 | source "drivers/dma/qcom/Kconfig" |
| 582 | |
Vinod Koul | 3c21619 | 2015-08-24 13:43:14 +0530 | [diff] [blame] | 583 | source "drivers/dma/dw/Kconfig" |
Rameshwar Prasad Sahu | 9f2fd0d | 2015-03-18 19:17:34 +0530 | [diff] [blame] | 584 | |
Vinod Koul | 3c21619 | 2015-08-24 13:43:14 +0530 | [diff] [blame] | 585 | source "drivers/dma/hsu/Kconfig" |
Shannon Nelson | 2ed6dc3 | 2007-10-16 01:27:42 -0700 | [diff] [blame] | 586 | |
Vinod Koul | 3c21619 | 2015-08-24 13:43:14 +0530 | [diff] [blame] | 587 | source "drivers/dma/sh/Kconfig" |
Russell King | 50437bf | 2012-04-13 12:07:23 +0100 | [diff] [blame] | 588 | |
Vinod Koul | 3c21619 | 2015-08-24 13:43:14 +0530 | [diff] [blame] | 589 | # clients |
Shannon Nelson | 2ed6dc3 | 2007-10-16 01:27:42 -0700 | [diff] [blame] | 590 | comment "DMA Clients" |
| 591 | depends on DMA_ENGINE |
| 592 | |
Dan Williams | 729b5d1 | 2009-03-25 09:13:25 -0700 | [diff] [blame] | 593 | config ASYNC_TX_DMA |
| 594 | bool "Async_tx: Offload support for the async_tx api" |
Dan Williams | 9a8de63 | 2009-09-08 15:06:10 -0700 | [diff] [blame] | 595 | depends on DMA_ENGINE |
Dan Williams | 729b5d1 | 2009-03-25 09:13:25 -0700 | [diff] [blame] | 596 | help |
| 597 | This allows the async_tx api to take advantage of offload engines for |
| 598 | memcpy, memset, xor, and raid6 p+q operations. If your platform has |
| 599 | a dma engine that can perform raid operations and you have enabled |
| 600 | MD_RAID456 say Y. |
| 601 | |
| 602 | If unsure, say N. |
| 603 | |
Haavard Skinnemoen | 4a776f0 | 2008-07-08 11:58:45 -0700 | [diff] [blame] | 604 | config DMATEST |
| 605 | tristate "DMA Test client" |
| 606 | depends on DMA_ENGINE |
| 607 | help |
| 608 | Simple DMA test client. Say N unless you're debugging a |
| 609 | DMA Device driver. |
| 610 | |
Dan Williams | 3cc377b | 2013-12-09 10:33:16 -0800 | [diff] [blame] | 611 | config DMA_ENGINE_RAID |
| 612 | bool |
| 613 | |
Shannon Nelson | 2ed6dc3 | 2007-10-16 01:27:42 -0700 | [diff] [blame] | 614 | endif |