blob: e92b5f0f8a5f613495119e65c134ca92de785e9c [file] [log] [blame]
Chris Leechc13c8262006-05-23 17:18:44 -07001#
2# DMA engine configuration
3#
4
Shannon Nelson2ed6dc32007-10-16 01:27:42 -07005menuconfig DMADEVICES
Haavard Skinnemoen6d4f5872007-11-28 16:21:43 -08006 bool "DMA Engine support"
Dan Williams04ce9ab2009-06-03 14:22:28 -07007 depends on HAS_DMA
Shannon Nelson2ed6dc32007-10-16 01:27:42 -07008 help
Haavard Skinnemoen6d4f5872007-11-28 16:21:43 -08009 DMA engines can do asynchronous data transfers without
10 involving the host CPU. Currently, this framework can be
11 used to offload memory copies in the network stack and
Dan Williams9c402f42008-06-27 01:21:11 -070012 RAID operations in the MD driver. This menu only presents
13 DMA Device drivers supported by the configured arch, it may
14 be empty in some cases.
Chris Leechc13c8262006-05-23 17:18:44 -070015
Linus Walleij6c664a82010-02-09 22:34:54 +010016config DMADEVICES_DEBUG
17 bool "DMA Engine debugging"
18 depends on DMADEVICES != n
19 help
20 This is an option for use by developers; most people should
21 say N here. This enables DMA engine core and driver debugging.
22
23config DMADEVICES_VDEBUG
24 bool "DMA Engine verbose debugging"
25 depends on DMADEVICES_DEBUG != n
26 help
27 This is an option for use by developers; most people should
28 say N here. This enables deeper (more verbose) debugging of
29 the DMA engine core and drivers.
30
31
Shannon Nelson2ed6dc32007-10-16 01:27:42 -070032if DMADEVICES
Chris Leechdb217332006-06-17 21:24:58 -070033
Chris Leech0bbd5f42006-05-23 17:35:34 -070034comment "DMA Devices"
35
Vinod Koulb3c567e2010-07-21 13:28:10 +053036config INTEL_MID_DMAC
37 tristate "Intel MID DMA support for Peripheral DMA controllers"
38 depends on PCI && X86
39 select DMA_ENGINE
40 default n
41 help
42 Enable support for the Intel(R) MID DMA engine present
43 in Intel MID chipsets.
44
45 Say Y here if you have such a chipset.
46
47 If unsure, say N.
48
Dan Williams5fc6d892010-10-07 16:44:50 -070049config ASYNC_TX_ENABLE_CHANNEL_SWITCH
Dan Williams138f4c32009-09-08 17:42:51 -070050 bool
51
Linus Walleije8689e62010-09-28 15:57:37 +020052config AMBA_PL08X
53 bool "ARM PrimeCell PL080 or PL081 support"
Kees Cookc6a0aec2012-10-23 13:01:54 -070054 depends on ARM_AMBA
Linus Walleije8689e62010-09-28 15:57:37 +020055 select DMA_ENGINE
Russell King083be282012-05-26 14:09:53 +010056 select DMA_VIRTUAL_CHANNELS
Linus Walleije8689e62010-09-28 15:57:37 +020057 help
58 Platform has a PL08x DMAC device
59 which can provide DMA engine support
60
Chris Leech0bbd5f42006-05-23 17:35:34 -070061config INTEL_IOATDMA
62 tristate "Intel I/OAT DMA support"
Shannon Nelson2ed6dc32007-10-16 01:27:42 -070063 depends on PCI && X86
64 select DMA_ENGINE
65 select DCA
Dan Williams7b3cc2b2009-11-19 17:10:37 -070066 select ASYNC_TX_DISABLE_PQ_VAL_DMA
67 select ASYNC_TX_DISABLE_XOR_VAL_DMA
Shannon Nelson2ed6dc32007-10-16 01:27:42 -070068 help
69 Enable support for the Intel(R) I/OAT DMA engine present
70 in recent Intel Xeon chipsets.
71
72 Say Y here if you have such a chipset.
73
74 If unsure, say N.
Dan Williamsc2110922007-01-02 13:52:26 -070075
76config INTEL_IOP_ADMA
Shannon Nelson2ed6dc32007-10-16 01:27:42 -070077 tristate "Intel IOP ADMA support"
78 depends on ARCH_IOP32X || ARCH_IOP33X || ARCH_IOP13XX
Shannon Nelson2ed6dc32007-10-16 01:27:42 -070079 select DMA_ENGINE
Dan Williams5fc6d892010-10-07 16:44:50 -070080 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
Shannon Nelson2ed6dc32007-10-16 01:27:42 -070081 help
82 Enable support for the Intel(R) IOP Series RAID engines.
Dan Williamsc2110922007-01-02 13:52:26 -070083
Haavard Skinnemoen3bfb1d22008-07-08 11:59:42 -070084config DW_DMAC
85 tristate "Synopsys DesignWare AHB DMA support"
Haavard Skinnemoen3bfb1d22008-07-08 11:59:42 -070086 select DMA_ENGINE
87 default y if CPU_AT32AP7000
88 help
89 Support the Synopsys DesignWare AHB DMA controller. This
90 can be integrated in chips such as the Atmel AT32ap7000.
91
Hein Tiboschd5ea7b52012-10-25 13:38:05 -070092config DW_DMAC_BIG_ENDIAN_IO
93 bool "Use big endian I/O register access"
94 default y if AVR32
95 depends on DW_DMAC
96 help
97 Say yes here to use big endian I/O access when reading and writing
98 to the DMA controller registers. This is needed on some platforms,
99 like the Atmel AVR32 architecture.
100
101 If unsure, use the default setting.
102
Nicolas Ferredc78baa2009-07-03 19:24:33 +0200103config AT_HDMAC
104 tristate "Atmel AHB DMA support"
Nicolas Ferref898fed2012-03-15 11:31:58 +0100105 depends on ARCH_AT91
Nicolas Ferredc78baa2009-07-03 19:24:33 +0200106 select DMA_ENGINE
107 help
Nicolas Ferref898fed2012-03-15 11:31:58 +0100108 Support the Atmel AHB DMA controller.
Nicolas Ferredc78baa2009-07-03 19:24:33 +0200109
Zhang Wei173acc72008-03-01 07:42:48 -0700110config FSL_DMA
Timur Tabi77cd62e2008-09-26 17:00:11 -0700111 tristate "Freescale Elo and Elo Plus DMA support"
112 depends on FSL_SOC
Zhang Wei173acc72008-03-01 07:42:48 -0700113 select DMA_ENGINE
Dan Williams5fc6d892010-10-07 16:44:50 -0700114 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
Zhang Wei173acc72008-03-01 07:42:48 -0700115 ---help---
Timur Tabi77cd62e2008-09-26 17:00:11 -0700116 Enable support for the Freescale Elo and Elo Plus DMA controllers.
117 The Elo is the DMA controller on some 82xx and 83xx parts, and the
118 Elo Plus is the DMA controller on 85xx and 86xx parts.
Zhang Wei173acc72008-03-01 07:42:48 -0700119
Piotr Ziecik0fb6f732010-02-05 03:42:52 +0000120config MPC512X_DMA
121 tristate "Freescale MPC512x built-in DMA engine support"
Ilya Yanokba2eea22010-10-27 01:52:57 +0200122 depends on PPC_MPC512x || PPC_MPC831x
Piotr Ziecik0fb6f732010-02-05 03:42:52 +0000123 select DMA_ENGINE
124 ---help---
125 Enable support for the Freescale MPC512x built-in DMA engine.
126
Saeed Bisharaff7b0472008-07-08 11:58:36 -0700127config MV_XOR
128 bool "Marvell XOR engine support"
129 depends on PLAT_ORION
Saeed Bisharaff7b0472008-07-08 11:58:36 -0700130 select DMA_ENGINE
Dan Williams5fc6d892010-10-07 16:44:50 -0700131 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
Saeed Bisharaff7b0472008-07-08 11:58:36 -0700132 ---help---
133 Enable support for the Marvell XOR engine.
134
Guennadi Liakhovetski5296b562009-01-19 15:36:21 -0700135config MX3_IPU
136 bool "MX3x Image Processing Unit support"
Sascha Hauer8e2d41f2011-08-24 08:41:09 +0200137 depends on ARCH_MXC
Guennadi Liakhovetski5296b562009-01-19 15:36:21 -0700138 select DMA_ENGINE
139 default y
140 help
141 If you plan to use the Image Processing unit in the i.MX3x, say
142 Y here. If unsure, select Y.
143
144config MX3_IPU_IRQS
145 int "Number of dynamically mapped interrupts for IPU"
146 depends on MX3_IPU
147 range 2 137
148 default 4
149 help
150 Out of 137 interrupt sources on i.MX31 IPU only very few are used.
151 To avoid bloating the irq_desc[] array we allocate a sufficient
152 number of IRQ slots and map them dynamically to specific sources.
153
Atsushi Nemotoea76f0b2009-04-23 00:40:30 +0900154config TXX9_DMAC
155 tristate "Toshiba TXx9 SoC DMA support"
156 depends on MACH_TX49XX || MACH_TX39XX
157 select DMA_ENGINE
158 help
159 Support the TXx9 SoC internal DMA controller. This can be
160 integrated in chips such as the Toshiba TX4927/38/39.
161
Laxman Dewanganec8a1582012-06-06 10:55:27 +0530162config TEGRA20_APB_DMA
163 bool "NVIDIA Tegra20 APB DMA support"
164 depends on ARCH_TEGRA
165 select DMA_ENGINE
166 help
167 Support for the NVIDIA Tegra20 APB DMA controller driver. The
168 DMA controller is having multiple DMA channel which can be
169 configured for different peripherals like audio, UART, SPI,
170 I2C etc which is in APB bus.
171 This DMA controller transfers data from memory to peripheral fifo
172 or vice versa. It does not support memory to memory data transfer.
173
174
175
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000176config SH_DMAE
177 tristate "Renesas SuperH DMAC support"
Magnus Damm927a7c92010-03-19 04:47:19 +0000178 depends on (SUPERH && SH_DMA) || (ARM && ARCH_SHMOBILE)
Nobuhiro Iwamatsud8902ad2009-09-07 03:26:23 +0000179 depends on !SH_DMA_API
180 select DMA_ENGINE
181 help
182 Enable support for the Renesas SuperH DMA controllers.
183
Linus Walleij61f135b2009-11-19 19:49:17 +0100184config COH901318
185 bool "ST-Ericsson COH901318 DMA support"
186 select DMA_ENGINE
187 depends on ARCH_U300
188 help
189 Enable support for ST-Ericsson COH 901 318 DMA.
190
Linus Walleij8d318a52010-03-30 15:33:42 +0200191config STE_DMA40
192 bool "ST-Ericsson DMA40 support"
193 depends on ARCH_U8500
194 select DMA_ENGINE
195 help
196 Support for ST-Ericsson DMA40 controller
197
Anatolij Gustschin12458ea2009-12-11 21:24:44 -0700198config AMCC_PPC440SPE_ADMA
199 tristate "AMCC PPC440SPe ADMA support"
200 depends on 440SPe || 440SP
201 select DMA_ENGINE
202 select ARCH_HAS_ASYNC_TX_FIND_CHANNEL
Dan Williams5fc6d892010-10-07 16:44:50 -0700203 select ASYNC_TX_ENABLE_CHANNEL_SWITCH
Anatolij Gustschin12458ea2009-12-11 21:24:44 -0700204 help
205 Enable support for the AMCC PPC440SPe RAID engines.
206
Richard Röjforsde5d4452010-03-25 19:44:21 +0100207config TIMB_DMA
208 tristate "Timberdale FPGA DMA support"
209 depends on MFD_TIMBERDALE || HAS_IOMEM
210 select DMA_ENGINE
211 help
212 Enable support for the Timberdale FPGA DMA engine.
213
Rongjun Yingca21a142011-10-27 19:22:39 -0700214config SIRF_DMA
Barry Songf7d935d2012-11-01 22:54:43 +0800215 tristate "CSR SiRFprimaII/SiRFmarco DMA support"
216 depends on ARCH_SIRF
Rongjun Yingca21a142011-10-27 19:22:39 -0700217 select DMA_ENGINE
218 help
219 Enable support for the CSR SiRFprimaII DMA engine.
220
Matt Porterc2dde5f2012-08-22 21:09:34 -0400221config TI_EDMA
222 tristate "TI EDMA support"
223 depends on ARCH_DAVINCI
224 select DMA_ENGINE
225 select DMA_VIRTUAL_CHANNELS
226 default n
227 help
228 Enable support for the TI EDMA controller. This DMA
229 engine is found on TI DaVinci and AM33xx parts.
230
Anatolij Gustschin12458ea2009-12-11 21:24:44 -0700231config ARCH_HAS_ASYNC_TX_FIND_CHANNEL
232 bool
233
Jassi Brarb3040e42010-05-23 20:28:19 -0700234config PL330_DMA
235 tristate "DMA API Driver for PL330"
236 select DMA_ENGINE
Boojin Kim1b9bb712011-09-02 09:44:30 +0900237 depends on ARM_AMBA
Jassi Brarb3040e42010-05-23 20:28:19 -0700238 help
239 Select if your platform has one or more PL330 DMACs.
240 You need to provide platform specific settings via
241 platform_data for a dma-pl330 device.
242
Yong Wang0c42bd02010-07-30 16:23:03 +0800243config PCH_DMA
Tomoya MORINAGAca7fe2d2011-11-17 16:14:23 +0900244 tristate "Intel EG20T PCH / LAPIS Semicon IOH(ML7213/ML7223/ML7831) DMA"
Yong Wang0c42bd02010-07-30 16:23:03 +0800245 depends on PCI && X86
246 select DMA_ENGINE
247 help
Tomoya MORINAGA2cdf2452011-01-05 17:43:52 +0900248 Enable support for Intel EG20T PCH DMA engine.
249
Tomoya MORINAGAe79e72b2011-11-17 16:14:22 +0900250 This driver also can be used for LAPIS Semiconductor IOH(Input/
Tomoya MORINAGAca7fe2d2011-11-17 16:14:23 +0900251 Output Hub), ML7213, ML7223 and ML7831.
252 ML7213 IOH is for IVI(In-Vehicle Infotainment) use, ML7223 IOH is
253 for MP(Media Phone) use and ML7831 IOH is for general purpose use.
254 ML7213/ML7223/ML7831 is companion chip for Intel Atom E6xx series.
255 ML7213/ML7223/ML7831 is completely compatible for Intel EG20T PCH.
Yong Wang0c42bd02010-07-30 16:23:03 +0800256
Sascha Hauer1ec1e822010-09-30 13:56:34 +0000257config IMX_SDMA
258 tristate "i.MX SDMA support"
Sascha Hauer8e2d41f2011-08-24 08:41:09 +0200259 depends on ARCH_MXC
Sascha Hauer1ec1e822010-09-30 13:56:34 +0000260 select DMA_ENGINE
261 help
262 Support the i.MX SDMA engine. This engine is integrated into
Sascha Hauer8e2d41f2011-08-24 08:41:09 +0200263 Freescale i.MX25/31/35/51/53 chips.
Sascha Hauer1ec1e822010-09-30 13:56:34 +0000264
Sascha Hauer1f1846c2010-10-06 10:25:55 +0200265config IMX_DMA
266 tristate "i.MX DMA support"
Vinod Koul5b2e02e2012-03-27 13:53:00 +0530267 depends on ARCH_MXC
Sascha Hauer1f1846c2010-10-06 10:25:55 +0200268 select DMA_ENGINE
269 help
270 Support the i.MX DMA engine. This engine is integrated into
271 Freescale i.MX1/21/27 chips.
272
Shawn Guoa580b8c2011-02-27 00:47:42 +0800273config MXS_DMA
274 bool "MXS DMA support"
Huang Shijief5c55842012-06-06 21:22:59 -0400275 depends on SOC_IMX23 || SOC_IMX28 || SOC_IMX6Q
Dong Aishengf5b7efc2012-05-04 20:12:15 +0800276 select STMP_DEVICE
Shawn Guoa580b8c2011-02-27 00:47:42 +0800277 select DMA_ENGINE
278 help
279 Support the MXS DMA engine. This engine including APBH-DMA
280 and APBX-DMA is integrated into Freescale i.MX23/28 chips.
281
Mika Westerberg760ee1c2011-05-29 13:10:02 +0300282config EP93XX_DMA
283 bool "Cirrus Logic EP93xx DMA support"
284 depends on ARCH_EP93XX
285 select DMA_ENGINE
286 help
287 Enable support for the Cirrus Logic EP93xx M2P/M2M DMA controller.
288
Russell King6365bea2012-01-09 21:44:07 +0000289config DMA_SA11X0
290 tristate "SA-11x0 DMA support"
291 depends on ARCH_SA1100
292 select DMA_ENGINE
Russell King50437bf2012-04-13 12:07:23 +0100293 select DMA_VIRTUAL_CHANNELS
Russell King6365bea2012-01-09 21:44:07 +0000294 help
295 Support the DMA engine found on Intel StrongARM SA-1100 and
296 SA-1110 SoCs. This DMA engine can only be used with on-chip
297 devices.
298
Zhangfei Gaoc6da0ba2012-06-15 11:04:08 +0800299config MMP_TDMA
300 bool "MMP Two-Channel DMA support"
Vinod Koul49d57b52012-06-22 10:29:53 +0530301 depends on ARCH_MMP
Zhangfei Gaoc6da0ba2012-06-15 11:04:08 +0800302 select DMA_ENGINE
303 help
304 Support the MMP Two-Channel DMA engine.
305 This engine used for MMP Audio DMA and pxa910 SQU.
306
307 Say Y here if you enabled MMP ADMA, otherwise say N.
308
Russell King7bedaa52012-04-13 12:10:24 +0100309config DMA_OMAP
310 tristate "OMAP DMA support"
311 depends on ARCH_OMAP
312 select DMA_ENGINE
313 select DMA_VIRTUAL_CHANNELS
314
Zhangfei Gaoc8acd6a2012-09-03 11:03:45 +0800315config MMP_PDMA
316 bool "MMP PDMA support"
317 depends on (ARCH_MMP || ARCH_PXA)
318 select DMA_ENGINE
319 help
320 Support the MMP PDMA engine for PXA and MMP platfrom.
321
Shannon Nelson2ed6dc32007-10-16 01:27:42 -0700322config DMA_ENGINE
323 bool
324
Russell King50437bf2012-04-13 12:07:23 +0100325config DMA_VIRTUAL_CHANNELS
326 tristate
327
Vinod Koul5fa422c2013-02-12 09:15:02 -0800328config DMA_OF
329 def_bool y
330 depends on OF
331
Shannon Nelson2ed6dc32007-10-16 01:27:42 -0700332comment "DMA Clients"
333 depends on DMA_ENGINE
334
335config NET_DMA
336 bool "Network: TCP receive copy offload"
337 depends on DMA_ENGINE && NET
Dan Williams9c402f42008-06-27 01:21:11 -0700338 default (INTEL_IOATDMA || FSL_DMA)
Shannon Nelson2ed6dc32007-10-16 01:27:42 -0700339 help
340 This enables the use of DMA engines in the network stack to
341 offload receive copy-to-user operations, freeing CPU cycles.
Dan Williams9c402f42008-06-27 01:21:11 -0700342
343 Say Y here if you enabled INTEL_IOATDMA or FSL_DMA, otherwise
344 say N.
Shannon Nelson2ed6dc32007-10-16 01:27:42 -0700345
Dan Williams729b5d12009-03-25 09:13:25 -0700346config ASYNC_TX_DMA
347 bool "Async_tx: Offload support for the async_tx api"
Dan Williams9a8de632009-09-08 15:06:10 -0700348 depends on DMA_ENGINE
Dan Williams729b5d12009-03-25 09:13:25 -0700349 help
350 This allows the async_tx api to take advantage of offload engines for
351 memcpy, memset, xor, and raid6 p+q operations. If your platform has
352 a dma engine that can perform raid operations and you have enabled
353 MD_RAID456 say Y.
354
355 If unsure, say N.
356
Haavard Skinnemoen4a776f02008-07-08 11:58:45 -0700357config DMATEST
358 tristate "DMA Test client"
359 depends on DMA_ENGINE
360 help
361 Simple DMA test client. Say N unless you're debugging a
362 DMA Device driver.
363
Shannon Nelson2ed6dc32007-10-16 01:27:42 -0700364endif