Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 1 | /* |
Lennert Buytenhek | fa87ced | 2005-11-01 19:44:27 +0000 | [diff] [blame] | 2 | * arch/arm/mach-ixp2000/core.c |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 3 | * |
| 4 | * Common routines used by all IXP2400/2800 based platforms. |
| 5 | * |
| 6 | * Author: Deepak Saxena <dsaxena@plexity.net> |
| 7 | * |
| 8 | * Copyright 2004 (C) MontaVista Software, Inc. |
| 9 | * |
| 10 | * Based on work Copyright (C) 2002-2003 Intel Corporation |
| 11 | * |
| 12 | * This file is licensed under the terms of the GNU General Public |
| 13 | * License version 2. This program is licensed "as is" without any |
| 14 | * warranty of any kind, whether express or implied. |
| 15 | */ |
Russell King | 2f8163b | 2011-07-26 10:53:52 +0100 | [diff] [blame] | 16 | #include <linux/gpio.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 17 | #include <linux/kernel.h> |
| 18 | #include <linux/init.h> |
| 19 | #include <linux/spinlock.h> |
| 20 | #include <linux/sched.h> |
| 21 | #include <linux/interrupt.h> |
Thomas Gleixner | 64ffae8 | 2006-07-01 22:32:18 +0100 | [diff] [blame] | 22 | #include <linux/irq.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 23 | #include <linux/serial.h> |
| 24 | #include <linux/tty.h> |
| 25 | #include <linux/bitops.h> |
Lennert Buytenhek | 28187f2 | 2005-07-10 19:44:53 +0100 | [diff] [blame] | 26 | #include <linux/serial_8250.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 27 | #include <linux/mm.h> |
Paul Gortmaker | dc28094 | 2011-07-31 16:17:29 -0400 | [diff] [blame^] | 28 | #include <linux/export.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 29 | |
| 30 | #include <asm/types.h> |
| 31 | #include <asm/setup.h> |
| 32 | #include <asm/memory.h> |
Russell King | a09e64f | 2008-08-05 16:14:15 +0100 | [diff] [blame] | 33 | #include <mach/hardware.h> |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 34 | #include <asm/irq.h> |
| 35 | #include <asm/system.h> |
| 36 | #include <asm/tlbflush.h> |
| 37 | #include <asm/pgtable.h> |
| 38 | |
| 39 | #include <asm/mach/map.h> |
| 40 | #include <asm/mach/time.h> |
| 41 | #include <asm/mach/irq.h> |
| 42 | |
Linus Walleij | 87f911a | 2011-08-22 08:44:18 +0100 | [diff] [blame] | 43 | #include <mach/gpio-ixp2000.h> |
| 44 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 45 | static DEFINE_SPINLOCK(ixp2000_slowport_lock); |
| 46 | static unsigned long ixp2000_slowport_irq_flags; |
| 47 | |
| 48 | /************************************************************************* |
| 49 | * Slowport access routines |
| 50 | *************************************************************************/ |
| 51 | void ixp2000_acquire_slowport(struct slowport_cfg *new_cfg, struct slowport_cfg *old_cfg) |
| 52 | { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 53 | spin_lock_irqsave(&ixp2000_slowport_lock, ixp2000_slowport_irq_flags); |
| 54 | |
| 55 | old_cfg->CCR = *IXP2000_SLOWPORT_CCR; |
| 56 | old_cfg->WTC = *IXP2000_SLOWPORT_WTC2; |
| 57 | old_cfg->RTC = *IXP2000_SLOWPORT_RTC2; |
| 58 | old_cfg->PCR = *IXP2000_SLOWPORT_PCR; |
| 59 | old_cfg->ADC = *IXP2000_SLOWPORT_ADC; |
| 60 | |
| 61 | ixp2000_reg_write(IXP2000_SLOWPORT_CCR, new_cfg->CCR); |
| 62 | ixp2000_reg_write(IXP2000_SLOWPORT_WTC2, new_cfg->WTC); |
| 63 | ixp2000_reg_write(IXP2000_SLOWPORT_RTC2, new_cfg->RTC); |
| 64 | ixp2000_reg_write(IXP2000_SLOWPORT_PCR, new_cfg->PCR); |
Lennert Buytenhek | e9b72e4 | 2005-11-01 19:44:26 +0000 | [diff] [blame] | 65 | ixp2000_reg_wrb(IXP2000_SLOWPORT_ADC, new_cfg->ADC); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 66 | } |
| 67 | |
| 68 | void ixp2000_release_slowport(struct slowport_cfg *old_cfg) |
| 69 | { |
| 70 | ixp2000_reg_write(IXP2000_SLOWPORT_CCR, old_cfg->CCR); |
| 71 | ixp2000_reg_write(IXP2000_SLOWPORT_WTC2, old_cfg->WTC); |
| 72 | ixp2000_reg_write(IXP2000_SLOWPORT_RTC2, old_cfg->RTC); |
| 73 | ixp2000_reg_write(IXP2000_SLOWPORT_PCR, old_cfg->PCR); |
Lennert Buytenhek | e9b72e4 | 2005-11-01 19:44:26 +0000 | [diff] [blame] | 74 | ixp2000_reg_wrb(IXP2000_SLOWPORT_ADC, old_cfg->ADC); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 75 | |
| 76 | spin_unlock_irqrestore(&ixp2000_slowport_lock, |
| 77 | ixp2000_slowport_irq_flags); |
| 78 | } |
| 79 | |
| 80 | /************************************************************************* |
| 81 | * Chip specific mappings shared by all IXP2000 systems |
| 82 | *************************************************************************/ |
| 83 | static struct map_desc ixp2000_io_desc[] __initdata = { |
| 84 | { |
| 85 | .virtual = IXP2000_CAP_VIRT_BASE, |
Deepak Saxena | db0d087 | 2005-10-28 15:18:58 +0100 | [diff] [blame] | 86 | .pfn = __phys_to_pfn(IXP2000_CAP_PHYS_BASE), |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 87 | .length = IXP2000_CAP_SIZE, |
Russell King | db5b716 | 2008-09-07 12:42:51 +0100 | [diff] [blame] | 88 | .type = MT_DEVICE, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 89 | }, { |
| 90 | .virtual = IXP2000_INTCTL_VIRT_BASE, |
Deepak Saxena | db0d087 | 2005-10-28 15:18:58 +0100 | [diff] [blame] | 91 | .pfn = __phys_to_pfn(IXP2000_INTCTL_PHYS_BASE), |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 92 | .length = IXP2000_INTCTL_SIZE, |
Russell King | db5b716 | 2008-09-07 12:42:51 +0100 | [diff] [blame] | 93 | .type = MT_DEVICE, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 94 | }, { |
| 95 | .virtual = IXP2000_PCI_CREG_VIRT_BASE, |
Deepak Saxena | db0d087 | 2005-10-28 15:18:58 +0100 | [diff] [blame] | 96 | .pfn = __phys_to_pfn(IXP2000_PCI_CREG_PHYS_BASE), |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 97 | .length = IXP2000_PCI_CREG_SIZE, |
Russell King | db5b716 | 2008-09-07 12:42:51 +0100 | [diff] [blame] | 98 | .type = MT_DEVICE, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 99 | }, { |
| 100 | .virtual = IXP2000_PCI_CSR_VIRT_BASE, |
Deepak Saxena | db0d087 | 2005-10-28 15:18:58 +0100 | [diff] [blame] | 101 | .pfn = __phys_to_pfn(IXP2000_PCI_CSR_PHYS_BASE), |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 102 | .length = IXP2000_PCI_CSR_SIZE, |
Russell King | db5b716 | 2008-09-07 12:42:51 +0100 | [diff] [blame] | 103 | .type = MT_DEVICE, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 104 | }, { |
Lennert Buytenhek | baaf7ed1 | 2005-06-26 22:24:17 +0100 | [diff] [blame] | 105 | .virtual = IXP2000_MSF_VIRT_BASE, |
Deepak Saxena | db0d087 | 2005-10-28 15:18:58 +0100 | [diff] [blame] | 106 | .pfn = __phys_to_pfn(IXP2000_MSF_PHYS_BASE), |
Lennert Buytenhek | baaf7ed1 | 2005-06-26 22:24:17 +0100 | [diff] [blame] | 107 | .length = IXP2000_MSF_SIZE, |
Russell King | db5b716 | 2008-09-07 12:42:51 +0100 | [diff] [blame] | 108 | .type = MT_DEVICE, |
Lennert Buytenhek | baaf7ed1 | 2005-06-26 22:24:17 +0100 | [diff] [blame] | 109 | }, { |
Lennert Buytenhek | dd29c72 | 2006-01-13 20:51:43 +0000 | [diff] [blame] | 110 | .virtual = IXP2000_SCRATCH_RING_VIRT_BASE, |
| 111 | .pfn = __phys_to_pfn(IXP2000_SCRATCH_RING_PHYS_BASE), |
| 112 | .length = IXP2000_SCRATCH_RING_SIZE, |
Russell King | db5b716 | 2008-09-07 12:42:51 +0100 | [diff] [blame] | 113 | .type = MT_DEVICE, |
Lennert Buytenhek | dd29c72 | 2006-01-13 20:51:43 +0000 | [diff] [blame] | 114 | }, { |
| 115 | .virtual = IXP2000_SRAM0_VIRT_BASE, |
| 116 | .pfn = __phys_to_pfn(IXP2000_SRAM0_PHYS_BASE), |
| 117 | .length = IXP2000_SRAM0_SIZE, |
Russell King | db5b716 | 2008-09-07 12:42:51 +0100 | [diff] [blame] | 118 | .type = MT_DEVICE, |
Lennert Buytenhek | dd29c72 | 2006-01-13 20:51:43 +0000 | [diff] [blame] | 119 | }, { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 120 | .virtual = IXP2000_PCI_IO_VIRT_BASE, |
Deepak Saxena | db0d087 | 2005-10-28 15:18:58 +0100 | [diff] [blame] | 121 | .pfn = __phys_to_pfn(IXP2000_PCI_IO_PHYS_BASE), |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 122 | .length = IXP2000_PCI_IO_SIZE, |
Russell King | db5b716 | 2008-09-07 12:42:51 +0100 | [diff] [blame] | 123 | .type = MT_DEVICE, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 124 | }, { |
| 125 | .virtual = IXP2000_PCI_CFG0_VIRT_BASE, |
Deepak Saxena | db0d087 | 2005-10-28 15:18:58 +0100 | [diff] [blame] | 126 | .pfn = __phys_to_pfn(IXP2000_PCI_CFG0_PHYS_BASE), |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 127 | .length = IXP2000_PCI_CFG0_SIZE, |
Russell King | db5b716 | 2008-09-07 12:42:51 +0100 | [diff] [blame] | 128 | .type = MT_DEVICE, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 129 | }, { |
| 130 | .virtual = IXP2000_PCI_CFG1_VIRT_BASE, |
Deepak Saxena | db0d087 | 2005-10-28 15:18:58 +0100 | [diff] [blame] | 131 | .pfn = __phys_to_pfn(IXP2000_PCI_CFG1_PHYS_BASE), |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 132 | .length = IXP2000_PCI_CFG1_SIZE, |
Russell King | db5b716 | 2008-09-07 12:42:51 +0100 | [diff] [blame] | 133 | .type = MT_DEVICE, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 134 | } |
| 135 | }; |
| 136 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 137 | void __init ixp2000_map_io(void) |
| 138 | { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 139 | iotable_init(ixp2000_io_desc, ARRAY_SIZE(ixp2000_io_desc)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 140 | |
| 141 | /* Set slowport to 8-bit mode. */ |
Lennert Buytenhek | e9b72e4 | 2005-11-01 19:44:26 +0000 | [diff] [blame] | 142 | ixp2000_reg_wrb(IXP2000_SLOWPORT_FRM, 1); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 143 | } |
| 144 | |
Lennert Buytenhek | 28187f2 | 2005-07-10 19:44:53 +0100 | [diff] [blame] | 145 | |
| 146 | /************************************************************************* |
| 147 | * Serial port support for IXP2000 |
| 148 | *************************************************************************/ |
| 149 | static struct plat_serial8250_port ixp2000_serial_port[] = { |
| 150 | { |
| 151 | .mapbase = IXP2000_UART_PHYS_BASE, |
| 152 | .membase = (char *)(IXP2000_UART_VIRT_BASE + 3), |
| 153 | .irq = IRQ_IXP2000_UART, |
| 154 | .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, |
| 155 | .iotype = UPIO_MEM, |
| 156 | .regshift = 2, |
| 157 | .uartclk = 50000000, |
| 158 | }, |
| 159 | { }, |
| 160 | }; |
| 161 | |
| 162 | static struct resource ixp2000_uart_resource = { |
| 163 | .start = IXP2000_UART_PHYS_BASE, |
Deepak Saxena | 702c96d5 | 2005-09-30 16:20:22 -0700 | [diff] [blame] | 164 | .end = IXP2000_UART_PHYS_BASE + 0x1f, |
Lennert Buytenhek | 28187f2 | 2005-07-10 19:44:53 +0100 | [diff] [blame] | 165 | .flags = IORESOURCE_MEM, |
| 166 | }; |
| 167 | |
| 168 | static struct platform_device ixp2000_serial_device = { |
| 169 | .name = "serial8250", |
Russell King | 6df29de | 2005-09-08 16:04:41 +0100 | [diff] [blame] | 170 | .id = PLAT8250_DEV_PLATFORM, |
Lennert Buytenhek | 28187f2 | 2005-07-10 19:44:53 +0100 | [diff] [blame] | 171 | .dev = { |
| 172 | .platform_data = ixp2000_serial_port, |
| 173 | }, |
| 174 | .num_resources = 1, |
| 175 | .resource = &ixp2000_uart_resource, |
| 176 | }; |
| 177 | |
| 178 | void __init ixp2000_uart_init(void) |
| 179 | { |
| 180 | platform_device_register(&ixp2000_serial_device); |
| 181 | } |
| 182 | |
| 183 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 184 | /************************************************************************* |
| 185 | * Timer-tick functions for IXP2000 |
| 186 | *************************************************************************/ |
| 187 | static unsigned ticks_per_jiffy; |
| 188 | static unsigned ticks_per_usec; |
| 189 | static unsigned next_jiffy_time; |
Lennert Buytenhek | e4fe198 | 2005-06-20 18:51:07 +0100 | [diff] [blame] | 190 | static volatile unsigned long *missing_jiffy_timer_csr; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 191 | |
| 192 | unsigned long ixp2000_gettimeoffset (void) |
| 193 | { |
| 194 | unsigned long offset; |
| 195 | |
Lennert Buytenhek | e4fe198 | 2005-06-20 18:51:07 +0100 | [diff] [blame] | 196 | offset = next_jiffy_time - *missing_jiffy_timer_csr; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 197 | |
| 198 | return offset / ticks_per_usec; |
| 199 | } |
| 200 | |
Uwe Kleine-König | d463f36 | 2010-10-19 09:43:59 +0100 | [diff] [blame] | 201 | static irqreturn_t ixp2000_timer_interrupt(int irq, void *dev_id) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 202 | { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 203 | /* clear timer 1 */ |
Lennert Buytenhek | e9b72e4 | 2005-11-01 19:44:26 +0000 | [diff] [blame] | 204 | ixp2000_reg_wrb(IXP2000_T1_CLR, 1); |
Lennert Buytenhek | c498288 | 2005-06-24 20:54:35 +0100 | [diff] [blame] | 205 | |
Lennert Buytenhek | f869afa | 2006-06-22 10:30:53 +0100 | [diff] [blame] | 206 | while ((signed long)(next_jiffy_time - *missing_jiffy_timer_csr) |
| 207 | >= ticks_per_jiffy) { |
Linus Torvalds | 0cd61b6 | 2006-10-06 10:53:39 -0700 | [diff] [blame] | 208 | timer_tick(); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 209 | next_jiffy_time -= ticks_per_jiffy; |
| 210 | } |
| 211 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 212 | return IRQ_HANDLED; |
| 213 | } |
| 214 | |
| 215 | static struct irqaction ixp2000_timer_irq = { |
| 216 | .name = "IXP2000 Timer Tick", |
Bernhard Walle | b30faba | 2007-05-08 00:35:39 -0700 | [diff] [blame] | 217 | .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, |
Russell King | 09b8b5f | 2005-06-26 17:06:36 +0100 | [diff] [blame] | 218 | .handler = ixp2000_timer_interrupt, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 219 | }; |
| 220 | |
| 221 | void __init ixp2000_init_time(unsigned long tick_rate) |
| 222 | { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 223 | ticks_per_jiffy = (tick_rate + HZ/2) / HZ; |
| 224 | ticks_per_usec = tick_rate / 1000000; |
| 225 | |
Lennert Buytenhek | e4fe198 | 2005-06-20 18:51:07 +0100 | [diff] [blame] | 226 | /* |
| 227 | * We use timer 1 as our timer interrupt. |
| 228 | */ |
| 229 | ixp2000_reg_write(IXP2000_T1_CLR, 0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 230 | ixp2000_reg_write(IXP2000_T1_CLD, ticks_per_jiffy - 1); |
| 231 | ixp2000_reg_write(IXP2000_T1_CTL, (1 << 7)); |
| 232 | |
| 233 | /* |
Lennert Buytenhek | e4fe198 | 2005-06-20 18:51:07 +0100 | [diff] [blame] | 234 | * We use a second timer as a monotonic counter for tracking |
| 235 | * missed jiffies. The IXP2000 has four timers, but if we're |
| 236 | * on an A-step IXP2800, timer 2 and 3 don't work, so on those |
| 237 | * chips we use timer 4. Timer 4 is the only timer that can |
| 238 | * be used for the watchdog, so we use timer 2 if we're on a |
| 239 | * non-buggy chip. |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 240 | */ |
Lennert Buytenhek | e4fe198 | 2005-06-20 18:51:07 +0100 | [diff] [blame] | 241 | if ((*IXP2000_PRODUCT_ID & 0x001ffef0) == 0x00000000) { |
| 242 | printk(KERN_INFO "Enabling IXP2800 erratum #25 workaround\n"); |
| 243 | |
| 244 | ixp2000_reg_write(IXP2000_T4_CLR, 0); |
| 245 | ixp2000_reg_write(IXP2000_T4_CLD, -1); |
Lennert Buytenhek | e9b72e4 | 2005-11-01 19:44:26 +0000 | [diff] [blame] | 246 | ixp2000_reg_wrb(IXP2000_T4_CTL, (1 << 7)); |
Lennert Buytenhek | e4fe198 | 2005-06-20 18:51:07 +0100 | [diff] [blame] | 247 | missing_jiffy_timer_csr = IXP2000_T4_CSR; |
| 248 | } else { |
| 249 | ixp2000_reg_write(IXP2000_T2_CLR, 0); |
| 250 | ixp2000_reg_write(IXP2000_T2_CLD, -1); |
Lennert Buytenhek | e9b72e4 | 2005-11-01 19:44:26 +0000 | [diff] [blame] | 251 | ixp2000_reg_wrb(IXP2000_T2_CTL, (1 << 7)); |
Lennert Buytenhek | e4fe198 | 2005-06-20 18:51:07 +0100 | [diff] [blame] | 252 | missing_jiffy_timer_csr = IXP2000_T2_CSR; |
| 253 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 254 | next_jiffy_time = 0xffffffff; |
| 255 | |
| 256 | /* register for interrupt */ |
| 257 | setup_irq(IRQ_IXP2000_TIMER1, &ixp2000_timer_irq); |
| 258 | } |
| 259 | |
| 260 | /************************************************************************* |
| 261 | * GPIO helpers |
| 262 | *************************************************************************/ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 263 | static unsigned long GPIO_IRQ_falling_edge; |
Lennert Buytenhek | c498288 | 2005-06-24 20:54:35 +0100 | [diff] [blame] | 264 | static unsigned long GPIO_IRQ_rising_edge; |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 265 | static unsigned long GPIO_IRQ_level_low; |
| 266 | static unsigned long GPIO_IRQ_level_high; |
| 267 | |
Lennert Buytenhek | c498288 | 2005-06-24 20:54:35 +0100 | [diff] [blame] | 268 | static void update_gpio_int_csrs(void) |
| 269 | { |
| 270 | ixp2000_reg_write(IXP2000_GPIO_FEDR, GPIO_IRQ_falling_edge); |
| 271 | ixp2000_reg_write(IXP2000_GPIO_REDR, GPIO_IRQ_rising_edge); |
| 272 | ixp2000_reg_write(IXP2000_GPIO_LSLR, GPIO_IRQ_level_low); |
Lennert Buytenhek | e9b72e4 | 2005-11-01 19:44:26 +0000 | [diff] [blame] | 273 | ixp2000_reg_wrb(IXP2000_GPIO_LSHR, GPIO_IRQ_level_high); |
Lennert Buytenhek | c498288 | 2005-06-24 20:54:35 +0100 | [diff] [blame] | 274 | } |
| 275 | |
| 276 | void gpio_line_config(int line, int direction) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 277 | { |
| 278 | unsigned long flags; |
| 279 | |
| 280 | local_irq_save(flags); |
Lennert Buytenhek | c498288 | 2005-06-24 20:54:35 +0100 | [diff] [blame] | 281 | if (direction == GPIO_OUT) { |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 282 | /* if it's an output, it ain't an interrupt anymore */ |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 283 | GPIO_IRQ_falling_edge &= ~(1 << line); |
| 284 | GPIO_IRQ_rising_edge &= ~(1 << line); |
| 285 | GPIO_IRQ_level_low &= ~(1 << line); |
| 286 | GPIO_IRQ_level_high &= ~(1 << line); |
Lennert Buytenhek | c498288 | 2005-06-24 20:54:35 +0100 | [diff] [blame] | 287 | update_gpio_int_csrs(); |
| 288 | |
Lennert Buytenhek | e9b72e4 | 2005-11-01 19:44:26 +0000 | [diff] [blame] | 289 | ixp2000_reg_wrb(IXP2000_GPIO_PDSR, 1 << line); |
Lennert Buytenhek | c498288 | 2005-06-24 20:54:35 +0100 | [diff] [blame] | 290 | } else if (direction == GPIO_IN) { |
Lennert Buytenhek | e9b72e4 | 2005-11-01 19:44:26 +0000 | [diff] [blame] | 291 | ixp2000_reg_wrb(IXP2000_GPIO_PDCR, 1 << line); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 292 | } |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 293 | local_irq_restore(flags); |
Lennert Buytenhek | c498288 | 2005-06-24 20:54:35 +0100 | [diff] [blame] | 294 | } |
Lennert Buytenhek | fc8ea7a | 2006-06-24 09:57:14 +0100 | [diff] [blame] | 295 | EXPORT_SYMBOL(gpio_line_config); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 296 | |
| 297 | |
| 298 | /************************************************************************* |
| 299 | * IRQ handling IXP2000 |
| 300 | *************************************************************************/ |
Russell King | 10dd5ce | 2006-11-23 11:41:32 +0000 | [diff] [blame] | 301 | static void ixp2000_GPIO_irq_handler(unsigned int irq, struct irq_desc *desc) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 302 | { |
| 303 | int i; |
| 304 | unsigned long status = *IXP2000_GPIO_INST; |
| 305 | |
| 306 | for (i = 0; i <= 7; i++) { |
| 307 | if (status & (1<<i)) { |
Dmitry Baryshkov | d8aa025 | 2008-10-09 13:36:24 +0100 | [diff] [blame] | 308 | generic_handle_irq(i + IRQ_IXP2000_GPIO0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 309 | } |
| 310 | } |
| 311 | } |
| 312 | |
Lennert Buytenhek | 6e8f54f | 2010-11-29 10:32:55 +0100 | [diff] [blame] | 313 | static int ixp2000_GPIO_irq_type(struct irq_data *d, unsigned int type) |
Lennert Buytenhek | c498288 | 2005-06-24 20:54:35 +0100 | [diff] [blame] | 314 | { |
Lennert Buytenhek | 6e8f54f | 2010-11-29 10:32:55 +0100 | [diff] [blame] | 315 | int line = d->irq - IRQ_IXP2000_GPIO0; |
Lennert Buytenhek | c498288 | 2005-06-24 20:54:35 +0100 | [diff] [blame] | 316 | |
| 317 | /* |
| 318 | * First, configure this GPIO line as an input. |
| 319 | */ |
| 320 | ixp2000_reg_write(IXP2000_GPIO_PDCR, 1 << line); |
| 321 | |
| 322 | /* |
| 323 | * Then, set the proper trigger type. |
| 324 | */ |
Dmitry Baryshkov | 6cab486 | 2008-07-27 04:23:31 +0100 | [diff] [blame] | 325 | if (type & IRQ_TYPE_EDGE_FALLING) |
Lennert Buytenhek | c498288 | 2005-06-24 20:54:35 +0100 | [diff] [blame] | 326 | GPIO_IRQ_falling_edge |= 1 << line; |
| 327 | else |
| 328 | GPIO_IRQ_falling_edge &= ~(1 << line); |
Dmitry Baryshkov | 6cab486 | 2008-07-27 04:23:31 +0100 | [diff] [blame] | 329 | if (type & IRQ_TYPE_EDGE_RISING) |
Lennert Buytenhek | c498288 | 2005-06-24 20:54:35 +0100 | [diff] [blame] | 330 | GPIO_IRQ_rising_edge |= 1 << line; |
| 331 | else |
| 332 | GPIO_IRQ_rising_edge &= ~(1 << line); |
Dmitry Baryshkov | 6cab486 | 2008-07-27 04:23:31 +0100 | [diff] [blame] | 333 | if (type & IRQ_TYPE_LEVEL_LOW) |
Lennert Buytenhek | c498288 | 2005-06-24 20:54:35 +0100 | [diff] [blame] | 334 | GPIO_IRQ_level_low |= 1 << line; |
| 335 | else |
| 336 | GPIO_IRQ_level_low &= ~(1 << line); |
Dmitry Baryshkov | 6cab486 | 2008-07-27 04:23:31 +0100 | [diff] [blame] | 337 | if (type & IRQ_TYPE_LEVEL_HIGH) |
Lennert Buytenhek | c498288 | 2005-06-24 20:54:35 +0100 | [diff] [blame] | 338 | GPIO_IRQ_level_high |= 1 << line; |
| 339 | else |
| 340 | GPIO_IRQ_level_high &= ~(1 << line); |
| 341 | update_gpio_int_csrs(); |
| 342 | |
Lennert Buytenhek | c498288 | 2005-06-24 20:54:35 +0100 | [diff] [blame] | 343 | return 0; |
| 344 | } |
| 345 | |
Lennert Buytenhek | 6e8f54f | 2010-11-29 10:32:55 +0100 | [diff] [blame] | 346 | static void ixp2000_GPIO_irq_mask_ack(struct irq_data *d) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 347 | { |
Lennert Buytenhek | 6e8f54f | 2010-11-29 10:32:55 +0100 | [diff] [blame] | 348 | unsigned int irq = d->irq; |
| 349 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 350 | ixp2000_reg_write(IXP2000_GPIO_INCR, (1 << (irq - IRQ_IXP2000_GPIO0))); |
Lennert Buytenhek | c498288 | 2005-06-24 20:54:35 +0100 | [diff] [blame] | 351 | |
| 352 | ixp2000_reg_write(IXP2000_GPIO_EDSR, (1 << (irq - IRQ_IXP2000_GPIO0))); |
| 353 | ixp2000_reg_write(IXP2000_GPIO_LDSR, (1 << (irq - IRQ_IXP2000_GPIO0))); |
Lennert Buytenhek | e9b72e4 | 2005-11-01 19:44:26 +0000 | [diff] [blame] | 354 | ixp2000_reg_wrb(IXP2000_GPIO_INST, (1 << (irq - IRQ_IXP2000_GPIO0))); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 355 | } |
| 356 | |
Lennert Buytenhek | 6e8f54f | 2010-11-29 10:32:55 +0100 | [diff] [blame] | 357 | static void ixp2000_GPIO_irq_mask(struct irq_data *d) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 358 | { |
Lennert Buytenhek | 6e8f54f | 2010-11-29 10:32:55 +0100 | [diff] [blame] | 359 | unsigned int irq = d->irq; |
| 360 | |
Lennert Buytenhek | e9b72e4 | 2005-11-01 19:44:26 +0000 | [diff] [blame] | 361 | ixp2000_reg_wrb(IXP2000_GPIO_INCR, (1 << (irq - IRQ_IXP2000_GPIO0))); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 362 | } |
| 363 | |
Lennert Buytenhek | 6e8f54f | 2010-11-29 10:32:55 +0100 | [diff] [blame] | 364 | static void ixp2000_GPIO_irq_unmask(struct irq_data *d) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 365 | { |
Lennert Buytenhek | 6e8f54f | 2010-11-29 10:32:55 +0100 | [diff] [blame] | 366 | unsigned int irq = d->irq; |
| 367 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 368 | ixp2000_reg_write(IXP2000_GPIO_INSR, (1 << (irq - IRQ_IXP2000_GPIO0))); |
| 369 | } |
| 370 | |
Russell King | 10dd5ce | 2006-11-23 11:41:32 +0000 | [diff] [blame] | 371 | static struct irq_chip ixp2000_GPIO_irq_chip = { |
Lennert Buytenhek | 6e8f54f | 2010-11-29 10:32:55 +0100 | [diff] [blame] | 372 | .irq_ack = ixp2000_GPIO_irq_mask_ack, |
| 373 | .irq_mask = ixp2000_GPIO_irq_mask, |
| 374 | .irq_unmask = ixp2000_GPIO_irq_unmask, |
| 375 | .irq_set_type = ixp2000_GPIO_irq_type, |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 376 | }; |
| 377 | |
Lennert Buytenhek | 6e8f54f | 2010-11-29 10:32:55 +0100 | [diff] [blame] | 378 | static void ixp2000_pci_irq_mask(struct irq_data *d) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 379 | { |
| 380 | unsigned long temp = *IXP2000_PCI_XSCALE_INT_ENABLE; |
Lennert Buytenhek | 6e8f54f | 2010-11-29 10:32:55 +0100 | [diff] [blame] | 381 | if (d->irq == IRQ_IXP2000_PCIA) |
Lennert Buytenhek | e9b72e4 | 2005-11-01 19:44:26 +0000 | [diff] [blame] | 382 | ixp2000_reg_wrb(IXP2000_PCI_XSCALE_INT_ENABLE, (temp & ~(1 << 26))); |
Lennert Buytenhek | 6e8f54f | 2010-11-29 10:32:55 +0100 | [diff] [blame] | 383 | else if (d->irq == IRQ_IXP2000_PCIB) |
Lennert Buytenhek | e9b72e4 | 2005-11-01 19:44:26 +0000 | [diff] [blame] | 384 | ixp2000_reg_wrb(IXP2000_PCI_XSCALE_INT_ENABLE, (temp & ~(1 << 27))); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 385 | } |
| 386 | |
Lennert Buytenhek | 6e8f54f | 2010-11-29 10:32:55 +0100 | [diff] [blame] | 387 | static void ixp2000_pci_irq_unmask(struct irq_data *d) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 388 | { |
| 389 | unsigned long temp = *IXP2000_PCI_XSCALE_INT_ENABLE; |
Lennert Buytenhek | 6e8f54f | 2010-11-29 10:32:55 +0100 | [diff] [blame] | 390 | if (d->irq == IRQ_IXP2000_PCIA) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 391 | ixp2000_reg_write(IXP2000_PCI_XSCALE_INT_ENABLE, (temp | (1 << 26))); |
Lennert Buytenhek | 6e8f54f | 2010-11-29 10:32:55 +0100 | [diff] [blame] | 392 | else if (d->irq == IRQ_IXP2000_PCIB) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 393 | ixp2000_reg_write(IXP2000_PCI_XSCALE_INT_ENABLE, (temp | (1 << 27))); |
| 394 | } |
| 395 | |
Dave Jiang | 7866f64 | 2005-11-04 17:15:44 +0000 | [diff] [blame] | 396 | /* |
| 397 | * Error interrupts. These are used extensively by the microengine drivers |
| 398 | */ |
Russell King | 10dd5ce | 2006-11-23 11:41:32 +0000 | [diff] [blame] | 399 | static void ixp2000_err_irq_handler(unsigned int irq, struct irq_desc *desc) |
Dave Jiang | 7866f64 | 2005-11-04 17:15:44 +0000 | [diff] [blame] | 400 | { |
| 401 | int i; |
| 402 | unsigned long status = *IXP2000_IRQ_ERR_STATUS; |
| 403 | |
| 404 | for(i = 31; i >= 0; i--) { |
| 405 | if(status & (1 << i)) { |
Dmitry Baryshkov | d8aa025 | 2008-10-09 13:36:24 +0100 | [diff] [blame] | 406 | generic_handle_irq(IRQ_IXP2000_DRAM0_MIN_ERR + i); |
Dave Jiang | 7866f64 | 2005-11-04 17:15:44 +0000 | [diff] [blame] | 407 | } |
| 408 | } |
| 409 | } |
| 410 | |
Lennert Buytenhek | 6e8f54f | 2010-11-29 10:32:55 +0100 | [diff] [blame] | 411 | static void ixp2000_err_irq_mask(struct irq_data *d) |
Dave Jiang | 7866f64 | 2005-11-04 17:15:44 +0000 | [diff] [blame] | 412 | { |
| 413 | ixp2000_reg_write(IXP2000_IRQ_ERR_ENABLE_CLR, |
Lennert Buytenhek | 6e8f54f | 2010-11-29 10:32:55 +0100 | [diff] [blame] | 414 | (1 << (d->irq - IRQ_IXP2000_DRAM0_MIN_ERR))); |
Dave Jiang | 7866f64 | 2005-11-04 17:15:44 +0000 | [diff] [blame] | 415 | } |
| 416 | |
Lennert Buytenhek | 6e8f54f | 2010-11-29 10:32:55 +0100 | [diff] [blame] | 417 | static void ixp2000_err_irq_unmask(struct irq_data *d) |
Dave Jiang | 7866f64 | 2005-11-04 17:15:44 +0000 | [diff] [blame] | 418 | { |
| 419 | ixp2000_reg_write(IXP2000_IRQ_ERR_ENABLE_SET, |
Lennert Buytenhek | 6e8f54f | 2010-11-29 10:32:55 +0100 | [diff] [blame] | 420 | (1 << (d->irq - IRQ_IXP2000_DRAM0_MIN_ERR))); |
Dave Jiang | 7866f64 | 2005-11-04 17:15:44 +0000 | [diff] [blame] | 421 | } |
| 422 | |
Russell King | 10dd5ce | 2006-11-23 11:41:32 +0000 | [diff] [blame] | 423 | static struct irq_chip ixp2000_err_irq_chip = { |
Lennert Buytenhek | 6e8f54f | 2010-11-29 10:32:55 +0100 | [diff] [blame] | 424 | .irq_ack = ixp2000_err_irq_mask, |
| 425 | .irq_mask = ixp2000_err_irq_mask, |
| 426 | .irq_unmask = ixp2000_err_irq_unmask |
Dave Jiang | 7866f64 | 2005-11-04 17:15:44 +0000 | [diff] [blame] | 427 | }; |
| 428 | |
Russell King | 10dd5ce | 2006-11-23 11:41:32 +0000 | [diff] [blame] | 429 | static struct irq_chip ixp2000_pci_irq_chip = { |
Lennert Buytenhek | 6e8f54f | 2010-11-29 10:32:55 +0100 | [diff] [blame] | 430 | .irq_ack = ixp2000_pci_irq_mask, |
| 431 | .irq_mask = ixp2000_pci_irq_mask, |
| 432 | .irq_unmask = ixp2000_pci_irq_unmask |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 433 | }; |
| 434 | |
Lennert Buytenhek | 6e8f54f | 2010-11-29 10:32:55 +0100 | [diff] [blame] | 435 | static void ixp2000_irq_mask(struct irq_data *d) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 436 | { |
Lennert Buytenhek | 6e8f54f | 2010-11-29 10:32:55 +0100 | [diff] [blame] | 437 | ixp2000_reg_wrb(IXP2000_IRQ_ENABLE_CLR, (1 << d->irq)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 438 | } |
| 439 | |
Lennert Buytenhek | 6e8f54f | 2010-11-29 10:32:55 +0100 | [diff] [blame] | 440 | static void ixp2000_irq_unmask(struct irq_data *d) |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 441 | { |
Lennert Buytenhek | 6e8f54f | 2010-11-29 10:32:55 +0100 | [diff] [blame] | 442 | ixp2000_reg_write(IXP2000_IRQ_ENABLE_SET, (1 << d->irq)); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 443 | } |
| 444 | |
Russell King | 10dd5ce | 2006-11-23 11:41:32 +0000 | [diff] [blame] | 445 | static struct irq_chip ixp2000_irq_chip = { |
Lennert Buytenhek | 6e8f54f | 2010-11-29 10:32:55 +0100 | [diff] [blame] | 446 | .irq_ack = ixp2000_irq_mask, |
| 447 | .irq_mask = ixp2000_irq_mask, |
| 448 | .irq_unmask = ixp2000_irq_unmask |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 449 | }; |
| 450 | |
| 451 | void __init ixp2000_init_irq(void) |
| 452 | { |
| 453 | int irq; |
| 454 | |
| 455 | /* |
| 456 | * Mask all sources |
| 457 | */ |
| 458 | ixp2000_reg_write(IXP2000_IRQ_ENABLE_CLR, 0xffffffff); |
| 459 | ixp2000_reg_write(IXP2000_FIQ_ENABLE_CLR, 0xffffffff); |
| 460 | |
| 461 | /* clear all GPIO edge/level detects */ |
| 462 | ixp2000_reg_write(IXP2000_GPIO_REDR, 0); |
| 463 | ixp2000_reg_write(IXP2000_GPIO_FEDR, 0); |
| 464 | ixp2000_reg_write(IXP2000_GPIO_LSHR, 0); |
| 465 | ixp2000_reg_write(IXP2000_GPIO_LSLR, 0); |
| 466 | ixp2000_reg_write(IXP2000_GPIO_INCR, -1); |
| 467 | |
| 468 | /* clear PCI interrupt sources */ |
Lennert Buytenhek | e9b72e4 | 2005-11-01 19:44:26 +0000 | [diff] [blame] | 469 | ixp2000_reg_wrb(IXP2000_PCI_XSCALE_INT_ENABLE, 0); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 470 | |
| 471 | /* |
| 472 | * Certain bits in the IRQ status register of the |
| 473 | * IXP2000 are reserved. Instead of trying to map |
| 474 | * things non 1:1 from bit position to IRQ number, |
| 475 | * we mark the reserved IRQs as invalid. This makes |
| 476 | * our mask/unmask code much simpler. |
| 477 | */ |
| 478 | for (irq = IRQ_IXP2000_SOFT_INT; irq <= IRQ_IXP2000_THDB3; irq++) { |
Lennert Buytenhek | c498288 | 2005-06-24 20:54:35 +0100 | [diff] [blame] | 479 | if ((1 << irq) & IXP2000_VALID_IRQ_MASK) { |
Thomas Gleixner | f38c02f | 2011-03-24 13:35:09 +0100 | [diff] [blame] | 480 | irq_set_chip_and_handler(irq, &ixp2000_irq_chip, |
| 481 | handle_level_irq); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 482 | set_irq_flags(irq, IRQF_VALID); |
| 483 | } else set_irq_flags(irq, 0); |
| 484 | } |
Lennert Buytenhek | c498288 | 2005-06-24 20:54:35 +0100 | [diff] [blame] | 485 | |
Dave Jiang | 7866f64 | 2005-11-04 17:15:44 +0000 | [diff] [blame] | 486 | for (irq = IRQ_IXP2000_DRAM0_MIN_ERR; irq <= IRQ_IXP2000_SP_INT; irq++) { |
| 487 | if((1 << (irq - IRQ_IXP2000_DRAM0_MIN_ERR)) & |
| 488 | IXP2000_VALID_ERR_IRQ_MASK) { |
Thomas Gleixner | f38c02f | 2011-03-24 13:35:09 +0100 | [diff] [blame] | 489 | irq_set_chip_and_handler(irq, &ixp2000_err_irq_chip, |
| 490 | handle_level_irq); |
Dave Jiang | 7866f64 | 2005-11-04 17:15:44 +0000 | [diff] [blame] | 491 | set_irq_flags(irq, IRQF_VALID); |
| 492 | } |
| 493 | else |
| 494 | set_irq_flags(irq, 0); |
| 495 | } |
Thomas Gleixner | 6845664a | 2011-03-24 13:25:22 +0100 | [diff] [blame] | 496 | irq_set_chained_handler(IRQ_IXP2000_ERRSUM, ixp2000_err_irq_handler); |
Dave Jiang | 7866f64 | 2005-11-04 17:15:44 +0000 | [diff] [blame] | 497 | |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 498 | for (irq = IRQ_IXP2000_GPIO0; irq <= IRQ_IXP2000_GPIO7; irq++) { |
Thomas Gleixner | f38c02f | 2011-03-24 13:35:09 +0100 | [diff] [blame] | 499 | irq_set_chip_and_handler(irq, &ixp2000_GPIO_irq_chip, |
| 500 | handle_level_irq); |
Lennert Buytenhek | bd115ea | 2006-03-22 20:14:09 +0000 | [diff] [blame] | 501 | set_irq_flags(irq, IRQF_VALID); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 502 | } |
Thomas Gleixner | 6845664a | 2011-03-24 13:25:22 +0100 | [diff] [blame] | 503 | irq_set_chained_handler(IRQ_IXP2000_GPIO, ixp2000_GPIO_irq_handler); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 504 | |
| 505 | /* |
| 506 | * Enable PCI irqs. The actual PCI[AB] decoding is done in |
| 507 | * entry-macro.S, so we don't need a chained handler for the |
| 508 | * PCI interrupt source. |
| 509 | */ |
| 510 | ixp2000_reg_write(IXP2000_IRQ_ENABLE_SET, (1 << IRQ_IXP2000_PCI)); |
| 511 | for (irq = IRQ_IXP2000_PCIA; irq <= IRQ_IXP2000_PCIB; irq++) { |
Thomas Gleixner | f38c02f | 2011-03-24 13:35:09 +0100 | [diff] [blame] | 512 | irq_set_chip_and_handler(irq, &ixp2000_pci_irq_chip, |
| 513 | handle_level_irq); |
Linus Torvalds | 1da177e | 2005-04-16 15:20:36 -0700 | [diff] [blame] | 514 | set_irq_flags(irq, IRQF_VALID); |
| 515 | } |
| 516 | } |
| 517 | |