blob: eb5e6e95f3c7ee72e14e9eed3c5cd8167bc7a449 [file] [log] [blame]
Chris Wilson1d8e1c72010-08-07 11:01:28 +01001/*
2 * Copyright © 2006-2010 Intel Corporation
3 * Copyright (c) 2006 Dave Airlie <airlied@linux.ie>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 *
24 * Authors:
25 * Eric Anholt <eric@anholt.net>
26 * Dave Airlie <airlied@linux.ie>
27 * Jesse Barnes <jesse.barnes@intel.com>
28 * Chris Wilson <chris@chris-wilson.co.uk>
29 */
30
Joe Perchesa70491c2012-03-18 13:00:11 -070031#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
32
Carsten Emde7bd90902012-03-15 15:56:25 +010033#include <linux/moduleparam.h>
Chris Wilson1d8e1c72010-08-07 11:01:28 +010034#include "intel_drv.h"
35
Takashi Iwaiba3820a2011-03-10 14:02:12 +010036#define PCI_LBPC 0xf4 /* legacy/combination backlight modes */
37
Chris Wilson1d8e1c72010-08-07 11:01:28 +010038void
39intel_fixed_panel_mode(struct drm_display_mode *fixed_mode,
40 struct drm_display_mode *adjusted_mode)
41{
42 adjusted_mode->hdisplay = fixed_mode->hdisplay;
43 adjusted_mode->hsync_start = fixed_mode->hsync_start;
44 adjusted_mode->hsync_end = fixed_mode->hsync_end;
45 adjusted_mode->htotal = fixed_mode->htotal;
46
47 adjusted_mode->vdisplay = fixed_mode->vdisplay;
48 adjusted_mode->vsync_start = fixed_mode->vsync_start;
49 adjusted_mode->vsync_end = fixed_mode->vsync_end;
50 adjusted_mode->vtotal = fixed_mode->vtotal;
51
52 adjusted_mode->clock = fixed_mode->clock;
Chris Wilson1d8e1c72010-08-07 11:01:28 +010053}
54
55/* adjusted_mode has been preset to be the panel's fixed mode */
56void
57intel_pch_panel_fitting(struct drm_device *dev,
58 int fitting_mode,
Daniel Vettercb1793c2012-06-04 18:39:21 +020059 const struct drm_display_mode *mode,
Chris Wilson1d8e1c72010-08-07 11:01:28 +010060 struct drm_display_mode *adjusted_mode)
61{
62 struct drm_i915_private *dev_priv = dev->dev_private;
63 int x, y, width, height;
64
65 x = y = width = height = 0;
66
67 /* Native modes don't need fitting */
68 if (adjusted_mode->hdisplay == mode->hdisplay &&
69 adjusted_mode->vdisplay == mode->vdisplay)
70 goto done;
71
72 switch (fitting_mode) {
73 case DRM_MODE_SCALE_CENTER:
74 width = mode->hdisplay;
75 height = mode->vdisplay;
76 x = (adjusted_mode->hdisplay - width + 1)/2;
77 y = (adjusted_mode->vdisplay - height + 1)/2;
78 break;
79
80 case DRM_MODE_SCALE_ASPECT:
81 /* Scale but preserve the aspect ratio */
82 {
83 u32 scaled_width = adjusted_mode->hdisplay * mode->vdisplay;
84 u32 scaled_height = mode->hdisplay * adjusted_mode->vdisplay;
85 if (scaled_width > scaled_height) { /* pillar */
86 width = scaled_height / mode->vdisplay;
Adam Jackson302983e2011-07-13 16:32:32 -040087 if (width & 1)
Akshay Joshi0206e352011-08-16 15:34:10 -040088 width++;
Chris Wilson1d8e1c72010-08-07 11:01:28 +010089 x = (adjusted_mode->hdisplay - width + 1) / 2;
90 y = 0;
91 height = adjusted_mode->vdisplay;
92 } else if (scaled_width < scaled_height) { /* letter */
93 height = scaled_width / mode->hdisplay;
Adam Jackson302983e2011-07-13 16:32:32 -040094 if (height & 1)
95 height++;
Chris Wilson1d8e1c72010-08-07 11:01:28 +010096 y = (adjusted_mode->vdisplay - height + 1) / 2;
97 x = 0;
98 width = adjusted_mode->hdisplay;
99 } else {
100 x = y = 0;
101 width = adjusted_mode->hdisplay;
102 height = adjusted_mode->vdisplay;
103 }
104 }
105 break;
106
107 default:
108 case DRM_MODE_SCALE_FULLSCREEN:
109 x = y = 0;
110 width = adjusted_mode->hdisplay;
111 height = adjusted_mode->vdisplay;
112 break;
113 }
114
115done:
116 dev_priv->pch_pf_pos = (x << 16) | y;
117 dev_priv->pch_pf_size = (width << 16) | height;
118}
Chris Wilsona9573552010-08-22 13:18:16 +0100119
Takashi Iwaiba3820a2011-03-10 14:02:12 +0100120static int is_backlight_combination_mode(struct drm_device *dev)
121{
122 struct drm_i915_private *dev_priv = dev->dev_private;
123
124 if (INTEL_INFO(dev)->gen >= 4)
125 return I915_READ(BLC_PWM_CTL2) & BLM_COMBINATION_MODE;
126
127 if (IS_GEN2(dev))
128 return I915_READ(BLC_PWM_CTL) & BLM_LEGACY_MODE;
129
130 return 0;
131}
132
Jani Nikulabfd75902012-12-04 16:36:28 +0200133static u32 i915_read_blc_pwm_ctl(struct drm_device *dev)
Chris Wilson0b0b0532010-11-23 09:45:50 +0000134{
Jani Nikulabfd75902012-12-04 16:36:28 +0200135 struct drm_i915_private *dev_priv = dev->dev_private;
Chris Wilson0b0b0532010-11-23 09:45:50 +0000136 u32 val;
137
138 /* Restore the CTL value if it lost, e.g. GPU reset */
139
140 if (HAS_PCH_SPLIT(dev_priv->dev)) {
141 val = I915_READ(BLC_PWM_PCH_CTL2);
Daniel Vetterf4c956a2012-11-02 19:55:02 +0100142 if (dev_priv->regfile.saveBLC_PWM_CTL2 == 0) {
143 dev_priv->regfile.saveBLC_PWM_CTL2 = val;
Chris Wilson0b0b0532010-11-23 09:45:50 +0000144 } else if (val == 0) {
Daniel Vetterf4c956a2012-11-02 19:55:02 +0100145 val = dev_priv->regfile.saveBLC_PWM_CTL2;
Jani Nikulabfd75902012-12-04 16:36:28 +0200146 I915_WRITE(BLC_PWM_PCH_CTL2, val);
Chris Wilson0b0b0532010-11-23 09:45:50 +0000147 }
148 } else {
149 val = I915_READ(BLC_PWM_CTL);
Daniel Vetterf4c956a2012-11-02 19:55:02 +0100150 if (dev_priv->regfile.saveBLC_PWM_CTL == 0) {
151 dev_priv->regfile.saveBLC_PWM_CTL = val;
Jani Nikulabfd75902012-12-04 16:36:28 +0200152 if (INTEL_INFO(dev)->gen >= 4)
153 dev_priv->regfile.saveBLC_PWM_CTL2 =
154 I915_READ(BLC_PWM_CTL2);
Chris Wilson0b0b0532010-11-23 09:45:50 +0000155 } else if (val == 0) {
Daniel Vetterf4c956a2012-11-02 19:55:02 +0100156 val = dev_priv->regfile.saveBLC_PWM_CTL;
Jani Nikulabfd75902012-12-04 16:36:28 +0200157 I915_WRITE(BLC_PWM_CTL, val);
158 if (INTEL_INFO(dev)->gen >= 4)
159 I915_WRITE(BLC_PWM_CTL2,
160 dev_priv->regfile.saveBLC_PWM_CTL2);
Chris Wilson0b0b0532010-11-23 09:45:50 +0000161 }
162 }
163
164 return val;
165}
166
Jani Nikula28dcc2d2012-09-03 16:25:12 +0300167static u32 _intel_panel_get_max_backlight(struct drm_device *dev)
Chris Wilsona9573552010-08-22 13:18:16 +0100168{
Chris Wilsona9573552010-08-22 13:18:16 +0100169 u32 max;
170
Jani Nikulabfd75902012-12-04 16:36:28 +0200171 max = i915_read_blc_pwm_ctl(dev);
Chris Wilson0b0b0532010-11-23 09:45:50 +0000172
Chris Wilsona9573552010-08-22 13:18:16 +0100173 if (HAS_PCH_SPLIT(dev)) {
Chris Wilson0b0b0532010-11-23 09:45:50 +0000174 max >>= 16;
Chris Wilsona9573552010-08-22 13:18:16 +0100175 } else {
Keith Packardca884792011-11-18 11:09:24 -0800176 if (INTEL_INFO(dev)->gen < 4)
Chris Wilsona9573552010-08-22 13:18:16 +0100177 max >>= 17;
Keith Packardca884792011-11-18 11:09:24 -0800178 else
Chris Wilsona9573552010-08-22 13:18:16 +0100179 max >>= 16;
Takashi Iwaiba3820a2011-03-10 14:02:12 +0100180
181 if (is_backlight_combination_mode(dev))
182 max *= 0xff;
Chris Wilsona9573552010-08-22 13:18:16 +0100183 }
184
Jani Nikula28dcc2d2012-09-03 16:25:12 +0300185 return max;
186}
187
188u32 intel_panel_get_max_backlight(struct drm_device *dev)
189{
190 u32 max;
191
192 max = _intel_panel_get_max_backlight(dev);
193 if (max == 0) {
194 /* XXX add code here to query mode clock or hardware clock
195 * and program max PWM appropriately.
196 */
197 pr_warn_once("fixme: max PWM is zero\n");
198 return 1;
199 }
200
Chris Wilsona9573552010-08-22 13:18:16 +0100201 DRM_DEBUG_DRIVER("max backlight PWM = %d\n", max);
202 return max;
203}
204
Carsten Emde4dca20e2012-03-15 15:56:26 +0100205static int i915_panel_invert_brightness;
206MODULE_PARM_DESC(invert_brightness, "Invert backlight brightness "
207 "(-1 force normal, 0 machine defaults, 1 force inversion), please "
Carsten Emde7bd90902012-03-15 15:56:25 +0100208 "report PCI device ID, subsystem vendor and subsystem device ID "
209 "to dri-devel@lists.freedesktop.org, if your machine needs it. "
210 "It will then be included in an upcoming module version.");
Carsten Emde4dca20e2012-03-15 15:56:26 +0100211module_param_named(invert_brightness, i915_panel_invert_brightness, int, 0600);
Carsten Emde7bd90902012-03-15 15:56:25 +0100212static u32 intel_panel_compute_brightness(struct drm_device *dev, u32 val)
213{
Carsten Emde4dca20e2012-03-15 15:56:26 +0100214 struct drm_i915_private *dev_priv = dev->dev_private;
215
216 if (i915_panel_invert_brightness < 0)
217 return val;
218
219 if (i915_panel_invert_brightness > 0 ||
220 dev_priv->quirks & QUIRK_INVERT_BRIGHTNESS)
Carsten Emde7bd90902012-03-15 15:56:25 +0100221 return intel_panel_get_max_backlight(dev) - val;
222
223 return val;
224}
225
Stéphane Marchesinfaea35d2012-07-30 13:51:38 -0700226static u32 intel_panel_get_backlight(struct drm_device *dev)
Chris Wilsona9573552010-08-22 13:18:16 +0100227{
228 struct drm_i915_private *dev_priv = dev->dev_private;
229 u32 val;
230
231 if (HAS_PCH_SPLIT(dev)) {
232 val = I915_READ(BLC_PWM_CPU_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
233 } else {
234 val = I915_READ(BLC_PWM_CTL) & BACKLIGHT_DUTY_CYCLE_MASK;
Keith Packardca884792011-11-18 11:09:24 -0800235 if (INTEL_INFO(dev)->gen < 4)
Chris Wilsona9573552010-08-22 13:18:16 +0100236 val >>= 1;
Takashi Iwaiba3820a2011-03-10 14:02:12 +0100237
Akshay Joshi0206e352011-08-16 15:34:10 -0400238 if (is_backlight_combination_mode(dev)) {
Takashi Iwaiba3820a2011-03-10 14:02:12 +0100239 u8 lbpc;
240
Takashi Iwaiba3820a2011-03-10 14:02:12 +0100241 pci_read_config_byte(dev->pdev, PCI_LBPC, &lbpc);
242 val *= lbpc;
243 }
Chris Wilsona9573552010-08-22 13:18:16 +0100244 }
245
Carsten Emde7bd90902012-03-15 15:56:25 +0100246 val = intel_panel_compute_brightness(dev, val);
Chris Wilsona9573552010-08-22 13:18:16 +0100247 DRM_DEBUG_DRIVER("get backlight PWM = %d\n", val);
248 return val;
249}
250
251static void intel_pch_panel_set_backlight(struct drm_device *dev, u32 level)
252{
253 struct drm_i915_private *dev_priv = dev->dev_private;
254 u32 val = I915_READ(BLC_PWM_CPU_CTL) & ~BACKLIGHT_DUTY_CYCLE_MASK;
255 I915_WRITE(BLC_PWM_CPU_CTL, val | level);
256}
257
Takashi Iwaif52c6192011-10-14 11:45:40 +0200258static void intel_panel_actually_set_backlight(struct drm_device *dev, u32 level)
Chris Wilsona9573552010-08-22 13:18:16 +0100259{
260 struct drm_i915_private *dev_priv = dev->dev_private;
261 u32 tmp;
262
263 DRM_DEBUG_DRIVER("set backlight PWM = %d\n", level);
Carsten Emde7bd90902012-03-15 15:56:25 +0100264 level = intel_panel_compute_brightness(dev, level);
Chris Wilsona9573552010-08-22 13:18:16 +0100265
266 if (HAS_PCH_SPLIT(dev))
267 return intel_pch_panel_set_backlight(dev, level);
Takashi Iwaiba3820a2011-03-10 14:02:12 +0100268
Akshay Joshi0206e352011-08-16 15:34:10 -0400269 if (is_backlight_combination_mode(dev)) {
Takashi Iwaiba3820a2011-03-10 14:02:12 +0100270 u32 max = intel_panel_get_max_backlight(dev);
271 u8 lbpc;
272
273 lbpc = level * 0xfe / max + 1;
274 level /= lbpc;
275 pci_write_config_byte(dev->pdev, PCI_LBPC, lbpc);
276 }
277
Chris Wilsona9573552010-08-22 13:18:16 +0100278 tmp = I915_READ(BLC_PWM_CTL);
Daniel Vettera7269152012-11-20 14:50:08 +0100279 if (INTEL_INFO(dev)->gen < 4)
Chris Wilsona9573552010-08-22 13:18:16 +0100280 level <<= 1;
Keith Packardca884792011-11-18 11:09:24 -0800281 tmp &= ~BACKLIGHT_DUTY_CYCLE_MASK;
Chris Wilsona9573552010-08-22 13:18:16 +0100282 I915_WRITE(BLC_PWM_CTL, tmp | level);
283}
Chris Wilson47356eb2011-01-11 17:06:04 +0000284
Takashi Iwaif52c6192011-10-14 11:45:40 +0200285void intel_panel_set_backlight(struct drm_device *dev, u32 level)
286{
287 struct drm_i915_private *dev_priv = dev->dev_private;
288
Jani Nikula31ad8ec2013-04-02 15:48:09 +0300289 dev_priv->backlight.level = level;
290 if (dev_priv->backlight.device)
291 dev_priv->backlight.device->props.brightness = level;
Jani Nikulab6b3ba52013-03-12 11:44:15 +0200292
Jani Nikula31ad8ec2013-04-02 15:48:09 +0300293 if (dev_priv->backlight.enabled)
Takashi Iwaif52c6192011-10-14 11:45:40 +0200294 intel_panel_actually_set_backlight(dev, level);
295}
296
Chris Wilson47356eb2011-01-11 17:06:04 +0000297void intel_panel_disable_backlight(struct drm_device *dev)
298{
299 struct drm_i915_private *dev_priv = dev->dev_private;
300
Jani Nikula31ad8ec2013-04-02 15:48:09 +0300301 dev_priv->backlight.enabled = false;
Takashi Iwaif52c6192011-10-14 11:45:40 +0200302 intel_panel_actually_set_backlight(dev, 0);
Daniel Vetter24ded202012-06-05 12:14:54 +0200303
304 if (INTEL_INFO(dev)->gen >= 4) {
Paulo Zanonia4f32fc2012-07-14 11:57:12 -0300305 uint32_t reg, tmp;
Daniel Vetter24ded202012-06-05 12:14:54 +0200306
307 reg = HAS_PCH_SPLIT(dev) ? BLC_PWM_CPU_CTL2 : BLC_PWM_CTL2;
308
309 I915_WRITE(reg, I915_READ(reg) & ~BLM_PWM_ENABLE);
Paulo Zanonia4f32fc2012-07-14 11:57:12 -0300310
311 if (HAS_PCH_SPLIT(dev)) {
312 tmp = I915_READ(BLC_PWM_PCH_CTL1);
313 tmp &= ~BLM_PCH_PWM_ENABLE;
314 I915_WRITE(BLC_PWM_PCH_CTL1, tmp);
315 }
Daniel Vetter24ded202012-06-05 12:14:54 +0200316 }
Chris Wilson47356eb2011-01-11 17:06:04 +0000317}
318
Daniel Vetter24ded202012-06-05 12:14:54 +0200319void intel_panel_enable_backlight(struct drm_device *dev,
320 enum pipe pipe)
Chris Wilson47356eb2011-01-11 17:06:04 +0000321{
322 struct drm_i915_private *dev_priv = dev->dev_private;
323
Jani Nikula31ad8ec2013-04-02 15:48:09 +0300324 if (dev_priv->backlight.level == 0) {
325 dev_priv->backlight.level = intel_panel_get_max_backlight(dev);
326 if (dev_priv->backlight.device)
327 dev_priv->backlight.device->props.brightness =
328 dev_priv->backlight.level;
Jani Nikulab6b3ba52013-03-12 11:44:15 +0200329 }
Chris Wilson47356eb2011-01-11 17:06:04 +0000330
Daniel Vetter24ded202012-06-05 12:14:54 +0200331 if (INTEL_INFO(dev)->gen >= 4) {
332 uint32_t reg, tmp;
333
334 reg = HAS_PCH_SPLIT(dev) ? BLC_PWM_CPU_CTL2 : BLC_PWM_CTL2;
335
336
337 tmp = I915_READ(reg);
338
339 /* Note that this can also get called through dpms changes. And
340 * we don't track the backlight dpms state, hence check whether
341 * we have to do anything first. */
342 if (tmp & BLM_PWM_ENABLE)
Takashi Iwai770c1232012-08-11 08:56:42 +0200343 goto set_level;
Daniel Vetter24ded202012-06-05 12:14:54 +0200344
Ben Widawsky7eb552a2013-03-13 14:05:41 -0700345 if (INTEL_INFO(dev)->num_pipes == 3)
Daniel Vetter24ded202012-06-05 12:14:54 +0200346 tmp &= ~BLM_PIPE_SELECT_IVB;
347 else
348 tmp &= ~BLM_PIPE_SELECT;
349
350 tmp |= BLM_PIPE(pipe);
351 tmp &= ~BLM_PWM_ENABLE;
352
353 I915_WRITE(reg, tmp);
354 POSTING_READ(reg);
355 I915_WRITE(reg, tmp | BLM_PWM_ENABLE);
Paulo Zanonia4f32fc2012-07-14 11:57:12 -0300356
357 if (HAS_PCH_SPLIT(dev)) {
358 tmp = I915_READ(BLC_PWM_PCH_CTL1);
359 tmp |= BLM_PCH_PWM_ENABLE;
360 tmp &= ~BLM_PCH_OVERRIDE_ENABLE;
361 I915_WRITE(BLC_PWM_PCH_CTL1, tmp);
362 }
Daniel Vetter24ded202012-06-05 12:14:54 +0200363 }
Takashi Iwai770c1232012-08-11 08:56:42 +0200364
365set_level:
Daniel Vetterb1289372013-03-22 15:44:46 +0100366 /* Call below after setting BLC_PWM_CPU_CTL2 and BLC_PWM_PCH_CTL1.
367 * BLC_PWM_CPU_CTL may be cleared to zero automatically when these
368 * registers are set.
Takashi Iwai770c1232012-08-11 08:56:42 +0200369 */
Daniel Vetterecb135a2013-04-03 11:25:32 +0200370 dev_priv->backlight.enabled = true;
371 intel_panel_actually_set_backlight(dev, dev_priv->backlight.level);
Chris Wilson47356eb2011-01-11 17:06:04 +0000372}
373
Matthew Garrettaaa6fd22011-08-12 12:11:33 +0200374static void intel_panel_init_backlight(struct drm_device *dev)
Chris Wilson47356eb2011-01-11 17:06:04 +0000375{
376 struct drm_i915_private *dev_priv = dev->dev_private;
377
Jani Nikula31ad8ec2013-04-02 15:48:09 +0300378 dev_priv->backlight.level = intel_panel_get_backlight(dev);
379 dev_priv->backlight.enabled = dev_priv->backlight.level != 0;
Chris Wilson47356eb2011-01-11 17:06:04 +0000380}
Chris Wilsonfe16d942011-02-12 10:29:38 +0000381
382enum drm_connector_status
383intel_panel_detect(struct drm_device *dev)
384{
385 struct drm_i915_private *dev_priv = dev->dev_private;
386
387 /* Assume that the BIOS does not lie through the OpRegion... */
Daniel Vettera7269152012-11-20 14:50:08 +0100388 if (!i915_panel_ignore_lid && dev_priv->opregion.lid_state) {
Chris Wilsonfe16d942011-02-12 10:29:38 +0000389 return ioread32(dev_priv->opregion.lid_state) & 0x1 ?
390 connector_status_connected :
391 connector_status_disconnected;
Daniel Vettera7269152012-11-20 14:50:08 +0100392 }
Chris Wilsonfe16d942011-02-12 10:29:38 +0000393
Daniel Vettera7269152012-11-20 14:50:08 +0100394 switch (i915_panel_ignore_lid) {
395 case -2:
396 return connector_status_connected;
397 case -1:
398 return connector_status_disconnected;
399 default:
400 return connector_status_unknown;
401 }
Chris Wilsonfe16d942011-02-12 10:29:38 +0000402}
Matthew Garrettaaa6fd22011-08-12 12:11:33 +0200403
404#ifdef CONFIG_BACKLIGHT_CLASS_DEVICE
405static int intel_panel_update_status(struct backlight_device *bd)
406{
407 struct drm_device *dev = bl_get_data(bd);
408 intel_panel_set_backlight(dev, bd->props.brightness);
409 return 0;
410}
411
412static int intel_panel_get_brightness(struct backlight_device *bd)
413{
414 struct drm_device *dev = bl_get_data(bd);
Jani Nikula7c233962013-03-12 11:44:16 +0200415 return intel_panel_get_backlight(dev);
Matthew Garrettaaa6fd22011-08-12 12:11:33 +0200416}
417
418static const struct backlight_ops intel_panel_bl_ops = {
419 .update_status = intel_panel_update_status,
420 .get_brightness = intel_panel_get_brightness,
421};
422
Jani Nikula0657b6b2012-10-19 14:51:46 +0300423int intel_panel_setup_backlight(struct drm_connector *connector)
Matthew Garrettaaa6fd22011-08-12 12:11:33 +0200424{
Jani Nikula0657b6b2012-10-19 14:51:46 +0300425 struct drm_device *dev = connector->dev;
Matthew Garrettaaa6fd22011-08-12 12:11:33 +0200426 struct drm_i915_private *dev_priv = dev->dev_private;
427 struct backlight_properties props;
Matthew Garrettaaa6fd22011-08-12 12:11:33 +0200428
429 intel_panel_init_backlight(dev);
430
Jani Nikuladc652f92013-04-12 15:18:38 +0300431 if (WARN_ON(dev_priv->backlight.device))
432 return -ENODEV;
433
Corentin Charyaf437cf2012-05-22 10:29:46 +0100434 memset(&props, 0, sizeof(props));
Matthew Garrettaaa6fd22011-08-12 12:11:33 +0200435 props.type = BACKLIGHT_RAW;
Jani Nikula31ad8ec2013-04-02 15:48:09 +0300436 props.brightness = dev_priv->backlight.level;
Jani Nikula28dcc2d2012-09-03 16:25:12 +0300437 props.max_brightness = _intel_panel_get_max_backlight(dev);
438 if (props.max_brightness == 0) {
Jani Nikulae86b6182012-10-25 10:57:38 +0300439 DRM_DEBUG_DRIVER("Failed to get maximum backlight value\n");
Jani Nikula28dcc2d2012-09-03 16:25:12 +0300440 return -ENODEV;
441 }
Jani Nikula31ad8ec2013-04-02 15:48:09 +0300442 dev_priv->backlight.device =
Matthew Garrettaaa6fd22011-08-12 12:11:33 +0200443 backlight_device_register("intel_backlight",
444 &connector->kdev, dev,
445 &intel_panel_bl_ops, &props);
446
Jani Nikula31ad8ec2013-04-02 15:48:09 +0300447 if (IS_ERR(dev_priv->backlight.device)) {
Matthew Garrettaaa6fd22011-08-12 12:11:33 +0200448 DRM_ERROR("Failed to register backlight: %ld\n",
Jani Nikula31ad8ec2013-04-02 15:48:09 +0300449 PTR_ERR(dev_priv->backlight.device));
450 dev_priv->backlight.device = NULL;
Matthew Garrettaaa6fd22011-08-12 12:11:33 +0200451 return -ENODEV;
452 }
Matthew Garrettaaa6fd22011-08-12 12:11:33 +0200453 return 0;
454}
455
456void intel_panel_destroy_backlight(struct drm_device *dev)
457{
458 struct drm_i915_private *dev_priv = dev->dev_private;
Jani Nikuladc652f92013-04-12 15:18:38 +0300459 if (dev_priv->backlight.device) {
Jani Nikula31ad8ec2013-04-02 15:48:09 +0300460 backlight_device_unregister(dev_priv->backlight.device);
Jani Nikuladc652f92013-04-12 15:18:38 +0300461 dev_priv->backlight.device = NULL;
462 }
Matthew Garrettaaa6fd22011-08-12 12:11:33 +0200463}
464#else
Jani Nikula0657b6b2012-10-19 14:51:46 +0300465int intel_panel_setup_backlight(struct drm_connector *connector)
Matthew Garrettaaa6fd22011-08-12 12:11:33 +0200466{
Jani Nikula0657b6b2012-10-19 14:51:46 +0300467 intel_panel_init_backlight(connector->dev);
Matthew Garrettaaa6fd22011-08-12 12:11:33 +0200468 return 0;
469}
470
471void intel_panel_destroy_backlight(struct drm_device *dev)
472{
473 return;
474}
475#endif
Jani Nikula1d508702012-10-19 14:51:49 +0300476
Jani Nikuladd06f902012-10-19 14:51:50 +0300477int intel_panel_init(struct intel_panel *panel,
478 struct drm_display_mode *fixed_mode)
Jani Nikula1d508702012-10-19 14:51:49 +0300479{
Jani Nikuladd06f902012-10-19 14:51:50 +0300480 panel->fixed_mode = fixed_mode;
481
Jani Nikula1d508702012-10-19 14:51:49 +0300482 return 0;
483}
484
485void intel_panel_fini(struct intel_panel *panel)
486{
Jani Nikuladd06f902012-10-19 14:51:50 +0300487 struct intel_connector *intel_connector =
488 container_of(panel, struct intel_connector, panel);
489
490 if (panel->fixed_mode)
491 drm_mode_destroy(intel_connector->base.dev, panel->fixed_mode);
Jani Nikula1d508702012-10-19 14:51:49 +0300492}