blob: 7b7c0179795bad36e66abcf63fce82abac4619db [file] [log] [blame]
Linus Torvalds1da177e2005-04-16 15:20:36 -07001/*
2 * arch/arm/mach-pxa/time.c
3 *
Bill Gatliff7bbb18c2007-07-21 03:39:36 +01004 * PXA clocksource, clockevents, and OST interrupt handlers.
5 * Copyright (c) 2007 by Bill Gatliff <bgat@billgatliff.com>.
6 *
7 * Derived from Nicolas Pitre's PXA timer handler Copyright (c) 2001
8 * by MontaVista Software, Inc. (Nico, your code rocks!)
Linus Torvalds1da177e2005-04-16 15:20:36 -07009 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
13 */
14
Linus Torvalds1da177e2005-04-16 15:20:36 -070015#include <linux/kernel.h>
16#include <linux/init.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070017#include <linux/interrupt.h>
Bill Gatliff7bbb18c2007-07-21 03:39:36 +010018#include <linux/clockchips.h>
Nicolas Pitre6c3a1582007-08-17 16:55:22 +010019#include <linux/sched.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070020
Nicolas Pitre6c3a1582007-08-17 16:55:22 +010021#include <asm/div64.h>
22#include <asm/cnt32_to_63.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070023#include <asm/mach/irq.h>
24#include <asm/mach/time.h>
25#include <asm/arch/pxa-regs.h>
Russell King08197f62007-09-01 21:12:50 +010026#include <asm/mach-types.h>
Linus Torvalds1da177e2005-04-16 15:20:36 -070027
Nicolas Pitre6c3a1582007-08-17 16:55:22 +010028/*
29 * This is PXA's sched_clock implementation. This has a resolution
30 * of at least 308 ns and a maximum value of 208 days.
31 *
32 * The return value is guaranteed to be monotonic in that range as
33 * long as there is always less than 582 seconds between successive
34 * calls to sched_clock() which should always be the case in practice.
35 */
36
37#define OSCR2NS_SCALE_FACTOR 10
38
39static unsigned long oscr2ns_scale;
40
41static void __init set_oscr2ns_scale(unsigned long oscr_rate)
42{
43 unsigned long long v = 1000000000ULL << OSCR2NS_SCALE_FACTOR;
44 do_div(v, oscr_rate);
45 oscr2ns_scale = v;
46 /*
47 * We want an even value to automatically clear the top bit
48 * returned by cnt32_to_63() without an additional run time
49 * instruction. So if the LSB is 1 then round it up.
50 */
51 if (oscr2ns_scale & 1)
52 oscr2ns_scale++;
53}
54
55unsigned long long sched_clock(void)
56{
57 unsigned long long v = cnt32_to_63(OSCR);
58 return (v * oscr2ns_scale) >> OSCR2NS_SCALE_FACTOR;
59}
60
61
Russell Kinga88264c2007-11-12 22:45:16 +000062#define MIN_OSCR_DELTA 16
63
Linus Torvalds1da177e2005-04-16 15:20:36 -070064static irqreturn_t
Bill Gatliff7bbb18c2007-07-21 03:39:36 +010065pxa_ost0_interrupt(int irq, void *dev_id)
Linus Torvalds1da177e2005-04-16 15:20:36 -070066{
Bill Gatliff7bbb18c2007-07-21 03:39:36 +010067 struct clock_event_device *c = dev_id;
Linus Torvalds1da177e2005-04-16 15:20:36 -070068
Russell Kinga88264c2007-11-12 22:45:16 +000069 /* Disarm the compare/match, signal the event. */
70 OIER &= ~OIER_E0;
71 OSSR = OSSR_M0;
72 c->event_handler(c);
Linus Torvalds1da177e2005-04-16 15:20:36 -070073
74 return IRQ_HANDLED;
75}
76
Bill Gatliff7bbb18c2007-07-21 03:39:36 +010077static int
78pxa_osmr0_set_next_event(unsigned long delta, struct clock_event_device *dev)
79{
Russell King91bc51d2007-11-08 23:35:46 +000080 unsigned long flags, next, oscr;
Bill Gatliff7bbb18c2007-07-21 03:39:36 +010081
Russell King91bc51d2007-11-08 23:35:46 +000082 raw_local_irq_save(flags);
Bill Gatliff7bbb18c2007-07-21 03:39:36 +010083 OIER |= OIER_E0;
Russell King91bc51d2007-11-08 23:35:46 +000084 next = OSCR + delta;
85 OSMR0 = next;
86 oscr = OSCR;
87 raw_local_irq_restore(flags);
88
89 return (signed)(next - oscr) <= MIN_OSCR_DELTA ? -ETIME : 0;
Bill Gatliff7bbb18c2007-07-21 03:39:36 +010090}
91
92static void
93pxa_osmr0_set_mode(enum clock_event_mode mode, struct clock_event_device *dev)
94{
95 unsigned long irqflags;
96
97 switch (mode) {
Bill Gatliff7bbb18c2007-07-21 03:39:36 +010098 case CLOCK_EVT_MODE_ONESHOT:
99 raw_local_irq_save(irqflags);
100 OIER &= ~OIER_E0;
Russell King91bc51d2007-11-08 23:35:46 +0000101 OSSR = OSSR_M0;
Bill Gatliff7bbb18c2007-07-21 03:39:36 +0100102 raw_local_irq_restore(irqflags);
103 break;
104
105 case CLOCK_EVT_MODE_UNUSED:
106 case CLOCK_EVT_MODE_SHUTDOWN:
107 /* initializing, released, or preparing for suspend */
108 raw_local_irq_save(irqflags);
109 OIER &= ~OIER_E0;
Russell King91bc51d2007-11-08 23:35:46 +0000110 OSSR = OSSR_M0;
Bill Gatliff7bbb18c2007-07-21 03:39:36 +0100111 raw_local_irq_restore(irqflags);
112 break;
Russell Kingdf433092007-10-27 15:15:49 +0100113
114 case CLOCK_EVT_MODE_RESUME:
Russell Kinga88264c2007-11-12 22:45:16 +0000115 case CLOCK_EVT_MODE_PERIODIC:
Russell Kingdf433092007-10-27 15:15:49 +0100116 break;
Bill Gatliff7bbb18c2007-07-21 03:39:36 +0100117 }
118}
119
120static struct clock_event_device ckevt_pxa_osmr0 = {
121 .name = "osmr0",
Russell Kinga88264c2007-11-12 22:45:16 +0000122 .features = CLOCK_EVT_FEAT_ONESHOT,
Bill Gatliff7bbb18c2007-07-21 03:39:36 +0100123 .shift = 32,
124 .rating = 200,
125 .cpumask = CPU_MASK_CPU0,
126 .set_next_event = pxa_osmr0_set_next_event,
127 .set_mode = pxa_osmr0_set_mode,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700128};
129
Bill Gatliff7bbb18c2007-07-21 03:39:36 +0100130static cycle_t pxa_read_oscr(void)
Sascha Hauerc80204e2006-12-12 09:21:50 +0100131{
132 return OSCR;
133}
134
Bill Gatliff7bbb18c2007-07-21 03:39:36 +0100135static struct clocksource cksrc_pxa_oscr0 = {
136 .name = "oscr0",
Sascha Hauerc80204e2006-12-12 09:21:50 +0100137 .rating = 200,
Bill Gatliff7bbb18c2007-07-21 03:39:36 +0100138 .read = pxa_read_oscr,
Sascha Hauerc80204e2006-12-12 09:21:50 +0100139 .mask = CLOCKSOURCE_MASK(32),
140 .shift = 20,
Thomas Gleixnerc66699a2007-02-16 01:27:37 -0800141 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
Sascha Hauerc80204e2006-12-12 09:21:50 +0100142};
143
Bill Gatliff7bbb18c2007-07-21 03:39:36 +0100144static struct irqaction pxa_ost0_irq = {
145 .name = "ost0",
146 .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
147 .handler = pxa_ost0_interrupt,
148 .dev_id = &ckevt_pxa_osmr0,
149};
150
Linus Torvalds1da177e2005-04-16 15:20:36 -0700151static void __init pxa_timer_init(void)
152{
Russell King08197f62007-09-01 21:12:50 +0100153 unsigned long clock_tick_rate;
154
Bill Gatliff7bbb18c2007-07-21 03:39:36 +0100155 OIER = 0;
156 OSSR = OSSR_M0 | OSSR_M1 | OSSR_M2 | OSSR_M3;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700157
Russell King08197f62007-09-01 21:12:50 +0100158 if (cpu_is_pxa21x() || cpu_is_pxa25x())
159 clock_tick_rate = 3686400;
160 else if (machine_is_mainstone())
161 clock_tick_rate = 3249600;
162 else
163 clock_tick_rate = 3250000;
164
165 set_oscr2ns_scale(clock_tick_rate);
Nicolas Pitre6c3a1582007-08-17 16:55:22 +0100166
Bill Gatliff7bbb18c2007-07-21 03:39:36 +0100167 ckevt_pxa_osmr0.mult =
Russell King08197f62007-09-01 21:12:50 +0100168 div_sc(clock_tick_rate, NSEC_PER_SEC, ckevt_pxa_osmr0.shift);
Bill Gatliff7bbb18c2007-07-21 03:39:36 +0100169 ckevt_pxa_osmr0.max_delta_ns =
170 clockevent_delta2ns(0x7fffffff, &ckevt_pxa_osmr0);
171 ckevt_pxa_osmr0.min_delta_ns =
Russell Kingdd01b2f2008-01-23 12:34:16 +0000172 clockevent_delta2ns(MIN_OSCR_DELTA * 2, &ckevt_pxa_osmr0) + 1;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700173
Bill Gatliff7bbb18c2007-07-21 03:39:36 +0100174 cksrc_pxa_oscr0.mult =
Russell King08197f62007-09-01 21:12:50 +0100175 clocksource_hz2mult(clock_tick_rate, cksrc_pxa_oscr0.shift);
Sascha Hauerc80204e2006-12-12 09:21:50 +0100176
Bill Gatliff7bbb18c2007-07-21 03:39:36 +0100177 setup_irq(IRQ_OST0, &pxa_ost0_irq);
178
179 clocksource_register(&cksrc_pxa_oscr0);
180 clockevents_register_device(&ckevt_pxa_osmr0);
Linus Torvalds1da177e2005-04-16 15:20:36 -0700181}
182
183#ifdef CONFIG_PM
Russell King4ae78062007-11-12 22:48:12 +0000184static unsigned long osmr[4], oier, oscr;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700185
186static void pxa_timer_suspend(void)
187{
188 osmr[0] = OSMR0;
189 osmr[1] = OSMR1;
190 osmr[2] = OSMR2;
191 osmr[3] = OSMR3;
192 oier = OIER;
Russell King4ae78062007-11-12 22:48:12 +0000193 oscr = OSCR;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700194}
195
196static void pxa_timer_resume(void)
197{
Russell King4ae78062007-11-12 22:48:12 +0000198 /*
199 * Ensure that we have at least MIN_OSCR_DELTA between match
200 * register 0 and the OSCR, to guarantee that we will receive
201 * the one-shot timer interrupt. We adjust OSMR0 in preference
202 * to OSCR to guarantee that OSCR is monotonically incrementing.
203 */
204 if (osmr[0] - oscr < MIN_OSCR_DELTA)
205 osmr[0] += MIN_OSCR_DELTA;
206
Linus Torvalds1da177e2005-04-16 15:20:36 -0700207 OSMR0 = osmr[0];
208 OSMR1 = osmr[1];
209 OSMR2 = osmr[2];
210 OSMR3 = osmr[3];
211 OIER = oier;
Russell King4ae78062007-11-12 22:48:12 +0000212 OSCR = oscr;
Linus Torvalds1da177e2005-04-16 15:20:36 -0700213}
214#else
215#define pxa_timer_suspend NULL
216#define pxa_timer_resume NULL
217#endif
218
219struct sys_timer pxa_timer = {
220 .init = pxa_timer_init,
221 .suspend = pxa_timer_suspend,
222 .resume = pxa_timer_resume,
Linus Torvalds1da177e2005-04-16 15:20:36 -0700223};