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gerrit-public.fairphone.software / kernel / msm-4.9 / df78b5c8faa72b3c04f82faab126de93af178348 / . / arch / mips / sibyte / Kconfig
blob: 841b301c99f001ced939e44f3caa3c979c7b1ab4 [file] [log] [blame]
Ralf Baechle38b18f722005-02-03 14:28:23 +0000[diff] [blame]1config SIBYTE_SB1250
2 bool
3 select HW_HAS_PCI
Ralf Baechleca6f5492007-03-09 12:17:32 +0000[diff] [blame]4 select SIBYTE_ENABLE_LDT_IF_PCI
Mark Masond619f382007-03-29 11:39:56 -0700[diff] [blame]5 select SIBYTE_HAS_ZBUS_PROFILING
Ralf Baechle38b18f722005-02-03 14:28:23 +0000[diff] [blame]6 select SIBYTE_SB1xxx_SOC
Ralf Baechlee73ea272006-06-04 11:51:46 +0100[diff] [blame]7 select SYS_SUPPORTS_SMP
Ralf Baechle38b18f722005-02-03 14:28:23 +0000[diff] [blame]8
9config SIBYTE_BCM1120
10 bool
11 select SIBYTE_BCM112X
Ralf Baechlebb9b8132007-03-09 15:59:56 +0000[diff] [blame]12 select SIBYTE_HAS_ZBUS_PROFILING
Ralf Baechle38b18f722005-02-03 14:28:23 +0000[diff] [blame]13 select SIBYTE_SB1xxx_SOC
14
15config SIBYTE_BCM1125
16 bool
17 select HW_HAS_PCI
18 select SIBYTE_BCM112X
Ralf Baechlebb9b8132007-03-09 15:59:56 +0000[diff] [blame]19 select SIBYTE_HAS_ZBUS_PROFILING
Ralf Baechle38b18f722005-02-03 14:28:23 +0000[diff] [blame]20 select SIBYTE_SB1xxx_SOC
21
22config SIBYTE_BCM1125H
23 bool
24 select HW_HAS_PCI
25 select SIBYTE_BCM112X
Ralf Baechleca6f5492007-03-09 12:17:32 +0000[diff] [blame]26 select SIBYTE_ENABLE_LDT_IF_PCI
Ralf Baechlebb9b8132007-03-09 15:59:56 +0000[diff] [blame]27 select SIBYTE_HAS_ZBUS_PROFILING
Ralf Baechle38b18f722005-02-03 14:28:23 +0000[diff] [blame]28 select SIBYTE_SB1xxx_SOC
29
30config SIBYTE_BCM112X
31 bool
32 select SIBYTE_SB1xxx_SOC
Ralf Baechlebb9b8132007-03-09 15:59:56 +0000[diff] [blame]33 select SIBYTE_HAS_ZBUS_PROFILING
Ralf Baechle38b18f722005-02-03 14:28:23 +0000[diff] [blame]34
Andrew Isaacsonf137e462005-10-19 23:56:38 -0700[diff] [blame]35config SIBYTE_BCM1x80
36 bool
37 select HW_HAS_PCI
Mark Masond619f382007-03-29 11:39:56 -0700[diff] [blame]38 select SIBYTE_HAS_ZBUS_PROFILING
Andrew Isaacsonf137e462005-10-19 23:56:38 -0700[diff] [blame]39 select SIBYTE_SB1xxx_SOC
Ralf Baechlee73ea272006-06-04 11:51:46 +0100[diff] [blame]40 select SYS_SUPPORTS_SMP
Andrew Isaacsonf137e462005-10-19 23:56:38 -0700[diff] [blame]41
42config SIBYTE_BCM1x55
43 bool
44 select HW_HAS_PCI
45 select SIBYTE_SB1xxx_SOC
Ralf Baechlebb9b8132007-03-09 15:59:56 +0000[diff] [blame]46 select SIBYTE_HAS_ZBUS_PROFILING
Ralf Baechlee73ea272006-06-04 11:51:46 +0100[diff] [blame]47 select SYS_SUPPORTS_SMP
Andrew Isaacsonf137e462005-10-19 23:56:38 -0700[diff] [blame]48
Ralf Baechle38b18f722005-02-03 14:28:23 +0000[diff] [blame]49config SIBYTE_SB1xxx_SOC
50 bool
Ralf Baechle38b18f722005-02-03 14:28:23 +0000[diff] [blame]51 select DMA_COHERENT
52 select SIBYTE_CFE
53 select SWAP_IO_SPACE
54 select SYS_SUPPORTS_32BIT_KERNEL
55 select SYS_SUPPORTS_64BIT_KERNEL
56
57choice
58 prompt "SiByte SOC Stepping"
59 depends on SIBYTE_SB1xxx_SOC
60
61config CPU_SB1_PASS_1
62 bool "1250 Pass1"
63 depends on SIBYTE_SB1250
64 select CPU_HAS_PREFETCH
65
66config CPU_SB1_PASS_2_1250
67 bool "1250 An"
68 depends on SIBYTE_SB1250
69 select CPU_SB1_PASS_2
70 help
71 Also called BCM1250 Pass 2
72
73config CPU_SB1_PASS_2_2
74 bool "1250 Bn"
75 depends on SIBYTE_SB1250
76 select CPU_HAS_PREFETCH
77 help
78 Also called BCM1250 Pass 2.2
79
80config CPU_SB1_PASS_4
81 bool "1250 Cn"
82 depends on SIBYTE_SB1250
83 select CPU_HAS_PREFETCH
84 help
85 Also called BCM1250 Pass 3
86
87config CPU_SB1_PASS_2_112x
88 bool "112x Hybrid"
89 depends on SIBYTE_BCM112X
90 select CPU_SB1_PASS_2
91
92config CPU_SB1_PASS_3
93 bool "112x An"
94 depends on SIBYTE_BCM112X
95 select CPU_HAS_PREFETCH
96
97endchoice
98
99config CPU_SB1_PASS_2
100 bool
101
102config SIBYTE_HAS_LDT
103 bool
Ralf Baechleca6f5492007-03-09 12:17:32 +0000[diff] [blame]104
105config SIBYTE_ENABLE_LDT_IF_PCI
106 bool
107 select SIBYTE_HAS_LDT if PCI
Ralf Baechle38b18f722005-02-03 14:28:23 +0000[diff] [blame]108
109config SIMULATION
110 bool "Running under simulation"
111 depends on SIBYTE_SB1xxx_SOC
112 help
113 Build a kernel suitable for running under the GDB simulator.
114 Primarily adjusts the kernel's notion of time.
115
Ralf Baechle77607632005-11-10 16:32:14 +0000[diff] [blame]116config SB1_CEX_ALWAYS_FATAL
Andrew Isaacsona4b5bd92005-10-19 23:57:40 -0700[diff] [blame]117 bool "All cache exceptions considered fatal (no recovery attempted)"
118 depends on SIBYTE_SB1xxx_SOC
119
Ralf Baechle77607632005-11-10 16:32:14 +0000[diff] [blame]120config SB1_CERR_STALL
Andrew Isaacsona4b5bd92005-10-19 23:57:40 -0700[diff] [blame]121 bool "Stall (rather than panic) on fatal cache error"
122 depends on SIBYTE_SB1xxx_SOC
123
Ralf Baechle38b18f722005-02-03 14:28:23 +0000[diff] [blame]124config SIBYTE_CFE
125 bool "Booting from CFE"
126 depends on SIBYTE_SB1xxx_SOC
Aurelien Jarnodf78b5c2007-09-05 08:58:26 +0200[diff] [blame^]127 select CFE
Ralf Baechle36a88532007-03-01 11:56:43 +0000[diff] [blame]128 select SYS_HAS_EARLY_PRINTK
Ralf Baechle38b18f722005-02-03 14:28:23 +0000[diff] [blame]129 help
130 Make use of the CFE API for enumerating available memory,
131 controlling secondary CPUs, and possibly console output.
132
133config SIBYTE_CFE_CONSOLE
134 bool "Use firmware console"
135 depends on SIBYTE_CFE
136 help
137 Use the CFE API's console write routines during boot. Other console
138 options (VT console, sb1250 duart console, etc.) should not be
139 configured.
140
141config SIBYTE_STANDALONE
142 bool
143 depends on SIBYTE_SB1xxx_SOC && !SIBYTE_CFE
Ralf Baechle36a88532007-03-01 11:56:43 +0000[diff] [blame]144 select SYS_HAS_EARLY_PRINTK
Ralf Baechle38b18f722005-02-03 14:28:23 +0000[diff] [blame]145 default y
146
147config SIBYTE_STANDALONE_RAM_SIZE
148 int "Memory size (in megabytes)"
149 depends on SIBYTE_STANDALONE
150 default "32"
151
152config SIBYTE_BUS_WATCHER
153 bool "Support for Bus Watcher statistics"
154 depends on SIBYTE_SB1xxx_SOC
155 help
156 Handle and keep statistics on the bus error interrupts (COR_ECC,
157 BAD_ECC, IO_BUS).
158
159config SIBYTE_BW_TRACE
160 bool "Capture bus trace before bus error"
161 depends on SIBYTE_BUS_WATCHER
162 help
163 Run a continuous bus trace, dumping the raw data as soon as
164 a ZBbus error is detected. Cannot work if ZBbus profiling
165 is turned on, and also will interfere with JTAG-based trace
166 buffer activity. Raw buffer data is dumped to console, and
167 must be processed off-line.
168
169config SIBYTE_SB1250_PROF
170 bool "Support for SB1/SOC profiling - SB1/SCD perf counters"
171 depends on SIBYTE_SB1xxx_SOC
172
173config SIBYTE_TBPROF
Ralf Baechlebb9b8132007-03-09 15:59:56 +0000[diff] [blame]174 tristate "Support for ZBbus profiling"
175 depends on SIBYTE_HAS_ZBUS_PROFILING
176
177config SIBYTE_HAS_ZBUS_PROFILING
178 bool