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Sascha Hauer6c7b068502012-03-07 21:01:28 +01001#ifndef __MACH_IMX_CLK_H
2#define __MACH_IMX_CLK_H
3
4#include <linux/spinlock.h>
5#include <linux/clk-provider.h>
Sascha Hauer3a84d172012-09-11 08:50:00 +02006
7extern spinlock_t imx_ccm_lock;
Sascha Hauer6c7b068502012-03-07 21:01:28 +01008
Alexander Shiyan229be9c2014-06-10 19:40:26 +04009void imx_check_clocks(struct clk *clks[], unsigned int count);
10
Liu Yingdfd87142013-07-04 17:57:17 +080011extern void imx_cscmr1_fixup(u32 *val);
12
Shawn Guo3bec5f82015-04-26 13:33:39 +080013enum imx_pllv1_type {
14 IMX_PLLV1_IMX1,
15 IMX_PLLV1_IMX21,
16 IMX_PLLV1_IMX25,
17 IMX_PLLV1_IMX27,
18 IMX_PLLV1_IMX31,
19 IMX_PLLV1_IMX35,
20};
21
22struct clk *imx_clk_pllv1(enum imx_pllv1_type type, const char *name,
23 const char *parent, void __iomem *base);
Sascha Hauer6c7b068502012-03-07 21:01:28 +010024
Sascha Hauera547b812012-03-19 12:36:10 +010025struct clk *imx_clk_pllv2(const char *name, const char *parent,
26 void __iomem *base);
27
Shawn Guoa3f6b9d2012-04-04 16:02:28 +080028enum imx_pllv3_type {
29 IMX_PLLV3_GENERIC,
30 IMX_PLLV3_SYS,
31 IMX_PLLV3_USB,
Stefan Agner60ad8462014-12-02 17:59:42 +010032 IMX_PLLV3_USB_VF610,
Shawn Guoa3f6b9d2012-04-04 16:02:28 +080033 IMX_PLLV3_AV,
34 IMX_PLLV3_ENET,
Frank Lif5394742015-05-19 02:45:02 +080035 IMX_PLLV3_ENET_IMX7,
Shawn Guoa3f6b9d2012-04-04 16:02:28 +080036};
37
38struct clk *imx_clk_pllv3(enum imx_pllv3_type type, const char *name,
Sascha Hauer2b254692012-11-22 10:18:41 +010039 const char *parent_name, void __iomem *base, u32 div_mask);
Shawn Guoa3f6b9d2012-04-04 16:02:28 +080040
Sascha Hauerb75c0152011-04-19 08:33:45 +020041struct clk *clk_register_gate2(struct device *dev, const char *name,
42 const char *parent_name, unsigned long flags,
43 void __iomem *reg, u8 bit_idx,
Shawn Guof9f28cd2014-04-19 10:58:22 +080044 u8 clk_gate_flags, spinlock_t *lock,
45 unsigned int *share_count);
Sascha Hauerb75c0152011-04-19 08:33:45 +020046
Martin Fuzzey75f83d02013-04-23 20:16:59 +080047struct clk * imx_obtain_fixed_clock(
48 const char *name, unsigned long rate);
49
Shawn Guo19d86342014-08-26 15:06:33 +080050struct clk *imx_clk_gate_exclusive(const char *name, const char *parent,
51 void __iomem *reg, u8 shift, u32 exclusive_mask);
52
Sascha Hauerb75c0152011-04-19 08:33:45 +020053static inline struct clk *imx_clk_gate2(const char *name, const char *parent,
54 void __iomem *reg, u8 shift)
55{
56 return clk_register_gate2(NULL, name, parent, CLK_SET_RATE_PARENT, reg,
Shawn Guof9f28cd2014-04-19 10:58:22 +080057 shift, 0, &imx_ccm_lock, NULL);
58}
59
60static inline struct clk *imx_clk_gate2_shared(const char *name,
61 const char *parent, void __iomem *reg, u8 shift,
62 unsigned int *share_count)
63{
64 return clk_register_gate2(NULL, name, parent, CLK_SET_RATE_PARENT, reg,
65 shift, 0, &imx_ccm_lock, share_count);
Sascha Hauerb75c0152011-04-19 08:33:45 +020066}
67
Shawn Guoa10bd672012-04-04 16:07:53 +080068struct clk *imx_clk_pfd(const char *name, const char *parent_name,
69 void __iomem *reg, u8 idx);
70
Shawn Guo32af7a82012-04-04 16:20:56 +080071struct clk *imx_clk_busy_divider(const char *name, const char *parent_name,
72 void __iomem *reg, u8 shift, u8 width,
73 void __iomem *busy_reg, u8 busy_shift);
74
75struct clk *imx_clk_busy_mux(const char *name, void __iomem *reg, u8 shift,
76 u8 width, void __iomem *busy_reg, u8 busy_shift,
77 const char **parent_names, int num_parents);
78
Liu Yingcbe7fc82013-07-04 17:22:26 +080079struct clk *imx_clk_fixup_divider(const char *name, const char *parent,
80 void __iomem *reg, u8 shift, u8 width,
81 void (*fixup)(u32 *val));
82
Liu Yinga49e6c42013-07-04 17:35:46 +080083struct clk *imx_clk_fixup_mux(const char *name, void __iomem *reg,
84 u8 shift, u8 width, const char **parents,
85 int num_parents, void (*fixup)(u32 *val));
86
Sascha Hauer6c7b068502012-03-07 21:01:28 +010087static inline struct clk *imx_clk_fixed(const char *name, int rate)
88{
89 return clk_register_fixed_rate(NULL, name, NULL, CLK_IS_ROOT, rate);
90}
91
92static inline struct clk *imx_clk_divider(const char *name, const char *parent,
93 void __iomem *reg, u8 shift, u8 width)
94{
95 return clk_register_divider(NULL, name, parent, CLK_SET_RATE_PARENT,
96 reg, shift, width, 0, &imx_ccm_lock);
97}
98
Philipp Zabel3ce92172013-03-27 18:30:40 +010099static inline struct clk *imx_clk_divider_flags(const char *name,
100 const char *parent, void __iomem *reg, u8 shift, u8 width,
101 unsigned long flags)
102{
103 return clk_register_divider(NULL, name, parent, flags,
104 reg, shift, width, 0, &imx_ccm_lock);
105}
106
Sascha Hauer6c7b068502012-03-07 21:01:28 +0100107static inline struct clk *imx_clk_gate(const char *name, const char *parent,
108 void __iomem *reg, u8 shift)
109{
110 return clk_register_gate(NULL, name, parent, CLK_SET_RATE_PARENT, reg,
111 shift, 0, &imx_ccm_lock);
112}
113
Alexander Shiyan65251692014-06-22 17:17:06 +0400114static inline struct clk *imx_clk_gate_dis(const char *name, const char *parent,
115 void __iomem *reg, u8 shift)
116{
117 return clk_register_gate(NULL, name, parent, CLK_SET_RATE_PARENT, reg,
118 shift, CLK_GATE_SET_TO_DISABLE, &imx_ccm_lock);
119}
120
Sascha Hauer6c7b068502012-03-07 21:01:28 +0100121static inline struct clk *imx_clk_mux(const char *name, void __iomem *reg,
122 u8 shift, u8 width, const char **parents, int num_parents)
123{
James Hogan819c1de2013-07-29 12:25:01 +0100124 return clk_register_mux(NULL, name, parents, num_parents,
125 CLK_SET_RATE_NO_REPARENT, reg, shift,
Sascha Hauer6c7b068502012-03-07 21:01:28 +0100126 width, 0, &imx_ccm_lock);
127}
128
Philipp Zabel3ce92172013-03-27 18:30:40 +0100129static inline struct clk *imx_clk_mux_flags(const char *name,
130 void __iomem *reg, u8 shift, u8 width, const char **parents,
131 int num_parents, unsigned long flags)
132{
133 return clk_register_mux(NULL, name, parents, num_parents,
James Hogan819c1de2013-07-29 12:25:01 +0100134 flags | CLK_SET_RATE_NO_REPARENT, reg, shift, width, 0,
Philipp Zabel3ce92172013-03-27 18:30:40 +0100135 &imx_ccm_lock);
136}
137
Sascha Hauer6c7b068502012-03-07 21:01:28 +0100138static inline struct clk *imx_clk_fixed_factor(const char *name,
139 const char *parent, unsigned int mult, unsigned int div)
140{
141 return clk_register_fixed_factor(NULL, name, parent,
142 CLK_SET_RATE_PARENT, mult, div);
143}
144
Lucas Stache0fed512014-09-26 15:41:01 +0200145struct clk *imx_clk_cpu(const char *name, const char *parent_name,
146 struct clk *div, struct clk *mux, struct clk *pll,
147 struct clk *step);
148
Sascha Hauer6c7b068502012-03-07 21:01:28 +0100149#endif