blob: f49edecd66a37926308397145d1dccf7403caeb8 [file] [log] [blame]
Daniel Vetter0ade6382010-08-24 22:18:41 +02001/* Common header for intel-gtt.ko and i915.ko */
2
3#ifndef _DRM_INTEL_GTT_H
4#define _DRM_INTEL_GTT_H
Chris Wilsonc64f7ba2010-11-23 14:24:24 +00005
Mika Kuoppalac44ef602015-06-25 18:35:05 +03006void intel_gtt_get(u64 *gtt_total, size_t *stolen_size,
7 phys_addr_t *mappable_base, u64 *mappable_end);
Daniel Vetter19966752010-09-06 20:08:44 +02008
Daniel Vetter14be93d2012-06-08 15:55:40 +02009int intel_gmch_probe(struct pci_dev *bridge_pdev, struct pci_dev *gpu_pdev,
10 struct agp_bridge_data *bridge);
11void intel_gmch_remove(void);
12
Daniel Vetter8ecd1a62012-06-07 15:56:03 +020013bool intel_enable_gtt(void);
14
Daniel Vetter40ce6572010-11-05 18:12:18 +010015void intel_gtt_chipset_flush(void);
Chris Wilsond6473f52016-06-10 14:22:59 +053016void intel_gtt_insert_page(dma_addr_t addr,
17 unsigned int pg,
18 unsigned int flags);
Chris Wilson9da3da62012-06-01 15:20:22 +010019void intel_gtt_insert_sg_entries(struct sg_table *st,
Daniel Vetter40807752010-11-06 11:18:58 +010020 unsigned int pg_start,
21 unsigned int flags);
Chris Wilson9da3da62012-06-01 15:20:22 +010022void intel_gtt_clear_range(unsigned int first_entry, unsigned int num_entries);
Daniel Vetter23ed9922010-11-05 18:04:52 +010023
24/* Special gtt memory types */
25#define AGP_DCACHE_MEMORY 1
26#define AGP_PHYS_MEMORY 2
27
Daniel Vetter23ed9922010-11-05 18:04:52 +010028/* flag for GFDT type */
29#define AGP_USER_CACHED_MEMORY_GFDT (1 << 3)
30
Daniel Vetter650dc072012-04-02 10:08:35 +020031#ifdef CONFIG_INTEL_IOMMU
32extern int intel_iommu_gfx_mapped;
33#endif
34
Daniel Vetter0ade6382010-08-24 22:18:41 +020035#endif