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Kevin Hilman7c6337e2007-04-30 19:37:19 +01001/*
2 * TI DaVinci Power and Sleep Controller (PSC)
3 *
4 * Copyright (C) 2006 Texas Instruments.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 *
20 */
21#include <linux/kernel.h>
Kevin Hilman7c6337e2007-04-30 19:37:19 +010022#include <linux/init.h>
Russell Kingfced80c2008-09-06 12:10:45 +010023#include <linux/io.h>
Kevin Hilman7c6337e2007-04-30 19:37:19 +010024
Kevin Hilmanc5b736d2009-03-20 17:29:01 -070025#include <mach/cputype.h>
Russell Kinga09e64f2008-08-05 16:14:15 +010026#include <mach/psc.h>
Kevin Hilman7c6337e2007-04-30 19:37:19 +010027
Kevin Hilmanc5b736d2009-03-20 17:29:01 -070028/* Return nonzero iff the domain's clock is active */
Mark A. Greerd81d1882009-04-15 12:39:33 -070029int __init davinci_psc_is_clk_active(unsigned int ctlr, unsigned int id)
Kevin Hilman7c6337e2007-04-30 19:37:19 +010030{
Mark A. Greerd81d1882009-04-15 12:39:33 -070031 void __iomem *psc_base;
32 u32 mdstat;
33 struct davinci_soc_info *soc_info = &davinci_soc_info;
34
35 if (!soc_info->psc_bases || (ctlr >= soc_info->psc_bases_num)) {
36 pr_warning("PSC: Bad psc data: 0x%x[%d]\n",
37 (int)soc_info->psc_bases, ctlr);
38 return 0;
39 }
40
Cyril Chemparathye4c822c2010-05-07 17:06:36 -040041 psc_base = ioremap(soc_info->psc_bases[ctlr], SZ_4K);
Mark A. Greerd81d1882009-04-15 12:39:33 -070042 mdstat = __raw_readl(psc_base + MDSTAT + 4 * id);
Cyril Chemparathye4c822c2010-05-07 17:06:36 -040043 iounmap(psc_base);
Kevin Hilmanc5b736d2009-03-20 17:29:01 -070044
45 /* if clocked, state can be "Enable" or "SyncReset" */
46 return mdstat & BIT(12);
Kevin Hilman7c6337e2007-04-30 19:37:19 +010047}
48
49/* Enable or disable a PSC domain */
Mark A. Greerd81d1882009-04-15 12:39:33 -070050void davinci_psc_config(unsigned int domain, unsigned int ctlr,
Cyril Chemparathy52958be2010-03-25 17:43:47 -040051 unsigned int id, u32 next_state)
Kevin Hilman7c6337e2007-04-30 19:37:19 +010052{
Mark A. Greerfe277d92009-03-26 19:33:21 -070053 u32 epcpr, ptcmd, ptstat, pdstat, pdctl1, mdstat, mdctl;
Mark A. Greerd81d1882009-04-15 12:39:33 -070054 void __iomem *psc_base;
55 struct davinci_soc_info *soc_info = &davinci_soc_info;
Kevin Hilman7c6337e2007-04-30 19:37:19 +010056
Mark A. Greerd81d1882009-04-15 12:39:33 -070057 if (!soc_info->psc_bases || (ctlr >= soc_info->psc_bases_num)) {
58 pr_warning("PSC: Bad psc data: 0x%x[%d]\n",
59 (int)soc_info->psc_bases, ctlr);
60 return;
61 }
62
Cyril Chemparathye4c822c2010-05-07 17:06:36 -040063 psc_base = ioremap(soc_info->psc_bases[ctlr], SZ_4K);
Mark A. Greerd81d1882009-04-15 12:39:33 -070064
Kevin Hilmanc5b736d2009-03-20 17:29:01 -070065 mdctl = __raw_readl(psc_base + MDCTL + 4 * id);
Mark A. Greerfe277d92009-03-26 19:33:21 -070066 mdctl &= ~MDSTAT_STATE_MASK;
67 mdctl |= next_state;
Kevin Hilmanc5b736d2009-03-20 17:29:01 -070068 __raw_writel(mdctl, psc_base + MDCTL + 4 * id);
Kevin Hilman7c6337e2007-04-30 19:37:19 +010069
Kevin Hilmanc5b736d2009-03-20 17:29:01 -070070 pdstat = __raw_readl(psc_base + PDSTAT);
Vladimir Barinov83f53222007-07-10 13:10:04 +010071 if ((pdstat & 0x00000001) == 0) {
Kevin Hilmanc5b736d2009-03-20 17:29:01 -070072 pdctl1 = __raw_readl(psc_base + PDCTL1);
Vladimir Barinov83f53222007-07-10 13:10:04 +010073 pdctl1 |= 0x1;
Kevin Hilmanc5b736d2009-03-20 17:29:01 -070074 __raw_writel(pdctl1, psc_base + PDCTL1);
Kevin Hilman7c6337e2007-04-30 19:37:19 +010075
Vladimir Barinov83f53222007-07-10 13:10:04 +010076 ptcmd = 1 << domain;
Kevin Hilmanc5b736d2009-03-20 17:29:01 -070077 __raw_writel(ptcmd, psc_base + PTCMD);
Vladimir Barinov83f53222007-07-10 13:10:04 +010078
79 do {
Kevin Hilmanc5b736d2009-03-20 17:29:01 -070080 epcpr = __raw_readl(psc_base + EPCPR);
Vladimir Barinov83f53222007-07-10 13:10:04 +010081 } while ((((epcpr >> domain) & 1) == 0));
82
Kevin Hilmanc5b736d2009-03-20 17:29:01 -070083 pdctl1 = __raw_readl(psc_base + PDCTL1);
Vladimir Barinov83f53222007-07-10 13:10:04 +010084 pdctl1 |= 0x100;
Kevin Hilmanc5b736d2009-03-20 17:29:01 -070085 __raw_writel(pdctl1, psc_base + PDCTL1);
Vladimir Barinov83f53222007-07-10 13:10:04 +010086
87 do {
Kevin Hilmanc5b736d2009-03-20 17:29:01 -070088 ptstat = __raw_readl(psc_base +
Vladimir Barinov83f53222007-07-10 13:10:04 +010089 PTSTAT);
90 } while (!(((ptstat >> domain) & 1) == 0));
Kevin Hilman7c6337e2007-04-30 19:37:19 +010091 } else {
Vladimir Barinov83f53222007-07-10 13:10:04 +010092 ptcmd = 1 << domain;
Kevin Hilmanc5b736d2009-03-20 17:29:01 -070093 __raw_writel(ptcmd, psc_base + PTCMD);
Vladimir Barinov83f53222007-07-10 13:10:04 +010094
95 do {
Kevin Hilmanc5b736d2009-03-20 17:29:01 -070096 ptstat = __raw_readl(psc_base + PTSTAT);
Vladimir Barinov83f53222007-07-10 13:10:04 +010097 } while (!(((ptstat >> domain) & 1) == 0));
Kevin Hilman7c6337e2007-04-30 19:37:19 +010098 }
99
Vladimir Barinov83f53222007-07-10 13:10:04 +0100100 do {
Kevin Hilmanc5b736d2009-03-20 17:29:01 -0700101 mdstat = __raw_readl(psc_base + MDSTAT + 4 * id);
Mark A. Greerfe277d92009-03-26 19:33:21 -0700102 } while (!((mdstat & MDSTAT_STATE_MASK) == next_state));
Cyril Chemparathye4c822c2010-05-07 17:06:36 -0400103
104 iounmap(psc_base);
Kevin Hilman7c6337e2007-04-30 19:37:19 +0100105}