Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 1 | /* |
| 2 | * Copyright © 2007 David Airlie |
| 3 | * |
| 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
| 5 | * copy of this software and associated documentation files (the "Software"), |
| 6 | * to deal in the Software without restriction, including without limitation |
| 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
| 8 | * and/or sell copies of the Software, and to permit persons to whom the |
| 9 | * Software is furnished to do so, subject to the following conditions: |
| 10 | * |
| 11 | * The above copyright notice and this permission notice (including the next |
| 12 | * paragraph) shall be included in all copies or substantial portions of the |
| 13 | * Software. |
| 14 | * |
| 15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
| 16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
| 17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
| 18 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
| 19 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
| 20 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER |
| 21 | * DEALINGS IN THE SOFTWARE. |
| 22 | * |
| 23 | * Authors: |
| 24 | * David Airlie |
| 25 | */ |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 26 | #include <linux/module.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 27 | #include <linux/slab.h> |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 28 | #include <linux/fb.h> |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 29 | |
| 30 | #include "drmP.h" |
| 31 | #include "drm.h" |
| 32 | #include "drm_crtc.h" |
| 33 | #include "drm_crtc_helper.h" |
| 34 | #include "radeon_drm.h" |
| 35 | #include "radeon.h" |
| 36 | |
Dave Airlie | 785b93e | 2009-08-28 15:46:53 +1000 | [diff] [blame] | 37 | #include "drm_fb_helper.h" |
| 38 | |
Dave Airlie | 6a9ee8a | 2010-02-01 15:38:10 +1000 | [diff] [blame] | 39 | #include <linux/vga_switcheroo.h> |
| 40 | |
Dave Airlie | 3865167 | 2010-03-30 05:34:13 +0000 | [diff] [blame] | 41 | /* object hierarchy - |
| 42 | this contains a helper + a radeon fb |
| 43 | the helper contains a pointer to radeon framebuffer baseclass. |
| 44 | */ |
Dave Airlie | 8be48d9 | 2010-03-30 05:34:14 +0000 | [diff] [blame] | 45 | struct radeon_fbdev { |
Dave Airlie | 785b93e | 2009-08-28 15:46:53 +1000 | [diff] [blame] | 46 | struct drm_fb_helper helper; |
Dave Airlie | 3865167 | 2010-03-30 05:34:13 +0000 | [diff] [blame] | 47 | struct radeon_framebuffer rfb; |
| 48 | struct list_head fbdev_list; |
| 49 | struct radeon_device *rdev; |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 50 | }; |
| 51 | |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 52 | static struct fb_ops radeonfb_ops = { |
| 53 | .owner = THIS_MODULE, |
Michel Dänzer | c88f9f0 | 2009-09-15 17:09:30 +0200 | [diff] [blame] | 54 | .fb_check_var = drm_fb_helper_check_var, |
Dave Airlie | 785b93e | 2009-08-28 15:46:53 +1000 | [diff] [blame] | 55 | .fb_set_par = drm_fb_helper_set_par, |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 56 | .fb_fillrect = cfb_fillrect, |
| 57 | .fb_copyarea = cfb_copyarea, |
| 58 | .fb_imageblit = cfb_imageblit, |
Dave Airlie | 785b93e | 2009-08-28 15:46:53 +1000 | [diff] [blame] | 59 | .fb_pan_display = drm_fb_helper_pan_display, |
| 60 | .fb_blank = drm_fb_helper_blank, |
Dave Airlie | 068143d | 2009-10-05 09:58:02 +1000 | [diff] [blame] | 61 | .fb_setcmap = drm_fb_helper_setcmap, |
Chris Ball | 4dd19b0 | 2010-09-26 06:47:23 -0500 | [diff] [blame] | 62 | .fb_debug_enter = drm_fb_helper_debug_enter, |
| 63 | .fb_debug_leave = drm_fb_helper_debug_leave, |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 64 | }; |
| 65 | |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 66 | |
Dave Airlie | ff72145b | 2011-02-07 12:16:14 +1000 | [diff] [blame] | 67 | int radeon_align_pitch(struct radeon_device *rdev, int width, int bpp, bool tiled) |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 68 | { |
| 69 | int aligned = width; |
Dave Airlie | e024e11 | 2009-06-24 09:48:08 +1000 | [diff] [blame] | 70 | int align_large = (ASIC_IS_AVIVO(rdev)) || tiled; |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 71 | int pitch_mask = 0; |
| 72 | |
| 73 | switch (bpp / 8) { |
| 74 | case 1: |
| 75 | pitch_mask = align_large ? 255 : 127; |
| 76 | break; |
| 77 | case 2: |
| 78 | pitch_mask = align_large ? 127 : 31; |
| 79 | break; |
| 80 | case 3: |
| 81 | case 4: |
| 82 | pitch_mask = align_large ? 63 : 15; |
| 83 | break; |
| 84 | } |
| 85 | |
| 86 | aligned += pitch_mask; |
| 87 | aligned &= ~pitch_mask; |
| 88 | return aligned; |
| 89 | } |
| 90 | |
Dave Airlie | 8be48d9 | 2010-03-30 05:34:14 +0000 | [diff] [blame] | 91 | static void radeonfb_destroy_pinned_object(struct drm_gem_object *gobj) |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 92 | { |
Daniel Vetter | 7e4d15d | 2011-02-18 17:59:17 +0100 | [diff] [blame] | 93 | struct radeon_bo *rbo = gem_to_radeon_bo(gobj); |
Dave Airlie | 8be48d9 | 2010-03-30 05:34:14 +0000 | [diff] [blame] | 94 | int ret; |
| 95 | |
| 96 | ret = radeon_bo_reserve(rbo, false); |
| 97 | if (likely(ret == 0)) { |
| 98 | radeon_bo_kunmap(rbo); |
Dave Airlie | 29d08b3 | 2010-09-27 16:17:17 +1000 | [diff] [blame] | 99 | radeon_bo_unpin(rbo); |
Dave Airlie | 8be48d9 | 2010-03-30 05:34:14 +0000 | [diff] [blame] | 100 | radeon_bo_unreserve(rbo); |
| 101 | } |
| 102 | drm_gem_object_unreference_unlocked(gobj); |
| 103 | } |
| 104 | |
| 105 | static int radeonfb_create_pinned_object(struct radeon_fbdev *rfbdev, |
| 106 | struct drm_mode_fb_cmd *mode_cmd, |
| 107 | struct drm_gem_object **gobj_p) |
| 108 | { |
| 109 | struct radeon_device *rdev = rfbdev->rdev; |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 110 | struct drm_gem_object *gobj = NULL; |
Jerome Glisse | 4c78867 | 2009-11-20 14:29:23 +0100 | [diff] [blame] | 111 | struct radeon_bo *rbo = NULL; |
Dave Airlie | e024e11 | 2009-06-24 09:48:08 +1000 | [diff] [blame] | 112 | bool fb_tiled = false; /* useful for testing */ |
Michel Dänzer | c88f9f0 | 2009-09-15 17:09:30 +0200 | [diff] [blame] | 113 | u32 tiling_flags = 0; |
Dave Airlie | 8be48d9 | 2010-03-30 05:34:14 +0000 | [diff] [blame] | 114 | int ret; |
| 115 | int aligned_size, size; |
Dave Airlie | e40b6fc | 2011-02-18 15:51:57 +1000 | [diff] [blame] | 116 | int height = mode_cmd->height; |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 117 | |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 118 | /* need to align pitch with crtc limits */ |
Dave Airlie | 8be48d9 | 2010-03-30 05:34:14 +0000 | [diff] [blame] | 119 | mode_cmd->pitch = radeon_align_pitch(rdev, mode_cmd->width, mode_cmd->bpp, fb_tiled) * ((mode_cmd->bpp + 1) / 8); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 120 | |
Dave Airlie | e40b6fc | 2011-02-18 15:51:57 +1000 | [diff] [blame] | 121 | if (rdev->family >= CHIP_R600) |
| 122 | height = ALIGN(mode_cmd->height, 8); |
| 123 | size = mode_cmd->pitch * height; |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 124 | aligned_size = ALIGN(size, PAGE_SIZE); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 125 | ret = radeon_gem_object_create(rdev, aligned_size, 0, |
Dave Airlie | 8be48d9 | 2010-03-30 05:34:14 +0000 | [diff] [blame] | 126 | RADEON_GEM_DOMAIN_VRAM, |
Dave Airlie | 4dfe947 | 2010-08-23 08:27:47 +1000 | [diff] [blame] | 127 | false, true, |
Dave Airlie | 8be48d9 | 2010-03-30 05:34:14 +0000 | [diff] [blame] | 128 | &gobj); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 129 | if (ret) { |
Dave Airlie | 8be48d9 | 2010-03-30 05:34:14 +0000 | [diff] [blame] | 130 | printk(KERN_ERR "failed to allocate framebuffer (%d)\n", |
| 131 | aligned_size); |
| 132 | return -ENOMEM; |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 133 | } |
Daniel Vetter | 7e4d15d | 2011-02-18 17:59:17 +0100 | [diff] [blame] | 134 | rbo = gem_to_radeon_bo(gobj); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 135 | |
Dave Airlie | e024e11 | 2009-06-24 09:48:08 +1000 | [diff] [blame] | 136 | if (fb_tiled) |
Michel Dänzer | c88f9f0 | 2009-09-15 17:09:30 +0200 | [diff] [blame] | 137 | tiling_flags = RADEON_TILING_MACRO; |
| 138 | |
| 139 | #ifdef __BIG_ENDIAN |
Dave Airlie | 8be48d9 | 2010-03-30 05:34:14 +0000 | [diff] [blame] | 140 | switch (mode_cmd->bpp) { |
Michel Dänzer | c88f9f0 | 2009-09-15 17:09:30 +0200 | [diff] [blame] | 141 | case 32: |
| 142 | tiling_flags |= RADEON_TILING_SWAP_32BIT; |
| 143 | break; |
| 144 | case 16: |
| 145 | tiling_flags |= RADEON_TILING_SWAP_16BIT; |
| 146 | default: |
| 147 | break; |
| 148 | } |
| 149 | #endif |
| 150 | |
Jerome Glisse | 4c78867 | 2009-11-20 14:29:23 +0100 | [diff] [blame] | 151 | if (tiling_flags) { |
| 152 | ret = radeon_bo_set_tiling_flags(rbo, |
Dave Airlie | 8be48d9 | 2010-03-30 05:34:14 +0000 | [diff] [blame] | 153 | tiling_flags | RADEON_TILING_SURFACE, |
| 154 | mode_cmd->pitch); |
Jerome Glisse | 4c78867 | 2009-11-20 14:29:23 +0100 | [diff] [blame] | 155 | if (ret) |
| 156 | dev_err(rdev->dev, "FB failed to set tiling flags\n"); |
| 157 | } |
Dave Airlie | 8be48d9 | 2010-03-30 05:34:14 +0000 | [diff] [blame] | 158 | |
Dave Airlie | 3865167 | 2010-03-30 05:34:13 +0000 | [diff] [blame] | 159 | |
Jerome Glisse | 4c78867 | 2009-11-20 14:29:23 +0100 | [diff] [blame] | 160 | ret = radeon_bo_reserve(rbo, false); |
| 161 | if (unlikely(ret != 0)) |
| 162 | goto out_unref; |
Dave Airlie | 8be48d9 | 2010-03-30 05:34:14 +0000 | [diff] [blame] | 163 | ret = radeon_bo_pin(rbo, RADEON_GEM_DOMAIN_VRAM, NULL); |
Jerome Glisse | f92e93e | 2009-06-22 18:15:58 +0200 | [diff] [blame] | 164 | if (ret) { |
Jerome Glisse | 4c78867 | 2009-11-20 14:29:23 +0100 | [diff] [blame] | 165 | radeon_bo_unreserve(rbo); |
| 166 | goto out_unref; |
| 167 | } |
| 168 | if (fb_tiled) |
| 169 | radeon_bo_check_tiling(rbo, 0, 0); |
Dave Airlie | 8be48d9 | 2010-03-30 05:34:14 +0000 | [diff] [blame] | 170 | ret = radeon_bo_kmap(rbo, NULL); |
Jerome Glisse | 4c78867 | 2009-11-20 14:29:23 +0100 | [diff] [blame] | 171 | radeon_bo_unreserve(rbo); |
| 172 | if (ret) { |
Jerome Glisse | f92e93e | 2009-06-22 18:15:58 +0200 | [diff] [blame] | 173 | goto out_unref; |
| 174 | } |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 175 | |
Dave Airlie | 8be48d9 | 2010-03-30 05:34:14 +0000 | [diff] [blame] | 176 | *gobj_p = gobj; |
| 177 | return 0; |
| 178 | out_unref: |
| 179 | radeonfb_destroy_pinned_object(gobj); |
| 180 | *gobj_p = NULL; |
| 181 | return ret; |
| 182 | } |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 183 | |
Dave Airlie | 8be48d9 | 2010-03-30 05:34:14 +0000 | [diff] [blame] | 184 | static int radeonfb_create(struct radeon_fbdev *rfbdev, |
| 185 | struct drm_fb_helper_surface_size *sizes) |
| 186 | { |
| 187 | struct radeon_device *rdev = rfbdev->rdev; |
| 188 | struct fb_info *info; |
| 189 | struct drm_framebuffer *fb = NULL; |
| 190 | struct drm_mode_fb_cmd mode_cmd; |
| 191 | struct drm_gem_object *gobj = NULL; |
| 192 | struct radeon_bo *rbo = NULL; |
| 193 | struct device *device = &rdev->pdev->dev; |
| 194 | int ret; |
| 195 | unsigned long tmp; |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 196 | |
Dave Airlie | 8be48d9 | 2010-03-30 05:34:14 +0000 | [diff] [blame] | 197 | mode_cmd.width = sizes->surface_width; |
| 198 | mode_cmd.height = sizes->surface_height; |
| 199 | |
| 200 | /* avivo can't scanout real 24bpp */ |
| 201 | if ((sizes->surface_bpp == 24) && ASIC_IS_AVIVO(rdev)) |
| 202 | sizes->surface_bpp = 32; |
| 203 | |
| 204 | mode_cmd.bpp = sizes->surface_bpp; |
| 205 | mode_cmd.depth = sizes->surface_depth; |
| 206 | |
| 207 | ret = radeonfb_create_pinned_object(rfbdev, &mode_cmd, &gobj); |
Daniel Vetter | 7e4d15d | 2011-02-18 17:59:17 +0100 | [diff] [blame] | 208 | rbo = gem_to_radeon_bo(gobj); |
Dave Airlie | 8be48d9 | 2010-03-30 05:34:14 +0000 | [diff] [blame] | 209 | |
| 210 | /* okay we have an object now allocate the framebuffer */ |
| 211 | info = framebuffer_alloc(0, device); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 212 | if (info == NULL) { |
| 213 | ret = -ENOMEM; |
| 214 | goto out_unref; |
| 215 | } |
Dave Airlie | 785b93e | 2009-08-28 15:46:53 +1000 | [diff] [blame] | 216 | |
Dave Airlie | 8be48d9 | 2010-03-30 05:34:14 +0000 | [diff] [blame] | 217 | info->par = rfbdev; |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 218 | |
Dave Airlie | 8be48d9 | 2010-03-30 05:34:14 +0000 | [diff] [blame] | 219 | radeon_framebuffer_init(rdev->ddev, &rfbdev->rfb, &mode_cmd, gobj); |
| 220 | |
Dave Airlie | 3865167 | 2010-03-30 05:34:13 +0000 | [diff] [blame] | 221 | fb = &rfbdev->rfb.base; |
| 222 | |
| 223 | /* setup helper */ |
| 224 | rfbdev->helper.fb = fb; |
| 225 | rfbdev->helper.fbdev = info; |
Dave Airlie | 3865167 | 2010-03-30 05:34:13 +0000 | [diff] [blame] | 226 | |
Dave Airlie | 8be48d9 | 2010-03-30 05:34:14 +0000 | [diff] [blame] | 227 | memset_io(rbo->kptr, 0x0, radeon_bo_size(rbo)); |
Dave Airlie | bf8e828 | 2009-08-17 10:20:47 +1000 | [diff] [blame] | 228 | |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 229 | strcpy(info->fix.id, "radeondrmfb"); |
Dave Airlie | 785b93e | 2009-08-28 15:46:53 +1000 | [diff] [blame] | 230 | |
Dave Airlie | 3632ef8 | 2011-01-15 09:27:00 +1000 | [diff] [blame] | 231 | drm_fb_helper_fill_fix(info, fb->pitch, fb->depth); |
| 232 | |
Jesse Barnes | 8fd4bd2 | 2010-06-23 12:56:12 -0700 | [diff] [blame] | 233 | info->flags = FBINFO_DEFAULT | FBINFO_CAN_FORCE_OUTPUT; |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 234 | info->fbops = &radeonfb_ops; |
Dave Airlie | 785b93e | 2009-08-28 15:46:53 +1000 | [diff] [blame] | 235 | |
Dave Airlie | 8be48d9 | 2010-03-30 05:34:14 +0000 | [diff] [blame] | 236 | tmp = radeon_bo_gpu_offset(rbo) - rdev->mc.vram_start; |
Jerome Glisse | f92e93e | 2009-06-22 18:15:58 +0200 | [diff] [blame] | 237 | info->fix.smem_start = rdev->mc.aper_base + tmp; |
Dave Airlie | 8be48d9 | 2010-03-30 05:34:14 +0000 | [diff] [blame] | 238 | info->fix.smem_len = radeon_bo_size(rbo); |
| 239 | info->screen_base = rbo->kptr; |
| 240 | info->screen_size = radeon_bo_size(rbo); |
Dave Airlie | 785b93e | 2009-08-28 15:46:53 +1000 | [diff] [blame] | 241 | |
Dave Airlie | 3865167 | 2010-03-30 05:34:13 +0000 | [diff] [blame] | 242 | drm_fb_helper_fill_var(info, &rfbdev->helper, sizes->fb_width, sizes->fb_height); |
Dave Airlie | ed8f0d9 | 2009-07-29 17:07:38 +1000 | [diff] [blame] | 243 | |
| 244 | /* setup aperture base/size for vesafb takeover */ |
Marcin Slusarz | 1471ca9 | 2010-05-16 17:27:03 +0200 | [diff] [blame] | 245 | info->apertures = alloc_apertures(1); |
| 246 | if (!info->apertures) { |
| 247 | ret = -ENOMEM; |
| 248 | goto out_unref; |
| 249 | } |
| 250 | info->apertures->ranges[0].base = rdev->ddev->mode_config.fb_base; |
Dave Airlie | 68d3059 | 2010-12-20 10:54:48 +1000 | [diff] [blame] | 251 | info->apertures->ranges[0].size = rdev->mc.aper_size; |
Dave Airlie | ed8f0d9 | 2009-07-29 17:07:38 +1000 | [diff] [blame] | 252 | |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 253 | info->pixmap.size = 64*1024; |
| 254 | info->pixmap.buf_align = 8; |
| 255 | info->pixmap.access_align = 32; |
| 256 | info->pixmap.flags = FB_PIXMAP_SYSTEM; |
| 257 | info->pixmap.scan_align = 1; |
Dave Airlie | 4abe352 | 2010-03-30 05:34:18 +0000 | [diff] [blame] | 258 | |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 259 | if (info->screen_base == NULL) { |
| 260 | ret = -ENOSPC; |
| 261 | goto out_unref; |
| 262 | } |
Dave Airlie | 4abe352 | 2010-03-30 05:34:18 +0000 | [diff] [blame] | 263 | |
| 264 | ret = fb_alloc_cmap(&info->cmap, 256, 0); |
| 265 | if (ret) { |
| 266 | ret = -ENOMEM; |
| 267 | goto out_unref; |
| 268 | } |
| 269 | |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 270 | DRM_INFO("fb mappable at 0x%lX\n", info->fix.smem_start); |
| 271 | DRM_INFO("vram apper at 0x%lX\n", (unsigned long)rdev->mc.aper_base); |
Dave Airlie | 8be48d9 | 2010-03-30 05:34:14 +0000 | [diff] [blame] | 272 | DRM_INFO("size %lu\n", (unsigned long)radeon_bo_size(rbo)); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 273 | DRM_INFO("fb depth is %d\n", fb->depth); |
| 274 | DRM_INFO(" pitch is %d\n", fb->pitch); |
| 275 | |
Dave Airlie | 6a9ee8a | 2010-02-01 15:38:10 +1000 | [diff] [blame] | 276 | vga_switcheroo_client_fb_set(rdev->ddev->pdev, info); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 277 | return 0; |
| 278 | |
| 279 | out_unref: |
Jerome Glisse | 4c78867 | 2009-11-20 14:29:23 +0100 | [diff] [blame] | 280 | if (rbo) { |
Dave Airlie | 8be48d9 | 2010-03-30 05:34:14 +0000 | [diff] [blame] | 281 | |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 282 | } |
Jerome Glisse | f92e93e | 2009-06-22 18:15:58 +0200 | [diff] [blame] | 283 | if (fb && ret) { |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 284 | drm_gem_object_unreference(gobj); |
| 285 | drm_framebuffer_cleanup(fb); |
| 286 | kfree(fb); |
| 287 | } |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 288 | return ret; |
| 289 | } |
| 290 | |
Dave Airlie | 8be48d9 | 2010-03-30 05:34:14 +0000 | [diff] [blame] | 291 | static int radeon_fb_find_or_create_single(struct drm_fb_helper *helper, |
| 292 | struct drm_fb_helper_surface_size *sizes) |
Dave Airlie | 3865167 | 2010-03-30 05:34:13 +0000 | [diff] [blame] | 293 | { |
Dave Airlie | 8be48d9 | 2010-03-30 05:34:14 +0000 | [diff] [blame] | 294 | struct radeon_fbdev *rfbdev = (struct radeon_fbdev *)helper; |
Dave Airlie | 3865167 | 2010-03-30 05:34:13 +0000 | [diff] [blame] | 295 | int new_fb = 0; |
| 296 | int ret; |
| 297 | |
Dave Airlie | 8be48d9 | 2010-03-30 05:34:14 +0000 | [diff] [blame] | 298 | if (!helper->fb) { |
| 299 | ret = radeonfb_create(rfbdev, sizes); |
Dave Airlie | 3865167 | 2010-03-30 05:34:13 +0000 | [diff] [blame] | 300 | if (ret) |
| 301 | return ret; |
Dave Airlie | 3865167 | 2010-03-30 05:34:13 +0000 | [diff] [blame] | 302 | new_fb = 1; |
Dave Airlie | 3865167 | 2010-03-30 05:34:13 +0000 | [diff] [blame] | 303 | } |
Dave Airlie | 3865167 | 2010-03-30 05:34:13 +0000 | [diff] [blame] | 304 | return new_fb; |
| 305 | } |
| 306 | |
Dave Airlie | d50ba25 | 2009-09-23 14:44:08 +1000 | [diff] [blame] | 307 | static char *mode_option; |
| 308 | int radeon_parse_options(char *options) |
| 309 | { |
| 310 | char *this_opt; |
| 311 | |
| 312 | if (!options || !*options) |
| 313 | return 0; |
| 314 | |
| 315 | while ((this_opt = strsep(&options, ",")) != NULL) { |
| 316 | if (!*this_opt) |
| 317 | continue; |
| 318 | mode_option = this_opt; |
| 319 | } |
| 320 | return 0; |
| 321 | } |
| 322 | |
Dave Airlie | eb1f8e4 | 2010-05-07 06:42:51 +0000 | [diff] [blame] | 323 | void radeon_fb_output_poll_changed(struct radeon_device *rdev) |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 324 | { |
Dave Airlie | eb1f8e4 | 2010-05-07 06:42:51 +0000 | [diff] [blame] | 325 | drm_fb_helper_hotplug_event(&rdev->mode_info.rfbdev->helper); |
Dave Airlie | 5c4426a | 2010-03-30 05:34:17 +0000 | [diff] [blame] | 326 | } |
| 327 | |
Dave Airlie | 8be48d9 | 2010-03-30 05:34:14 +0000 | [diff] [blame] | 328 | static int radeon_fbdev_destroy(struct drm_device *dev, struct radeon_fbdev *rfbdev) |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 329 | { |
| 330 | struct fb_info *info; |
Dave Airlie | 3865167 | 2010-03-30 05:34:13 +0000 | [diff] [blame] | 331 | struct radeon_framebuffer *rfb = &rfbdev->rfb; |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 332 | |
Dave Airlie | 8be48d9 | 2010-03-30 05:34:14 +0000 | [diff] [blame] | 333 | if (rfbdev->helper.fbdev) { |
| 334 | info = rfbdev->helper.fbdev; |
Dave Airlie | 4abe352 | 2010-03-30 05:34:18 +0000 | [diff] [blame] | 335 | |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 336 | unregister_framebuffer(info); |
Dave Airlie | 4abe352 | 2010-03-30 05:34:18 +0000 | [diff] [blame] | 337 | if (info->cmap.len) |
| 338 | fb_dealloc_cmap(&info->cmap); |
Dave Airlie | 8be48d9 | 2010-03-30 05:34:14 +0000 | [diff] [blame] | 339 | framebuffer_release(info); |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 340 | } |
| 341 | |
Dave Airlie | 8be48d9 | 2010-03-30 05:34:14 +0000 | [diff] [blame] | 342 | if (rfb->obj) { |
Dave Airlie | 29d08b3 | 2010-09-27 16:17:17 +1000 | [diff] [blame] | 343 | radeonfb_destroy_pinned_object(rfb->obj); |
| 344 | rfb->obj = NULL; |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 345 | } |
Dave Airlie | 4abe352 | 2010-03-30 05:34:18 +0000 | [diff] [blame] | 346 | drm_fb_helper_fini(&rfbdev->helper); |
Dave Airlie | 3865167 | 2010-03-30 05:34:13 +0000 | [diff] [blame] | 347 | drm_framebuffer_cleanup(&rfb->base); |
Dave Airlie | 785b93e | 2009-08-28 15:46:53 +1000 | [diff] [blame] | 348 | |
Jerome Glisse | 771fe6b | 2009-06-05 14:42:42 +0200 | [diff] [blame] | 349 | return 0; |
| 350 | } |
Dave Airlie | 4abe352 | 2010-03-30 05:34:18 +0000 | [diff] [blame] | 351 | |
| 352 | static struct drm_fb_helper_funcs radeon_fb_helper_funcs = { |
| 353 | .gamma_set = radeon_crtc_fb_gamma_set, |
| 354 | .gamma_get = radeon_crtc_fb_gamma_get, |
| 355 | .fb_probe = radeon_fb_find_or_create_single, |
Dave Airlie | 4abe352 | 2010-03-30 05:34:18 +0000 | [diff] [blame] | 356 | }; |
Dave Airlie | 3865167 | 2010-03-30 05:34:13 +0000 | [diff] [blame] | 357 | |
| 358 | int radeon_fbdev_init(struct radeon_device *rdev) |
| 359 | { |
Dave Airlie | 8be48d9 | 2010-03-30 05:34:14 +0000 | [diff] [blame] | 360 | struct radeon_fbdev *rfbdev; |
Dave Airlie | 4abe352 | 2010-03-30 05:34:18 +0000 | [diff] [blame] | 361 | int bpp_sel = 32; |
Chris Wilson | 5a79395 | 2010-06-06 10:50:03 +0100 | [diff] [blame] | 362 | int ret; |
Dave Airlie | 4abe352 | 2010-03-30 05:34:18 +0000 | [diff] [blame] | 363 | |
| 364 | /* select 8 bpp console on RN50 or 16MB cards */ |
| 365 | if (ASIC_IS_RN50(rdev) || rdev->mc.real_vram_size <= (32*1024*1024)) |
| 366 | bpp_sel = 8; |
Dave Airlie | 8be48d9 | 2010-03-30 05:34:14 +0000 | [diff] [blame] | 367 | |
| 368 | rfbdev = kzalloc(sizeof(struct radeon_fbdev), GFP_KERNEL); |
| 369 | if (!rfbdev) |
| 370 | return -ENOMEM; |
| 371 | |
| 372 | rfbdev->rdev = rdev; |
| 373 | rdev->mode_info.rfbdev = rfbdev; |
Dave Airlie | 4abe352 | 2010-03-30 05:34:18 +0000 | [diff] [blame] | 374 | rfbdev->helper.funcs = &radeon_fb_helper_funcs; |
Dave Airlie | 8be48d9 | 2010-03-30 05:34:14 +0000 | [diff] [blame] | 375 | |
Chris Wilson | 5a79395 | 2010-06-06 10:50:03 +0100 | [diff] [blame] | 376 | ret = drm_fb_helper_init(rdev->ddev, &rfbdev->helper, |
| 377 | rdev->num_crtc, |
| 378 | RADEONFB_CONN_LIMIT); |
| 379 | if (ret) { |
| 380 | kfree(rfbdev); |
| 381 | return ret; |
| 382 | } |
| 383 | |
Dave Airlie | 0b4c0f3 | 2010-03-30 05:34:15 +0000 | [diff] [blame] | 384 | drm_fb_helper_single_add_all_connectors(&rfbdev->helper); |
Dave Airlie | 4abe352 | 2010-03-30 05:34:18 +0000 | [diff] [blame] | 385 | drm_fb_helper_initial_config(&rfbdev->helper, bpp_sel); |
Dave Airlie | 3865167 | 2010-03-30 05:34:13 +0000 | [diff] [blame] | 386 | return 0; |
| 387 | } |
| 388 | |
| 389 | void radeon_fbdev_fini(struct radeon_device *rdev) |
| 390 | { |
Dave Airlie | 8be48d9 | 2010-03-30 05:34:14 +0000 | [diff] [blame] | 391 | if (!rdev->mode_info.rfbdev) |
| 392 | return; |
| 393 | |
Dave Airlie | 3865167 | 2010-03-30 05:34:13 +0000 | [diff] [blame] | 394 | radeon_fbdev_destroy(rdev->ddev, rdev->mode_info.rfbdev); |
Dave Airlie | 8be48d9 | 2010-03-30 05:34:14 +0000 | [diff] [blame] | 395 | kfree(rdev->mode_info.rfbdev); |
Dave Airlie | 3865167 | 2010-03-30 05:34:13 +0000 | [diff] [blame] | 396 | rdev->mode_info.rfbdev = NULL; |
| 397 | } |
| 398 | |
| 399 | void radeon_fbdev_set_suspend(struct radeon_device *rdev, int state) |
| 400 | { |
| 401 | fb_set_suspend(rdev->mode_info.rfbdev->helper.fbdev, state); |
| 402 | } |
| 403 | |
| 404 | int radeon_fbdev_total_size(struct radeon_device *rdev) |
| 405 | { |
| 406 | struct radeon_bo *robj; |
| 407 | int size = 0; |
| 408 | |
Daniel Vetter | 7e4d15d | 2011-02-18 17:59:17 +0100 | [diff] [blame] | 409 | robj = gem_to_radeon_bo(rdev->mode_info.rfbdev->rfb.obj); |
Dave Airlie | 3865167 | 2010-03-30 05:34:13 +0000 | [diff] [blame] | 410 | size += radeon_bo_size(robj); |
| 411 | return size; |
| 412 | } |
| 413 | |
| 414 | bool radeon_fbdev_robj_is_fb(struct radeon_device *rdev, struct radeon_bo *robj) |
| 415 | { |
Daniel Vetter | 7e4d15d | 2011-02-18 17:59:17 +0100 | [diff] [blame] | 416 | if (robj == gem_to_radeon_bo(rdev->mode_info.rfbdev->rfb.obj)) |
Dave Airlie | 3865167 | 2010-03-30 05:34:13 +0000 | [diff] [blame] | 417 | return true; |
| 418 | return false; |
| 419 | } |