blob: c1f0d16dd47ade6967fa4f0f218e733885cfe44c [file] [log] [blame]
Michael Chana4636962009-06-08 18:14:43 -07001/* cnic.c: Broadcom CNIC core network driver.
2 *
Michael Chan1d9cfc42010-02-24 14:42:09 +00003 * Copyright (c) 2006-2010 Broadcom Corporation
Michael Chana4636962009-06-08 18:14:43 -07004 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation.
8 *
9 * Original skeleton written by: John(Zongxi) Chen (zongxi@broadcom.com)
10 * Modified and maintained by: Michael Chan <mchan@broadcom.com>
11 */
12
Joe Perchesddf79b22010-02-17 15:01:54 +000013#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
14
Michael Chana4636962009-06-08 18:14:43 -070015#include <linux/module.h>
16
17#include <linux/kernel.h>
18#include <linux/errno.h>
19#include <linux/list.h>
20#include <linux/slab.h>
21#include <linux/pci.h>
22#include <linux/init.h>
23#include <linux/netdevice.h>
24#include <linux/uio_driver.h>
25#include <linux/in.h>
26#include <linux/dma-mapping.h>
27#include <linux/delay.h>
28#include <linux/ethtool.h>
29#include <linux/if_vlan.h>
30#if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE)
31#define BCM_VLAN 1
32#endif
33#include <net/ip.h>
34#include <net/tcp.h>
35#include <net/route.h>
36#include <net/ipv6.h>
37#include <net/ip6_route.h>
David S. Millerc05e85a2009-10-12 23:18:35 -070038#include <net/ip6_checksum.h>
Michael Chana4636962009-06-08 18:14:43 -070039#include <scsi/iscsi_if.h>
40
41#include "cnic_if.h"
42#include "bnx2.h"
Michael Chane2513062009-10-10 13:46:58 +000043#include "bnx2x_reg.h"
44#include "bnx2x_fw_defs.h"
45#include "bnx2x_hsi.h"
46#include "../scsi/bnx2i/57xx_iscsi_constants.h"
47#include "../scsi/bnx2i/57xx_iscsi_hsi.h"
Michael Chana4636962009-06-08 18:14:43 -070048#include "cnic.h"
49#include "cnic_defs.h"
50
51#define DRV_MODULE_NAME "cnic"
Michael Chana4636962009-06-08 18:14:43 -070052
53static char version[] __devinitdata =
54 "Broadcom NetXtreme II CNIC Driver " DRV_MODULE_NAME " v" CNIC_MODULE_VERSION " (" CNIC_MODULE_RELDATE ")\n";
55
56MODULE_AUTHOR("Michael Chan <mchan@broadcom.com> and John(Zongxi) "
57 "Chen (zongxi@broadcom.com");
58MODULE_DESCRIPTION("Broadcom NetXtreme II CNIC Driver");
59MODULE_LICENSE("GPL");
60MODULE_VERSION(CNIC_MODULE_VERSION);
61
62static LIST_HEAD(cnic_dev_list);
63static DEFINE_RWLOCK(cnic_dev_lock);
64static DEFINE_MUTEX(cnic_lock);
65
66static struct cnic_ulp_ops *cnic_ulp_tbl[MAX_CNIC_ULP_TYPE];
67
68static int cnic_service_bnx2(void *, void *);
Michael Chan71034ba2009-10-10 13:46:59 +000069static int cnic_service_bnx2x(void *, void *);
Michael Chana4636962009-06-08 18:14:43 -070070static int cnic_ctl(void *, struct cnic_ctl_info *);
71
72static struct cnic_ops cnic_bnx2_ops = {
73 .cnic_owner = THIS_MODULE,
74 .cnic_handler = cnic_service_bnx2,
75 .cnic_ctl = cnic_ctl,
76};
77
Michael Chan71034ba2009-10-10 13:46:59 +000078static struct cnic_ops cnic_bnx2x_ops = {
79 .cnic_owner = THIS_MODULE,
80 .cnic_handler = cnic_service_bnx2x,
81 .cnic_ctl = cnic_ctl,
82};
83
Michael Chan86b53602009-10-10 13:46:57 +000084static void cnic_shutdown_rings(struct cnic_dev *);
85static void cnic_init_rings(struct cnic_dev *);
Michael Chana4636962009-06-08 18:14:43 -070086static int cnic_cm_set_pg(struct cnic_sock *);
87
88static int cnic_uio_open(struct uio_info *uinfo, struct inode *inode)
89{
90 struct cnic_dev *dev = uinfo->priv;
91 struct cnic_local *cp = dev->cnic_priv;
92
93 if (!capable(CAP_NET_ADMIN))
94 return -EPERM;
95
96 if (cp->uio_dev != -1)
97 return -EBUSY;
98
Michael Chan86b53602009-10-10 13:46:57 +000099 rtnl_lock();
100 if (!test_bit(CNIC_F_CNIC_UP, &dev->flags)) {
101 rtnl_unlock();
102 return -ENODEV;
103 }
104
Michael Chana4636962009-06-08 18:14:43 -0700105 cp->uio_dev = iminor(inode);
106
Michael Chan86b53602009-10-10 13:46:57 +0000107 cnic_init_rings(dev);
108 rtnl_unlock();
Michael Chana4636962009-06-08 18:14:43 -0700109
110 return 0;
111}
112
113static int cnic_uio_close(struct uio_info *uinfo, struct inode *inode)
114{
115 struct cnic_dev *dev = uinfo->priv;
116 struct cnic_local *cp = dev->cnic_priv;
117
Michael Chan86b53602009-10-10 13:46:57 +0000118 cnic_shutdown_rings(dev);
Michael Chan6ef57a02009-09-21 15:39:37 +0000119
Michael Chana4636962009-06-08 18:14:43 -0700120 cp->uio_dev = -1;
121 return 0;
122}
123
124static inline void cnic_hold(struct cnic_dev *dev)
125{
126 atomic_inc(&dev->ref_count);
127}
128
129static inline void cnic_put(struct cnic_dev *dev)
130{
131 atomic_dec(&dev->ref_count);
132}
133
134static inline void csk_hold(struct cnic_sock *csk)
135{
136 atomic_inc(&csk->ref_count);
137}
138
139static inline void csk_put(struct cnic_sock *csk)
140{
141 atomic_dec(&csk->ref_count);
142}
143
144static struct cnic_dev *cnic_from_netdev(struct net_device *netdev)
145{
146 struct cnic_dev *cdev;
147
148 read_lock(&cnic_dev_lock);
149 list_for_each_entry(cdev, &cnic_dev_list, list) {
150 if (netdev == cdev->netdev) {
151 cnic_hold(cdev);
152 read_unlock(&cnic_dev_lock);
153 return cdev;
154 }
155 }
156 read_unlock(&cnic_dev_lock);
157 return NULL;
158}
159
Michael Chan7fc1ece2009-08-14 15:49:47 +0000160static inline void ulp_get(struct cnic_ulp_ops *ulp_ops)
161{
162 atomic_inc(&ulp_ops->ref_count);
163}
164
165static inline void ulp_put(struct cnic_ulp_ops *ulp_ops)
166{
167 atomic_dec(&ulp_ops->ref_count);
168}
169
Michael Chana4636962009-06-08 18:14:43 -0700170static void cnic_ctx_wr(struct cnic_dev *dev, u32 cid_addr, u32 off, u32 val)
171{
172 struct cnic_local *cp = dev->cnic_priv;
173 struct cnic_eth_dev *ethdev = cp->ethdev;
174 struct drv_ctl_info info;
175 struct drv_ctl_io *io = &info.data.io;
176
177 info.cmd = DRV_CTL_CTX_WR_CMD;
178 io->cid_addr = cid_addr;
179 io->offset = off;
180 io->data = val;
181 ethdev->drv_ctl(dev->netdev, &info);
182}
183
Michael Chan71034ba2009-10-10 13:46:59 +0000184static void cnic_ctx_tbl_wr(struct cnic_dev *dev, u32 off, dma_addr_t addr)
185{
186 struct cnic_local *cp = dev->cnic_priv;
187 struct cnic_eth_dev *ethdev = cp->ethdev;
188 struct drv_ctl_info info;
189 struct drv_ctl_io *io = &info.data.io;
190
191 info.cmd = DRV_CTL_CTXTBL_WR_CMD;
192 io->offset = off;
193 io->dma_addr = addr;
194 ethdev->drv_ctl(dev->netdev, &info);
195}
196
197static void cnic_ring_ctl(struct cnic_dev *dev, u32 cid, u32 cl_id, int start)
198{
199 struct cnic_local *cp = dev->cnic_priv;
200 struct cnic_eth_dev *ethdev = cp->ethdev;
201 struct drv_ctl_info info;
202 struct drv_ctl_l2_ring *ring = &info.data.ring;
203
204 if (start)
205 info.cmd = DRV_CTL_START_L2_CMD;
206 else
207 info.cmd = DRV_CTL_STOP_L2_CMD;
208
209 ring->cid = cid;
210 ring->client_id = cl_id;
211 ethdev->drv_ctl(dev->netdev, &info);
212}
213
Michael Chana4636962009-06-08 18:14:43 -0700214static void cnic_reg_wr_ind(struct cnic_dev *dev, u32 off, u32 val)
215{
216 struct cnic_local *cp = dev->cnic_priv;
217 struct cnic_eth_dev *ethdev = cp->ethdev;
218 struct drv_ctl_info info;
219 struct drv_ctl_io *io = &info.data.io;
220
221 info.cmd = DRV_CTL_IO_WR_CMD;
222 io->offset = off;
223 io->data = val;
224 ethdev->drv_ctl(dev->netdev, &info);
225}
226
227static u32 cnic_reg_rd_ind(struct cnic_dev *dev, u32 off)
228{
229 struct cnic_local *cp = dev->cnic_priv;
230 struct cnic_eth_dev *ethdev = cp->ethdev;
231 struct drv_ctl_info info;
232 struct drv_ctl_io *io = &info.data.io;
233
234 info.cmd = DRV_CTL_IO_RD_CMD;
235 io->offset = off;
236 ethdev->drv_ctl(dev->netdev, &info);
237 return io->data;
238}
239
240static int cnic_in_use(struct cnic_sock *csk)
241{
242 return test_bit(SK_F_INUSE, &csk->flags);
243}
244
245static void cnic_kwq_completion(struct cnic_dev *dev, u32 count)
246{
247 struct cnic_local *cp = dev->cnic_priv;
248 struct cnic_eth_dev *ethdev = cp->ethdev;
249 struct drv_ctl_info info;
250
251 info.cmd = DRV_CTL_COMPLETION_CMD;
252 info.data.comp.comp_count = count;
253 ethdev->drv_ctl(dev->netdev, &info);
254}
255
Michael Chan71034ba2009-10-10 13:46:59 +0000256static int cnic_get_l5_cid(struct cnic_local *cp, u32 cid, u32 *l5_cid)
257{
258 u32 i;
259
Michael Chan520efdf2010-06-24 14:58:37 +0000260 for (i = 0; i < cp->max_cid_space; i++) {
Michael Chan71034ba2009-10-10 13:46:59 +0000261 if (cp->ctx_tbl[i].cid == cid) {
262 *l5_cid = i;
263 return 0;
264 }
265 }
266 return -EINVAL;
267}
268
Michael Chana4636962009-06-08 18:14:43 -0700269static int cnic_send_nlmsg(struct cnic_local *cp, u32 type,
270 struct cnic_sock *csk)
271{
272 struct iscsi_path path_req;
273 char *buf = NULL;
274 u16 len = 0;
275 u32 msg_type = ISCSI_KEVENT_IF_DOWN;
276 struct cnic_ulp_ops *ulp_ops;
277
278 if (cp->uio_dev == -1)
279 return -ENODEV;
280
281 if (csk) {
282 len = sizeof(path_req);
283 buf = (char *) &path_req;
284 memset(&path_req, 0, len);
285
286 msg_type = ISCSI_KEVENT_PATH_REQ;
287 path_req.handle = (u64) csk->l5_cid;
288 if (test_bit(SK_F_IPV6, &csk->flags)) {
289 memcpy(&path_req.dst.v6_addr, &csk->dst_ip[0],
290 sizeof(struct in6_addr));
291 path_req.ip_addr_len = 16;
292 } else {
293 memcpy(&path_req.dst.v4_addr, &csk->dst_ip[0],
294 sizeof(struct in_addr));
295 path_req.ip_addr_len = 4;
296 }
297 path_req.vlan_id = csk->vlan_id;
298 path_req.pmtu = csk->mtu;
299 }
300
301 rcu_read_lock();
Michael Chan6d7760a2009-07-27 11:25:58 -0700302 ulp_ops = rcu_dereference(cnic_ulp_tbl[CNIC_ULP_ISCSI]);
Michael Chana4636962009-06-08 18:14:43 -0700303 if (ulp_ops)
304 ulp_ops->iscsi_nl_send_msg(cp->dev, msg_type, buf, len);
305 rcu_read_unlock();
306 return 0;
307}
308
309static int cnic_iscsi_nl_msg_recv(struct cnic_dev *dev, u32 msg_type,
310 char *buf, u16 len)
311{
312 int rc = -EINVAL;
313
314 switch (msg_type) {
315 case ISCSI_UEVENT_PATH_UPDATE: {
316 struct cnic_local *cp;
317 u32 l5_cid;
318 struct cnic_sock *csk;
319 struct iscsi_path *path_resp;
320
321 if (len < sizeof(*path_resp))
322 break;
323
324 path_resp = (struct iscsi_path *) buf;
325 cp = dev->cnic_priv;
326 l5_cid = (u32) path_resp->handle;
327 if (l5_cid >= MAX_CM_SK_TBL_SZ)
328 break;
329
Michael Chand02a5e62010-02-24 14:42:06 +0000330 rcu_read_lock();
331 if (!rcu_dereference(cp->ulp_ops[CNIC_ULP_L4])) {
332 rc = -ENODEV;
333 rcu_read_unlock();
334 break;
335 }
Michael Chana4636962009-06-08 18:14:43 -0700336 csk = &cp->csk_tbl[l5_cid];
337 csk_hold(csk);
338 if (cnic_in_use(csk)) {
339 memcpy(csk->ha, path_resp->mac_addr, 6);
340 if (test_bit(SK_F_IPV6, &csk->flags))
341 memcpy(&csk->src_ip[0], &path_resp->src.v6_addr,
342 sizeof(struct in6_addr));
343 else
344 memcpy(&csk->src_ip[0], &path_resp->src.v4_addr,
345 sizeof(struct in_addr));
346 if (is_valid_ether_addr(csk->ha))
347 cnic_cm_set_pg(csk);
348 }
349 csk_put(csk);
Michael Chand02a5e62010-02-24 14:42:06 +0000350 rcu_read_unlock();
Michael Chana4636962009-06-08 18:14:43 -0700351 rc = 0;
352 }
353 }
354
355 return rc;
356}
357
358static int cnic_offld_prep(struct cnic_sock *csk)
359{
360 if (test_and_set_bit(SK_F_OFFLD_SCHED, &csk->flags))
361 return 0;
362
363 if (!test_bit(SK_F_CONNECT_START, &csk->flags)) {
364 clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
365 return 0;
366 }
367
368 return 1;
369}
370
371static int cnic_close_prep(struct cnic_sock *csk)
372{
373 clear_bit(SK_F_CONNECT_START, &csk->flags);
374 smp_mb__after_clear_bit();
375
376 if (test_and_clear_bit(SK_F_OFFLD_COMPLETE, &csk->flags)) {
377 while (test_and_set_bit(SK_F_OFFLD_SCHED, &csk->flags))
378 msleep(1);
379
380 return 1;
381 }
382 return 0;
383}
384
385static int cnic_abort_prep(struct cnic_sock *csk)
386{
387 clear_bit(SK_F_CONNECT_START, &csk->flags);
388 smp_mb__after_clear_bit();
389
390 while (test_and_set_bit(SK_F_OFFLD_SCHED, &csk->flags))
391 msleep(1);
392
393 if (test_and_clear_bit(SK_F_OFFLD_COMPLETE, &csk->flags)) {
394 csk->state = L4_KCQE_OPCODE_VALUE_RESET_COMP;
395 return 1;
396 }
397
398 return 0;
399}
400
Michael Chan6d7760a2009-07-27 11:25:58 -0700401static void cnic_uio_stop(void)
402{
403 struct cnic_dev *dev;
404
405 read_lock(&cnic_dev_lock);
406 list_for_each_entry(dev, &cnic_dev_list, list) {
407 struct cnic_local *cp = dev->cnic_priv;
408
409 if (cp->cnic_uinfo)
410 cnic_send_nlmsg(cp, ISCSI_KEVENT_IF_DOWN, NULL);
411 }
412 read_unlock(&cnic_dev_lock);
413}
414
Michael Chana4636962009-06-08 18:14:43 -0700415int cnic_register_driver(int ulp_type, struct cnic_ulp_ops *ulp_ops)
416{
417 struct cnic_dev *dev;
418
roel kluin0d37f362009-11-02 06:53:44 +0000419 if (ulp_type < 0 || ulp_type >= MAX_CNIC_ULP_TYPE) {
Joe Perchesddf79b22010-02-17 15:01:54 +0000420 pr_err("%s: Bad type %d\n", __func__, ulp_type);
Michael Chana4636962009-06-08 18:14:43 -0700421 return -EINVAL;
422 }
423 mutex_lock(&cnic_lock);
424 if (cnic_ulp_tbl[ulp_type]) {
Joe Perchesddf79b22010-02-17 15:01:54 +0000425 pr_err("%s: Type %d has already been registered\n",
426 __func__, ulp_type);
Michael Chana4636962009-06-08 18:14:43 -0700427 mutex_unlock(&cnic_lock);
428 return -EBUSY;
429 }
430
431 read_lock(&cnic_dev_lock);
432 list_for_each_entry(dev, &cnic_dev_list, list) {
433 struct cnic_local *cp = dev->cnic_priv;
434
435 clear_bit(ULP_F_INIT, &cp->ulp_flags[ulp_type]);
436 }
437 read_unlock(&cnic_dev_lock);
438
Michael Chan7fc1ece2009-08-14 15:49:47 +0000439 atomic_set(&ulp_ops->ref_count, 0);
Michael Chana4636962009-06-08 18:14:43 -0700440 rcu_assign_pointer(cnic_ulp_tbl[ulp_type], ulp_ops);
441 mutex_unlock(&cnic_lock);
442
443 /* Prevent race conditions with netdev_event */
444 rtnl_lock();
445 read_lock(&cnic_dev_lock);
446 list_for_each_entry(dev, &cnic_dev_list, list) {
447 struct cnic_local *cp = dev->cnic_priv;
448
449 if (!test_and_set_bit(ULP_F_INIT, &cp->ulp_flags[ulp_type]))
450 ulp_ops->cnic_init(dev);
451 }
452 read_unlock(&cnic_dev_lock);
453 rtnl_unlock();
454
455 return 0;
456}
457
458int cnic_unregister_driver(int ulp_type)
459{
460 struct cnic_dev *dev;
Michael Chan7fc1ece2009-08-14 15:49:47 +0000461 struct cnic_ulp_ops *ulp_ops;
462 int i = 0;
Michael Chana4636962009-06-08 18:14:43 -0700463
roel kluin0d37f362009-11-02 06:53:44 +0000464 if (ulp_type < 0 || ulp_type >= MAX_CNIC_ULP_TYPE) {
Joe Perchesddf79b22010-02-17 15:01:54 +0000465 pr_err("%s: Bad type %d\n", __func__, ulp_type);
Michael Chana4636962009-06-08 18:14:43 -0700466 return -EINVAL;
467 }
468 mutex_lock(&cnic_lock);
Michael Chan7fc1ece2009-08-14 15:49:47 +0000469 ulp_ops = cnic_ulp_tbl[ulp_type];
470 if (!ulp_ops) {
Joe Perchesddf79b22010-02-17 15:01:54 +0000471 pr_err("%s: Type %d has not been registered\n",
472 __func__, ulp_type);
Michael Chana4636962009-06-08 18:14:43 -0700473 goto out_unlock;
474 }
475 read_lock(&cnic_dev_lock);
476 list_for_each_entry(dev, &cnic_dev_list, list) {
477 struct cnic_local *cp = dev->cnic_priv;
478
479 if (rcu_dereference(cp->ulp_ops[ulp_type])) {
Joe Perchesddf79b22010-02-17 15:01:54 +0000480 pr_err("%s: Type %d still has devices registered\n",
481 __func__, ulp_type);
Michael Chana4636962009-06-08 18:14:43 -0700482 read_unlock(&cnic_dev_lock);
483 goto out_unlock;
484 }
485 }
486 read_unlock(&cnic_dev_lock);
487
Michael Chan6d7760a2009-07-27 11:25:58 -0700488 if (ulp_type == CNIC_ULP_ISCSI)
489 cnic_uio_stop();
490
Michael Chana4636962009-06-08 18:14:43 -0700491 rcu_assign_pointer(cnic_ulp_tbl[ulp_type], NULL);
492
493 mutex_unlock(&cnic_lock);
494 synchronize_rcu();
Michael Chan7fc1ece2009-08-14 15:49:47 +0000495 while ((atomic_read(&ulp_ops->ref_count) != 0) && (i < 20)) {
496 msleep(100);
497 i++;
498 }
499
500 if (atomic_read(&ulp_ops->ref_count) != 0)
Joe Perchesddf79b22010-02-17 15:01:54 +0000501 netdev_warn(dev->netdev, "Failed waiting for ref count to go to zero\n");
Michael Chana4636962009-06-08 18:14:43 -0700502 return 0;
503
504out_unlock:
505 mutex_unlock(&cnic_lock);
506 return -EINVAL;
507}
508
509static int cnic_start_hw(struct cnic_dev *);
510static void cnic_stop_hw(struct cnic_dev *);
511
512static int cnic_register_device(struct cnic_dev *dev, int ulp_type,
513 void *ulp_ctx)
514{
515 struct cnic_local *cp = dev->cnic_priv;
516 struct cnic_ulp_ops *ulp_ops;
517
roel kluin0d37f362009-11-02 06:53:44 +0000518 if (ulp_type < 0 || ulp_type >= MAX_CNIC_ULP_TYPE) {
Joe Perchesddf79b22010-02-17 15:01:54 +0000519 pr_err("%s: Bad type %d\n", __func__, ulp_type);
Michael Chana4636962009-06-08 18:14:43 -0700520 return -EINVAL;
521 }
522 mutex_lock(&cnic_lock);
523 if (cnic_ulp_tbl[ulp_type] == NULL) {
Joe Perchesddf79b22010-02-17 15:01:54 +0000524 pr_err("%s: Driver with type %d has not been registered\n",
525 __func__, ulp_type);
Michael Chana4636962009-06-08 18:14:43 -0700526 mutex_unlock(&cnic_lock);
527 return -EAGAIN;
528 }
529 if (rcu_dereference(cp->ulp_ops[ulp_type])) {
Joe Perchesddf79b22010-02-17 15:01:54 +0000530 pr_err("%s: Type %d has already been registered to this device\n",
531 __func__, ulp_type);
Michael Chana4636962009-06-08 18:14:43 -0700532 mutex_unlock(&cnic_lock);
533 return -EBUSY;
534 }
535
536 clear_bit(ULP_F_START, &cp->ulp_flags[ulp_type]);
537 cp->ulp_handle[ulp_type] = ulp_ctx;
538 ulp_ops = cnic_ulp_tbl[ulp_type];
539 rcu_assign_pointer(cp->ulp_ops[ulp_type], ulp_ops);
540 cnic_hold(dev);
541
542 if (test_bit(CNIC_F_CNIC_UP, &dev->flags))
543 if (!test_and_set_bit(ULP_F_START, &cp->ulp_flags[ulp_type]))
544 ulp_ops->cnic_start(cp->ulp_handle[ulp_type]);
545
546 mutex_unlock(&cnic_lock);
547
548 return 0;
549
550}
551EXPORT_SYMBOL(cnic_register_driver);
552
553static int cnic_unregister_device(struct cnic_dev *dev, int ulp_type)
554{
555 struct cnic_local *cp = dev->cnic_priv;
Michael Chan681dbd72009-08-14 15:49:46 +0000556 int i = 0;
Michael Chana4636962009-06-08 18:14:43 -0700557
roel kluin0d37f362009-11-02 06:53:44 +0000558 if (ulp_type < 0 || ulp_type >= MAX_CNIC_ULP_TYPE) {
Joe Perchesddf79b22010-02-17 15:01:54 +0000559 pr_err("%s: Bad type %d\n", __func__, ulp_type);
Michael Chana4636962009-06-08 18:14:43 -0700560 return -EINVAL;
561 }
562 mutex_lock(&cnic_lock);
563 if (rcu_dereference(cp->ulp_ops[ulp_type])) {
564 rcu_assign_pointer(cp->ulp_ops[ulp_type], NULL);
565 cnic_put(dev);
566 } else {
Joe Perchesddf79b22010-02-17 15:01:54 +0000567 pr_err("%s: device not registered to this ulp type %d\n",
568 __func__, ulp_type);
Michael Chana4636962009-06-08 18:14:43 -0700569 mutex_unlock(&cnic_lock);
570 return -EINVAL;
571 }
572 mutex_unlock(&cnic_lock);
573
574 synchronize_rcu();
575
Michael Chan681dbd72009-08-14 15:49:46 +0000576 while (test_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[ulp_type]) &&
577 i < 20) {
578 msleep(100);
579 i++;
580 }
581 if (test_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[ulp_type]))
Joe Perchesddf79b22010-02-17 15:01:54 +0000582 netdev_warn(dev->netdev, "Failed waiting for ULP up call to complete\n");
Michael Chan681dbd72009-08-14 15:49:46 +0000583
Michael Chana4636962009-06-08 18:14:43 -0700584 return 0;
585}
586EXPORT_SYMBOL(cnic_unregister_driver);
587
588static int cnic_init_id_tbl(struct cnic_id_tbl *id_tbl, u32 size, u32 start_id)
589{
590 id_tbl->start = start_id;
591 id_tbl->max = size;
592 id_tbl->next = 0;
593 spin_lock_init(&id_tbl->lock);
594 id_tbl->table = kzalloc(DIV_ROUND_UP(size, 32) * 4, GFP_KERNEL);
595 if (!id_tbl->table)
596 return -ENOMEM;
597
598 return 0;
599}
600
601static void cnic_free_id_tbl(struct cnic_id_tbl *id_tbl)
602{
603 kfree(id_tbl->table);
604 id_tbl->table = NULL;
605}
606
607static int cnic_alloc_id(struct cnic_id_tbl *id_tbl, u32 id)
608{
609 int ret = -1;
610
611 id -= id_tbl->start;
612 if (id >= id_tbl->max)
613 return ret;
614
615 spin_lock(&id_tbl->lock);
616 if (!test_bit(id, id_tbl->table)) {
617 set_bit(id, id_tbl->table);
618 ret = 0;
619 }
620 spin_unlock(&id_tbl->lock);
621 return ret;
622}
623
624/* Returns -1 if not successful */
625static u32 cnic_alloc_new_id(struct cnic_id_tbl *id_tbl)
626{
627 u32 id;
628
629 spin_lock(&id_tbl->lock);
630 id = find_next_zero_bit(id_tbl->table, id_tbl->max, id_tbl->next);
631 if (id >= id_tbl->max) {
632 id = -1;
633 if (id_tbl->next != 0) {
634 id = find_first_zero_bit(id_tbl->table, id_tbl->next);
635 if (id >= id_tbl->next)
636 id = -1;
637 }
638 }
639
640 if (id < id_tbl->max) {
641 set_bit(id, id_tbl->table);
642 id_tbl->next = (id + 1) & (id_tbl->max - 1);
643 id += id_tbl->start;
644 }
645
646 spin_unlock(&id_tbl->lock);
647
648 return id;
649}
650
651static void cnic_free_id(struct cnic_id_tbl *id_tbl, u32 id)
652{
653 if (id == -1)
654 return;
655
656 id -= id_tbl->start;
657 if (id >= id_tbl->max)
658 return;
659
660 clear_bit(id, id_tbl->table);
661}
662
663static void cnic_free_dma(struct cnic_dev *dev, struct cnic_dma *dma)
664{
665 int i;
666
667 if (!dma->pg_arr)
668 return;
669
670 for (i = 0; i < dma->num_pages; i++) {
671 if (dma->pg_arr[i]) {
Michael Chan3248e162009-12-02 15:15:39 +0000672 dma_free_coherent(&dev->pcidev->dev, BCM_PAGE_SIZE,
673 dma->pg_arr[i], dma->pg_map_arr[i]);
Michael Chana4636962009-06-08 18:14:43 -0700674 dma->pg_arr[i] = NULL;
675 }
676 }
677 if (dma->pgtbl) {
Michael Chan3248e162009-12-02 15:15:39 +0000678 dma_free_coherent(&dev->pcidev->dev, dma->pgtbl_size,
679 dma->pgtbl, dma->pgtbl_map);
Michael Chana4636962009-06-08 18:14:43 -0700680 dma->pgtbl = NULL;
681 }
682 kfree(dma->pg_arr);
683 dma->pg_arr = NULL;
684 dma->num_pages = 0;
685}
686
687static void cnic_setup_page_tbl(struct cnic_dev *dev, struct cnic_dma *dma)
688{
689 int i;
690 u32 *page_table = dma->pgtbl;
691
692 for (i = 0; i < dma->num_pages; i++) {
693 /* Each entry needs to be in big endian format. */
694 *page_table = (u32) ((u64) dma->pg_map_arr[i] >> 32);
695 page_table++;
696 *page_table = (u32) dma->pg_map_arr[i];
697 page_table++;
698 }
699}
700
Michael Chan71034ba2009-10-10 13:46:59 +0000701static void cnic_setup_page_tbl_le(struct cnic_dev *dev, struct cnic_dma *dma)
702{
703 int i;
704 u32 *page_table = dma->pgtbl;
705
706 for (i = 0; i < dma->num_pages; i++) {
707 /* Each entry needs to be in little endian format. */
708 *page_table = dma->pg_map_arr[i] & 0xffffffff;
709 page_table++;
710 *page_table = (u32) ((u64) dma->pg_map_arr[i] >> 32);
711 page_table++;
712 }
713}
714
Michael Chana4636962009-06-08 18:14:43 -0700715static int cnic_alloc_dma(struct cnic_dev *dev, struct cnic_dma *dma,
716 int pages, int use_pg_tbl)
717{
718 int i, size;
719 struct cnic_local *cp = dev->cnic_priv;
720
721 size = pages * (sizeof(void *) + sizeof(dma_addr_t));
722 dma->pg_arr = kzalloc(size, GFP_ATOMIC);
723 if (dma->pg_arr == NULL)
724 return -ENOMEM;
725
726 dma->pg_map_arr = (dma_addr_t *) (dma->pg_arr + pages);
727 dma->num_pages = pages;
728
729 for (i = 0; i < pages; i++) {
Michael Chan3248e162009-12-02 15:15:39 +0000730 dma->pg_arr[i] = dma_alloc_coherent(&dev->pcidev->dev,
731 BCM_PAGE_SIZE,
732 &dma->pg_map_arr[i],
733 GFP_ATOMIC);
Michael Chana4636962009-06-08 18:14:43 -0700734 if (dma->pg_arr[i] == NULL)
735 goto error;
736 }
737 if (!use_pg_tbl)
738 return 0;
739
740 dma->pgtbl_size = ((pages * 8) + BCM_PAGE_SIZE - 1) &
741 ~(BCM_PAGE_SIZE - 1);
Michael Chan3248e162009-12-02 15:15:39 +0000742 dma->pgtbl = dma_alloc_coherent(&dev->pcidev->dev, dma->pgtbl_size,
743 &dma->pgtbl_map, GFP_ATOMIC);
Michael Chana4636962009-06-08 18:14:43 -0700744 if (dma->pgtbl == NULL)
745 goto error;
746
747 cp->setup_pgtbl(dev, dma);
748
749 return 0;
750
751error:
752 cnic_free_dma(dev, dma);
753 return -ENOMEM;
754}
755
Michael Chan86b53602009-10-10 13:46:57 +0000756static void cnic_free_context(struct cnic_dev *dev)
757{
758 struct cnic_local *cp = dev->cnic_priv;
759 int i;
760
761 for (i = 0; i < cp->ctx_blks; i++) {
762 if (cp->ctx_arr[i].ctx) {
Michael Chan3248e162009-12-02 15:15:39 +0000763 dma_free_coherent(&dev->pcidev->dev, cp->ctx_blk_size,
764 cp->ctx_arr[i].ctx,
765 cp->ctx_arr[i].mapping);
Michael Chan86b53602009-10-10 13:46:57 +0000766 cp->ctx_arr[i].ctx = NULL;
767 }
768 }
769}
770
Michael Chana4636962009-06-08 18:14:43 -0700771static void cnic_free_resc(struct cnic_dev *dev)
772{
773 struct cnic_local *cp = dev->cnic_priv;
774 int i = 0;
775
776 if (cp->cnic_uinfo) {
Michael Chana4636962009-06-08 18:14:43 -0700777 while (cp->uio_dev != -1 && i < 15) {
778 msleep(100);
779 i++;
780 }
781 uio_unregister_device(cp->cnic_uinfo);
782 kfree(cp->cnic_uinfo);
783 cp->cnic_uinfo = NULL;
784 }
785
786 if (cp->l2_buf) {
Michael Chan3248e162009-12-02 15:15:39 +0000787 dma_free_coherent(&dev->pcidev->dev, cp->l2_buf_size,
788 cp->l2_buf, cp->l2_buf_map);
Michael Chana4636962009-06-08 18:14:43 -0700789 cp->l2_buf = NULL;
790 }
791
792 if (cp->l2_ring) {
Michael Chan3248e162009-12-02 15:15:39 +0000793 dma_free_coherent(&dev->pcidev->dev, cp->l2_ring_size,
794 cp->l2_ring, cp->l2_ring_map);
Michael Chana4636962009-06-08 18:14:43 -0700795 cp->l2_ring = NULL;
796 }
797
Michael Chan86b53602009-10-10 13:46:57 +0000798 cnic_free_context(dev);
Michael Chana4636962009-06-08 18:14:43 -0700799 kfree(cp->ctx_arr);
800 cp->ctx_arr = NULL;
801 cp->ctx_blks = 0;
802
803 cnic_free_dma(dev, &cp->gbl_buf_info);
804 cnic_free_dma(dev, &cp->conn_buf_info);
805 cnic_free_dma(dev, &cp->kwq_info);
Michael Chan71034ba2009-10-10 13:46:59 +0000806 cnic_free_dma(dev, &cp->kwq_16_data_info);
Michael Chane6c28892010-06-24 14:58:39 +0000807 cnic_free_dma(dev, &cp->kcq1.dma);
Michael Chana4636962009-06-08 18:14:43 -0700808 kfree(cp->iscsi_tbl);
809 cp->iscsi_tbl = NULL;
810 kfree(cp->ctx_tbl);
811 cp->ctx_tbl = NULL;
812
813 cnic_free_id_tbl(&cp->cid_tbl);
814}
815
816static int cnic_alloc_context(struct cnic_dev *dev)
817{
818 struct cnic_local *cp = dev->cnic_priv;
819
820 if (CHIP_NUM(cp) == CHIP_NUM_5709) {
821 int i, k, arr_size;
822
823 cp->ctx_blk_size = BCM_PAGE_SIZE;
824 cp->cids_per_blk = BCM_PAGE_SIZE / 128;
825 arr_size = BNX2_MAX_CID / cp->cids_per_blk *
826 sizeof(struct cnic_ctx);
827 cp->ctx_arr = kzalloc(arr_size, GFP_KERNEL);
828 if (cp->ctx_arr == NULL)
829 return -ENOMEM;
830
831 k = 0;
832 for (i = 0; i < 2; i++) {
833 u32 j, reg, off, lo, hi;
834
835 if (i == 0)
836 off = BNX2_PG_CTX_MAP;
837 else
838 off = BNX2_ISCSI_CTX_MAP;
839
840 reg = cnic_reg_rd_ind(dev, off);
841 lo = reg >> 16;
842 hi = reg & 0xffff;
843 for (j = lo; j < hi; j += cp->cids_per_blk, k++)
844 cp->ctx_arr[k].cid = j;
845 }
846
847 cp->ctx_blks = k;
848 if (cp->ctx_blks >= (BNX2_MAX_CID / cp->cids_per_blk)) {
849 cp->ctx_blks = 0;
850 return -ENOMEM;
851 }
852
853 for (i = 0; i < cp->ctx_blks; i++) {
854 cp->ctx_arr[i].ctx =
Michael Chan3248e162009-12-02 15:15:39 +0000855 dma_alloc_coherent(&dev->pcidev->dev,
856 BCM_PAGE_SIZE,
857 &cp->ctx_arr[i].mapping,
858 GFP_KERNEL);
Michael Chana4636962009-06-08 18:14:43 -0700859 if (cp->ctx_arr[i].ctx == NULL)
860 return -ENOMEM;
861 }
862 }
863 return 0;
864}
865
Michael Chane6c28892010-06-24 14:58:39 +0000866static int cnic_alloc_kcq(struct cnic_dev *dev, struct kcq_info *info)
867{
868 int err, i, is_bnx2 = 0;
869 struct kcqe **kcq;
870
871 if (test_bit(CNIC_F_BNX2_CLASS, &dev->flags))
872 is_bnx2 = 1;
873
874 err = cnic_alloc_dma(dev, &info->dma, KCQ_PAGE_CNT, is_bnx2);
875 if (err)
876 return err;
877
878 kcq = (struct kcqe **) info->dma.pg_arr;
879 info->kcq = kcq;
880
881 if (is_bnx2)
882 return 0;
883
884 for (i = 0; i < KCQ_PAGE_CNT; i++) {
885 struct bnx2x_bd_chain_next *next =
886 (struct bnx2x_bd_chain_next *) &kcq[i][MAX_KCQE_CNT];
887 int j = i + 1;
888
889 if (j >= KCQ_PAGE_CNT)
890 j = 0;
891 next->addr_hi = (u64) info->dma.pg_map_arr[j] >> 32;
892 next->addr_lo = info->dma.pg_map_arr[j] & 0xffffffff;
893 }
894 return 0;
895}
896
Michael Chanec0248e2009-08-26 09:49:22 +0000897static int cnic_alloc_l2_rings(struct cnic_dev *dev, int pages)
898{
899 struct cnic_local *cp = dev->cnic_priv;
900
901 cp->l2_ring_size = pages * BCM_PAGE_SIZE;
Michael Chan3248e162009-12-02 15:15:39 +0000902 cp->l2_ring = dma_alloc_coherent(&dev->pcidev->dev, cp->l2_ring_size,
903 &cp->l2_ring_map,
904 GFP_KERNEL | __GFP_COMP);
Michael Chanec0248e2009-08-26 09:49:22 +0000905 if (!cp->l2_ring)
906 return -ENOMEM;
907
908 cp->l2_buf_size = (cp->l2_rx_ring_size + 1) * cp->l2_single_buf_size;
909 cp->l2_buf_size = PAGE_ALIGN(cp->l2_buf_size);
Michael Chan3248e162009-12-02 15:15:39 +0000910 cp->l2_buf = dma_alloc_coherent(&dev->pcidev->dev, cp->l2_buf_size,
911 &cp->l2_buf_map,
912 GFP_KERNEL | __GFP_COMP);
Michael Chanec0248e2009-08-26 09:49:22 +0000913 if (!cp->l2_buf)
914 return -ENOMEM;
915
916 return 0;
917}
918
Michael Chan5e9b2db2009-08-26 09:49:23 +0000919static int cnic_alloc_uio(struct cnic_dev *dev) {
920 struct cnic_local *cp = dev->cnic_priv;
921 struct uio_info *uinfo;
922 int ret;
923
924 uinfo = kzalloc(sizeof(*uinfo), GFP_ATOMIC);
925 if (!uinfo)
926 return -ENOMEM;
927
928 uinfo->mem[0].addr = dev->netdev->base_addr;
929 uinfo->mem[0].internal_addr = dev->regview;
930 uinfo->mem[0].size = dev->netdev->mem_end - dev->netdev->mem_start;
931 uinfo->mem[0].memtype = UIO_MEM_PHYS;
932
Michael Chan5e9b2db2009-08-26 09:49:23 +0000933 if (test_bit(CNIC_F_BNX2_CLASS, &dev->flags)) {
Michael Chana4dde3a2010-02-24 14:42:08 +0000934 uinfo->mem[1].addr = (unsigned long) cp->status_blk.gen &
935 PAGE_MASK;
Michael Chan5e9b2db2009-08-26 09:49:23 +0000936 if (cp->ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX)
937 uinfo->mem[1].size = BNX2_SBLK_MSIX_ALIGN_SIZE * 9;
938 else
939 uinfo->mem[1].size = BNX2_SBLK_MSIX_ALIGN_SIZE;
940
941 uinfo->name = "bnx2_cnic";
Michael Chan71034ba2009-10-10 13:46:59 +0000942 } else if (test_bit(CNIC_F_BNX2X_CLASS, &dev->flags)) {
943 uinfo->mem[1].addr = (unsigned long) cp->bnx2x_def_status_blk &
944 PAGE_MASK;
945 uinfo->mem[1].size = sizeof(struct host_def_status_block);
946
947 uinfo->name = "bnx2x_cnic";
Michael Chan5e9b2db2009-08-26 09:49:23 +0000948 }
949
950 uinfo->mem[1].memtype = UIO_MEM_LOGICAL;
951
952 uinfo->mem[2].addr = (unsigned long) cp->l2_ring;
953 uinfo->mem[2].size = cp->l2_ring_size;
954 uinfo->mem[2].memtype = UIO_MEM_LOGICAL;
955
956 uinfo->mem[3].addr = (unsigned long) cp->l2_buf;
957 uinfo->mem[3].size = cp->l2_buf_size;
958 uinfo->mem[3].memtype = UIO_MEM_LOGICAL;
959
960 uinfo->version = CNIC_MODULE_VERSION;
961 uinfo->irq = UIO_IRQ_CUSTOM;
962
963 uinfo->open = cnic_uio_open;
964 uinfo->release = cnic_uio_close;
965
966 uinfo->priv = dev;
967
968 ret = uio_register_device(&dev->pcidev->dev, uinfo);
969 if (ret) {
970 kfree(uinfo);
971 return ret;
972 }
973
974 cp->cnic_uinfo = uinfo;
975 return 0;
976}
977
Michael Chana4636962009-06-08 18:14:43 -0700978static int cnic_alloc_bnx2_resc(struct cnic_dev *dev)
979{
980 struct cnic_local *cp = dev->cnic_priv;
Michael Chana4636962009-06-08 18:14:43 -0700981 int ret;
982
983 ret = cnic_alloc_dma(dev, &cp->kwq_info, KWQ_PAGE_CNT, 1);
984 if (ret)
985 goto error;
986 cp->kwq = (struct kwqe **) cp->kwq_info.pg_arr;
987
Michael Chane6c28892010-06-24 14:58:39 +0000988 ret = cnic_alloc_kcq(dev, &cp->kcq1);
Michael Chana4636962009-06-08 18:14:43 -0700989 if (ret)
990 goto error;
Michael Chana4636962009-06-08 18:14:43 -0700991
992 ret = cnic_alloc_context(dev);
993 if (ret)
994 goto error;
995
Michael Chanec0248e2009-08-26 09:49:22 +0000996 ret = cnic_alloc_l2_rings(dev, 2);
997 if (ret)
Michael Chana4636962009-06-08 18:14:43 -0700998 goto error;
999
Michael Chan5e9b2db2009-08-26 09:49:23 +00001000 ret = cnic_alloc_uio(dev);
1001 if (ret)
Michael Chana4636962009-06-08 18:14:43 -07001002 goto error;
1003
Michael Chana4636962009-06-08 18:14:43 -07001004 return 0;
1005
1006error:
1007 cnic_free_resc(dev);
1008 return ret;
1009}
1010
Michael Chan71034ba2009-10-10 13:46:59 +00001011static int cnic_alloc_bnx2x_context(struct cnic_dev *dev)
1012{
1013 struct cnic_local *cp = dev->cnic_priv;
Michael Chan71034ba2009-10-10 13:46:59 +00001014 int ctx_blk_size = cp->ethdev->ctx_blk_size;
Michael Chan520efdf2010-06-24 14:58:37 +00001015 int total_mem, blks, i;
Michael Chan71034ba2009-10-10 13:46:59 +00001016
Michael Chan520efdf2010-06-24 14:58:37 +00001017 total_mem = BNX2X_CONTEXT_MEM_SIZE * cp->max_cid_space;
Michael Chan71034ba2009-10-10 13:46:59 +00001018 blks = total_mem / ctx_blk_size;
1019 if (total_mem % ctx_blk_size)
1020 blks++;
1021
1022 if (blks > cp->ethdev->ctx_tbl_len)
1023 return -ENOMEM;
1024
1025 cp->ctx_arr = kzalloc(blks * sizeof(struct cnic_ctx), GFP_KERNEL);
1026 if (cp->ctx_arr == NULL)
1027 return -ENOMEM;
1028
1029 cp->ctx_blks = blks;
1030 cp->ctx_blk_size = ctx_blk_size;
1031 if (BNX2X_CHIP_IS_E1H(cp->chip_id))
1032 cp->ctx_align = 0;
1033 else
1034 cp->ctx_align = ctx_blk_size;
1035
1036 cp->cids_per_blk = ctx_blk_size / BNX2X_CONTEXT_MEM_SIZE;
1037
1038 for (i = 0; i < blks; i++) {
1039 cp->ctx_arr[i].ctx =
Michael Chan3248e162009-12-02 15:15:39 +00001040 dma_alloc_coherent(&dev->pcidev->dev, cp->ctx_blk_size,
1041 &cp->ctx_arr[i].mapping,
1042 GFP_KERNEL);
Michael Chan71034ba2009-10-10 13:46:59 +00001043 if (cp->ctx_arr[i].ctx == NULL)
1044 return -ENOMEM;
1045
1046 if (cp->ctx_align && cp->ctx_blk_size == ctx_blk_size) {
1047 if (cp->ctx_arr[i].mapping & (cp->ctx_align - 1)) {
1048 cnic_free_context(dev);
1049 cp->ctx_blk_size += cp->ctx_align;
1050 i = -1;
1051 continue;
1052 }
1053 }
1054 }
1055 return 0;
1056}
1057
1058static int cnic_alloc_bnx2x_resc(struct cnic_dev *dev)
1059{
1060 struct cnic_local *cp = dev->cnic_priv;
Michael Chan520efdf2010-06-24 14:58:37 +00001061 struct cnic_eth_dev *ethdev = cp->ethdev;
1062 u32 start_cid = ethdev->starting_cid;
Michael Chan71034ba2009-10-10 13:46:59 +00001063 int i, j, n, ret, pages;
1064 struct cnic_dma *kwq_16_dma = &cp->kwq_16_data_info;
1065
Michael Chan520efdf2010-06-24 14:58:37 +00001066 cp->max_cid_space = MAX_ISCSI_TBL_SZ;
1067 cp->iscsi_start_cid = start_cid;
1068 if (start_cid < BNX2X_ISCSI_START_CID) {
1069 u32 delta = BNX2X_ISCSI_START_CID - start_cid;
1070
1071 cp->iscsi_start_cid = BNX2X_ISCSI_START_CID;
1072 cp->max_cid_space += delta;
1073 }
1074
Michael Chan71034ba2009-10-10 13:46:59 +00001075 cp->iscsi_tbl = kzalloc(sizeof(struct cnic_iscsi) * MAX_ISCSI_TBL_SZ,
1076 GFP_KERNEL);
1077 if (!cp->iscsi_tbl)
1078 goto error;
1079
1080 cp->ctx_tbl = kzalloc(sizeof(struct cnic_context) *
Michael Chan520efdf2010-06-24 14:58:37 +00001081 cp->max_cid_space, GFP_KERNEL);
Michael Chan71034ba2009-10-10 13:46:59 +00001082 if (!cp->ctx_tbl)
1083 goto error;
1084
1085 for (i = 0; i < MAX_ISCSI_TBL_SZ; i++) {
1086 cp->ctx_tbl[i].proto.iscsi = &cp->iscsi_tbl[i];
1087 cp->ctx_tbl[i].ulp_proto_id = CNIC_ULP_ISCSI;
1088 }
1089
Michael Chan520efdf2010-06-24 14:58:37 +00001090 pages = PAGE_ALIGN(cp->max_cid_space * CNIC_KWQ16_DATA_SIZE) /
Michael Chan71034ba2009-10-10 13:46:59 +00001091 PAGE_SIZE;
1092
1093 ret = cnic_alloc_dma(dev, kwq_16_dma, pages, 0);
1094 if (ret)
1095 return -ENOMEM;
1096
1097 n = PAGE_SIZE / CNIC_KWQ16_DATA_SIZE;
Michael Chan520efdf2010-06-24 14:58:37 +00001098 for (i = 0, j = 0; i < cp->max_cid_space; i++) {
Michael Chan71034ba2009-10-10 13:46:59 +00001099 long off = CNIC_KWQ16_DATA_SIZE * (i % n);
1100
1101 cp->ctx_tbl[i].kwqe_data = kwq_16_dma->pg_arr[j] + off;
1102 cp->ctx_tbl[i].kwqe_data_mapping = kwq_16_dma->pg_map_arr[j] +
1103 off;
1104
1105 if ((i % n) == (n - 1))
1106 j++;
1107 }
1108
Michael Chane6c28892010-06-24 14:58:39 +00001109 ret = cnic_alloc_kcq(dev, &cp->kcq1);
Michael Chan71034ba2009-10-10 13:46:59 +00001110 if (ret)
1111 goto error;
Michael Chan71034ba2009-10-10 13:46:59 +00001112
1113 pages = PAGE_ALIGN(BNX2X_ISCSI_NUM_CONNECTIONS *
1114 BNX2X_ISCSI_CONN_BUF_SIZE) / PAGE_SIZE;
1115 ret = cnic_alloc_dma(dev, &cp->conn_buf_info, pages, 1);
1116 if (ret)
1117 goto error;
1118
1119 pages = PAGE_ALIGN(BNX2X_ISCSI_GLB_BUF_SIZE) / PAGE_SIZE;
1120 ret = cnic_alloc_dma(dev, &cp->gbl_buf_info, pages, 0);
1121 if (ret)
1122 goto error;
1123
1124 ret = cnic_alloc_bnx2x_context(dev);
1125 if (ret)
1126 goto error;
1127
Michael Chan71034ba2009-10-10 13:46:59 +00001128 cp->bnx2x_def_status_blk = cp->ethdev->irq_arr[1].status_blk;
1129
Michael Chana4dde3a2010-02-24 14:42:08 +00001130 memset(cp->status_blk.bnx2x, 0, sizeof(*cp->status_blk.bnx2x));
Michael Chan4e9c4fd2009-12-10 15:40:58 +00001131
Michael Chan71034ba2009-10-10 13:46:59 +00001132 cp->l2_rx_ring_size = 15;
1133
1134 ret = cnic_alloc_l2_rings(dev, 4);
1135 if (ret)
1136 goto error;
1137
1138 ret = cnic_alloc_uio(dev);
1139 if (ret)
1140 goto error;
1141
1142 return 0;
1143
1144error:
1145 cnic_free_resc(dev);
1146 return -ENOMEM;
1147}
1148
Michael Chana4636962009-06-08 18:14:43 -07001149static inline u32 cnic_kwq_avail(struct cnic_local *cp)
1150{
1151 return cp->max_kwq_idx -
1152 ((cp->kwq_prod_idx - cp->kwq_con_idx) & cp->max_kwq_idx);
1153}
1154
1155static int cnic_submit_bnx2_kwqes(struct cnic_dev *dev, struct kwqe *wqes[],
1156 u32 num_wqes)
1157{
1158 struct cnic_local *cp = dev->cnic_priv;
1159 struct kwqe *prod_qe;
1160 u16 prod, sw_prod, i;
1161
1162 if (!test_bit(CNIC_F_CNIC_UP, &dev->flags))
1163 return -EAGAIN; /* bnx2 is down */
1164
1165 spin_lock_bh(&cp->cnic_ulp_lock);
1166 if (num_wqes > cnic_kwq_avail(cp) &&
Michael Chan1f1332a2010-05-18 11:32:52 +00001167 !test_bit(CNIC_LCL_FL_KWQ_INIT, &cp->cnic_local_flags)) {
Michael Chana4636962009-06-08 18:14:43 -07001168 spin_unlock_bh(&cp->cnic_ulp_lock);
1169 return -EAGAIN;
1170 }
1171
Michael Chan1f1332a2010-05-18 11:32:52 +00001172 clear_bit(CNIC_LCL_FL_KWQ_INIT, &cp->cnic_local_flags);
Michael Chana4636962009-06-08 18:14:43 -07001173
1174 prod = cp->kwq_prod_idx;
1175 sw_prod = prod & MAX_KWQ_IDX;
1176 for (i = 0; i < num_wqes; i++) {
1177 prod_qe = &cp->kwq[KWQ_PG(sw_prod)][KWQ_IDX(sw_prod)];
1178 memcpy(prod_qe, wqes[i], sizeof(struct kwqe));
1179 prod++;
1180 sw_prod = prod & MAX_KWQ_IDX;
1181 }
1182 cp->kwq_prod_idx = prod;
1183
1184 CNIC_WR16(dev, cp->kwq_io_addr, cp->kwq_prod_idx);
1185
1186 spin_unlock_bh(&cp->cnic_ulp_lock);
1187 return 0;
1188}
1189
Michael Chan71034ba2009-10-10 13:46:59 +00001190static void *cnic_get_kwqe_16_data(struct cnic_local *cp, u32 l5_cid,
1191 union l5cm_specific_data *l5_data)
1192{
1193 struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
1194 dma_addr_t map;
1195
1196 map = ctx->kwqe_data_mapping;
1197 l5_data->phy_address.lo = (u64) map & 0xffffffff;
1198 l5_data->phy_address.hi = (u64) map >> 32;
1199 return ctx->kwqe_data;
1200}
1201
1202static int cnic_submit_kwqe_16(struct cnic_dev *dev, u32 cmd, u32 cid,
1203 u32 type, union l5cm_specific_data *l5_data)
1204{
1205 struct cnic_local *cp = dev->cnic_priv;
1206 struct l5cm_spe kwqe;
1207 struct kwqe_16 *kwq[1];
1208 int ret;
1209
1210 kwqe.hdr.conn_and_cmd_data =
1211 cpu_to_le32(((cmd << SPE_HDR_CMD_ID_SHIFT) |
1212 BNX2X_HW_CID(cid, cp->func)));
1213 kwqe.hdr.type = cpu_to_le16(type);
1214 kwqe.hdr.reserved = 0;
1215 kwqe.data.phy_address.lo = cpu_to_le32(l5_data->phy_address.lo);
1216 kwqe.data.phy_address.hi = cpu_to_le32(l5_data->phy_address.hi);
1217
1218 kwq[0] = (struct kwqe_16 *) &kwqe;
1219
1220 spin_lock_bh(&cp->cnic_ulp_lock);
1221 ret = cp->ethdev->drv_submit_kwqes_16(dev->netdev, kwq, 1);
1222 spin_unlock_bh(&cp->cnic_ulp_lock);
1223
1224 if (ret == 1)
1225 return 0;
1226
1227 return -EBUSY;
1228}
1229
1230static void cnic_reply_bnx2x_kcqes(struct cnic_dev *dev, int ulp_type,
1231 struct kcqe *cqes[], u32 num_cqes)
1232{
1233 struct cnic_local *cp = dev->cnic_priv;
1234 struct cnic_ulp_ops *ulp_ops;
1235
1236 rcu_read_lock();
1237 ulp_ops = rcu_dereference(cp->ulp_ops[ulp_type]);
1238 if (likely(ulp_ops)) {
1239 ulp_ops->indicate_kcqes(cp->ulp_handle[ulp_type],
1240 cqes, num_cqes);
1241 }
1242 rcu_read_unlock();
1243}
1244
1245static int cnic_bnx2x_iscsi_init1(struct cnic_dev *dev, struct kwqe *kwqe)
1246{
1247 struct cnic_local *cp = dev->cnic_priv;
1248 struct iscsi_kwqe_init1 *req1 = (struct iscsi_kwqe_init1 *) kwqe;
1249 int func = cp->func, pages;
1250 int hq_bds;
1251
1252 cp->num_iscsi_tasks = req1->num_tasks_per_conn;
1253 cp->num_ccells = req1->num_ccells_per_conn;
1254 cp->task_array_size = BNX2X_ISCSI_TASK_CONTEXT_SIZE *
1255 cp->num_iscsi_tasks;
1256 cp->r2tq_size = cp->num_iscsi_tasks * BNX2X_ISCSI_MAX_PENDING_R2TS *
1257 BNX2X_ISCSI_R2TQE_SIZE;
1258 cp->hq_size = cp->num_ccells * BNX2X_ISCSI_HQ_BD_SIZE;
1259 pages = PAGE_ALIGN(cp->hq_size) / PAGE_SIZE;
1260 hq_bds = pages * (PAGE_SIZE / BNX2X_ISCSI_HQ_BD_SIZE);
1261 cp->num_cqs = req1->num_cqs;
1262
1263 if (!dev->max_iscsi_conn)
1264 return 0;
1265
1266 /* init Tstorm RAM */
1267 CNIC_WR16(dev, BAR_TSTRORM_INTMEM + TSTORM_ISCSI_RQ_SIZE_OFFSET(func),
1268 req1->rq_num_wqes);
1269 CNIC_WR16(dev, BAR_TSTRORM_INTMEM + TSTORM_ISCSI_PAGE_SIZE_OFFSET(func),
1270 PAGE_SIZE);
1271 CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
1272 TSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(func), PAGE_SHIFT);
1273 CNIC_WR16(dev, BAR_TSTRORM_INTMEM +
1274 TSTORM_ISCSI_NUM_OF_TASKS_OFFSET(func),
1275 req1->num_tasks_per_conn);
1276
1277 /* init Ustorm RAM */
1278 CNIC_WR16(dev, BAR_USTRORM_INTMEM +
1279 USTORM_ISCSI_RQ_BUFFER_SIZE_OFFSET(func),
1280 req1->rq_buffer_size);
1281 CNIC_WR16(dev, BAR_USTRORM_INTMEM + USTORM_ISCSI_PAGE_SIZE_OFFSET(func),
1282 PAGE_SIZE);
1283 CNIC_WR8(dev, BAR_USTRORM_INTMEM +
1284 USTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(func), PAGE_SHIFT);
1285 CNIC_WR16(dev, BAR_USTRORM_INTMEM +
1286 USTORM_ISCSI_NUM_OF_TASKS_OFFSET(func),
1287 req1->num_tasks_per_conn);
1288 CNIC_WR16(dev, BAR_USTRORM_INTMEM + USTORM_ISCSI_RQ_SIZE_OFFSET(func),
1289 req1->rq_num_wqes);
1290 CNIC_WR16(dev, BAR_USTRORM_INTMEM + USTORM_ISCSI_CQ_SIZE_OFFSET(func),
1291 req1->cq_num_wqes);
1292 CNIC_WR16(dev, BAR_USTRORM_INTMEM + USTORM_ISCSI_R2TQ_SIZE_OFFSET(func),
1293 cp->num_iscsi_tasks * BNX2X_ISCSI_MAX_PENDING_R2TS);
1294
1295 /* init Xstorm RAM */
1296 CNIC_WR16(dev, BAR_XSTRORM_INTMEM + XSTORM_ISCSI_PAGE_SIZE_OFFSET(func),
1297 PAGE_SIZE);
1298 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1299 XSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(func), PAGE_SHIFT);
1300 CNIC_WR16(dev, BAR_XSTRORM_INTMEM +
1301 XSTORM_ISCSI_NUM_OF_TASKS_OFFSET(func),
1302 req1->num_tasks_per_conn);
1303 CNIC_WR16(dev, BAR_XSTRORM_INTMEM + XSTORM_ISCSI_HQ_SIZE_OFFSET(func),
1304 hq_bds);
1305 CNIC_WR16(dev, BAR_XSTRORM_INTMEM + XSTORM_ISCSI_SQ_SIZE_OFFSET(func),
1306 req1->num_tasks_per_conn);
1307 CNIC_WR16(dev, BAR_XSTRORM_INTMEM + XSTORM_ISCSI_R2TQ_SIZE_OFFSET(func),
1308 cp->num_iscsi_tasks * BNX2X_ISCSI_MAX_PENDING_R2TS);
1309
1310 /* init Cstorm RAM */
1311 CNIC_WR16(dev, BAR_CSTRORM_INTMEM + CSTORM_ISCSI_PAGE_SIZE_OFFSET(func),
1312 PAGE_SIZE);
1313 CNIC_WR8(dev, BAR_CSTRORM_INTMEM +
1314 CSTORM_ISCSI_PAGE_SIZE_LOG_OFFSET(func), PAGE_SHIFT);
1315 CNIC_WR16(dev, BAR_CSTRORM_INTMEM +
1316 CSTORM_ISCSI_NUM_OF_TASKS_OFFSET(func),
1317 req1->num_tasks_per_conn);
1318 CNIC_WR16(dev, BAR_CSTRORM_INTMEM + CSTORM_ISCSI_CQ_SIZE_OFFSET(func),
1319 req1->cq_num_wqes);
1320 CNIC_WR16(dev, BAR_CSTRORM_INTMEM + CSTORM_ISCSI_HQ_SIZE_OFFSET(func),
1321 hq_bds);
1322
1323 return 0;
1324}
1325
1326static int cnic_bnx2x_iscsi_init2(struct cnic_dev *dev, struct kwqe *kwqe)
1327{
1328 struct iscsi_kwqe_init2 *req2 = (struct iscsi_kwqe_init2 *) kwqe;
1329 struct cnic_local *cp = dev->cnic_priv;
1330 int func = cp->func;
1331 struct iscsi_kcqe kcqe;
1332 struct kcqe *cqes[1];
1333
1334 memset(&kcqe, 0, sizeof(kcqe));
1335 if (!dev->max_iscsi_conn) {
1336 kcqe.completion_status =
1337 ISCSI_KCQE_COMPLETION_STATUS_ISCSI_NOT_SUPPORTED;
1338 goto done;
1339 }
1340
1341 CNIC_WR(dev, BAR_TSTRORM_INTMEM +
1342 TSTORM_ISCSI_ERROR_BITMAP_OFFSET(func), req2->error_bit_map[0]);
1343 CNIC_WR(dev, BAR_TSTRORM_INTMEM +
1344 TSTORM_ISCSI_ERROR_BITMAP_OFFSET(func) + 4,
1345 req2->error_bit_map[1]);
1346
1347 CNIC_WR16(dev, BAR_USTRORM_INTMEM +
1348 USTORM_ISCSI_CQ_SQN_SIZE_OFFSET(func), req2->max_cq_sqn);
1349 CNIC_WR(dev, BAR_USTRORM_INTMEM +
1350 USTORM_ISCSI_ERROR_BITMAP_OFFSET(func), req2->error_bit_map[0]);
1351 CNIC_WR(dev, BAR_USTRORM_INTMEM +
1352 USTORM_ISCSI_ERROR_BITMAP_OFFSET(func) + 4,
1353 req2->error_bit_map[1]);
1354
1355 CNIC_WR16(dev, BAR_CSTRORM_INTMEM +
1356 CSTORM_ISCSI_CQ_SQN_SIZE_OFFSET(func), req2->max_cq_sqn);
1357
1358 kcqe.completion_status = ISCSI_KCQE_COMPLETION_STATUS_SUCCESS;
1359
1360done:
1361 kcqe.op_code = ISCSI_KCQE_OPCODE_INIT;
1362 cqes[0] = (struct kcqe *) &kcqe;
1363 cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_ISCSI, cqes, 1);
1364
1365 return 0;
1366}
1367
1368static void cnic_free_bnx2x_conn_resc(struct cnic_dev *dev, u32 l5_cid)
1369{
1370 struct cnic_local *cp = dev->cnic_priv;
1371 struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
1372
1373 if (ctx->ulp_proto_id == CNIC_ULP_ISCSI) {
1374 struct cnic_iscsi *iscsi = ctx->proto.iscsi;
1375
1376 cnic_free_dma(dev, &iscsi->hq_info);
1377 cnic_free_dma(dev, &iscsi->r2tq_info);
1378 cnic_free_dma(dev, &iscsi->task_array_info);
1379 }
1380 cnic_free_id(&cp->cid_tbl, ctx->cid);
1381 ctx->cid = 0;
1382}
1383
1384static int cnic_alloc_bnx2x_conn_resc(struct cnic_dev *dev, u32 l5_cid)
1385{
1386 u32 cid;
1387 int ret, pages;
1388 struct cnic_local *cp = dev->cnic_priv;
1389 struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
1390 struct cnic_iscsi *iscsi = ctx->proto.iscsi;
1391
1392 cid = cnic_alloc_new_id(&cp->cid_tbl);
1393 if (cid == -1) {
1394 ret = -ENOMEM;
1395 goto error;
1396 }
1397
1398 ctx->cid = cid;
1399 pages = PAGE_ALIGN(cp->task_array_size) / PAGE_SIZE;
1400
1401 ret = cnic_alloc_dma(dev, &iscsi->task_array_info, pages, 1);
1402 if (ret)
1403 goto error;
1404
1405 pages = PAGE_ALIGN(cp->r2tq_size) / PAGE_SIZE;
1406 ret = cnic_alloc_dma(dev, &iscsi->r2tq_info, pages, 1);
1407 if (ret)
1408 goto error;
1409
1410 pages = PAGE_ALIGN(cp->hq_size) / PAGE_SIZE;
1411 ret = cnic_alloc_dma(dev, &iscsi->hq_info, pages, 1);
1412 if (ret)
1413 goto error;
1414
1415 return 0;
1416
1417error:
1418 cnic_free_bnx2x_conn_resc(dev, l5_cid);
1419 return ret;
1420}
1421
1422static void *cnic_get_bnx2x_ctx(struct cnic_dev *dev, u32 cid, int init,
1423 struct regpair *ctx_addr)
1424{
1425 struct cnic_local *cp = dev->cnic_priv;
1426 struct cnic_eth_dev *ethdev = cp->ethdev;
1427 int blk = (cid - ethdev->starting_cid) / cp->cids_per_blk;
1428 int off = (cid - ethdev->starting_cid) % cp->cids_per_blk;
1429 unsigned long align_off = 0;
1430 dma_addr_t ctx_map;
1431 void *ctx;
1432
1433 if (cp->ctx_align) {
1434 unsigned long mask = cp->ctx_align - 1;
1435
1436 if (cp->ctx_arr[blk].mapping & mask)
1437 align_off = cp->ctx_align -
1438 (cp->ctx_arr[blk].mapping & mask);
1439 }
1440 ctx_map = cp->ctx_arr[blk].mapping + align_off +
1441 (off * BNX2X_CONTEXT_MEM_SIZE);
1442 ctx = cp->ctx_arr[blk].ctx + align_off +
1443 (off * BNX2X_CONTEXT_MEM_SIZE);
1444 if (init)
1445 memset(ctx, 0, BNX2X_CONTEXT_MEM_SIZE);
1446
1447 ctx_addr->lo = ctx_map & 0xffffffff;
1448 ctx_addr->hi = (u64) ctx_map >> 32;
1449 return ctx;
1450}
1451
1452static int cnic_setup_bnx2x_ctx(struct cnic_dev *dev, struct kwqe *wqes[],
1453 u32 num)
1454{
1455 struct cnic_local *cp = dev->cnic_priv;
1456 struct iscsi_kwqe_conn_offload1 *req1 =
1457 (struct iscsi_kwqe_conn_offload1 *) wqes[0];
1458 struct iscsi_kwqe_conn_offload2 *req2 =
1459 (struct iscsi_kwqe_conn_offload2 *) wqes[1];
1460 struct iscsi_kwqe_conn_offload3 *req3;
1461 struct cnic_context *ctx = &cp->ctx_tbl[req1->iscsi_conn_id];
1462 struct cnic_iscsi *iscsi = ctx->proto.iscsi;
1463 u32 cid = ctx->cid;
1464 u32 hw_cid = BNX2X_HW_CID(cid, cp->func);
1465 struct iscsi_context *ictx;
1466 struct regpair context_addr;
1467 int i, j, n = 2, n_max;
1468
1469 ctx->ctx_flags = 0;
1470 if (!req2->num_additional_wqes)
1471 return -EINVAL;
1472
1473 n_max = req2->num_additional_wqes + 2;
1474
1475 ictx = cnic_get_bnx2x_ctx(dev, cid, 1, &context_addr);
1476 if (ictx == NULL)
1477 return -ENOMEM;
1478
1479 req3 = (struct iscsi_kwqe_conn_offload3 *) wqes[n++];
1480
1481 ictx->xstorm_ag_context.hq_prod = 1;
1482
1483 ictx->xstorm_st_context.iscsi.first_burst_length =
1484 ISCSI_DEF_FIRST_BURST_LEN;
1485 ictx->xstorm_st_context.iscsi.max_send_pdu_length =
1486 ISCSI_DEF_MAX_RECV_SEG_LEN;
1487 ictx->xstorm_st_context.iscsi.sq_pbl_base.lo =
1488 req1->sq_page_table_addr_lo;
1489 ictx->xstorm_st_context.iscsi.sq_pbl_base.hi =
1490 req1->sq_page_table_addr_hi;
1491 ictx->xstorm_st_context.iscsi.sq_curr_pbe.lo = req2->sq_first_pte.hi;
1492 ictx->xstorm_st_context.iscsi.sq_curr_pbe.hi = req2->sq_first_pte.lo;
1493 ictx->xstorm_st_context.iscsi.hq_pbl_base.lo =
1494 iscsi->hq_info.pgtbl_map & 0xffffffff;
1495 ictx->xstorm_st_context.iscsi.hq_pbl_base.hi =
1496 (u64) iscsi->hq_info.pgtbl_map >> 32;
1497 ictx->xstorm_st_context.iscsi.hq_curr_pbe_base.lo =
1498 iscsi->hq_info.pgtbl[0];
1499 ictx->xstorm_st_context.iscsi.hq_curr_pbe_base.hi =
1500 iscsi->hq_info.pgtbl[1];
1501 ictx->xstorm_st_context.iscsi.r2tq_pbl_base.lo =
1502 iscsi->r2tq_info.pgtbl_map & 0xffffffff;
1503 ictx->xstorm_st_context.iscsi.r2tq_pbl_base.hi =
1504 (u64) iscsi->r2tq_info.pgtbl_map >> 32;
1505 ictx->xstorm_st_context.iscsi.r2tq_curr_pbe_base.lo =
1506 iscsi->r2tq_info.pgtbl[0];
1507 ictx->xstorm_st_context.iscsi.r2tq_curr_pbe_base.hi =
1508 iscsi->r2tq_info.pgtbl[1];
1509 ictx->xstorm_st_context.iscsi.task_pbl_base.lo =
1510 iscsi->task_array_info.pgtbl_map & 0xffffffff;
1511 ictx->xstorm_st_context.iscsi.task_pbl_base.hi =
1512 (u64) iscsi->task_array_info.pgtbl_map >> 32;
1513 ictx->xstorm_st_context.iscsi.task_pbl_cache_idx =
1514 BNX2X_ISCSI_PBL_NOT_CACHED;
1515 ictx->xstorm_st_context.iscsi.flags.flags |=
1516 XSTORM_ISCSI_CONTEXT_FLAGS_B_IMMEDIATE_DATA;
1517 ictx->xstorm_st_context.iscsi.flags.flags |=
1518 XSTORM_ISCSI_CONTEXT_FLAGS_B_INITIAL_R2T;
1519
1520 ictx->tstorm_st_context.iscsi.hdr_bytes_2_fetch = ISCSI_HEADER_SIZE;
1521 /* TSTORM requires the base address of RQ DB & not PTE */
1522 ictx->tstorm_st_context.iscsi.rq_db_phy_addr.lo =
1523 req2->rq_page_table_addr_lo & PAGE_MASK;
1524 ictx->tstorm_st_context.iscsi.rq_db_phy_addr.hi =
1525 req2->rq_page_table_addr_hi;
1526 ictx->tstorm_st_context.iscsi.iscsi_conn_id = req1->iscsi_conn_id;
1527 ictx->tstorm_st_context.tcp.cwnd = 0x5A8;
1528 ictx->tstorm_st_context.tcp.flags2 |=
1529 TSTORM_TCP_ST_CONTEXT_SECTION_DA_EN;
1530
1531 ictx->timers_context.flags |= ISCSI_TIMERS_BLOCK_CONTEXT_CONN_VALID_FLG;
1532
1533 ictx->ustorm_st_context.ring.rq.pbl_base.lo =
Michael Chan15971c32009-12-02 15:15:38 +00001534 req2->rq_page_table_addr_lo;
Michael Chan71034ba2009-10-10 13:46:59 +00001535 ictx->ustorm_st_context.ring.rq.pbl_base.hi =
Michael Chan15971c32009-12-02 15:15:38 +00001536 req2->rq_page_table_addr_hi;
Michael Chan71034ba2009-10-10 13:46:59 +00001537 ictx->ustorm_st_context.ring.rq.curr_pbe.lo = req3->qp_first_pte[0].hi;
1538 ictx->ustorm_st_context.ring.rq.curr_pbe.hi = req3->qp_first_pte[0].lo;
1539 ictx->ustorm_st_context.ring.r2tq.pbl_base.lo =
1540 iscsi->r2tq_info.pgtbl_map & 0xffffffff;
1541 ictx->ustorm_st_context.ring.r2tq.pbl_base.hi =
1542 (u64) iscsi->r2tq_info.pgtbl_map >> 32;
1543 ictx->ustorm_st_context.ring.r2tq.curr_pbe.lo =
1544 iscsi->r2tq_info.pgtbl[0];
1545 ictx->ustorm_st_context.ring.r2tq.curr_pbe.hi =
1546 iscsi->r2tq_info.pgtbl[1];
1547 ictx->ustorm_st_context.ring.cq_pbl_base.lo =
1548 req1->cq_page_table_addr_lo;
1549 ictx->ustorm_st_context.ring.cq_pbl_base.hi =
1550 req1->cq_page_table_addr_hi;
1551 ictx->ustorm_st_context.ring.cq[0].cq_sn = ISCSI_INITIAL_SN;
1552 ictx->ustorm_st_context.ring.cq[0].curr_pbe.lo = req2->cq_first_pte.hi;
1553 ictx->ustorm_st_context.ring.cq[0].curr_pbe.hi = req2->cq_first_pte.lo;
1554 ictx->ustorm_st_context.task_pbe_cache_index =
1555 BNX2X_ISCSI_PBL_NOT_CACHED;
1556 ictx->ustorm_st_context.task_pdu_cache_index =
1557 BNX2X_ISCSI_PDU_HEADER_NOT_CACHED;
1558
1559 for (i = 1, j = 1; i < cp->num_cqs; i++, j++) {
1560 if (j == 3) {
1561 if (n >= n_max)
1562 break;
1563 req3 = (struct iscsi_kwqe_conn_offload3 *) wqes[n++];
1564 j = 0;
1565 }
1566 ictx->ustorm_st_context.ring.cq[i].cq_sn = ISCSI_INITIAL_SN;
1567 ictx->ustorm_st_context.ring.cq[i].curr_pbe.lo =
1568 req3->qp_first_pte[j].hi;
1569 ictx->ustorm_st_context.ring.cq[i].curr_pbe.hi =
1570 req3->qp_first_pte[j].lo;
1571 }
1572
1573 ictx->ustorm_st_context.task_pbl_base.lo =
1574 iscsi->task_array_info.pgtbl_map & 0xffffffff;
1575 ictx->ustorm_st_context.task_pbl_base.hi =
1576 (u64) iscsi->task_array_info.pgtbl_map >> 32;
1577 ictx->ustorm_st_context.tce_phy_addr.lo =
1578 iscsi->task_array_info.pgtbl[0];
1579 ictx->ustorm_st_context.tce_phy_addr.hi =
1580 iscsi->task_array_info.pgtbl[1];
1581 ictx->ustorm_st_context.iscsi_conn_id = req1->iscsi_conn_id;
1582 ictx->ustorm_st_context.num_cqs = cp->num_cqs;
1583 ictx->ustorm_st_context.negotiated_rx |= ISCSI_DEF_MAX_RECV_SEG_LEN;
1584 ictx->ustorm_st_context.negotiated_rx_and_flags |=
1585 ISCSI_DEF_MAX_BURST_LEN;
1586 ictx->ustorm_st_context.negotiated_rx |=
1587 ISCSI_DEFAULT_MAX_OUTSTANDING_R2T <<
1588 USTORM_ISCSI_ST_CONTEXT_MAX_OUTSTANDING_R2TS_SHIFT;
1589
1590 ictx->cstorm_st_context.hq_pbl_base.lo =
1591 iscsi->hq_info.pgtbl_map & 0xffffffff;
1592 ictx->cstorm_st_context.hq_pbl_base.hi =
1593 (u64) iscsi->hq_info.pgtbl_map >> 32;
1594 ictx->cstorm_st_context.hq_curr_pbe.lo = iscsi->hq_info.pgtbl[0];
1595 ictx->cstorm_st_context.hq_curr_pbe.hi = iscsi->hq_info.pgtbl[1];
1596 ictx->cstorm_st_context.task_pbl_base.lo =
1597 iscsi->task_array_info.pgtbl_map & 0xffffffff;
1598 ictx->cstorm_st_context.task_pbl_base.hi =
1599 (u64) iscsi->task_array_info.pgtbl_map >> 32;
1600 /* CSTORM and USTORM initialization is different, CSTORM requires
1601 * CQ DB base & not PTE addr */
1602 ictx->cstorm_st_context.cq_db_base.lo =
1603 req1->cq_page_table_addr_lo & PAGE_MASK;
1604 ictx->cstorm_st_context.cq_db_base.hi = req1->cq_page_table_addr_hi;
1605 ictx->cstorm_st_context.iscsi_conn_id = req1->iscsi_conn_id;
1606 ictx->cstorm_st_context.cq_proc_en_bit_map = (1 << cp->num_cqs) - 1;
1607 for (i = 0; i < cp->num_cqs; i++) {
1608 ictx->cstorm_st_context.cq_c_prod_sqn_arr.sqn[i] =
1609 ISCSI_INITIAL_SN;
1610 ictx->cstorm_st_context.cq_c_sqn_2_notify_arr.sqn[i] =
1611 ISCSI_INITIAL_SN;
1612 }
1613
1614 ictx->xstorm_ag_context.cdu_reserved =
1615 CDU_RSRVD_VALUE_TYPE_A(hw_cid, CDU_REGION_NUMBER_XCM_AG,
1616 ISCSI_CONNECTION_TYPE);
1617 ictx->ustorm_ag_context.cdu_usage =
1618 CDU_RSRVD_VALUE_TYPE_A(hw_cid, CDU_REGION_NUMBER_UCM_AG,
1619 ISCSI_CONNECTION_TYPE);
1620 return 0;
1621
1622}
1623
1624static int cnic_bnx2x_iscsi_ofld1(struct cnic_dev *dev, struct kwqe *wqes[],
1625 u32 num, int *work)
1626{
1627 struct iscsi_kwqe_conn_offload1 *req1;
1628 struct iscsi_kwqe_conn_offload2 *req2;
1629 struct cnic_local *cp = dev->cnic_priv;
1630 struct iscsi_kcqe kcqe;
1631 struct kcqe *cqes[1];
1632 u32 l5_cid;
1633 int ret;
1634
1635 if (num < 2) {
1636 *work = num;
1637 return -EINVAL;
1638 }
1639
1640 req1 = (struct iscsi_kwqe_conn_offload1 *) wqes[0];
1641 req2 = (struct iscsi_kwqe_conn_offload2 *) wqes[1];
1642 if ((num - 2) < req2->num_additional_wqes) {
1643 *work = num;
1644 return -EINVAL;
1645 }
1646 *work = 2 + req2->num_additional_wqes;;
1647
1648 l5_cid = req1->iscsi_conn_id;
1649 if (l5_cid >= MAX_ISCSI_TBL_SZ)
1650 return -EINVAL;
1651
1652 memset(&kcqe, 0, sizeof(kcqe));
1653 kcqe.op_code = ISCSI_KCQE_OPCODE_OFFLOAD_CONN;
1654 kcqe.iscsi_conn_id = l5_cid;
1655 kcqe.completion_status = ISCSI_KCQE_COMPLETION_STATUS_CTX_ALLOC_FAILURE;
1656
1657 if (atomic_inc_return(&cp->iscsi_conn) > dev->max_iscsi_conn) {
1658 atomic_dec(&cp->iscsi_conn);
1659 ret = 0;
1660 goto done;
1661 }
1662 ret = cnic_alloc_bnx2x_conn_resc(dev, l5_cid);
1663 if (ret) {
1664 atomic_dec(&cp->iscsi_conn);
1665 ret = 0;
1666 goto done;
1667 }
1668 ret = cnic_setup_bnx2x_ctx(dev, wqes, num);
1669 if (ret < 0) {
1670 cnic_free_bnx2x_conn_resc(dev, l5_cid);
1671 atomic_dec(&cp->iscsi_conn);
1672 goto done;
1673 }
1674
1675 kcqe.completion_status = ISCSI_KCQE_COMPLETION_STATUS_SUCCESS;
1676 kcqe.iscsi_conn_context_id = BNX2X_HW_CID(cp->ctx_tbl[l5_cid].cid,
1677 cp->func);
1678
1679done:
1680 cqes[0] = (struct kcqe *) &kcqe;
1681 cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_ISCSI, cqes, 1);
1682 return ret;
1683}
1684
1685
1686static int cnic_bnx2x_iscsi_update(struct cnic_dev *dev, struct kwqe *kwqe)
1687{
1688 struct cnic_local *cp = dev->cnic_priv;
1689 struct iscsi_kwqe_conn_update *req =
1690 (struct iscsi_kwqe_conn_update *) kwqe;
1691 void *data;
1692 union l5cm_specific_data l5_data;
1693 u32 l5_cid, cid = BNX2X_SW_CID(req->context_id);
1694 int ret;
1695
1696 if (cnic_get_l5_cid(cp, cid, &l5_cid) != 0)
1697 return -EINVAL;
1698
1699 data = cnic_get_kwqe_16_data(cp, l5_cid, &l5_data);
1700 if (!data)
1701 return -ENOMEM;
1702
1703 memcpy(data, kwqe, sizeof(struct kwqe));
1704
1705 ret = cnic_submit_kwqe_16(dev, ISCSI_RAMROD_CMD_ID_UPDATE_CONN,
1706 req->context_id, ISCSI_CONNECTION_TYPE, &l5_data);
1707 return ret;
1708}
1709
1710static int cnic_bnx2x_iscsi_destroy(struct cnic_dev *dev, struct kwqe *kwqe)
1711{
1712 struct cnic_local *cp = dev->cnic_priv;
1713 struct iscsi_kwqe_conn_destroy *req =
1714 (struct iscsi_kwqe_conn_destroy *) kwqe;
1715 union l5cm_specific_data l5_data;
1716 u32 l5_cid = req->reserved0;
1717 struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
1718 int ret = 0;
1719 struct iscsi_kcqe kcqe;
1720 struct kcqe *cqes[1];
1721
1722 if (!(ctx->ctx_flags & CTX_FL_OFFLD_START))
1723 goto skip_cfc_delete;
1724
1725 while (!time_after(jiffies, ctx->timestamp + (2 * HZ)))
1726 msleep(250);
1727
1728 init_waitqueue_head(&ctx->waitq);
1729 ctx->wait_cond = 0;
1730 memset(&l5_data, 0, sizeof(l5_data));
1731 ret = cnic_submit_kwqe_16(dev, RAMROD_CMD_ID_ETH_CFC_DEL,
1732 req->context_id,
1733 ETH_CONNECTION_TYPE |
1734 (1 << SPE_HDR_COMMON_RAMROD_SHIFT),
1735 &l5_data);
1736 if (ret == 0)
1737 wait_event(ctx->waitq, ctx->wait_cond);
1738
1739skip_cfc_delete:
1740 cnic_free_bnx2x_conn_resc(dev, l5_cid);
1741
1742 atomic_dec(&cp->iscsi_conn);
1743
1744 memset(&kcqe, 0, sizeof(kcqe));
1745 kcqe.op_code = ISCSI_KCQE_OPCODE_DESTROY_CONN;
1746 kcqe.iscsi_conn_id = l5_cid;
1747 kcqe.completion_status = ISCSI_KCQE_COMPLETION_STATUS_SUCCESS;
1748 kcqe.iscsi_conn_context_id = req->context_id;
1749
1750 cqes[0] = (struct kcqe *) &kcqe;
1751 cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_ISCSI, cqes, 1);
1752
1753 return ret;
1754}
1755
1756static void cnic_init_storm_conn_bufs(struct cnic_dev *dev,
1757 struct l4_kwq_connect_req1 *kwqe1,
1758 struct l4_kwq_connect_req3 *kwqe3,
1759 struct l5cm_active_conn_buffer *conn_buf)
1760{
1761 struct l5cm_conn_addr_params *conn_addr = &conn_buf->conn_addr_buf;
1762 struct l5cm_xstorm_conn_buffer *xstorm_buf =
1763 &conn_buf->xstorm_conn_buffer;
1764 struct l5cm_tstorm_conn_buffer *tstorm_buf =
1765 &conn_buf->tstorm_conn_buffer;
1766 struct regpair context_addr;
1767 u32 cid = BNX2X_SW_CID(kwqe1->cid);
1768 struct in6_addr src_ip, dst_ip;
1769 int i;
1770 u32 *addrp;
1771
1772 addrp = (u32 *) &conn_addr->local_ip_addr;
1773 for (i = 0; i < 4; i++, addrp++)
1774 src_ip.in6_u.u6_addr32[i] = cpu_to_be32(*addrp);
1775
1776 addrp = (u32 *) &conn_addr->remote_ip_addr;
1777 for (i = 0; i < 4; i++, addrp++)
1778 dst_ip.in6_u.u6_addr32[i] = cpu_to_be32(*addrp);
1779
1780 cnic_get_bnx2x_ctx(dev, cid, 0, &context_addr);
1781
1782 xstorm_buf->context_addr.hi = context_addr.hi;
1783 xstorm_buf->context_addr.lo = context_addr.lo;
1784 xstorm_buf->mss = 0xffff;
1785 xstorm_buf->rcv_buf = kwqe3->rcv_buf;
1786 if (kwqe1->tcp_flags & L4_KWQ_CONNECT_REQ1_NAGLE_ENABLE)
1787 xstorm_buf->params |= L5CM_XSTORM_CONN_BUFFER_NAGLE_ENABLE;
1788 xstorm_buf->pseudo_header_checksum =
1789 swab16(~csum_ipv6_magic(&src_ip, &dst_ip, 0, IPPROTO_TCP, 0));
1790
1791 if (!(kwqe1->tcp_flags & L4_KWQ_CONNECT_REQ1_NO_DELAY_ACK))
1792 tstorm_buf->params |=
1793 L5CM_TSTORM_CONN_BUFFER_DELAYED_ACK_ENABLE;
1794 if (kwqe3->ka_timeout) {
1795 tstorm_buf->ka_enable = 1;
1796 tstorm_buf->ka_timeout = kwqe3->ka_timeout;
1797 tstorm_buf->ka_interval = kwqe3->ka_interval;
1798 tstorm_buf->ka_max_probe_count = kwqe3->ka_max_probe_count;
1799 }
1800 tstorm_buf->rcv_buf = kwqe3->rcv_buf;
1801 tstorm_buf->snd_buf = kwqe3->snd_buf;
1802 tstorm_buf->max_rt_time = 0xffffffff;
1803}
1804
1805static void cnic_init_bnx2x_mac(struct cnic_dev *dev)
1806{
1807 struct cnic_local *cp = dev->cnic_priv;
1808 int func = CNIC_FUNC(cp);
1809 u8 *mac = dev->mac_addr;
1810
1811 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1812 XSTORM_ISCSI_LOCAL_MAC_ADDR0_OFFSET(func), mac[0]);
1813 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1814 XSTORM_ISCSI_LOCAL_MAC_ADDR1_OFFSET(func), mac[1]);
1815 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1816 XSTORM_ISCSI_LOCAL_MAC_ADDR2_OFFSET(func), mac[2]);
1817 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1818 XSTORM_ISCSI_LOCAL_MAC_ADDR3_OFFSET(func), mac[3]);
1819 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1820 XSTORM_ISCSI_LOCAL_MAC_ADDR4_OFFSET(func), mac[4]);
1821 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1822 XSTORM_ISCSI_LOCAL_MAC_ADDR5_OFFSET(func), mac[5]);
1823
1824 CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
1825 TSTORM_ISCSI_TCP_VARS_LSB_LOCAL_MAC_ADDR_OFFSET(func), mac[5]);
1826 CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
1827 TSTORM_ISCSI_TCP_VARS_LSB_LOCAL_MAC_ADDR_OFFSET(func) + 1,
1828 mac[4]);
1829 CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
1830 TSTORM_ISCSI_TCP_VARS_MSB_LOCAL_MAC_ADDR_OFFSET(func), mac[3]);
1831 CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
1832 TSTORM_ISCSI_TCP_VARS_MSB_LOCAL_MAC_ADDR_OFFSET(func) + 1,
1833 mac[2]);
1834 CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
1835 TSTORM_ISCSI_TCP_VARS_MSB_LOCAL_MAC_ADDR_OFFSET(func) + 2,
1836 mac[1]);
1837 CNIC_WR8(dev, BAR_TSTRORM_INTMEM +
1838 TSTORM_ISCSI_TCP_VARS_MSB_LOCAL_MAC_ADDR_OFFSET(func) + 3,
1839 mac[0]);
1840}
1841
1842static void cnic_bnx2x_set_tcp_timestamp(struct cnic_dev *dev, int tcp_ts)
1843{
1844 struct cnic_local *cp = dev->cnic_priv;
1845 u8 xstorm_flags = XSTORM_L5CM_TCP_FLAGS_WND_SCL_EN;
1846 u16 tstorm_flags = 0;
1847
1848 if (tcp_ts) {
1849 xstorm_flags |= XSTORM_L5CM_TCP_FLAGS_TS_ENABLED;
1850 tstorm_flags |= TSTORM_L5CM_TCP_FLAGS_TS_ENABLED;
1851 }
1852
1853 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
1854 XSTORM_ISCSI_TCP_VARS_FLAGS_OFFSET(cp->func), xstorm_flags);
1855
1856 CNIC_WR16(dev, BAR_TSTRORM_INTMEM +
1857 TSTORM_ISCSI_TCP_VARS_FLAGS_OFFSET(cp->func), tstorm_flags);
1858}
1859
1860static int cnic_bnx2x_connect(struct cnic_dev *dev, struct kwqe *wqes[],
1861 u32 num, int *work)
1862{
1863 struct cnic_local *cp = dev->cnic_priv;
1864 struct l4_kwq_connect_req1 *kwqe1 =
1865 (struct l4_kwq_connect_req1 *) wqes[0];
1866 struct l4_kwq_connect_req3 *kwqe3;
1867 struct l5cm_active_conn_buffer *conn_buf;
1868 struct l5cm_conn_addr_params *conn_addr;
1869 union l5cm_specific_data l5_data;
1870 u32 l5_cid = kwqe1->pg_cid;
1871 struct cnic_sock *csk = &cp->csk_tbl[l5_cid];
1872 struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
1873 int ret;
1874
1875 if (num < 2) {
1876 *work = num;
1877 return -EINVAL;
1878 }
1879
1880 if (kwqe1->conn_flags & L4_KWQ_CONNECT_REQ1_IP_V6)
1881 *work = 3;
1882 else
1883 *work = 2;
1884
1885 if (num < *work) {
1886 *work = num;
1887 return -EINVAL;
1888 }
1889
1890 if (sizeof(*conn_buf) > CNIC_KWQ16_DATA_SIZE) {
Joe Perchesddf79b22010-02-17 15:01:54 +00001891 netdev_err(dev->netdev, "conn_buf size too big\n");
Michael Chan71034ba2009-10-10 13:46:59 +00001892 return -ENOMEM;
1893 }
1894 conn_buf = cnic_get_kwqe_16_data(cp, l5_cid, &l5_data);
1895 if (!conn_buf)
1896 return -ENOMEM;
1897
1898 memset(conn_buf, 0, sizeof(*conn_buf));
1899
1900 conn_addr = &conn_buf->conn_addr_buf;
1901 conn_addr->remote_addr_0 = csk->ha[0];
1902 conn_addr->remote_addr_1 = csk->ha[1];
1903 conn_addr->remote_addr_2 = csk->ha[2];
1904 conn_addr->remote_addr_3 = csk->ha[3];
1905 conn_addr->remote_addr_4 = csk->ha[4];
1906 conn_addr->remote_addr_5 = csk->ha[5];
1907
1908 if (kwqe1->conn_flags & L4_KWQ_CONNECT_REQ1_IP_V6) {
1909 struct l4_kwq_connect_req2 *kwqe2 =
1910 (struct l4_kwq_connect_req2 *) wqes[1];
1911
1912 conn_addr->local_ip_addr.ip_addr_hi_hi = kwqe2->src_ip_v6_4;
1913 conn_addr->local_ip_addr.ip_addr_hi_lo = kwqe2->src_ip_v6_3;
1914 conn_addr->local_ip_addr.ip_addr_lo_hi = kwqe2->src_ip_v6_2;
1915
1916 conn_addr->remote_ip_addr.ip_addr_hi_hi = kwqe2->dst_ip_v6_4;
1917 conn_addr->remote_ip_addr.ip_addr_hi_lo = kwqe2->dst_ip_v6_3;
1918 conn_addr->remote_ip_addr.ip_addr_lo_hi = kwqe2->dst_ip_v6_2;
1919 conn_addr->params |= L5CM_CONN_ADDR_PARAMS_IP_VERSION;
1920 }
1921 kwqe3 = (struct l4_kwq_connect_req3 *) wqes[*work - 1];
1922
1923 conn_addr->local_ip_addr.ip_addr_lo_lo = kwqe1->src_ip;
1924 conn_addr->remote_ip_addr.ip_addr_lo_lo = kwqe1->dst_ip;
1925 conn_addr->local_tcp_port = kwqe1->src_port;
1926 conn_addr->remote_tcp_port = kwqe1->dst_port;
1927
1928 conn_addr->pmtu = kwqe3->pmtu;
1929 cnic_init_storm_conn_bufs(dev, kwqe1, kwqe3, conn_buf);
1930
1931 CNIC_WR16(dev, BAR_XSTRORM_INTMEM +
1932 XSTORM_ISCSI_LOCAL_VLAN_OFFSET(cp->func), csk->vlan_id);
1933
1934 cnic_bnx2x_set_tcp_timestamp(dev,
1935 kwqe1->tcp_flags & L4_KWQ_CONNECT_REQ1_TIME_STAMP);
1936
1937 ret = cnic_submit_kwqe_16(dev, L5CM_RAMROD_CMD_ID_TCP_CONNECT,
1938 kwqe1->cid, ISCSI_CONNECTION_TYPE, &l5_data);
1939 if (!ret)
1940 ctx->ctx_flags |= CTX_FL_OFFLD_START;
1941
1942 return ret;
1943}
1944
1945static int cnic_bnx2x_close(struct cnic_dev *dev, struct kwqe *kwqe)
1946{
1947 struct l4_kwq_close_req *req = (struct l4_kwq_close_req *) kwqe;
1948 union l5cm_specific_data l5_data;
1949 int ret;
1950
1951 memset(&l5_data, 0, sizeof(l5_data));
1952 ret = cnic_submit_kwqe_16(dev, L5CM_RAMROD_CMD_ID_CLOSE,
1953 req->cid, ISCSI_CONNECTION_TYPE, &l5_data);
1954 return ret;
1955}
1956
1957static int cnic_bnx2x_reset(struct cnic_dev *dev, struct kwqe *kwqe)
1958{
1959 struct l4_kwq_reset_req *req = (struct l4_kwq_reset_req *) kwqe;
1960 union l5cm_specific_data l5_data;
1961 int ret;
1962
1963 memset(&l5_data, 0, sizeof(l5_data));
1964 ret = cnic_submit_kwqe_16(dev, L5CM_RAMROD_CMD_ID_ABORT,
1965 req->cid, ISCSI_CONNECTION_TYPE, &l5_data);
1966 return ret;
1967}
1968static int cnic_bnx2x_offload_pg(struct cnic_dev *dev, struct kwqe *kwqe)
1969{
1970 struct l4_kwq_offload_pg *req = (struct l4_kwq_offload_pg *) kwqe;
1971 struct l4_kcq kcqe;
1972 struct kcqe *cqes[1];
1973
1974 memset(&kcqe, 0, sizeof(kcqe));
1975 kcqe.pg_host_opaque = req->host_opaque;
1976 kcqe.pg_cid = req->host_opaque;
1977 kcqe.op_code = L4_KCQE_OPCODE_VALUE_OFFLOAD_PG;
1978 cqes[0] = (struct kcqe *) &kcqe;
1979 cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_L4, cqes, 1);
1980 return 0;
1981}
1982
1983static int cnic_bnx2x_update_pg(struct cnic_dev *dev, struct kwqe *kwqe)
1984{
1985 struct l4_kwq_update_pg *req = (struct l4_kwq_update_pg *) kwqe;
1986 struct l4_kcq kcqe;
1987 struct kcqe *cqes[1];
1988
1989 memset(&kcqe, 0, sizeof(kcqe));
1990 kcqe.pg_host_opaque = req->pg_host_opaque;
1991 kcqe.pg_cid = req->pg_cid;
1992 kcqe.op_code = L4_KCQE_OPCODE_VALUE_UPDATE_PG;
1993 cqes[0] = (struct kcqe *) &kcqe;
1994 cnic_reply_bnx2x_kcqes(dev, CNIC_ULP_L4, cqes, 1);
1995 return 0;
1996}
1997
1998static int cnic_submit_bnx2x_kwqes(struct cnic_dev *dev, struct kwqe *wqes[],
1999 u32 num_wqes)
2000{
2001 int i, work, ret;
2002 u32 opcode;
2003 struct kwqe *kwqe;
2004
2005 if (!test_bit(CNIC_F_CNIC_UP, &dev->flags))
2006 return -EAGAIN; /* bnx2 is down */
2007
2008 for (i = 0; i < num_wqes; ) {
2009 kwqe = wqes[i];
2010 opcode = KWQE_OPCODE(kwqe->kwqe_op_flag);
2011 work = 1;
2012
2013 switch (opcode) {
2014 case ISCSI_KWQE_OPCODE_INIT1:
2015 ret = cnic_bnx2x_iscsi_init1(dev, kwqe);
2016 break;
2017 case ISCSI_KWQE_OPCODE_INIT2:
2018 ret = cnic_bnx2x_iscsi_init2(dev, kwqe);
2019 break;
2020 case ISCSI_KWQE_OPCODE_OFFLOAD_CONN1:
2021 ret = cnic_bnx2x_iscsi_ofld1(dev, &wqes[i],
2022 num_wqes - i, &work);
2023 break;
2024 case ISCSI_KWQE_OPCODE_UPDATE_CONN:
2025 ret = cnic_bnx2x_iscsi_update(dev, kwqe);
2026 break;
2027 case ISCSI_KWQE_OPCODE_DESTROY_CONN:
2028 ret = cnic_bnx2x_iscsi_destroy(dev, kwqe);
2029 break;
2030 case L4_KWQE_OPCODE_VALUE_CONNECT1:
2031 ret = cnic_bnx2x_connect(dev, &wqes[i], num_wqes - i,
2032 &work);
2033 break;
2034 case L4_KWQE_OPCODE_VALUE_CLOSE:
2035 ret = cnic_bnx2x_close(dev, kwqe);
2036 break;
2037 case L4_KWQE_OPCODE_VALUE_RESET:
2038 ret = cnic_bnx2x_reset(dev, kwqe);
2039 break;
2040 case L4_KWQE_OPCODE_VALUE_OFFLOAD_PG:
2041 ret = cnic_bnx2x_offload_pg(dev, kwqe);
2042 break;
2043 case L4_KWQE_OPCODE_VALUE_UPDATE_PG:
2044 ret = cnic_bnx2x_update_pg(dev, kwqe);
2045 break;
2046 case L4_KWQE_OPCODE_VALUE_UPLOAD_PG:
2047 ret = 0;
2048 break;
2049 default:
2050 ret = 0;
Joe Perchesddf79b22010-02-17 15:01:54 +00002051 netdev_err(dev->netdev, "Unknown type of KWQE(0x%x)\n",
2052 opcode);
Michael Chan71034ba2009-10-10 13:46:59 +00002053 break;
2054 }
2055 if (ret < 0)
Joe Perchesddf79b22010-02-17 15:01:54 +00002056 netdev_err(dev->netdev, "KWQE(0x%x) failed\n",
2057 opcode);
Michael Chan71034ba2009-10-10 13:46:59 +00002058 i += work;
2059 }
2060 return 0;
2061}
2062
Michael Chana4636962009-06-08 18:14:43 -07002063static void service_kcqes(struct cnic_dev *dev, int num_cqes)
2064{
2065 struct cnic_local *cp = dev->cnic_priv;
2066 int i, j;
2067
2068 i = 0;
2069 j = 1;
2070 while (num_cqes) {
2071 struct cnic_ulp_ops *ulp_ops;
2072 int ulp_type;
2073 u32 kcqe_op_flag = cp->completed_kcq[i]->kcqe_op_flag;
2074 u32 kcqe_layer = kcqe_op_flag & KCQE_FLAGS_LAYER_MASK;
2075
2076 if (unlikely(kcqe_op_flag & KCQE_RAMROD_COMPLETION))
2077 cnic_kwq_completion(dev, 1);
2078
2079 while (j < num_cqes) {
2080 u32 next_op = cp->completed_kcq[i + j]->kcqe_op_flag;
2081
2082 if ((next_op & KCQE_FLAGS_LAYER_MASK) != kcqe_layer)
2083 break;
2084
2085 if (unlikely(next_op & KCQE_RAMROD_COMPLETION))
2086 cnic_kwq_completion(dev, 1);
2087 j++;
2088 }
2089
2090 if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L5_RDMA)
2091 ulp_type = CNIC_ULP_RDMA;
2092 else if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L5_ISCSI)
2093 ulp_type = CNIC_ULP_ISCSI;
2094 else if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L4)
2095 ulp_type = CNIC_ULP_L4;
2096 else if (kcqe_layer == KCQE_FLAGS_LAYER_MASK_L2)
2097 goto end;
2098 else {
Joe Perchesddf79b22010-02-17 15:01:54 +00002099 netdev_err(dev->netdev, "Unknown type of KCQE(0x%x)\n",
2100 kcqe_op_flag);
Michael Chana4636962009-06-08 18:14:43 -07002101 goto end;
2102 }
2103
2104 rcu_read_lock();
2105 ulp_ops = rcu_dereference(cp->ulp_ops[ulp_type]);
2106 if (likely(ulp_ops)) {
2107 ulp_ops->indicate_kcqes(cp->ulp_handle[ulp_type],
2108 cp->completed_kcq + i, j);
2109 }
2110 rcu_read_unlock();
2111end:
2112 num_cqes -= j;
2113 i += j;
2114 j = 1;
2115 }
Michael Chana4636962009-06-08 18:14:43 -07002116}
2117
2118static u16 cnic_bnx2_next_idx(u16 idx)
2119{
2120 return idx + 1;
2121}
2122
2123static u16 cnic_bnx2_hw_idx(u16 idx)
2124{
2125 return idx;
2126}
2127
Michael Chan71034ba2009-10-10 13:46:59 +00002128static u16 cnic_bnx2x_next_idx(u16 idx)
2129{
2130 idx++;
2131 if ((idx & MAX_KCQE_CNT) == MAX_KCQE_CNT)
2132 idx++;
2133
2134 return idx;
2135}
2136
2137static u16 cnic_bnx2x_hw_idx(u16 idx)
2138{
2139 if ((idx & MAX_KCQE_CNT) == MAX_KCQE_CNT)
2140 idx++;
2141 return idx;
2142}
2143
Michael Chana4636962009-06-08 18:14:43 -07002144static int cnic_get_kcqes(struct cnic_dev *dev, u16 hw_prod, u16 *sw_prod)
2145{
2146 struct cnic_local *cp = dev->cnic_priv;
2147 u16 i, ri, last;
2148 struct kcqe *kcqe;
2149 int kcqe_cnt = 0, last_cnt = 0;
2150
2151 i = ri = last = *sw_prod;
2152 ri &= MAX_KCQ_IDX;
2153
2154 while ((i != hw_prod) && (kcqe_cnt < MAX_COMPLETED_KCQE)) {
Michael Chane6c28892010-06-24 14:58:39 +00002155 kcqe = &cp->kcq1.kcq[KCQ_PG(ri)][KCQ_IDX(ri)];
Michael Chana4636962009-06-08 18:14:43 -07002156 cp->completed_kcq[kcqe_cnt++] = kcqe;
2157 i = cp->next_idx(i);
2158 ri = i & MAX_KCQ_IDX;
2159 if (likely(!(kcqe->kcqe_op_flag & KCQE_FLAGS_NEXT))) {
2160 last_cnt = kcqe_cnt;
2161 last = i;
2162 }
2163 }
2164
2165 *sw_prod = last;
2166 return last_cnt;
2167}
2168
Michael Chan48f753d2010-05-18 11:32:53 +00002169static int cnic_l2_completion(struct cnic_local *cp)
2170{
2171 u16 hw_cons, sw_cons;
2172 union eth_rx_cqe *cqe, *cqe_ring = (union eth_rx_cqe *)
2173 (cp->l2_ring + (2 * BCM_PAGE_SIZE));
2174 u32 cmd;
2175 int comp = 0;
2176
2177 if (!test_bit(CNIC_F_BNX2X_CLASS, &cp->dev->flags))
2178 return 0;
2179
2180 hw_cons = *cp->rx_cons_ptr;
2181 if ((hw_cons & BNX2X_MAX_RCQ_DESC_CNT) == BNX2X_MAX_RCQ_DESC_CNT)
2182 hw_cons++;
2183
2184 sw_cons = cp->rx_cons;
2185 while (sw_cons != hw_cons) {
2186 u8 cqe_fp_flags;
2187
2188 cqe = &cqe_ring[sw_cons & BNX2X_MAX_RCQ_DESC_CNT];
2189 cqe_fp_flags = cqe->fast_path_cqe.type_error_flags;
2190 if (cqe_fp_flags & ETH_FAST_PATH_RX_CQE_TYPE) {
2191 cmd = le32_to_cpu(cqe->ramrod_cqe.conn_and_cmd_data);
2192 cmd >>= COMMON_RAMROD_ETH_RX_CQE_CMD_ID_SHIFT;
2193 if (cmd == RAMROD_CMD_ID_ETH_CLIENT_SETUP ||
2194 cmd == RAMROD_CMD_ID_ETH_HALT)
2195 comp++;
2196 }
2197 sw_cons = BNX2X_NEXT_RCQE(sw_cons);
2198 }
2199 return comp;
2200}
2201
Michael Chan86b53602009-10-10 13:46:57 +00002202static void cnic_chk_pkt_rings(struct cnic_local *cp)
Michael Chana4636962009-06-08 18:14:43 -07002203{
2204 u16 rx_cons = *cp->rx_cons_ptr;
2205 u16 tx_cons = *cp->tx_cons_ptr;
Michael Chan48f753d2010-05-18 11:32:53 +00002206 int comp = 0;
Michael Chana4636962009-06-08 18:14:43 -07002207
Michael Chan66fee9e2010-06-24 14:58:38 +00002208 if (!test_bit(CNIC_F_CNIC_UP, &cp->dev->flags))
2209 return;
2210
Michael Chana4636962009-06-08 18:14:43 -07002211 if (cp->tx_cons != tx_cons || cp->rx_cons != rx_cons) {
Michael Chan48f753d2010-05-18 11:32:53 +00002212 if (test_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags))
2213 comp = cnic_l2_completion(cp);
2214
Michael Chana4636962009-06-08 18:14:43 -07002215 cp->tx_cons = tx_cons;
2216 cp->rx_cons = rx_cons;
Michael Chan71034ba2009-10-10 13:46:59 +00002217
Michael Chana4636962009-06-08 18:14:43 -07002218 uio_event_notify(cp->cnic_uinfo);
2219 }
Michael Chan48f753d2010-05-18 11:32:53 +00002220 if (comp)
2221 clear_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags);
Michael Chana4636962009-06-08 18:14:43 -07002222}
2223
2224static int cnic_service_bnx2(void *data, void *status_blk)
2225{
2226 struct cnic_dev *dev = data;
2227 struct status_block *sblk = status_blk;
2228 struct cnic_local *cp = dev->cnic_priv;
2229 u32 status_idx = sblk->status_idx;
2230 u16 hw_prod, sw_prod;
2231 int kcqe_cnt;
2232
2233 if (unlikely(!test_bit(CNIC_F_CNIC_UP, &dev->flags)))
2234 return status_idx;
2235
2236 cp->kwq_con_idx = *cp->kwq_con_idx_ptr;
2237
2238 hw_prod = sblk->status_completion_producer_index;
Michael Chane6c28892010-06-24 14:58:39 +00002239 sw_prod = cp->kcq1.sw_prod_idx;
Michael Chana4636962009-06-08 18:14:43 -07002240 while (sw_prod != hw_prod) {
2241 kcqe_cnt = cnic_get_kcqes(dev, hw_prod, &sw_prod);
2242 if (kcqe_cnt == 0)
2243 goto done;
2244
2245 service_kcqes(dev, kcqe_cnt);
2246
2247 /* Tell compiler that status_blk fields can change. */
2248 barrier();
2249 if (status_idx != sblk->status_idx) {
2250 status_idx = sblk->status_idx;
2251 cp->kwq_con_idx = *cp->kwq_con_idx_ptr;
2252 hw_prod = sblk->status_completion_producer_index;
2253 } else
2254 break;
2255 }
2256
2257done:
Michael Chane6c28892010-06-24 14:58:39 +00002258 CNIC_WR16(dev, cp->kcq1.io_addr, sw_prod);
Michael Chana4636962009-06-08 18:14:43 -07002259
Michael Chane6c28892010-06-24 14:58:39 +00002260 cp->kcq1.sw_prod_idx = sw_prod;
Michael Chana4636962009-06-08 18:14:43 -07002261
Michael Chan86b53602009-10-10 13:46:57 +00002262 cnic_chk_pkt_rings(cp);
Michael Chana4636962009-06-08 18:14:43 -07002263 return status_idx;
2264}
2265
2266static void cnic_service_bnx2_msix(unsigned long data)
2267{
2268 struct cnic_dev *dev = (struct cnic_dev *) data;
2269 struct cnic_local *cp = dev->cnic_priv;
Michael Chana4dde3a2010-02-24 14:42:08 +00002270 struct status_block_msix *status_blk = cp->status_blk.bnx2;
Michael Chana4636962009-06-08 18:14:43 -07002271 u32 status_idx = status_blk->status_idx;
2272 u16 hw_prod, sw_prod;
2273 int kcqe_cnt;
2274
2275 cp->kwq_con_idx = status_blk->status_cmd_consumer_index;
2276
2277 hw_prod = status_blk->status_completion_producer_index;
Michael Chane6c28892010-06-24 14:58:39 +00002278 sw_prod = cp->kcq1.sw_prod_idx;
Michael Chana4636962009-06-08 18:14:43 -07002279 while (sw_prod != hw_prod) {
2280 kcqe_cnt = cnic_get_kcqes(dev, hw_prod, &sw_prod);
2281 if (kcqe_cnt == 0)
2282 goto done;
2283
2284 service_kcqes(dev, kcqe_cnt);
2285
2286 /* Tell compiler that status_blk fields can change. */
2287 barrier();
2288 if (status_idx != status_blk->status_idx) {
2289 status_idx = status_blk->status_idx;
2290 cp->kwq_con_idx = status_blk->status_cmd_consumer_index;
2291 hw_prod = status_blk->status_completion_producer_index;
2292 } else
2293 break;
2294 }
2295
2296done:
Michael Chane6c28892010-06-24 14:58:39 +00002297 CNIC_WR16(dev, cp->kcq1.io_addr, sw_prod);
2298 cp->kcq1.sw_prod_idx = sw_prod;
Michael Chana4636962009-06-08 18:14:43 -07002299
Michael Chan86b53602009-10-10 13:46:57 +00002300 cnic_chk_pkt_rings(cp);
Michael Chana4636962009-06-08 18:14:43 -07002301
2302 cp->last_status_idx = status_idx;
2303 CNIC_WR(dev, BNX2_PCICFG_INT_ACK_CMD, cp->int_num |
2304 BNX2_PCICFG_INT_ACK_CMD_INDEX_VALID | cp->last_status_idx);
2305}
2306
Michael Chan66fee9e2010-06-24 14:58:38 +00002307static void cnic_doirq(struct cnic_dev *dev)
2308{
2309 struct cnic_local *cp = dev->cnic_priv;
Michael Chane6c28892010-06-24 14:58:39 +00002310 u16 prod = cp->kcq1.sw_prod_idx & MAX_KCQ_IDX;
Michael Chan66fee9e2010-06-24 14:58:38 +00002311
2312 if (likely(test_bit(CNIC_F_CNIC_UP, &dev->flags))) {
2313 prefetch(cp->status_blk.gen);
Michael Chane6c28892010-06-24 14:58:39 +00002314 prefetch(&cp->kcq1.kcq[KCQ_PG(prod)][KCQ_IDX(prod)]);
Michael Chan66fee9e2010-06-24 14:58:38 +00002315
2316 tasklet_schedule(&cp->cnic_irq_task);
2317 }
2318}
2319
Michael Chana4636962009-06-08 18:14:43 -07002320static irqreturn_t cnic_irq(int irq, void *dev_instance)
2321{
2322 struct cnic_dev *dev = dev_instance;
2323 struct cnic_local *cp = dev->cnic_priv;
Michael Chana4636962009-06-08 18:14:43 -07002324
2325 if (cp->ack_int)
2326 cp->ack_int(dev);
2327
Michael Chan66fee9e2010-06-24 14:58:38 +00002328 cnic_doirq(dev);
Michael Chana4636962009-06-08 18:14:43 -07002329
2330 return IRQ_HANDLED;
2331}
2332
Michael Chan71034ba2009-10-10 13:46:59 +00002333static inline void cnic_ack_bnx2x_int(struct cnic_dev *dev, u8 id, u8 storm,
2334 u16 index, u8 op, u8 update)
2335{
2336 struct cnic_local *cp = dev->cnic_priv;
2337 u32 hc_addr = (HC_REG_COMMAND_REG + CNIC_PORT(cp) * 32 +
2338 COMMAND_REG_INT_ACK);
2339 struct igu_ack_register igu_ack;
2340
2341 igu_ack.status_block_index = index;
2342 igu_ack.sb_id_and_flags =
2343 ((id << IGU_ACK_REGISTER_STATUS_BLOCK_ID_SHIFT) |
2344 (storm << IGU_ACK_REGISTER_STORM_ID_SHIFT) |
2345 (update << IGU_ACK_REGISTER_UPDATE_INDEX_SHIFT) |
2346 (op << IGU_ACK_REGISTER_INTERRUPT_MODE_SHIFT));
2347
2348 CNIC_WR(dev, hc_addr, (*(u32 *)&igu_ack));
2349}
2350
2351static void cnic_ack_bnx2x_msix(struct cnic_dev *dev)
2352{
2353 struct cnic_local *cp = dev->cnic_priv;
2354
2355 cnic_ack_bnx2x_int(dev, cp->status_blk_num, CSTORM_ID, 0,
2356 IGU_INT_DISABLE, 0);
2357}
2358
2359static void cnic_service_bnx2x_bh(unsigned long data)
2360{
2361 struct cnic_dev *dev = (struct cnic_dev *) data;
2362 struct cnic_local *cp = dev->cnic_priv;
2363 u16 hw_prod, sw_prod;
2364 struct cstorm_status_block_c *sblk =
Michael Chana4dde3a2010-02-24 14:42:08 +00002365 &cp->status_blk.bnx2x->c_status_block;
Michael Chan71034ba2009-10-10 13:46:59 +00002366 u32 status_idx = sblk->status_block_index;
2367 int kcqe_cnt;
2368
2369 if (unlikely(!test_bit(CNIC_F_CNIC_UP, &dev->flags)))
2370 return;
2371
2372 hw_prod = sblk->index_values[HC_INDEX_C_ISCSI_EQ_CONS];
2373 hw_prod = cp->hw_idx(hw_prod);
Michael Chane6c28892010-06-24 14:58:39 +00002374 sw_prod = cp->kcq1.sw_prod_idx;
Michael Chan71034ba2009-10-10 13:46:59 +00002375 while (sw_prod != hw_prod) {
2376 kcqe_cnt = cnic_get_kcqes(dev, hw_prod, &sw_prod);
2377 if (kcqe_cnt == 0)
2378 goto done;
2379
2380 service_kcqes(dev, kcqe_cnt);
2381
2382 /* Tell compiler that sblk fields can change. */
2383 barrier();
2384 if (status_idx == sblk->status_block_index)
2385 break;
2386
2387 status_idx = sblk->status_block_index;
2388 hw_prod = sblk->index_values[HC_INDEX_C_ISCSI_EQ_CONS];
2389 hw_prod = cp->hw_idx(hw_prod);
2390 }
2391
2392done:
Michael Chane6c28892010-06-24 14:58:39 +00002393 CNIC_WR16(dev, cp->kcq1.io_addr, sw_prod + MAX_KCQ_IDX);
Michael Chan71034ba2009-10-10 13:46:59 +00002394 cnic_ack_bnx2x_int(dev, cp->status_blk_num, CSTORM_ID,
2395 status_idx, IGU_INT_ENABLE, 1);
2396
Michael Chane6c28892010-06-24 14:58:39 +00002397 cp->kcq1.sw_prod_idx = sw_prod;
Michael Chan71034ba2009-10-10 13:46:59 +00002398}
2399
2400static int cnic_service_bnx2x(void *data, void *status_blk)
2401{
2402 struct cnic_dev *dev = data;
2403 struct cnic_local *cp = dev->cnic_priv;
Michael Chan71034ba2009-10-10 13:46:59 +00002404
Michael Chan66fee9e2010-06-24 14:58:38 +00002405 if (!(cp->ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX))
2406 cnic_doirq(dev);
Michael Chan71034ba2009-10-10 13:46:59 +00002407
Michael Chan66fee9e2010-06-24 14:58:38 +00002408 cnic_chk_pkt_rings(cp);
Michael Chan71034ba2009-10-10 13:46:59 +00002409
2410 return 0;
2411}
2412
Michael Chana4636962009-06-08 18:14:43 -07002413static void cnic_ulp_stop(struct cnic_dev *dev)
2414{
2415 struct cnic_local *cp = dev->cnic_priv;
2416 int if_type;
2417
Michael Chan6d7760a2009-07-27 11:25:58 -07002418 if (cp->cnic_uinfo)
2419 cnic_send_nlmsg(cp, ISCSI_KEVENT_IF_DOWN, NULL);
2420
Michael Chana4636962009-06-08 18:14:43 -07002421 for (if_type = 0; if_type < MAX_CNIC_ULP_TYPE; if_type++) {
2422 struct cnic_ulp_ops *ulp_ops;
2423
Michael Chan681dbd72009-08-14 15:49:46 +00002424 mutex_lock(&cnic_lock);
2425 ulp_ops = cp->ulp_ops[if_type];
2426 if (!ulp_ops) {
2427 mutex_unlock(&cnic_lock);
Michael Chana4636962009-06-08 18:14:43 -07002428 continue;
Michael Chan681dbd72009-08-14 15:49:46 +00002429 }
2430 set_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[if_type]);
2431 mutex_unlock(&cnic_lock);
Michael Chana4636962009-06-08 18:14:43 -07002432
2433 if (test_and_clear_bit(ULP_F_START, &cp->ulp_flags[if_type]))
2434 ulp_ops->cnic_stop(cp->ulp_handle[if_type]);
Michael Chan681dbd72009-08-14 15:49:46 +00002435
2436 clear_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[if_type]);
Michael Chana4636962009-06-08 18:14:43 -07002437 }
Michael Chana4636962009-06-08 18:14:43 -07002438}
2439
2440static void cnic_ulp_start(struct cnic_dev *dev)
2441{
2442 struct cnic_local *cp = dev->cnic_priv;
2443 int if_type;
2444
Michael Chana4636962009-06-08 18:14:43 -07002445 for (if_type = 0; if_type < MAX_CNIC_ULP_TYPE; if_type++) {
2446 struct cnic_ulp_ops *ulp_ops;
2447
Michael Chan681dbd72009-08-14 15:49:46 +00002448 mutex_lock(&cnic_lock);
2449 ulp_ops = cp->ulp_ops[if_type];
2450 if (!ulp_ops || !ulp_ops->cnic_start) {
2451 mutex_unlock(&cnic_lock);
Michael Chana4636962009-06-08 18:14:43 -07002452 continue;
Michael Chan681dbd72009-08-14 15:49:46 +00002453 }
2454 set_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[if_type]);
2455 mutex_unlock(&cnic_lock);
Michael Chana4636962009-06-08 18:14:43 -07002456
2457 if (!test_and_set_bit(ULP_F_START, &cp->ulp_flags[if_type]))
2458 ulp_ops->cnic_start(cp->ulp_handle[if_type]);
Michael Chan681dbd72009-08-14 15:49:46 +00002459
2460 clear_bit(ULP_F_CALL_PENDING, &cp->ulp_flags[if_type]);
Michael Chana4636962009-06-08 18:14:43 -07002461 }
Michael Chana4636962009-06-08 18:14:43 -07002462}
2463
2464static int cnic_ctl(void *data, struct cnic_ctl_info *info)
2465{
2466 struct cnic_dev *dev = data;
2467
2468 switch (info->cmd) {
2469 case CNIC_CTL_STOP_CMD:
2470 cnic_hold(dev);
Michael Chana4636962009-06-08 18:14:43 -07002471
2472 cnic_ulp_stop(dev);
2473 cnic_stop_hw(dev);
2474
Michael Chana4636962009-06-08 18:14:43 -07002475 cnic_put(dev);
2476 break;
2477 case CNIC_CTL_START_CMD:
2478 cnic_hold(dev);
Michael Chana4636962009-06-08 18:14:43 -07002479
2480 if (!cnic_start_hw(dev))
2481 cnic_ulp_start(dev);
2482
Michael Chana4636962009-06-08 18:14:43 -07002483 cnic_put(dev);
2484 break;
Michael Chan71034ba2009-10-10 13:46:59 +00002485 case CNIC_CTL_COMPLETION_CMD: {
2486 u32 cid = BNX2X_SW_CID(info->data.comp.cid);
2487 u32 l5_cid;
2488 struct cnic_local *cp = dev->cnic_priv;
2489
2490 if (cnic_get_l5_cid(cp, cid, &l5_cid) == 0) {
2491 struct cnic_context *ctx = &cp->ctx_tbl[l5_cid];
2492
2493 ctx->wait_cond = 1;
2494 wake_up(&ctx->waitq);
2495 }
2496 break;
2497 }
Michael Chana4636962009-06-08 18:14:43 -07002498 default:
2499 return -EINVAL;
2500 }
2501 return 0;
2502}
2503
2504static void cnic_ulp_init(struct cnic_dev *dev)
2505{
2506 int i;
2507 struct cnic_local *cp = dev->cnic_priv;
2508
Michael Chana4636962009-06-08 18:14:43 -07002509 for (i = 0; i < MAX_CNIC_ULP_TYPE_EXT; i++) {
2510 struct cnic_ulp_ops *ulp_ops;
2511
Michael Chan7fc1ece2009-08-14 15:49:47 +00002512 mutex_lock(&cnic_lock);
2513 ulp_ops = cnic_ulp_tbl[i];
2514 if (!ulp_ops || !ulp_ops->cnic_init) {
2515 mutex_unlock(&cnic_lock);
Michael Chana4636962009-06-08 18:14:43 -07002516 continue;
Michael Chan7fc1ece2009-08-14 15:49:47 +00002517 }
2518 ulp_get(ulp_ops);
2519 mutex_unlock(&cnic_lock);
Michael Chana4636962009-06-08 18:14:43 -07002520
2521 if (!test_and_set_bit(ULP_F_INIT, &cp->ulp_flags[i]))
2522 ulp_ops->cnic_init(dev);
2523
Michael Chan7fc1ece2009-08-14 15:49:47 +00002524 ulp_put(ulp_ops);
Michael Chana4636962009-06-08 18:14:43 -07002525 }
Michael Chana4636962009-06-08 18:14:43 -07002526}
2527
2528static void cnic_ulp_exit(struct cnic_dev *dev)
2529{
2530 int i;
2531 struct cnic_local *cp = dev->cnic_priv;
2532
Michael Chana4636962009-06-08 18:14:43 -07002533 for (i = 0; i < MAX_CNIC_ULP_TYPE_EXT; i++) {
2534 struct cnic_ulp_ops *ulp_ops;
2535
Michael Chan7fc1ece2009-08-14 15:49:47 +00002536 mutex_lock(&cnic_lock);
2537 ulp_ops = cnic_ulp_tbl[i];
2538 if (!ulp_ops || !ulp_ops->cnic_exit) {
2539 mutex_unlock(&cnic_lock);
Michael Chana4636962009-06-08 18:14:43 -07002540 continue;
Michael Chan7fc1ece2009-08-14 15:49:47 +00002541 }
2542 ulp_get(ulp_ops);
2543 mutex_unlock(&cnic_lock);
Michael Chana4636962009-06-08 18:14:43 -07002544
2545 if (test_and_clear_bit(ULP_F_INIT, &cp->ulp_flags[i]))
2546 ulp_ops->cnic_exit(dev);
2547
Michael Chan7fc1ece2009-08-14 15:49:47 +00002548 ulp_put(ulp_ops);
Michael Chana4636962009-06-08 18:14:43 -07002549 }
Michael Chana4636962009-06-08 18:14:43 -07002550}
2551
2552static int cnic_cm_offload_pg(struct cnic_sock *csk)
2553{
2554 struct cnic_dev *dev = csk->dev;
2555 struct l4_kwq_offload_pg *l4kwqe;
2556 struct kwqe *wqes[1];
2557
2558 l4kwqe = (struct l4_kwq_offload_pg *) &csk->kwqe1;
2559 memset(l4kwqe, 0, sizeof(*l4kwqe));
2560 wqes[0] = (struct kwqe *) l4kwqe;
2561
2562 l4kwqe->op_code = L4_KWQE_OPCODE_VALUE_OFFLOAD_PG;
2563 l4kwqe->flags =
2564 L4_LAYER_CODE << L4_KWQ_OFFLOAD_PG_LAYER_CODE_SHIFT;
2565 l4kwqe->l2hdr_nbytes = ETH_HLEN;
2566
2567 l4kwqe->da0 = csk->ha[0];
2568 l4kwqe->da1 = csk->ha[1];
2569 l4kwqe->da2 = csk->ha[2];
2570 l4kwqe->da3 = csk->ha[3];
2571 l4kwqe->da4 = csk->ha[4];
2572 l4kwqe->da5 = csk->ha[5];
2573
2574 l4kwqe->sa0 = dev->mac_addr[0];
2575 l4kwqe->sa1 = dev->mac_addr[1];
2576 l4kwqe->sa2 = dev->mac_addr[2];
2577 l4kwqe->sa3 = dev->mac_addr[3];
2578 l4kwqe->sa4 = dev->mac_addr[4];
2579 l4kwqe->sa5 = dev->mac_addr[5];
2580
2581 l4kwqe->etype = ETH_P_IP;
Eddie Waia9736c02010-02-24 14:42:04 +00002582 l4kwqe->ipid_start = DEF_IPID_START;
Michael Chana4636962009-06-08 18:14:43 -07002583 l4kwqe->host_opaque = csk->l5_cid;
2584
2585 if (csk->vlan_id) {
2586 l4kwqe->pg_flags |= L4_KWQ_OFFLOAD_PG_VLAN_TAGGING;
2587 l4kwqe->vlan_tag = csk->vlan_id;
2588 l4kwqe->l2hdr_nbytes += 4;
2589 }
2590
2591 return dev->submit_kwqes(dev, wqes, 1);
2592}
2593
2594static int cnic_cm_update_pg(struct cnic_sock *csk)
2595{
2596 struct cnic_dev *dev = csk->dev;
2597 struct l4_kwq_update_pg *l4kwqe;
2598 struct kwqe *wqes[1];
2599
2600 l4kwqe = (struct l4_kwq_update_pg *) &csk->kwqe1;
2601 memset(l4kwqe, 0, sizeof(*l4kwqe));
2602 wqes[0] = (struct kwqe *) l4kwqe;
2603
2604 l4kwqe->opcode = L4_KWQE_OPCODE_VALUE_UPDATE_PG;
2605 l4kwqe->flags =
2606 L4_LAYER_CODE << L4_KWQ_UPDATE_PG_LAYER_CODE_SHIFT;
2607 l4kwqe->pg_cid = csk->pg_cid;
2608
2609 l4kwqe->da0 = csk->ha[0];
2610 l4kwqe->da1 = csk->ha[1];
2611 l4kwqe->da2 = csk->ha[2];
2612 l4kwqe->da3 = csk->ha[3];
2613 l4kwqe->da4 = csk->ha[4];
2614 l4kwqe->da5 = csk->ha[5];
2615
2616 l4kwqe->pg_host_opaque = csk->l5_cid;
2617 l4kwqe->pg_valids = L4_KWQ_UPDATE_PG_VALIDS_DA;
2618
2619 return dev->submit_kwqes(dev, wqes, 1);
2620}
2621
2622static int cnic_cm_upload_pg(struct cnic_sock *csk)
2623{
2624 struct cnic_dev *dev = csk->dev;
2625 struct l4_kwq_upload *l4kwqe;
2626 struct kwqe *wqes[1];
2627
2628 l4kwqe = (struct l4_kwq_upload *) &csk->kwqe1;
2629 memset(l4kwqe, 0, sizeof(*l4kwqe));
2630 wqes[0] = (struct kwqe *) l4kwqe;
2631
2632 l4kwqe->opcode = L4_KWQE_OPCODE_VALUE_UPLOAD_PG;
2633 l4kwqe->flags =
2634 L4_LAYER_CODE << L4_KWQ_UPLOAD_LAYER_CODE_SHIFT;
2635 l4kwqe->cid = csk->pg_cid;
2636
2637 return dev->submit_kwqes(dev, wqes, 1);
2638}
2639
2640static int cnic_cm_conn_req(struct cnic_sock *csk)
2641{
2642 struct cnic_dev *dev = csk->dev;
2643 struct l4_kwq_connect_req1 *l4kwqe1;
2644 struct l4_kwq_connect_req2 *l4kwqe2;
2645 struct l4_kwq_connect_req3 *l4kwqe3;
2646 struct kwqe *wqes[3];
2647 u8 tcp_flags = 0;
2648 int num_wqes = 2;
2649
2650 l4kwqe1 = (struct l4_kwq_connect_req1 *) &csk->kwqe1;
2651 l4kwqe2 = (struct l4_kwq_connect_req2 *) &csk->kwqe2;
2652 l4kwqe3 = (struct l4_kwq_connect_req3 *) &csk->kwqe3;
2653 memset(l4kwqe1, 0, sizeof(*l4kwqe1));
2654 memset(l4kwqe2, 0, sizeof(*l4kwqe2));
2655 memset(l4kwqe3, 0, sizeof(*l4kwqe3));
2656
2657 l4kwqe3->op_code = L4_KWQE_OPCODE_VALUE_CONNECT3;
2658 l4kwqe3->flags =
2659 L4_LAYER_CODE << L4_KWQ_CONNECT_REQ3_LAYER_CODE_SHIFT;
2660 l4kwqe3->ka_timeout = csk->ka_timeout;
2661 l4kwqe3->ka_interval = csk->ka_interval;
2662 l4kwqe3->ka_max_probe_count = csk->ka_max_probe_count;
2663 l4kwqe3->tos = csk->tos;
2664 l4kwqe3->ttl = csk->ttl;
2665 l4kwqe3->snd_seq_scale = csk->snd_seq_scale;
2666 l4kwqe3->pmtu = csk->mtu;
2667 l4kwqe3->rcv_buf = csk->rcv_buf;
2668 l4kwqe3->snd_buf = csk->snd_buf;
2669 l4kwqe3->seed = csk->seed;
2670
2671 wqes[0] = (struct kwqe *) l4kwqe1;
2672 if (test_bit(SK_F_IPV6, &csk->flags)) {
2673 wqes[1] = (struct kwqe *) l4kwqe2;
2674 wqes[2] = (struct kwqe *) l4kwqe3;
2675 num_wqes = 3;
2676
2677 l4kwqe1->conn_flags = L4_KWQ_CONNECT_REQ1_IP_V6;
2678 l4kwqe2->op_code = L4_KWQE_OPCODE_VALUE_CONNECT2;
2679 l4kwqe2->flags =
2680 L4_KWQ_CONNECT_REQ2_LINKED_WITH_NEXT |
2681 L4_LAYER_CODE << L4_KWQ_CONNECT_REQ2_LAYER_CODE_SHIFT;
2682 l4kwqe2->src_ip_v6_2 = be32_to_cpu(csk->src_ip[1]);
2683 l4kwqe2->src_ip_v6_3 = be32_to_cpu(csk->src_ip[2]);
2684 l4kwqe2->src_ip_v6_4 = be32_to_cpu(csk->src_ip[3]);
2685 l4kwqe2->dst_ip_v6_2 = be32_to_cpu(csk->dst_ip[1]);
2686 l4kwqe2->dst_ip_v6_3 = be32_to_cpu(csk->dst_ip[2]);
2687 l4kwqe2->dst_ip_v6_4 = be32_to_cpu(csk->dst_ip[3]);
2688 l4kwqe3->mss = l4kwqe3->pmtu - sizeof(struct ipv6hdr) -
2689 sizeof(struct tcphdr);
2690 } else {
2691 wqes[1] = (struct kwqe *) l4kwqe3;
2692 l4kwqe3->mss = l4kwqe3->pmtu - sizeof(struct iphdr) -
2693 sizeof(struct tcphdr);
2694 }
2695
2696 l4kwqe1->op_code = L4_KWQE_OPCODE_VALUE_CONNECT1;
2697 l4kwqe1->flags =
2698 (L4_LAYER_CODE << L4_KWQ_CONNECT_REQ1_LAYER_CODE_SHIFT) |
2699 L4_KWQ_CONNECT_REQ3_LINKED_WITH_NEXT;
2700 l4kwqe1->cid = csk->cid;
2701 l4kwqe1->pg_cid = csk->pg_cid;
2702 l4kwqe1->src_ip = be32_to_cpu(csk->src_ip[0]);
2703 l4kwqe1->dst_ip = be32_to_cpu(csk->dst_ip[0]);
2704 l4kwqe1->src_port = be16_to_cpu(csk->src_port);
2705 l4kwqe1->dst_port = be16_to_cpu(csk->dst_port);
2706 if (csk->tcp_flags & SK_TCP_NO_DELAY_ACK)
2707 tcp_flags |= L4_KWQ_CONNECT_REQ1_NO_DELAY_ACK;
2708 if (csk->tcp_flags & SK_TCP_KEEP_ALIVE)
2709 tcp_flags |= L4_KWQ_CONNECT_REQ1_KEEP_ALIVE;
2710 if (csk->tcp_flags & SK_TCP_NAGLE)
2711 tcp_flags |= L4_KWQ_CONNECT_REQ1_NAGLE_ENABLE;
2712 if (csk->tcp_flags & SK_TCP_TIMESTAMP)
2713 tcp_flags |= L4_KWQ_CONNECT_REQ1_TIME_STAMP;
2714 if (csk->tcp_flags & SK_TCP_SACK)
2715 tcp_flags |= L4_KWQ_CONNECT_REQ1_SACK;
2716 if (csk->tcp_flags & SK_TCP_SEG_SCALING)
2717 tcp_flags |= L4_KWQ_CONNECT_REQ1_SEG_SCALING;
2718
2719 l4kwqe1->tcp_flags = tcp_flags;
2720
2721 return dev->submit_kwqes(dev, wqes, num_wqes);
2722}
2723
2724static int cnic_cm_close_req(struct cnic_sock *csk)
2725{
2726 struct cnic_dev *dev = csk->dev;
2727 struct l4_kwq_close_req *l4kwqe;
2728 struct kwqe *wqes[1];
2729
2730 l4kwqe = (struct l4_kwq_close_req *) &csk->kwqe2;
2731 memset(l4kwqe, 0, sizeof(*l4kwqe));
2732 wqes[0] = (struct kwqe *) l4kwqe;
2733
2734 l4kwqe->op_code = L4_KWQE_OPCODE_VALUE_CLOSE;
2735 l4kwqe->flags = L4_LAYER_CODE << L4_KWQ_CLOSE_REQ_LAYER_CODE_SHIFT;
2736 l4kwqe->cid = csk->cid;
2737
2738 return dev->submit_kwqes(dev, wqes, 1);
2739}
2740
2741static int cnic_cm_abort_req(struct cnic_sock *csk)
2742{
2743 struct cnic_dev *dev = csk->dev;
2744 struct l4_kwq_reset_req *l4kwqe;
2745 struct kwqe *wqes[1];
2746
2747 l4kwqe = (struct l4_kwq_reset_req *) &csk->kwqe2;
2748 memset(l4kwqe, 0, sizeof(*l4kwqe));
2749 wqes[0] = (struct kwqe *) l4kwqe;
2750
2751 l4kwqe->op_code = L4_KWQE_OPCODE_VALUE_RESET;
2752 l4kwqe->flags = L4_LAYER_CODE << L4_KWQ_RESET_REQ_LAYER_CODE_SHIFT;
2753 l4kwqe->cid = csk->cid;
2754
2755 return dev->submit_kwqes(dev, wqes, 1);
2756}
2757
2758static int cnic_cm_create(struct cnic_dev *dev, int ulp_type, u32 cid,
2759 u32 l5_cid, struct cnic_sock **csk, void *context)
2760{
2761 struct cnic_local *cp = dev->cnic_priv;
2762 struct cnic_sock *csk1;
2763
2764 if (l5_cid >= MAX_CM_SK_TBL_SZ)
2765 return -EINVAL;
2766
2767 csk1 = &cp->csk_tbl[l5_cid];
2768 if (atomic_read(&csk1->ref_count))
2769 return -EAGAIN;
2770
2771 if (test_and_set_bit(SK_F_INUSE, &csk1->flags))
2772 return -EBUSY;
2773
2774 csk1->dev = dev;
2775 csk1->cid = cid;
2776 csk1->l5_cid = l5_cid;
2777 csk1->ulp_type = ulp_type;
2778 csk1->context = context;
2779
2780 csk1->ka_timeout = DEF_KA_TIMEOUT;
2781 csk1->ka_interval = DEF_KA_INTERVAL;
2782 csk1->ka_max_probe_count = DEF_KA_MAX_PROBE_COUNT;
2783 csk1->tos = DEF_TOS;
2784 csk1->ttl = DEF_TTL;
2785 csk1->snd_seq_scale = DEF_SND_SEQ_SCALE;
2786 csk1->rcv_buf = DEF_RCV_BUF;
2787 csk1->snd_buf = DEF_SND_BUF;
2788 csk1->seed = DEF_SEED;
2789
2790 *csk = csk1;
2791 return 0;
2792}
2793
2794static void cnic_cm_cleanup(struct cnic_sock *csk)
2795{
2796 if (csk->src_port) {
2797 struct cnic_dev *dev = csk->dev;
2798 struct cnic_local *cp = dev->cnic_priv;
2799
2800 cnic_free_id(&cp->csk_port_tbl, csk->src_port);
2801 csk->src_port = 0;
2802 }
2803}
2804
2805static void cnic_close_conn(struct cnic_sock *csk)
2806{
2807 if (test_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags)) {
2808 cnic_cm_upload_pg(csk);
2809 clear_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags);
2810 }
2811 cnic_cm_cleanup(csk);
2812}
2813
2814static int cnic_cm_destroy(struct cnic_sock *csk)
2815{
2816 if (!cnic_in_use(csk))
2817 return -EINVAL;
2818
2819 csk_hold(csk);
2820 clear_bit(SK_F_INUSE, &csk->flags);
2821 smp_mb__after_clear_bit();
2822 while (atomic_read(&csk->ref_count) != 1)
2823 msleep(1);
2824 cnic_cm_cleanup(csk);
2825
2826 csk->flags = 0;
2827 csk_put(csk);
2828 return 0;
2829}
2830
2831static inline u16 cnic_get_vlan(struct net_device *dev,
2832 struct net_device **vlan_dev)
2833{
2834 if (dev->priv_flags & IFF_802_1Q_VLAN) {
2835 *vlan_dev = vlan_dev_real_dev(dev);
2836 return vlan_dev_vlan_id(dev);
2837 }
2838 *vlan_dev = dev;
2839 return 0;
2840}
2841
2842static int cnic_get_v4_route(struct sockaddr_in *dst_addr,
2843 struct dst_entry **dst)
2844{
Randy Dunlapfaea56c2009-06-12 11:43:48 -07002845#if defined(CONFIG_INET)
Michael Chana4636962009-06-08 18:14:43 -07002846 struct flowi fl;
2847 int err;
2848 struct rtable *rt;
2849
2850 memset(&fl, 0, sizeof(fl));
2851 fl.nl_u.ip4_u.daddr = dst_addr->sin_addr.s_addr;
2852
2853 err = ip_route_output_key(&init_net, &rt, &fl);
2854 if (!err)
Changli Gaod8d1f302010-06-10 23:31:35 -07002855 *dst = &rt->dst;
Michael Chana4636962009-06-08 18:14:43 -07002856 return err;
Randy Dunlapfaea56c2009-06-12 11:43:48 -07002857#else
2858 return -ENETUNREACH;
2859#endif
Michael Chana4636962009-06-08 18:14:43 -07002860}
2861
2862static int cnic_get_v6_route(struct sockaddr_in6 *dst_addr,
2863 struct dst_entry **dst)
2864{
Randy Dunlapfaea56c2009-06-12 11:43:48 -07002865#if defined(CONFIG_IPV6) || (defined(CONFIG_IPV6_MODULE) && defined(MODULE))
Michael Chana4636962009-06-08 18:14:43 -07002866 struct flowi fl;
2867
2868 memset(&fl, 0, sizeof(fl));
2869 ipv6_addr_copy(&fl.fl6_dst, &dst_addr->sin6_addr);
2870 if (ipv6_addr_type(&fl.fl6_dst) & IPV6_ADDR_LINKLOCAL)
2871 fl.oif = dst_addr->sin6_scope_id;
2872
2873 *dst = ip6_route_output(&init_net, NULL, &fl);
2874 if (*dst)
2875 return 0;
2876#endif
2877
2878 return -ENETUNREACH;
2879}
2880
2881static struct cnic_dev *cnic_cm_select_dev(struct sockaddr_in *dst_addr,
2882 int ulp_type)
2883{
2884 struct cnic_dev *dev = NULL;
2885 struct dst_entry *dst;
2886 struct net_device *netdev = NULL;
2887 int err = -ENETUNREACH;
2888
2889 if (dst_addr->sin_family == AF_INET)
2890 err = cnic_get_v4_route(dst_addr, &dst);
2891 else if (dst_addr->sin_family == AF_INET6) {
2892 struct sockaddr_in6 *dst_addr6 =
2893 (struct sockaddr_in6 *) dst_addr;
2894
2895 err = cnic_get_v6_route(dst_addr6, &dst);
2896 } else
2897 return NULL;
2898
2899 if (err)
2900 return NULL;
2901
2902 if (!dst->dev)
2903 goto done;
2904
2905 cnic_get_vlan(dst->dev, &netdev);
2906
2907 dev = cnic_from_netdev(netdev);
2908
2909done:
2910 dst_release(dst);
2911 if (dev)
2912 cnic_put(dev);
2913 return dev;
2914}
2915
2916static int cnic_resolve_addr(struct cnic_sock *csk, struct cnic_sockaddr *saddr)
2917{
2918 struct cnic_dev *dev = csk->dev;
2919 struct cnic_local *cp = dev->cnic_priv;
2920
2921 return cnic_send_nlmsg(cp, ISCSI_KEVENT_PATH_REQ, csk);
2922}
2923
2924static int cnic_get_route(struct cnic_sock *csk, struct cnic_sockaddr *saddr)
2925{
2926 struct cnic_dev *dev = csk->dev;
2927 struct cnic_local *cp = dev->cnic_priv;
Michael Chanc76284a2010-02-24 14:42:07 +00002928 int is_v6, rc = 0;
2929 struct dst_entry *dst = NULL;
Michael Chana4636962009-06-08 18:14:43 -07002930 struct net_device *realdev;
2931 u32 local_port;
2932
2933 if (saddr->local.v6.sin6_family == AF_INET6 &&
2934 saddr->remote.v6.sin6_family == AF_INET6)
2935 is_v6 = 1;
2936 else if (saddr->local.v4.sin_family == AF_INET &&
2937 saddr->remote.v4.sin_family == AF_INET)
2938 is_v6 = 0;
2939 else
2940 return -EINVAL;
2941
2942 clear_bit(SK_F_IPV6, &csk->flags);
2943
2944 if (is_v6) {
Michael Chana4636962009-06-08 18:14:43 -07002945 set_bit(SK_F_IPV6, &csk->flags);
Michael Chanc76284a2010-02-24 14:42:07 +00002946 cnic_get_v6_route(&saddr->remote.v6, &dst);
Michael Chana4636962009-06-08 18:14:43 -07002947
2948 memcpy(&csk->dst_ip[0], &saddr->remote.v6.sin6_addr,
2949 sizeof(struct in6_addr));
2950 csk->dst_port = saddr->remote.v6.sin6_port;
2951 local_port = saddr->local.v6.sin6_port;
Michael Chana4636962009-06-08 18:14:43 -07002952
2953 } else {
Michael Chanc76284a2010-02-24 14:42:07 +00002954 cnic_get_v4_route(&saddr->remote.v4, &dst);
Michael Chana4636962009-06-08 18:14:43 -07002955
2956 csk->dst_ip[0] = saddr->remote.v4.sin_addr.s_addr;
2957 csk->dst_port = saddr->remote.v4.sin_port;
2958 local_port = saddr->local.v4.sin_port;
2959 }
2960
Michael Chanc76284a2010-02-24 14:42:07 +00002961 csk->vlan_id = 0;
2962 csk->mtu = dev->netdev->mtu;
2963 if (dst && dst->dev) {
2964 u16 vlan = cnic_get_vlan(dst->dev, &realdev);
2965 if (realdev == dev->netdev) {
2966 csk->vlan_id = vlan;
2967 csk->mtu = dst_mtu(dst);
2968 }
2969 }
Michael Chana4636962009-06-08 18:14:43 -07002970
2971 if (local_port >= CNIC_LOCAL_PORT_MIN &&
2972 local_port < CNIC_LOCAL_PORT_MAX) {
2973 if (cnic_alloc_id(&cp->csk_port_tbl, local_port))
2974 local_port = 0;
2975 } else
2976 local_port = 0;
2977
2978 if (!local_port) {
2979 local_port = cnic_alloc_new_id(&cp->csk_port_tbl);
2980 if (local_port == -1) {
2981 rc = -ENOMEM;
2982 goto err_out;
2983 }
2984 }
2985 csk->src_port = local_port;
2986
Michael Chana4636962009-06-08 18:14:43 -07002987err_out:
2988 dst_release(dst);
2989 return rc;
2990}
2991
2992static void cnic_init_csk_state(struct cnic_sock *csk)
2993{
2994 csk->state = 0;
2995 clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
2996 clear_bit(SK_F_CLOSING, &csk->flags);
2997}
2998
2999static int cnic_cm_connect(struct cnic_sock *csk, struct cnic_sockaddr *saddr)
3000{
3001 int err = 0;
3002
3003 if (!cnic_in_use(csk))
3004 return -EINVAL;
3005
3006 if (test_and_set_bit(SK_F_CONNECT_START, &csk->flags))
3007 return -EINVAL;
3008
3009 cnic_init_csk_state(csk);
3010
3011 err = cnic_get_route(csk, saddr);
3012 if (err)
3013 goto err_out;
3014
3015 err = cnic_resolve_addr(csk, saddr);
3016 if (!err)
3017 return 0;
3018
3019err_out:
3020 clear_bit(SK_F_CONNECT_START, &csk->flags);
3021 return err;
3022}
3023
3024static int cnic_cm_abort(struct cnic_sock *csk)
3025{
3026 struct cnic_local *cp = csk->dev->cnic_priv;
Michael Chan7b34a462010-06-15 08:57:03 +00003027 u32 opcode = L4_KCQE_OPCODE_VALUE_RESET_COMP;
Michael Chana4636962009-06-08 18:14:43 -07003028
3029 if (!cnic_in_use(csk))
3030 return -EINVAL;
3031
3032 if (cnic_abort_prep(csk))
3033 return cnic_cm_abort_req(csk);
3034
3035 /* Getting here means that we haven't started connect, or
3036 * connect was not successful.
3037 */
3038
Michael Chana4636962009-06-08 18:14:43 -07003039 cp->close_conn(csk, opcode);
Michael Chan7b34a462010-06-15 08:57:03 +00003040 if (csk->state != opcode)
3041 return -EALREADY;
Michael Chana4636962009-06-08 18:14:43 -07003042
3043 return 0;
3044}
3045
3046static int cnic_cm_close(struct cnic_sock *csk)
3047{
3048 if (!cnic_in_use(csk))
3049 return -EINVAL;
3050
3051 if (cnic_close_prep(csk)) {
3052 csk->state = L4_KCQE_OPCODE_VALUE_CLOSE_COMP;
3053 return cnic_cm_close_req(csk);
Michael Chaned99daa52010-06-15 08:57:00 +00003054 } else {
3055 return -EALREADY;
Michael Chana4636962009-06-08 18:14:43 -07003056 }
3057 return 0;
3058}
3059
3060static void cnic_cm_upcall(struct cnic_local *cp, struct cnic_sock *csk,
3061 u8 opcode)
3062{
3063 struct cnic_ulp_ops *ulp_ops;
3064 int ulp_type = csk->ulp_type;
3065
3066 rcu_read_lock();
3067 ulp_ops = rcu_dereference(cp->ulp_ops[ulp_type]);
3068 if (ulp_ops) {
3069 if (opcode == L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE)
3070 ulp_ops->cm_connect_complete(csk);
3071 else if (opcode == L4_KCQE_OPCODE_VALUE_CLOSE_COMP)
3072 ulp_ops->cm_close_complete(csk);
3073 else if (opcode == L4_KCQE_OPCODE_VALUE_RESET_RECEIVED)
3074 ulp_ops->cm_remote_abort(csk);
3075 else if (opcode == L4_KCQE_OPCODE_VALUE_RESET_COMP)
3076 ulp_ops->cm_abort_complete(csk);
3077 else if (opcode == L4_KCQE_OPCODE_VALUE_CLOSE_RECEIVED)
3078 ulp_ops->cm_remote_close(csk);
3079 }
3080 rcu_read_unlock();
3081}
3082
3083static int cnic_cm_set_pg(struct cnic_sock *csk)
3084{
3085 if (cnic_offld_prep(csk)) {
3086 if (test_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags))
3087 cnic_cm_update_pg(csk);
3088 else
3089 cnic_cm_offload_pg(csk);
3090 }
3091 return 0;
3092}
3093
3094static void cnic_cm_process_offld_pg(struct cnic_dev *dev, struct l4_kcq *kcqe)
3095{
3096 struct cnic_local *cp = dev->cnic_priv;
3097 u32 l5_cid = kcqe->pg_host_opaque;
3098 u8 opcode = kcqe->op_code;
3099 struct cnic_sock *csk = &cp->csk_tbl[l5_cid];
3100
3101 csk_hold(csk);
3102 if (!cnic_in_use(csk))
3103 goto done;
3104
3105 if (opcode == L4_KCQE_OPCODE_VALUE_UPDATE_PG) {
3106 clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
3107 goto done;
3108 }
Eddie Waia9736c02010-02-24 14:42:04 +00003109 /* Possible PG kcqe status: SUCCESS, OFFLOADED_PG, or CTX_ALLOC_FAIL */
3110 if (kcqe->status == L4_KCQE_COMPLETION_STATUS_CTX_ALLOC_FAIL) {
3111 clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
3112 cnic_cm_upcall(cp, csk,
3113 L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE);
3114 goto done;
3115 }
3116
Michael Chana4636962009-06-08 18:14:43 -07003117 csk->pg_cid = kcqe->pg_cid;
3118 set_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags);
3119 cnic_cm_conn_req(csk);
3120
3121done:
3122 csk_put(csk);
3123}
3124
3125static void cnic_cm_process_kcqe(struct cnic_dev *dev, struct kcqe *kcqe)
3126{
3127 struct cnic_local *cp = dev->cnic_priv;
3128 struct l4_kcq *l4kcqe = (struct l4_kcq *) kcqe;
3129 u8 opcode = l4kcqe->op_code;
3130 u32 l5_cid;
3131 struct cnic_sock *csk;
3132
3133 if (opcode == L4_KCQE_OPCODE_VALUE_OFFLOAD_PG ||
3134 opcode == L4_KCQE_OPCODE_VALUE_UPDATE_PG) {
3135 cnic_cm_process_offld_pg(dev, l4kcqe);
3136 return;
3137 }
3138
3139 l5_cid = l4kcqe->conn_id;
3140 if (opcode & 0x80)
3141 l5_cid = l4kcqe->cid;
3142 if (l5_cid >= MAX_CM_SK_TBL_SZ)
3143 return;
3144
3145 csk = &cp->csk_tbl[l5_cid];
3146 csk_hold(csk);
3147
3148 if (!cnic_in_use(csk)) {
3149 csk_put(csk);
3150 return;
3151 }
3152
3153 switch (opcode) {
Eddie Waia9736c02010-02-24 14:42:04 +00003154 case L5CM_RAMROD_CMD_ID_TCP_CONNECT:
3155 if (l4kcqe->status != 0) {
3156 clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
3157 cnic_cm_upcall(cp, csk,
3158 L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE);
3159 }
3160 break;
Michael Chana4636962009-06-08 18:14:43 -07003161 case L4_KCQE_OPCODE_VALUE_CONNECT_COMPLETE:
3162 if (l4kcqe->status == 0)
3163 set_bit(SK_F_OFFLD_COMPLETE, &csk->flags);
3164
3165 smp_mb__before_clear_bit();
3166 clear_bit(SK_F_OFFLD_SCHED, &csk->flags);
3167 cnic_cm_upcall(cp, csk, opcode);
3168 break;
3169
3170 case L4_KCQE_OPCODE_VALUE_RESET_RECEIVED:
Michael Chana4636962009-06-08 18:14:43 -07003171 case L4_KCQE_OPCODE_VALUE_CLOSE_COMP:
3172 case L4_KCQE_OPCODE_VALUE_RESET_COMP:
Michael Chan71034ba2009-10-10 13:46:59 +00003173 case L5CM_RAMROD_CMD_ID_SEARCHER_DELETE:
3174 case L5CM_RAMROD_CMD_ID_TERMINATE_OFFLOAD:
Michael Chana4636962009-06-08 18:14:43 -07003175 cp->close_conn(csk, opcode);
3176 break;
3177
3178 case L4_KCQE_OPCODE_VALUE_CLOSE_RECEIVED:
3179 cnic_cm_upcall(cp, csk, opcode);
3180 break;
3181 }
3182 csk_put(csk);
3183}
3184
3185static void cnic_cm_indicate_kcqe(void *data, struct kcqe *kcqe[], u32 num)
3186{
3187 struct cnic_dev *dev = data;
3188 int i;
3189
3190 for (i = 0; i < num; i++)
3191 cnic_cm_process_kcqe(dev, kcqe[i]);
3192}
3193
3194static struct cnic_ulp_ops cm_ulp_ops = {
3195 .indicate_kcqes = cnic_cm_indicate_kcqe,
3196};
3197
3198static void cnic_cm_free_mem(struct cnic_dev *dev)
3199{
3200 struct cnic_local *cp = dev->cnic_priv;
3201
3202 kfree(cp->csk_tbl);
3203 cp->csk_tbl = NULL;
3204 cnic_free_id_tbl(&cp->csk_port_tbl);
3205}
3206
3207static int cnic_cm_alloc_mem(struct cnic_dev *dev)
3208{
3209 struct cnic_local *cp = dev->cnic_priv;
3210
3211 cp->csk_tbl = kzalloc(sizeof(struct cnic_sock) * MAX_CM_SK_TBL_SZ,
3212 GFP_KERNEL);
3213 if (!cp->csk_tbl)
3214 return -ENOMEM;
3215
3216 if (cnic_init_id_tbl(&cp->csk_port_tbl, CNIC_LOCAL_PORT_RANGE,
3217 CNIC_LOCAL_PORT_MIN)) {
3218 cnic_cm_free_mem(dev);
3219 return -ENOMEM;
3220 }
3221 return 0;
3222}
3223
3224static int cnic_ready_to_close(struct cnic_sock *csk, u32 opcode)
3225{
Michael Chan943189f2010-06-15 08:57:02 +00003226 if (test_and_clear_bit(SK_F_OFFLD_COMPLETE, &csk->flags)) {
3227 /* Unsolicited RESET_COMP or RESET_RECEIVED */
3228 opcode = L4_KCQE_OPCODE_VALUE_RESET_RECEIVED;
3229 csk->state = opcode;
Michael Chana1e621b2010-06-15 08:57:01 +00003230 }
Michael Chan943189f2010-06-15 08:57:02 +00003231
3232 /* 1. If event opcode matches the expected event in csk->state
3233 * 2. If the expected event is CLOSE_COMP, we accept any event
Michael Chan7b34a462010-06-15 08:57:03 +00003234 * 3. If the expected event is 0, meaning the connection was never
3235 * never established, we accept the opcode from cm_abort.
Michael Chan943189f2010-06-15 08:57:02 +00003236 */
Michael Chan7b34a462010-06-15 08:57:03 +00003237 if (opcode == csk->state || csk->state == 0 ||
3238 csk->state == L4_KCQE_OPCODE_VALUE_CLOSE_COMP) {
3239 if (!test_and_set_bit(SK_F_CLOSING, &csk->flags)) {
3240 if (csk->state == 0)
3241 csk->state = opcode;
Michael Chana4636962009-06-08 18:14:43 -07003242 return 1;
Michael Chan7b34a462010-06-15 08:57:03 +00003243 }
Michael Chana4636962009-06-08 18:14:43 -07003244 }
3245 return 0;
3246}
3247
3248static void cnic_close_bnx2_conn(struct cnic_sock *csk, u32 opcode)
3249{
3250 struct cnic_dev *dev = csk->dev;
3251 struct cnic_local *cp = dev->cnic_priv;
3252
Michael Chana1e621b2010-06-15 08:57:01 +00003253 if (opcode == L4_KCQE_OPCODE_VALUE_RESET_RECEIVED) {
3254 cnic_cm_upcall(cp, csk, opcode);
3255 return;
3256 }
3257
Michael Chana4636962009-06-08 18:14:43 -07003258 clear_bit(SK_F_CONNECT_START, &csk->flags);
Eddie Wai66883e92010-02-24 14:42:05 +00003259 cnic_close_conn(csk);
Michael Chan7b34a462010-06-15 08:57:03 +00003260 csk->state = opcode;
Eddie Wai66883e92010-02-24 14:42:05 +00003261 cnic_cm_upcall(cp, csk, opcode);
Michael Chana4636962009-06-08 18:14:43 -07003262}
3263
3264static void cnic_cm_stop_bnx2_hw(struct cnic_dev *dev)
3265{
3266}
3267
3268static int cnic_cm_init_bnx2_hw(struct cnic_dev *dev)
3269{
3270 u32 seed;
3271
3272 get_random_bytes(&seed, 4);
3273 cnic_ctx_wr(dev, 45, 0, seed);
3274 return 0;
3275}
3276
Michael Chan71034ba2009-10-10 13:46:59 +00003277static void cnic_close_bnx2x_conn(struct cnic_sock *csk, u32 opcode)
3278{
3279 struct cnic_dev *dev = csk->dev;
3280 struct cnic_local *cp = dev->cnic_priv;
3281 struct cnic_context *ctx = &cp->ctx_tbl[csk->l5_cid];
3282 union l5cm_specific_data l5_data;
3283 u32 cmd = 0;
3284 int close_complete = 0;
3285
3286 switch (opcode) {
3287 case L4_KCQE_OPCODE_VALUE_RESET_RECEIVED:
3288 case L4_KCQE_OPCODE_VALUE_CLOSE_COMP:
3289 case L4_KCQE_OPCODE_VALUE_RESET_COMP:
Michael Chan7b34a462010-06-15 08:57:03 +00003290 if (cnic_ready_to_close(csk, opcode)) {
3291 if (test_bit(SK_F_PG_OFFLD_COMPLETE, &csk->flags))
3292 cmd = L5CM_RAMROD_CMD_ID_SEARCHER_DELETE;
3293 else
3294 close_complete = 1;
3295 }
Michael Chan71034ba2009-10-10 13:46:59 +00003296 break;
3297 case L5CM_RAMROD_CMD_ID_SEARCHER_DELETE:
3298 cmd = L5CM_RAMROD_CMD_ID_TERMINATE_OFFLOAD;
3299 break;
3300 case L5CM_RAMROD_CMD_ID_TERMINATE_OFFLOAD:
3301 close_complete = 1;
3302 break;
3303 }
3304 if (cmd) {
3305 memset(&l5_data, 0, sizeof(l5_data));
3306
3307 cnic_submit_kwqe_16(dev, cmd, csk->cid, ISCSI_CONNECTION_TYPE,
3308 &l5_data);
3309 } else if (close_complete) {
3310 ctx->timestamp = jiffies;
3311 cnic_close_conn(csk);
3312 cnic_cm_upcall(cp, csk, csk->state);
3313 }
3314}
3315
3316static void cnic_cm_stop_bnx2x_hw(struct cnic_dev *dev)
3317{
3318}
3319
3320static int cnic_cm_init_bnx2x_hw(struct cnic_dev *dev)
3321{
3322 struct cnic_local *cp = dev->cnic_priv;
3323 int func = CNIC_FUNC(cp);
3324
3325 cnic_init_bnx2x_mac(dev);
3326 cnic_bnx2x_set_tcp_timestamp(dev, 1);
3327
3328 CNIC_WR16(dev, BAR_XSTRORM_INTMEM +
3329 XSTORM_ISCSI_LOCAL_VLAN_OFFSET(func), 0);
3330
3331 CNIC_WR(dev, BAR_XSTRORM_INTMEM +
3332 XSTORM_TCP_GLOBAL_DEL_ACK_COUNTER_ENABLED_OFFSET(func), 1);
3333 CNIC_WR(dev, BAR_XSTRORM_INTMEM +
3334 XSTORM_TCP_GLOBAL_DEL_ACK_COUNTER_MAX_COUNT_OFFSET(func),
3335 DEF_MAX_DA_COUNT);
3336
3337 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
3338 XSTORM_ISCSI_TCP_VARS_TTL_OFFSET(func), DEF_TTL);
3339 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
3340 XSTORM_ISCSI_TCP_VARS_TOS_OFFSET(func), DEF_TOS);
3341 CNIC_WR8(dev, BAR_XSTRORM_INTMEM +
3342 XSTORM_ISCSI_TCP_VARS_ADV_WND_SCL_OFFSET(func), 2);
3343 CNIC_WR(dev, BAR_XSTRORM_INTMEM +
3344 XSTORM_TCP_TX_SWS_TIMER_VAL_OFFSET(func), DEF_SWS_TIMER);
3345
3346 CNIC_WR(dev, BAR_TSTRORM_INTMEM + TSTORM_TCP_MAX_CWND_OFFSET(func),
3347 DEF_MAX_CWND);
3348 return 0;
3349}
3350
Michael Chana4636962009-06-08 18:14:43 -07003351static int cnic_cm_open(struct cnic_dev *dev)
3352{
3353 struct cnic_local *cp = dev->cnic_priv;
3354 int err;
3355
3356 err = cnic_cm_alloc_mem(dev);
3357 if (err)
3358 return err;
3359
3360 err = cp->start_cm(dev);
3361
3362 if (err)
3363 goto err_out;
3364
3365 dev->cm_create = cnic_cm_create;
3366 dev->cm_destroy = cnic_cm_destroy;
3367 dev->cm_connect = cnic_cm_connect;
3368 dev->cm_abort = cnic_cm_abort;
3369 dev->cm_close = cnic_cm_close;
3370 dev->cm_select_dev = cnic_cm_select_dev;
3371
3372 cp->ulp_handle[CNIC_ULP_L4] = dev;
3373 rcu_assign_pointer(cp->ulp_ops[CNIC_ULP_L4], &cm_ulp_ops);
3374 return 0;
3375
3376err_out:
3377 cnic_cm_free_mem(dev);
3378 return err;
3379}
3380
3381static int cnic_cm_shutdown(struct cnic_dev *dev)
3382{
3383 struct cnic_local *cp = dev->cnic_priv;
3384 int i;
3385
3386 cp->stop_cm(dev);
3387
3388 if (!cp->csk_tbl)
3389 return 0;
3390
3391 for (i = 0; i < MAX_CM_SK_TBL_SZ; i++) {
3392 struct cnic_sock *csk = &cp->csk_tbl[i];
3393
3394 clear_bit(SK_F_INUSE, &csk->flags);
3395 cnic_cm_cleanup(csk);
3396 }
3397 cnic_cm_free_mem(dev);
3398
3399 return 0;
3400}
3401
3402static void cnic_init_context(struct cnic_dev *dev, u32 cid)
3403{
Michael Chana4636962009-06-08 18:14:43 -07003404 u32 cid_addr;
3405 int i;
3406
Michael Chana4636962009-06-08 18:14:43 -07003407 cid_addr = GET_CID_ADDR(cid);
3408
3409 for (i = 0; i < CTX_SIZE; i += 4)
3410 cnic_ctx_wr(dev, cid_addr, i, 0);
3411}
3412
3413static int cnic_setup_5709_context(struct cnic_dev *dev, int valid)
3414{
3415 struct cnic_local *cp = dev->cnic_priv;
3416 int ret = 0, i;
3417 u32 valid_bit = valid ? BNX2_CTX_HOST_PAGE_TBL_DATA0_VALID : 0;
3418
3419 if (CHIP_NUM(cp) != CHIP_NUM_5709)
3420 return 0;
3421
3422 for (i = 0; i < cp->ctx_blks; i++) {
3423 int j;
3424 u32 idx = cp->ctx_arr[i].cid / cp->cids_per_blk;
3425 u32 val;
3426
3427 memset(cp->ctx_arr[i].ctx, 0, BCM_PAGE_SIZE);
3428
3429 CNIC_WR(dev, BNX2_CTX_HOST_PAGE_TBL_DATA0,
3430 (cp->ctx_arr[i].mapping & 0xffffffff) | valid_bit);
3431 CNIC_WR(dev, BNX2_CTX_HOST_PAGE_TBL_DATA1,
3432 (u64) cp->ctx_arr[i].mapping >> 32);
3433 CNIC_WR(dev, BNX2_CTX_HOST_PAGE_TBL_CTRL, idx |
3434 BNX2_CTX_HOST_PAGE_TBL_CTRL_WRITE_REQ);
3435 for (j = 0; j < 10; j++) {
3436
3437 val = CNIC_RD(dev, BNX2_CTX_HOST_PAGE_TBL_CTRL);
3438 if (!(val & BNX2_CTX_HOST_PAGE_TBL_CTRL_WRITE_REQ))
3439 break;
3440 udelay(5);
3441 }
3442 if (val & BNX2_CTX_HOST_PAGE_TBL_CTRL_WRITE_REQ) {
3443 ret = -EBUSY;
3444 break;
3445 }
3446 }
3447 return ret;
3448}
3449
3450static void cnic_free_irq(struct cnic_dev *dev)
3451{
3452 struct cnic_local *cp = dev->cnic_priv;
3453 struct cnic_eth_dev *ethdev = cp->ethdev;
3454
3455 if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
3456 cp->disable_int_sync(dev);
3457 tasklet_disable(&cp->cnic_irq_task);
3458 free_irq(ethdev->irq_arr[0].vector, dev);
3459 }
3460}
3461
3462static int cnic_init_bnx2_irq(struct cnic_dev *dev)
3463{
3464 struct cnic_local *cp = dev->cnic_priv;
3465 struct cnic_eth_dev *ethdev = cp->ethdev;
3466
3467 if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
3468 int err, i = 0;
3469 int sblk_num = cp->status_blk_num;
3470 u32 base = ((sblk_num - 1) * BNX2_HC_SB_CONFIG_SIZE) +
3471 BNX2_HC_SB_CONFIG_1;
3472
3473 CNIC_WR(dev, base, BNX2_HC_SB_CONFIG_1_ONE_SHOT);
3474
3475 CNIC_WR(dev, base + BNX2_HC_COMP_PROD_TRIP_OFF, (2 << 16) | 8);
3476 CNIC_WR(dev, base + BNX2_HC_COM_TICKS_OFF, (64 << 16) | 220);
3477 CNIC_WR(dev, base + BNX2_HC_CMD_TICKS_OFF, (64 << 16) | 220);
3478
Michael Chana4dde3a2010-02-24 14:42:08 +00003479 cp->last_status_idx = cp->status_blk.bnx2->status_idx;
Joe Perches164165d2009-11-19 09:30:10 +00003480 tasklet_init(&cp->cnic_irq_task, cnic_service_bnx2_msix,
Michael Chana4636962009-06-08 18:14:43 -07003481 (unsigned long) dev);
3482 err = request_irq(ethdev->irq_arr[0].vector, cnic_irq, 0,
3483 "cnic", dev);
3484 if (err) {
3485 tasklet_disable(&cp->cnic_irq_task);
3486 return err;
3487 }
Michael Chana4dde3a2010-02-24 14:42:08 +00003488 while (cp->status_blk.bnx2->status_completion_producer_index &&
Michael Chana4636962009-06-08 18:14:43 -07003489 i < 10) {
3490 CNIC_WR(dev, BNX2_HC_COALESCE_NOW,
3491 1 << (11 + sblk_num));
3492 udelay(10);
3493 i++;
3494 barrier();
3495 }
Michael Chana4dde3a2010-02-24 14:42:08 +00003496 if (cp->status_blk.bnx2->status_completion_producer_index) {
Michael Chana4636962009-06-08 18:14:43 -07003497 cnic_free_irq(dev);
3498 goto failed;
3499 }
3500
3501 } else {
Michael Chana4dde3a2010-02-24 14:42:08 +00003502 struct status_block *sblk = cp->status_blk.gen;
Michael Chana4636962009-06-08 18:14:43 -07003503 u32 hc_cmd = CNIC_RD(dev, BNX2_HC_COMMAND);
3504 int i = 0;
3505
3506 while (sblk->status_completion_producer_index && i < 10) {
3507 CNIC_WR(dev, BNX2_HC_COMMAND,
3508 hc_cmd | BNX2_HC_COMMAND_COAL_NOW_WO_INT);
3509 udelay(10);
3510 i++;
3511 barrier();
3512 }
3513 if (sblk->status_completion_producer_index)
3514 goto failed;
3515
3516 }
3517 return 0;
3518
3519failed:
Joe Perchesddf79b22010-02-17 15:01:54 +00003520 netdev_err(dev->netdev, "KCQ index not resetting to 0\n");
Michael Chana4636962009-06-08 18:14:43 -07003521 return -EBUSY;
3522}
3523
3524static void cnic_enable_bnx2_int(struct cnic_dev *dev)
3525{
3526 struct cnic_local *cp = dev->cnic_priv;
3527 struct cnic_eth_dev *ethdev = cp->ethdev;
3528
3529 if (!(ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX))
3530 return;
3531
3532 CNIC_WR(dev, BNX2_PCICFG_INT_ACK_CMD, cp->int_num |
3533 BNX2_PCICFG_INT_ACK_CMD_INDEX_VALID | cp->last_status_idx);
3534}
3535
3536static void cnic_disable_bnx2_int_sync(struct cnic_dev *dev)
3537{
3538 struct cnic_local *cp = dev->cnic_priv;
3539 struct cnic_eth_dev *ethdev = cp->ethdev;
3540
3541 if (!(ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX))
3542 return;
3543
3544 CNIC_WR(dev, BNX2_PCICFG_INT_ACK_CMD, cp->int_num |
3545 BNX2_PCICFG_INT_ACK_CMD_MASK_INT);
3546 CNIC_RD(dev, BNX2_PCICFG_INT_ACK_CMD);
3547 synchronize_irq(ethdev->irq_arr[0].vector);
3548}
3549
3550static void cnic_init_bnx2_tx_ring(struct cnic_dev *dev)
3551{
3552 struct cnic_local *cp = dev->cnic_priv;
3553 struct cnic_eth_dev *ethdev = cp->ethdev;
3554 u32 cid_addr, tx_cid, sb_id;
3555 u32 val, offset0, offset1, offset2, offset3;
3556 int i;
3557 struct tx_bd *txbd;
3558 dma_addr_t buf_map;
Michael Chana4dde3a2010-02-24 14:42:08 +00003559 struct status_block *s_blk = cp->status_blk.gen;
Michael Chana4636962009-06-08 18:14:43 -07003560
3561 sb_id = cp->status_blk_num;
3562 tx_cid = 20;
Michael Chana4636962009-06-08 18:14:43 -07003563 cp->tx_cons_ptr = &s_blk->status_tx_quick_consumer_index2;
3564 if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
Michael Chana4dde3a2010-02-24 14:42:08 +00003565 struct status_block_msix *sblk = cp->status_blk.bnx2;
Michael Chana4636962009-06-08 18:14:43 -07003566
3567 tx_cid = TX_TSS_CID + sb_id - 1;
Michael Chana4636962009-06-08 18:14:43 -07003568 CNIC_WR(dev, BNX2_TSCH_TSS_CFG, (sb_id << 24) |
3569 (TX_TSS_CID << 7));
3570 cp->tx_cons_ptr = &sblk->status_tx_quick_consumer_index;
3571 }
3572 cp->tx_cons = *cp->tx_cons_ptr;
3573
3574 cid_addr = GET_CID_ADDR(tx_cid);
3575 if (CHIP_NUM(cp) == CHIP_NUM_5709) {
3576 u32 cid_addr2 = GET_CID_ADDR(tx_cid + 4) + 0x40;
3577
3578 for (i = 0; i < PHY_CTX_SIZE; i += 4)
3579 cnic_ctx_wr(dev, cid_addr2, i, 0);
3580
3581 offset0 = BNX2_L2CTX_TYPE_XI;
3582 offset1 = BNX2_L2CTX_CMD_TYPE_XI;
3583 offset2 = BNX2_L2CTX_TBDR_BHADDR_HI_XI;
3584 offset3 = BNX2_L2CTX_TBDR_BHADDR_LO_XI;
3585 } else {
Michael Chanb58ffb42010-05-27 16:31:41 -07003586 cnic_init_context(dev, tx_cid);
3587 cnic_init_context(dev, tx_cid + 1);
3588
Michael Chana4636962009-06-08 18:14:43 -07003589 offset0 = BNX2_L2CTX_TYPE;
3590 offset1 = BNX2_L2CTX_CMD_TYPE;
3591 offset2 = BNX2_L2CTX_TBDR_BHADDR_HI;
3592 offset3 = BNX2_L2CTX_TBDR_BHADDR_LO;
3593 }
3594 val = BNX2_L2CTX_TYPE_TYPE_L2 | BNX2_L2CTX_TYPE_SIZE_L2;
3595 cnic_ctx_wr(dev, cid_addr, offset0, val);
3596
3597 val = BNX2_L2CTX_CMD_TYPE_TYPE_L2 | (8 << 16);
3598 cnic_ctx_wr(dev, cid_addr, offset1, val);
3599
3600 txbd = (struct tx_bd *) cp->l2_ring;
3601
3602 buf_map = cp->l2_buf_map;
3603 for (i = 0; i < MAX_TX_DESC_CNT; i++, txbd++) {
3604 txbd->tx_bd_haddr_hi = (u64) buf_map >> 32;
3605 txbd->tx_bd_haddr_lo = (u64) buf_map & 0xffffffff;
3606 }
3607 val = (u64) cp->l2_ring_map >> 32;
3608 cnic_ctx_wr(dev, cid_addr, offset2, val);
3609 txbd->tx_bd_haddr_hi = val;
3610
3611 val = (u64) cp->l2_ring_map & 0xffffffff;
3612 cnic_ctx_wr(dev, cid_addr, offset3, val);
3613 txbd->tx_bd_haddr_lo = val;
3614}
3615
3616static void cnic_init_bnx2_rx_ring(struct cnic_dev *dev)
3617{
3618 struct cnic_local *cp = dev->cnic_priv;
3619 struct cnic_eth_dev *ethdev = cp->ethdev;
3620 u32 cid_addr, sb_id, val, coal_reg, coal_val;
3621 int i;
3622 struct rx_bd *rxbd;
Michael Chana4dde3a2010-02-24 14:42:08 +00003623 struct status_block *s_blk = cp->status_blk.gen;
Michael Chana4636962009-06-08 18:14:43 -07003624
3625 sb_id = cp->status_blk_num;
3626 cnic_init_context(dev, 2);
3627 cp->rx_cons_ptr = &s_blk->status_rx_quick_consumer_index2;
3628 coal_reg = BNX2_HC_COMMAND;
3629 coal_val = CNIC_RD(dev, coal_reg);
3630 if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
Michael Chana4dde3a2010-02-24 14:42:08 +00003631 struct status_block_msix *sblk = cp->status_blk.bnx2;
Michael Chana4636962009-06-08 18:14:43 -07003632
3633 cp->rx_cons_ptr = &sblk->status_rx_quick_consumer_index;
3634 coal_reg = BNX2_HC_COALESCE_NOW;
3635 coal_val = 1 << (11 + sb_id);
3636 }
3637 i = 0;
3638 while (!(*cp->rx_cons_ptr != 0) && i < 10) {
3639 CNIC_WR(dev, coal_reg, coal_val);
3640 udelay(10);
3641 i++;
3642 barrier();
3643 }
3644 cp->rx_cons = *cp->rx_cons_ptr;
3645
3646 cid_addr = GET_CID_ADDR(2);
3647 val = BNX2_L2CTX_CTX_TYPE_CTX_BD_CHN_TYPE_VALUE |
3648 BNX2_L2CTX_CTX_TYPE_SIZE_L2 | (0x02 << 8);
3649 cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_CTX_TYPE, val);
3650
3651 if (sb_id == 0)
Michael Chand0549382009-10-28 03:41:59 -07003652 val = 2 << BNX2_L2CTX_L2_STATUSB_NUM_SHIFT;
Michael Chana4636962009-06-08 18:14:43 -07003653 else
Michael Chand0549382009-10-28 03:41:59 -07003654 val = BNX2_L2CTX_L2_STATUSB_NUM(sb_id);
Michael Chana4636962009-06-08 18:14:43 -07003655 cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_HOST_BDIDX, val);
3656
3657 rxbd = (struct rx_bd *) (cp->l2_ring + BCM_PAGE_SIZE);
3658 for (i = 0; i < MAX_RX_DESC_CNT; i++, rxbd++) {
3659 dma_addr_t buf_map;
3660 int n = (i % cp->l2_rx_ring_size) + 1;
3661
3662 buf_map = cp->l2_buf_map + (n * cp->l2_single_buf_size);
3663 rxbd->rx_bd_len = cp->l2_single_buf_size;
3664 rxbd->rx_bd_flags = RX_BD_FLAGS_START | RX_BD_FLAGS_END;
3665 rxbd->rx_bd_haddr_hi = (u64) buf_map >> 32;
3666 rxbd->rx_bd_haddr_lo = (u64) buf_map & 0xffffffff;
3667 }
3668 val = (u64) (cp->l2_ring_map + BCM_PAGE_SIZE) >> 32;
3669 cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_NX_BDHADDR_HI, val);
3670 rxbd->rx_bd_haddr_hi = val;
3671
3672 val = (u64) (cp->l2_ring_map + BCM_PAGE_SIZE) & 0xffffffff;
3673 cnic_ctx_wr(dev, cid_addr, BNX2_L2CTX_NX_BDHADDR_LO, val);
3674 rxbd->rx_bd_haddr_lo = val;
3675
3676 val = cnic_reg_rd_ind(dev, BNX2_RXP_SCRATCH_RXP_FLOOD);
3677 cnic_reg_wr_ind(dev, BNX2_RXP_SCRATCH_RXP_FLOOD, val | (1 << 2));
3678}
3679
3680static void cnic_shutdown_bnx2_rx_ring(struct cnic_dev *dev)
3681{
3682 struct kwqe *wqes[1], l2kwqe;
3683
3684 memset(&l2kwqe, 0, sizeof(l2kwqe));
3685 wqes[0] = &l2kwqe;
3686 l2kwqe.kwqe_op_flag = (L2_LAYER_CODE << KWQE_FLAGS_LAYER_SHIFT) |
3687 (L2_KWQE_OPCODE_VALUE_FLUSH <<
3688 KWQE_OPCODE_SHIFT) | 2;
3689 dev->submit_kwqes(dev, wqes, 1);
3690}
3691
3692static void cnic_set_bnx2_mac(struct cnic_dev *dev)
3693{
3694 struct cnic_local *cp = dev->cnic_priv;
3695 u32 val;
3696
3697 val = cp->func << 2;
3698
3699 cp->shmem_base = cnic_reg_rd_ind(dev, BNX2_SHM_HDR_ADDR_0 + val);
3700
3701 val = cnic_reg_rd_ind(dev, cp->shmem_base +
3702 BNX2_PORT_HW_CFG_ISCSI_MAC_UPPER);
3703 dev->mac_addr[0] = (u8) (val >> 8);
3704 dev->mac_addr[1] = (u8) val;
3705
3706 CNIC_WR(dev, BNX2_EMAC_MAC_MATCH4, val);
3707
3708 val = cnic_reg_rd_ind(dev, cp->shmem_base +
3709 BNX2_PORT_HW_CFG_ISCSI_MAC_LOWER);
3710 dev->mac_addr[2] = (u8) (val >> 24);
3711 dev->mac_addr[3] = (u8) (val >> 16);
3712 dev->mac_addr[4] = (u8) (val >> 8);
3713 dev->mac_addr[5] = (u8) val;
3714
3715 CNIC_WR(dev, BNX2_EMAC_MAC_MATCH5, val);
3716
3717 val = 4 | BNX2_RPM_SORT_USER2_BC_EN;
3718 if (CHIP_NUM(cp) != CHIP_NUM_5709)
3719 val |= BNX2_RPM_SORT_USER2_PROM_VLAN;
3720
3721 CNIC_WR(dev, BNX2_RPM_SORT_USER2, 0x0);
3722 CNIC_WR(dev, BNX2_RPM_SORT_USER2, val);
3723 CNIC_WR(dev, BNX2_RPM_SORT_USER2, val | BNX2_RPM_SORT_USER2_ENA);
3724}
3725
3726static int cnic_start_bnx2_hw(struct cnic_dev *dev)
3727{
3728 struct cnic_local *cp = dev->cnic_priv;
3729 struct cnic_eth_dev *ethdev = cp->ethdev;
Michael Chana4dde3a2010-02-24 14:42:08 +00003730 struct status_block *sblk = cp->status_blk.gen;
Michael Chane6c28892010-06-24 14:58:39 +00003731 u32 val, kcq_cid_addr, kwq_cid_addr;
Michael Chana4636962009-06-08 18:14:43 -07003732 int err;
3733
3734 cnic_set_bnx2_mac(dev);
3735
3736 val = CNIC_RD(dev, BNX2_MQ_CONFIG);
3737 val &= ~BNX2_MQ_CONFIG_KNL_BYP_BLK_SIZE;
3738 if (BCM_PAGE_BITS > 12)
3739 val |= (12 - 8) << 4;
3740 else
3741 val |= (BCM_PAGE_BITS - 8) << 4;
3742
3743 CNIC_WR(dev, BNX2_MQ_CONFIG, val);
3744
3745 CNIC_WR(dev, BNX2_HC_COMP_PROD_TRIP, (2 << 16) | 8);
3746 CNIC_WR(dev, BNX2_HC_COM_TICKS, (64 << 16) | 220);
3747 CNIC_WR(dev, BNX2_HC_CMD_TICKS, (64 << 16) | 220);
3748
3749 err = cnic_setup_5709_context(dev, 1);
3750 if (err)
3751 return err;
3752
3753 cnic_init_context(dev, KWQ_CID);
3754 cnic_init_context(dev, KCQ_CID);
3755
Michael Chane6c28892010-06-24 14:58:39 +00003756 kwq_cid_addr = GET_CID_ADDR(KWQ_CID);
Michael Chana4636962009-06-08 18:14:43 -07003757 cp->kwq_io_addr = MB_GET_CID_ADDR(KWQ_CID) + L5_KRNLQ_HOST_QIDX;
3758
3759 cp->max_kwq_idx = MAX_KWQ_IDX;
3760 cp->kwq_prod_idx = 0;
3761 cp->kwq_con_idx = 0;
Michael Chan1f1332a2010-05-18 11:32:52 +00003762 set_bit(CNIC_LCL_FL_KWQ_INIT, &cp->cnic_local_flags);
Michael Chana4636962009-06-08 18:14:43 -07003763
3764 if (CHIP_NUM(cp) == CHIP_NUM_5706 || CHIP_NUM(cp) == CHIP_NUM_5708)
3765 cp->kwq_con_idx_ptr = &sblk->status_rx_quick_consumer_index15;
3766 else
3767 cp->kwq_con_idx_ptr = &sblk->status_cmd_consumer_index;
3768
3769 /* Initialize the kernel work queue context. */
3770 val = KRNLQ_TYPE_TYPE_KRNLQ | KRNLQ_SIZE_TYPE_SIZE |
3771 (BCM_PAGE_BITS - 8) | KRNLQ_FLAGS_QE_SELF_SEQ;
Michael Chane6c28892010-06-24 14:58:39 +00003772 cnic_ctx_wr(dev, kwq_cid_addr, L5_KRNLQ_TYPE, val);
Michael Chana4636962009-06-08 18:14:43 -07003773
3774 val = (BCM_PAGE_SIZE / sizeof(struct kwqe) - 1) << 16;
Michael Chane6c28892010-06-24 14:58:39 +00003775 cnic_ctx_wr(dev, kwq_cid_addr, L5_KRNLQ_QE_SELF_SEQ_MAX, val);
Michael Chana4636962009-06-08 18:14:43 -07003776
3777 val = ((BCM_PAGE_SIZE / sizeof(struct kwqe)) << 16) | KWQ_PAGE_CNT;
Michael Chane6c28892010-06-24 14:58:39 +00003778 cnic_ctx_wr(dev, kwq_cid_addr, L5_KRNLQ_PGTBL_NPAGES, val);
Michael Chana4636962009-06-08 18:14:43 -07003779
3780 val = (u32) ((u64) cp->kwq_info.pgtbl_map >> 32);
Michael Chane6c28892010-06-24 14:58:39 +00003781 cnic_ctx_wr(dev, kwq_cid_addr, L5_KRNLQ_PGTBL_HADDR_HI, val);
Michael Chana4636962009-06-08 18:14:43 -07003782
3783 val = (u32) cp->kwq_info.pgtbl_map;
Michael Chane6c28892010-06-24 14:58:39 +00003784 cnic_ctx_wr(dev, kwq_cid_addr, L5_KRNLQ_PGTBL_HADDR_LO, val);
Michael Chana4636962009-06-08 18:14:43 -07003785
Michael Chane6c28892010-06-24 14:58:39 +00003786 kcq_cid_addr = GET_CID_ADDR(KCQ_CID);
3787 cp->kcq1.io_addr = MB_GET_CID_ADDR(KCQ_CID) + L5_KRNLQ_HOST_QIDX;
Michael Chana4636962009-06-08 18:14:43 -07003788
Michael Chane6c28892010-06-24 14:58:39 +00003789 cp->kcq1.sw_prod_idx = 0;
3790 cp->kcq1.hw_prod_idx_ptr =
3791 (u16 *) &sblk->status_completion_producer_index;
3792
3793 cp->kcq1.status_idx_ptr = (u16 *) &sblk->status_idx;
Michael Chana4636962009-06-08 18:14:43 -07003794
3795 /* Initialize the kernel complete queue context. */
3796 val = KRNLQ_TYPE_TYPE_KRNLQ | KRNLQ_SIZE_TYPE_SIZE |
3797 (BCM_PAGE_BITS - 8) | KRNLQ_FLAGS_QE_SELF_SEQ;
Michael Chane6c28892010-06-24 14:58:39 +00003798 cnic_ctx_wr(dev, kcq_cid_addr, L5_KRNLQ_TYPE, val);
Michael Chana4636962009-06-08 18:14:43 -07003799
3800 val = (BCM_PAGE_SIZE / sizeof(struct kcqe) - 1) << 16;
Michael Chane6c28892010-06-24 14:58:39 +00003801 cnic_ctx_wr(dev, kcq_cid_addr, L5_KRNLQ_QE_SELF_SEQ_MAX, val);
Michael Chana4636962009-06-08 18:14:43 -07003802
3803 val = ((BCM_PAGE_SIZE / sizeof(struct kcqe)) << 16) | KCQ_PAGE_CNT;
Michael Chane6c28892010-06-24 14:58:39 +00003804 cnic_ctx_wr(dev, kcq_cid_addr, L5_KRNLQ_PGTBL_NPAGES, val);
Michael Chana4636962009-06-08 18:14:43 -07003805
Michael Chane6c28892010-06-24 14:58:39 +00003806 val = (u32) ((u64) cp->kcq1.dma.pgtbl_map >> 32);
3807 cnic_ctx_wr(dev, kcq_cid_addr, L5_KRNLQ_PGTBL_HADDR_HI, val);
Michael Chana4636962009-06-08 18:14:43 -07003808
Michael Chane6c28892010-06-24 14:58:39 +00003809 val = (u32) cp->kcq1.dma.pgtbl_map;
3810 cnic_ctx_wr(dev, kcq_cid_addr, L5_KRNLQ_PGTBL_HADDR_LO, val);
Michael Chana4636962009-06-08 18:14:43 -07003811
3812 cp->int_num = 0;
3813 if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
Michael Chane6c28892010-06-24 14:58:39 +00003814 struct status_block_msix *msblk = cp->status_blk.bnx2;
Michael Chana4636962009-06-08 18:14:43 -07003815 u32 sb_id = cp->status_blk_num;
Michael Chand0549382009-10-28 03:41:59 -07003816 u32 sb = BNX2_L2CTX_L5_STATUSB_NUM(sb_id);
Michael Chana4636962009-06-08 18:14:43 -07003817
Michael Chane6c28892010-06-24 14:58:39 +00003818 cp->kcq1.hw_prod_idx_ptr =
3819 (u16 *) &msblk->status_completion_producer_index;
3820 cp->kcq1.status_idx_ptr = (u16 *) &msblk->status_idx;
Michael Chana4636962009-06-08 18:14:43 -07003821 cp->int_num = sb_id << BNX2_PCICFG_INT_ACK_CMD_INT_NUM_SHIFT;
Michael Chane6c28892010-06-24 14:58:39 +00003822 cnic_ctx_wr(dev, kwq_cid_addr, L5_KRNLQ_HOST_QIDX, sb);
3823 cnic_ctx_wr(dev, kcq_cid_addr, L5_KRNLQ_HOST_QIDX, sb);
Michael Chana4636962009-06-08 18:14:43 -07003824 }
3825
3826 /* Enable Commnad Scheduler notification when we write to the
3827 * host producer index of the kernel contexts. */
3828 CNIC_WR(dev, BNX2_MQ_KNL_CMD_MASK1, 2);
3829
3830 /* Enable Command Scheduler notification when we write to either
3831 * the Send Queue or Receive Queue producer indexes of the kernel
3832 * bypass contexts. */
3833 CNIC_WR(dev, BNX2_MQ_KNL_BYP_CMD_MASK1, 7);
3834 CNIC_WR(dev, BNX2_MQ_KNL_BYP_WRITE_MASK1, 7);
3835
3836 /* Notify COM when the driver post an application buffer. */
3837 CNIC_WR(dev, BNX2_MQ_KNL_RX_V2P_MASK2, 0x2000);
3838
3839 /* Set the CP and COM doorbells. These two processors polls the
3840 * doorbell for a non zero value before running. This must be done
3841 * after setting up the kernel queue contexts. */
3842 cnic_reg_wr_ind(dev, BNX2_CP_SCRATCH + 0x20, 1);
3843 cnic_reg_wr_ind(dev, BNX2_COM_SCRATCH + 0x20, 1);
3844
3845 cnic_init_bnx2_tx_ring(dev);
3846 cnic_init_bnx2_rx_ring(dev);
3847
3848 err = cnic_init_bnx2_irq(dev);
3849 if (err) {
Joe Perchesddf79b22010-02-17 15:01:54 +00003850 netdev_err(dev->netdev, "cnic_init_irq failed\n");
Michael Chana4636962009-06-08 18:14:43 -07003851 cnic_reg_wr_ind(dev, BNX2_CP_SCRATCH + 0x20, 0);
3852 cnic_reg_wr_ind(dev, BNX2_COM_SCRATCH + 0x20, 0);
3853 return err;
3854 }
3855
3856 return 0;
3857}
3858
Michael Chan71034ba2009-10-10 13:46:59 +00003859static void cnic_setup_bnx2x_context(struct cnic_dev *dev)
3860{
3861 struct cnic_local *cp = dev->cnic_priv;
3862 struct cnic_eth_dev *ethdev = cp->ethdev;
3863 u32 start_offset = ethdev->ctx_tbl_offset;
3864 int i;
3865
3866 for (i = 0; i < cp->ctx_blks; i++) {
3867 struct cnic_ctx *ctx = &cp->ctx_arr[i];
3868 dma_addr_t map = ctx->mapping;
3869
3870 if (cp->ctx_align) {
3871 unsigned long mask = cp->ctx_align - 1;
3872
3873 map = (map + mask) & ~mask;
3874 }
3875
3876 cnic_ctx_tbl_wr(dev, start_offset + i, map);
3877 }
3878}
3879
3880static int cnic_init_bnx2x_irq(struct cnic_dev *dev)
3881{
3882 struct cnic_local *cp = dev->cnic_priv;
3883 struct cnic_eth_dev *ethdev = cp->ethdev;
3884 int err = 0;
3885
Joe Perches164165d2009-11-19 09:30:10 +00003886 tasklet_init(&cp->cnic_irq_task, cnic_service_bnx2x_bh,
Michael Chan71034ba2009-10-10 13:46:59 +00003887 (unsigned long) dev);
3888 if (ethdev->drv_state & CNIC_DRV_STATE_USING_MSIX) {
3889 err = request_irq(ethdev->irq_arr[0].vector, cnic_irq, 0,
3890 "cnic", dev);
3891 if (err)
3892 tasklet_disable(&cp->cnic_irq_task);
3893 }
3894 return err;
3895}
3896
3897static void cnic_enable_bnx2x_int(struct cnic_dev *dev)
3898{
3899 struct cnic_local *cp = dev->cnic_priv;
3900 u8 sb_id = cp->status_blk_num;
3901 int port = CNIC_PORT(cp);
3902
3903 CNIC_WR8(dev, BAR_CSTRORM_INTMEM +
3904 CSTORM_SB_HC_TIMEOUT_C_OFFSET(port, sb_id,
3905 HC_INDEX_C_ISCSI_EQ_CONS),
3906 64 / 12);
3907 CNIC_WR16(dev, BAR_CSTRORM_INTMEM +
3908 CSTORM_SB_HC_DISABLE_C_OFFSET(port, sb_id,
3909 HC_INDEX_C_ISCSI_EQ_CONS), 0);
3910}
3911
3912static void cnic_disable_bnx2x_int_sync(struct cnic_dev *dev)
3913{
3914}
3915
3916static void cnic_init_bnx2x_tx_ring(struct cnic_dev *dev)
3917{
3918 struct cnic_local *cp = dev->cnic_priv;
3919 union eth_tx_bd_types *txbd = (union eth_tx_bd_types *) cp->l2_ring;
3920 struct eth_context *context;
3921 struct regpair context_addr;
3922 dma_addr_t buf_map;
3923 int func = CNIC_FUNC(cp);
3924 int port = CNIC_PORT(cp);
3925 int i;
3926 int cli = BNX2X_ISCSI_CL_ID(CNIC_E1HVN(cp));
3927 u32 val;
3928
3929 memset(txbd, 0, BCM_PAGE_SIZE);
3930
3931 buf_map = cp->l2_buf_map;
3932 for (i = 0; i < MAX_TX_DESC_CNT; i += 3, txbd += 3) {
3933 struct eth_tx_start_bd *start_bd = &txbd->start_bd;
3934 struct eth_tx_bd *reg_bd = &((txbd + 2)->reg_bd);
3935
3936 start_bd->addr_hi = cpu_to_le32((u64) buf_map >> 32);
3937 start_bd->addr_lo = cpu_to_le32(buf_map & 0xffffffff);
3938 reg_bd->addr_hi = start_bd->addr_hi;
3939 reg_bd->addr_lo = start_bd->addr_lo + 0x10;
3940 start_bd->nbytes = cpu_to_le16(0x10);
3941 start_bd->nbd = cpu_to_le16(3);
3942 start_bd->bd_flags.as_bitfield = ETH_TX_BD_FLAGS_START_BD;
3943 start_bd->general_data = (UNICAST_ADDRESS <<
3944 ETH_TX_START_BD_ETH_ADDR_TYPE_SHIFT);
3945 start_bd->general_data |= (1 << ETH_TX_START_BD_HDR_NBDS_SHIFT);
3946
3947 }
3948 context = cnic_get_bnx2x_ctx(dev, BNX2X_ISCSI_L2_CID, 1, &context_addr);
3949
3950 val = (u64) cp->l2_ring_map >> 32;
3951 txbd->next_bd.addr_hi = cpu_to_le32(val);
3952
3953 context->xstorm_st_context.tx_bd_page_base_hi = val;
3954
3955 val = (u64) cp->l2_ring_map & 0xffffffff;
3956 txbd->next_bd.addr_lo = cpu_to_le32(val);
3957
3958 context->xstorm_st_context.tx_bd_page_base_lo = val;
3959
3960 context->cstorm_st_context.sb_index_number =
3961 HC_INDEX_DEF_C_ETH_ISCSI_CQ_CONS;
3962 context->cstorm_st_context.status_block_id = BNX2X_DEF_SB_ID;
3963
Dmitry Kravkov6b2a5412010-06-23 11:57:09 -07003964 if (cli < MAX_X_STAT_COUNTER_ID)
3965 context->xstorm_st_context.statistics_data = cli |
3966 XSTORM_ETH_ST_CONTEXT_STATISTICS_ENABLE;
Michael Chan71034ba2009-10-10 13:46:59 +00003967
3968 context->xstorm_ag_context.cdu_reserved =
3969 CDU_RSRVD_VALUE_TYPE_A(BNX2X_HW_CID(BNX2X_ISCSI_L2_CID, func),
3970 CDU_REGION_NUMBER_XCM_AG,
3971 ETH_CONNECTION_TYPE);
3972
3973 /* reset xstorm per client statistics */
Dmitry Kravkov6b2a5412010-06-23 11:57:09 -07003974 if (cli < MAX_X_STAT_COUNTER_ID) {
3975 val = BAR_XSTRORM_INTMEM +
3976 XSTORM_PER_COUNTER_ID_STATS_OFFSET(port, cli);
3977 for (i = 0; i < sizeof(struct xstorm_per_client_stats) / 4; i++)
3978 CNIC_WR(dev, val + i * 4, 0);
3979 }
Michael Chan71034ba2009-10-10 13:46:59 +00003980
3981 cp->tx_cons_ptr =
3982 &cp->bnx2x_def_status_blk->c_def_status_block.index_values[
3983 HC_INDEX_DEF_C_ETH_ISCSI_CQ_CONS];
3984}
3985
3986static void cnic_init_bnx2x_rx_ring(struct cnic_dev *dev)
3987{
3988 struct cnic_local *cp = dev->cnic_priv;
3989 struct eth_rx_bd *rxbd = (struct eth_rx_bd *) (cp->l2_ring +
3990 BCM_PAGE_SIZE);
3991 struct eth_rx_cqe_next_page *rxcqe = (struct eth_rx_cqe_next_page *)
3992 (cp->l2_ring + (2 * BCM_PAGE_SIZE));
3993 struct eth_context *context;
3994 struct regpair context_addr;
3995 int i;
3996 int port = CNIC_PORT(cp);
3997 int func = CNIC_FUNC(cp);
3998 int cli = BNX2X_ISCSI_CL_ID(CNIC_E1HVN(cp));
3999 u32 val;
4000 struct tstorm_eth_client_config tstorm_client = {0};
4001
4002 for (i = 0; i < BNX2X_MAX_RX_DESC_CNT; i++, rxbd++) {
4003 dma_addr_t buf_map;
4004 int n = (i % cp->l2_rx_ring_size) + 1;
4005
4006 buf_map = cp->l2_buf_map + (n * cp->l2_single_buf_size);
4007 rxbd->addr_hi = cpu_to_le32((u64) buf_map >> 32);
4008 rxbd->addr_lo = cpu_to_le32(buf_map & 0xffffffff);
4009 }
4010 context = cnic_get_bnx2x_ctx(dev, BNX2X_ISCSI_L2_CID, 0, &context_addr);
4011
4012 val = (u64) (cp->l2_ring_map + BCM_PAGE_SIZE) >> 32;
4013 rxbd->addr_hi = cpu_to_le32(val);
4014
4015 context->ustorm_st_context.common.bd_page_base_hi = val;
4016
4017 val = (u64) (cp->l2_ring_map + BCM_PAGE_SIZE) & 0xffffffff;
4018 rxbd->addr_lo = cpu_to_le32(val);
4019
4020 context->ustorm_st_context.common.bd_page_base_lo = val;
4021
4022 context->ustorm_st_context.common.sb_index_numbers =
4023 BNX2X_ISCSI_RX_SB_INDEX_NUM;
4024 context->ustorm_st_context.common.clientId = cli;
4025 context->ustorm_st_context.common.status_block_id = BNX2X_DEF_SB_ID;
Dmitry Kravkov6b2a5412010-06-23 11:57:09 -07004026 if (cli < MAX_U_STAT_COUNTER_ID) {
4027 context->ustorm_st_context.common.flags =
4028 USTORM_ETH_ST_CONTEXT_CONFIG_ENABLE_STATISTICS;
4029 context->ustorm_st_context.common.statistics_counter_id = cli;
4030 }
Michael Chan71034ba2009-10-10 13:46:59 +00004031 context->ustorm_st_context.common.mc_alignment_log_size = 0;
4032 context->ustorm_st_context.common.bd_buff_size =
4033 cp->l2_single_buf_size;
4034
4035 context->ustorm_ag_context.cdu_usage =
4036 CDU_RSRVD_VALUE_TYPE_A(BNX2X_HW_CID(BNX2X_ISCSI_L2_CID, func),
4037 CDU_REGION_NUMBER_UCM_AG,
4038 ETH_CONNECTION_TYPE);
4039
4040 rxcqe += BNX2X_MAX_RCQ_DESC_CNT;
4041 val = (u64) (cp->l2_ring_map + (2 * BCM_PAGE_SIZE)) >> 32;
4042 rxcqe->addr_hi = cpu_to_le32(val);
4043
4044 CNIC_WR(dev, BAR_USTRORM_INTMEM +
4045 USTORM_CQE_PAGE_BASE_OFFSET(port, cli) + 4, val);
4046
4047 CNIC_WR(dev, BAR_USTRORM_INTMEM +
4048 USTORM_CQE_PAGE_NEXT_OFFSET(port, cli) + 4, val);
4049
4050 val = (u64) (cp->l2_ring_map + (2 * BCM_PAGE_SIZE)) & 0xffffffff;
4051 rxcqe->addr_lo = cpu_to_le32(val);
4052
4053 CNIC_WR(dev, BAR_USTRORM_INTMEM +
4054 USTORM_CQE_PAGE_BASE_OFFSET(port, cli), val);
4055
4056 CNIC_WR(dev, BAR_USTRORM_INTMEM +
4057 USTORM_CQE_PAGE_NEXT_OFFSET(port, cli), val);
4058
4059 /* client tstorm info */
4060 tstorm_client.mtu = cp->l2_single_buf_size - 14;
Dmitry Kravkov6b2a5412010-06-23 11:57:09 -07004061 tstorm_client.config_flags = TSTORM_ETH_CLIENT_CONFIG_E1HOV_REM_ENABLE;
4062
4063 if (cli < MAX_T_STAT_COUNTER_ID) {
4064 tstorm_client.config_flags |=
4065 TSTORM_ETH_CLIENT_CONFIG_STATSITICS_ENABLE;
4066 tstorm_client.statistics_counter_id = cli;
4067 }
Michael Chan71034ba2009-10-10 13:46:59 +00004068
4069 CNIC_WR(dev, BAR_TSTRORM_INTMEM +
4070 TSTORM_CLIENT_CONFIG_OFFSET(port, cli),
4071 ((u32 *)&tstorm_client)[0]);
4072 CNIC_WR(dev, BAR_TSTRORM_INTMEM +
4073 TSTORM_CLIENT_CONFIG_OFFSET(port, cli) + 4,
4074 ((u32 *)&tstorm_client)[1]);
4075
4076 /* reset tstorm per client statistics */
Dmitry Kravkov6b2a5412010-06-23 11:57:09 -07004077 if (cli < MAX_T_STAT_COUNTER_ID) {
4078
4079 val = BAR_TSTRORM_INTMEM +
4080 TSTORM_PER_COUNTER_ID_STATS_OFFSET(port, cli);
4081 for (i = 0; i < sizeof(struct tstorm_per_client_stats) / 4; i++)
4082 CNIC_WR(dev, val + i * 4, 0);
4083 }
Michael Chan71034ba2009-10-10 13:46:59 +00004084
4085 /* reset ustorm per client statistics */
Dmitry Kravkov6b2a5412010-06-23 11:57:09 -07004086 if (cli < MAX_U_STAT_COUNTER_ID) {
4087 val = BAR_USTRORM_INTMEM +
4088 USTORM_PER_COUNTER_ID_STATS_OFFSET(port, cli);
4089 for (i = 0; i < sizeof(struct ustorm_per_client_stats) / 4; i++)
4090 CNIC_WR(dev, val + i * 4, 0);
4091 }
Michael Chan71034ba2009-10-10 13:46:59 +00004092
4093 cp->rx_cons_ptr =
4094 &cp->bnx2x_def_status_blk->u_def_status_block.index_values[
4095 HC_INDEX_DEF_U_ETH_ISCSI_RX_CQ_CONS];
4096}
4097
4098static void cnic_get_bnx2x_iscsi_info(struct cnic_dev *dev)
4099{
4100 struct cnic_local *cp = dev->cnic_priv;
4101 u32 base, addr, val;
4102 int port = CNIC_PORT(cp);
4103
4104 dev->max_iscsi_conn = 0;
4105 base = CNIC_RD(dev, MISC_REG_SHARED_MEM_ADDR);
4106 if (base < 0xa0000 || base >= 0xc0000)
4107 return;
4108
Michael Chandd2e4db2009-12-02 15:15:37 +00004109 addr = BNX2X_SHMEM_ADDR(base,
Michael Chan71034ba2009-10-10 13:46:59 +00004110 dev_info.port_hw_config[port].iscsi_mac_upper);
4111
Michael Chandd2e4db2009-12-02 15:15:37 +00004112 val = CNIC_RD(dev, addr);
4113
Michael Chan71034ba2009-10-10 13:46:59 +00004114 dev->mac_addr[0] = (u8) (val >> 8);
4115 dev->mac_addr[1] = (u8) val;
4116
Michael Chandd2e4db2009-12-02 15:15:37 +00004117 addr = BNX2X_SHMEM_ADDR(base,
Michael Chan71034ba2009-10-10 13:46:59 +00004118 dev_info.port_hw_config[port].iscsi_mac_lower);
4119
Michael Chandd2e4db2009-12-02 15:15:37 +00004120 val = CNIC_RD(dev, addr);
4121
Michael Chan71034ba2009-10-10 13:46:59 +00004122 dev->mac_addr[2] = (u8) (val >> 24);
4123 dev->mac_addr[3] = (u8) (val >> 16);
4124 dev->mac_addr[4] = (u8) (val >> 8);
4125 dev->mac_addr[5] = (u8) val;
4126
4127 addr = BNX2X_SHMEM_ADDR(base, validity_map[port]);
4128 val = CNIC_RD(dev, addr);
4129
4130 if (!(val & SHR_MEM_VALIDITY_LIC_NO_KEY_IN_EFFECT)) {
4131 u16 val16;
4132
4133 addr = BNX2X_SHMEM_ADDR(base,
4134 drv_lic_key[port].max_iscsi_init_conn);
4135 val16 = CNIC_RD16(dev, addr);
4136
4137 if (val16)
4138 val16 ^= 0x1e1e;
4139 dev->max_iscsi_conn = val16;
4140 }
4141 if (BNX2X_CHIP_IS_E1H(cp->chip_id)) {
4142 int func = CNIC_FUNC(cp);
4143
4144 addr = BNX2X_SHMEM_ADDR(base,
4145 mf_cfg.func_mf_config[func].e1hov_tag);
4146 val = CNIC_RD(dev, addr);
4147 val &= FUNC_MF_CFG_E1HOV_TAG_MASK;
4148 if (val != FUNC_MF_CFG_E1HOV_TAG_DEFAULT) {
4149 addr = BNX2X_SHMEM_ADDR(base,
4150 mf_cfg.func_mf_config[func].config);
4151 val = CNIC_RD(dev, addr);
4152 val &= FUNC_MF_CFG_PROTOCOL_MASK;
4153 if (val != FUNC_MF_CFG_PROTOCOL_ISCSI)
4154 dev->max_iscsi_conn = 0;
4155 }
4156 }
4157}
4158
4159static int cnic_start_bnx2x_hw(struct cnic_dev *dev)
4160{
4161 struct cnic_local *cp = dev->cnic_priv;
4162 int func = CNIC_FUNC(cp), ret, i;
4163 int port = CNIC_PORT(cp);
4164 u16 eq_idx;
4165 u8 sb_id = cp->status_blk_num;
4166
4167 ret = cnic_init_id_tbl(&cp->cid_tbl, MAX_ISCSI_TBL_SZ,
Michael Chan520efdf2010-06-24 14:58:37 +00004168 cp->iscsi_start_cid);
Michael Chan71034ba2009-10-10 13:46:59 +00004169
4170 if (ret)
4171 return -ENOMEM;
4172
Michael Chane6c28892010-06-24 14:58:39 +00004173 cp->kcq1.io_addr = BAR_CSTRORM_INTMEM +
Michael Chan71034ba2009-10-10 13:46:59 +00004174 CSTORM_ISCSI_EQ_PROD_OFFSET(func, 0);
Michael Chane6c28892010-06-24 14:58:39 +00004175 cp->kcq1.sw_prod_idx = 0;
4176
4177 cp->kcq1.hw_prod_idx_ptr =
4178 &cp->status_blk.bnx2x->c_status_block.index_values[
4179 HC_INDEX_C_ISCSI_EQ_CONS];
4180 cp->kcq1.status_idx_ptr =
4181 &cp->status_blk.bnx2x->c_status_block.status_block_index;
Michael Chan71034ba2009-10-10 13:46:59 +00004182
4183 cnic_get_bnx2x_iscsi_info(dev);
4184
4185 /* Only 1 EQ */
Michael Chane6c28892010-06-24 14:58:39 +00004186 CNIC_WR16(dev, cp->kcq1.io_addr, MAX_KCQ_IDX);
Michael Chan71034ba2009-10-10 13:46:59 +00004187 CNIC_WR(dev, BAR_CSTRORM_INTMEM +
4188 CSTORM_ISCSI_EQ_CONS_OFFSET(func, 0), 0);
4189 CNIC_WR(dev, BAR_CSTRORM_INTMEM +
4190 CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_OFFSET(func, 0),
Michael Chane6c28892010-06-24 14:58:39 +00004191 cp->kcq1.dma.pg_map_arr[1] & 0xffffffff);
Michael Chan71034ba2009-10-10 13:46:59 +00004192 CNIC_WR(dev, BAR_CSTRORM_INTMEM +
4193 CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_OFFSET(func, 0) + 4,
Michael Chane6c28892010-06-24 14:58:39 +00004194 (u64) cp->kcq1.dma.pg_map_arr[1] >> 32);
Michael Chan71034ba2009-10-10 13:46:59 +00004195 CNIC_WR(dev, BAR_CSTRORM_INTMEM +
4196 CSTORM_ISCSI_EQ_NEXT_EQE_ADDR_OFFSET(func, 0),
Michael Chane6c28892010-06-24 14:58:39 +00004197 cp->kcq1.dma.pg_map_arr[0] & 0xffffffff);
Michael Chan71034ba2009-10-10 13:46:59 +00004198 CNIC_WR(dev, BAR_CSTRORM_INTMEM +
4199 CSTORM_ISCSI_EQ_NEXT_EQE_ADDR_OFFSET(func, 0) + 4,
Michael Chane6c28892010-06-24 14:58:39 +00004200 (u64) cp->kcq1.dma.pg_map_arr[0] >> 32);
Michael Chan71034ba2009-10-10 13:46:59 +00004201 CNIC_WR8(dev, BAR_CSTRORM_INTMEM +
4202 CSTORM_ISCSI_EQ_NEXT_PAGE_ADDR_VALID_OFFSET(func, 0), 1);
4203 CNIC_WR16(dev, BAR_CSTRORM_INTMEM +
4204 CSTORM_ISCSI_EQ_SB_NUM_OFFSET(func, 0), cp->status_blk_num);
4205 CNIC_WR8(dev, BAR_CSTRORM_INTMEM +
4206 CSTORM_ISCSI_EQ_SB_INDEX_OFFSET(func, 0),
4207 HC_INDEX_C_ISCSI_EQ_CONS);
4208
4209 for (i = 0; i < cp->conn_buf_info.num_pages; i++) {
4210 CNIC_WR(dev, BAR_TSTRORM_INTMEM +
4211 TSTORM_ISCSI_CONN_BUF_PBL_OFFSET(func, i),
4212 cp->conn_buf_info.pgtbl[2 * i]);
4213 CNIC_WR(dev, BAR_TSTRORM_INTMEM +
4214 TSTORM_ISCSI_CONN_BUF_PBL_OFFSET(func, i) + 4,
4215 cp->conn_buf_info.pgtbl[(2 * i) + 1]);
4216 }
4217
4218 CNIC_WR(dev, BAR_USTRORM_INTMEM +
4219 USTORM_ISCSI_GLOBAL_BUF_PHYS_ADDR_OFFSET(func),
4220 cp->gbl_buf_info.pg_map_arr[0] & 0xffffffff);
4221 CNIC_WR(dev, BAR_USTRORM_INTMEM +
4222 USTORM_ISCSI_GLOBAL_BUF_PHYS_ADDR_OFFSET(func) + 4,
4223 (u64) cp->gbl_buf_info.pg_map_arr[0] >> 32);
4224
4225 cnic_setup_bnx2x_context(dev);
4226
4227 eq_idx = CNIC_RD16(dev, BAR_CSTRORM_INTMEM +
4228 CSTORM_SB_HOST_STATUS_BLOCK_C_OFFSET(port, sb_id) +
4229 offsetof(struct cstorm_status_block_c,
4230 index_values[HC_INDEX_C_ISCSI_EQ_CONS]));
4231 if (eq_idx != 0) {
Joe Perchesddf79b22010-02-17 15:01:54 +00004232 netdev_err(dev->netdev, "EQ cons index %x != 0\n", eq_idx);
Michael Chan71034ba2009-10-10 13:46:59 +00004233 return -EBUSY;
4234 }
4235 ret = cnic_init_bnx2x_irq(dev);
4236 if (ret)
4237 return ret;
4238
4239 cnic_init_bnx2x_tx_ring(dev);
4240 cnic_init_bnx2x_rx_ring(dev);
4241
4242 return 0;
4243}
4244
Michael Chan86b53602009-10-10 13:46:57 +00004245static void cnic_init_rings(struct cnic_dev *dev)
4246{
4247 if (test_bit(CNIC_F_BNX2_CLASS, &dev->flags)) {
4248 cnic_init_bnx2_tx_ring(dev);
4249 cnic_init_bnx2_rx_ring(dev);
Michael Chan71034ba2009-10-10 13:46:59 +00004250 } else if (test_bit(CNIC_F_BNX2X_CLASS, &dev->flags)) {
4251 struct cnic_local *cp = dev->cnic_priv;
Michael Chan71034ba2009-10-10 13:46:59 +00004252 u32 cli = BNX2X_ISCSI_CL_ID(CNIC_E1HVN(cp));
4253 union l5cm_specific_data l5_data;
4254 struct ustorm_eth_rx_producers rx_prods = {0};
Michael Chanc7596b72009-12-02 15:15:35 +00004255 u32 off, i;
Michael Chan71034ba2009-10-10 13:46:59 +00004256
4257 rx_prods.bd_prod = 0;
4258 rx_prods.cqe_prod = BNX2X_MAX_RCQ_DESC_CNT;
4259 barrier();
4260
Michael Chanc7596b72009-12-02 15:15:35 +00004261 off = BAR_USTRORM_INTMEM +
Michael Chan71034ba2009-10-10 13:46:59 +00004262 USTORM_RX_PRODS_OFFSET(CNIC_PORT(cp), cli);
4263
4264 for (i = 0; i < sizeof(struct ustorm_eth_rx_producers) / 4; i++)
Michael Chanc7596b72009-12-02 15:15:35 +00004265 CNIC_WR(dev, off + i * 4, ((u32 *) &rx_prods)[i]);
Michael Chan71034ba2009-10-10 13:46:59 +00004266
Michael Chan48f753d2010-05-18 11:32:53 +00004267 set_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags);
4268
Michael Chan71034ba2009-10-10 13:46:59 +00004269 cnic_init_bnx2x_tx_ring(dev);
4270 cnic_init_bnx2x_rx_ring(dev);
4271
4272 l5_data.phy_address.lo = cli;
4273 l5_data.phy_address.hi = 0;
4274 cnic_submit_kwqe_16(dev, RAMROD_CMD_ID_ETH_CLIENT_SETUP,
4275 BNX2X_ISCSI_L2_CID, ETH_CONNECTION_TYPE, &l5_data);
Michael Chan48f753d2010-05-18 11:32:53 +00004276 i = 0;
4277 while (test_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags) &&
4278 ++i < 10)
4279 msleep(1);
4280
4281 if (test_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags))
4282 netdev_err(dev->netdev,
4283 "iSCSI CLIENT_SETUP did not complete\n");
4284 cnic_kwq_completion(dev, 1);
Michael Chan71034ba2009-10-10 13:46:59 +00004285 cnic_ring_ctl(dev, BNX2X_ISCSI_L2_CID, cli, 1);
Michael Chan86b53602009-10-10 13:46:57 +00004286 }
4287}
4288
4289static void cnic_shutdown_rings(struct cnic_dev *dev)
4290{
4291 if (test_bit(CNIC_F_BNX2_CLASS, &dev->flags)) {
4292 cnic_shutdown_bnx2_rx_ring(dev);
Michael Chan71034ba2009-10-10 13:46:59 +00004293 } else if (test_bit(CNIC_F_BNX2X_CLASS, &dev->flags)) {
4294 struct cnic_local *cp = dev->cnic_priv;
4295 u32 cli = BNX2X_ISCSI_CL_ID(CNIC_E1HVN(cp));
Michael Chan8b065b62009-12-02 15:15:36 +00004296 union l5cm_specific_data l5_data;
Michael Chan48f753d2010-05-18 11:32:53 +00004297 int i;
Michael Chan71034ba2009-10-10 13:46:59 +00004298
4299 cnic_ring_ctl(dev, BNX2X_ISCSI_L2_CID, cli, 0);
Michael Chan8b065b62009-12-02 15:15:36 +00004300
Michael Chan48f753d2010-05-18 11:32:53 +00004301 set_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags);
4302
Michael Chan8b065b62009-12-02 15:15:36 +00004303 l5_data.phy_address.lo = cli;
4304 l5_data.phy_address.hi = 0;
4305 cnic_submit_kwqe_16(dev, RAMROD_CMD_ID_ETH_HALT,
4306 BNX2X_ISCSI_L2_CID, ETH_CONNECTION_TYPE, &l5_data);
Michael Chan48f753d2010-05-18 11:32:53 +00004307 i = 0;
4308 while (test_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags) &&
4309 ++i < 10)
4310 msleep(1);
4311
4312 if (test_bit(CNIC_LCL_FL_L2_WAIT, &cp->cnic_local_flags))
4313 netdev_err(dev->netdev,
4314 "iSCSI CLIENT_HALT did not complete\n");
4315 cnic_kwq_completion(dev, 1);
Michael Chan1bcdc322009-12-10 15:40:57 +00004316
4317 memset(&l5_data, 0, sizeof(l5_data));
4318 cnic_submit_kwqe_16(dev, RAMROD_CMD_ID_ETH_CFC_DEL,
4319 BNX2X_ISCSI_L2_CID, ETH_CONNECTION_TYPE |
4320 (1 << SPE_HDR_COMMON_RAMROD_SHIFT), &l5_data);
4321 msleep(10);
Michael Chan86b53602009-10-10 13:46:57 +00004322 }
4323}
4324
Michael Chana3059b12009-08-14 15:49:44 +00004325static int cnic_register_netdev(struct cnic_dev *dev)
4326{
4327 struct cnic_local *cp = dev->cnic_priv;
4328 struct cnic_eth_dev *ethdev = cp->ethdev;
4329 int err;
4330
4331 if (!ethdev)
4332 return -ENODEV;
4333
4334 if (ethdev->drv_state & CNIC_DRV_STATE_REGD)
4335 return 0;
4336
4337 err = ethdev->drv_register_cnic(dev->netdev, cp->cnic_ops, dev);
4338 if (err)
Joe Perchesddf79b22010-02-17 15:01:54 +00004339 netdev_err(dev->netdev, "register_cnic failed\n");
Michael Chana3059b12009-08-14 15:49:44 +00004340
4341 return err;
4342}
4343
4344static void cnic_unregister_netdev(struct cnic_dev *dev)
4345{
4346 struct cnic_local *cp = dev->cnic_priv;
4347 struct cnic_eth_dev *ethdev = cp->ethdev;
4348
4349 if (!ethdev)
4350 return;
4351
4352 ethdev->drv_unregister_cnic(dev->netdev);
4353}
4354
Michael Chana4636962009-06-08 18:14:43 -07004355static int cnic_start_hw(struct cnic_dev *dev)
4356{
4357 struct cnic_local *cp = dev->cnic_priv;
4358 struct cnic_eth_dev *ethdev = cp->ethdev;
4359 int err;
4360
4361 if (test_bit(CNIC_F_CNIC_UP, &dev->flags))
4362 return -EALREADY;
4363
Michael Chana4636962009-06-08 18:14:43 -07004364 dev->regview = ethdev->io_base;
4365 cp->chip_id = ethdev->chip_id;
4366 pci_dev_get(dev->pcidev);
4367 cp->func = PCI_FUNC(dev->pcidev->devfn);
Michael Chana4dde3a2010-02-24 14:42:08 +00004368 cp->status_blk.gen = ethdev->irq_arr[0].status_blk;
Michael Chana4636962009-06-08 18:14:43 -07004369 cp->status_blk_num = ethdev->irq_arr[0].status_blk_num;
4370
4371 err = cp->alloc_resc(dev);
4372 if (err) {
Joe Perchesddf79b22010-02-17 15:01:54 +00004373 netdev_err(dev->netdev, "allocate resource failure\n");
Michael Chana4636962009-06-08 18:14:43 -07004374 goto err1;
4375 }
4376
4377 err = cp->start_hw(dev);
4378 if (err)
4379 goto err1;
4380
4381 err = cnic_cm_open(dev);
4382 if (err)
4383 goto err1;
4384
4385 set_bit(CNIC_F_CNIC_UP, &dev->flags);
4386
4387 cp->enable_int(dev);
4388
4389 return 0;
4390
4391err1:
Michael Chana4636962009-06-08 18:14:43 -07004392 cp->free_resc(dev);
4393 pci_dev_put(dev->pcidev);
Michael Chana4636962009-06-08 18:14:43 -07004394 return err;
4395}
4396
4397static void cnic_stop_bnx2_hw(struct cnic_dev *dev)
4398{
Michael Chana4636962009-06-08 18:14:43 -07004399 cnic_disable_bnx2_int_sync(dev);
4400
4401 cnic_reg_wr_ind(dev, BNX2_CP_SCRATCH + 0x20, 0);
4402 cnic_reg_wr_ind(dev, BNX2_COM_SCRATCH + 0x20, 0);
4403
4404 cnic_init_context(dev, KWQ_CID);
4405 cnic_init_context(dev, KCQ_CID);
4406
4407 cnic_setup_5709_context(dev, 0);
4408 cnic_free_irq(dev);
4409
Michael Chana4636962009-06-08 18:14:43 -07004410 cnic_free_resc(dev);
4411}
4412
Michael Chan71034ba2009-10-10 13:46:59 +00004413
4414static void cnic_stop_bnx2x_hw(struct cnic_dev *dev)
4415{
4416 struct cnic_local *cp = dev->cnic_priv;
4417 u8 sb_id = cp->status_blk_num;
4418 int port = CNIC_PORT(cp);
4419
4420 cnic_free_irq(dev);
4421 CNIC_WR16(dev, BAR_CSTRORM_INTMEM +
4422 CSTORM_SB_HOST_STATUS_BLOCK_C_OFFSET(port, sb_id) +
4423 offsetof(struct cstorm_status_block_c,
4424 index_values[HC_INDEX_C_ISCSI_EQ_CONS]),
4425 0);
Michael Chan4e9c4fd2009-12-10 15:40:58 +00004426 CNIC_WR(dev, BAR_CSTRORM_INTMEM +
4427 CSTORM_ISCSI_EQ_CONS_OFFSET(cp->func, 0), 0);
Michael Chane6c28892010-06-24 14:58:39 +00004428 CNIC_WR16(dev, cp->kcq1.io_addr, 0);
Michael Chan71034ba2009-10-10 13:46:59 +00004429 cnic_free_resc(dev);
4430}
4431
Michael Chana4636962009-06-08 18:14:43 -07004432static void cnic_stop_hw(struct cnic_dev *dev)
4433{
4434 if (test_bit(CNIC_F_CNIC_UP, &dev->flags)) {
4435 struct cnic_local *cp = dev->cnic_priv;
Michael Chan48f753d2010-05-18 11:32:53 +00004436 int i = 0;
Michael Chana4636962009-06-08 18:14:43 -07004437
Michael Chan48f753d2010-05-18 11:32:53 +00004438 /* Need to wait for the ring shutdown event to complete
4439 * before clearing the CNIC_UP flag.
4440 */
4441 while (cp->uio_dev != -1 && i < 15) {
4442 msleep(100);
4443 i++;
4444 }
Michael Chana4636962009-06-08 18:14:43 -07004445 clear_bit(CNIC_F_CNIC_UP, &dev->flags);
4446 rcu_assign_pointer(cp->ulp_ops[CNIC_ULP_L4], NULL);
4447 synchronize_rcu();
4448 cnic_cm_shutdown(dev);
4449 cp->stop_hw(dev);
4450 pci_dev_put(dev->pcidev);
4451 }
4452}
4453
4454static void cnic_free_dev(struct cnic_dev *dev)
4455{
4456 int i = 0;
4457
4458 while ((atomic_read(&dev->ref_count) != 0) && i < 10) {
4459 msleep(100);
4460 i++;
4461 }
4462 if (atomic_read(&dev->ref_count) != 0)
Joe Perchesddf79b22010-02-17 15:01:54 +00004463 netdev_err(dev->netdev, "Failed waiting for ref count to go to zero\n");
Michael Chana4636962009-06-08 18:14:43 -07004464
Joe Perchesddf79b22010-02-17 15:01:54 +00004465 netdev_info(dev->netdev, "Removed CNIC device\n");
Michael Chana4636962009-06-08 18:14:43 -07004466 dev_put(dev->netdev);
4467 kfree(dev);
4468}
4469
4470static struct cnic_dev *cnic_alloc_dev(struct net_device *dev,
4471 struct pci_dev *pdev)
4472{
4473 struct cnic_dev *cdev;
4474 struct cnic_local *cp;
4475 int alloc_size;
4476
4477 alloc_size = sizeof(struct cnic_dev) + sizeof(struct cnic_local);
4478
4479 cdev = kzalloc(alloc_size , GFP_KERNEL);
4480 if (cdev == NULL) {
Joe Perchesddf79b22010-02-17 15:01:54 +00004481 netdev_err(dev, "allocate dev struct failure\n");
Michael Chana4636962009-06-08 18:14:43 -07004482 return NULL;
4483 }
4484
4485 cdev->netdev = dev;
4486 cdev->cnic_priv = (char *)cdev + sizeof(struct cnic_dev);
4487 cdev->register_device = cnic_register_device;
4488 cdev->unregister_device = cnic_unregister_device;
4489 cdev->iscsi_nl_msg_recv = cnic_iscsi_nl_msg_recv;
4490
4491 cp = cdev->cnic_priv;
4492 cp->dev = cdev;
4493 cp->uio_dev = -1;
4494 cp->l2_single_buf_size = 0x400;
4495 cp->l2_rx_ring_size = 3;
4496
4497 spin_lock_init(&cp->cnic_ulp_lock);
4498
Joe Perchesddf79b22010-02-17 15:01:54 +00004499 netdev_info(dev, "Added CNIC device\n");
Michael Chana4636962009-06-08 18:14:43 -07004500
4501 return cdev;
4502}
4503
4504static struct cnic_dev *init_bnx2_cnic(struct net_device *dev)
4505{
4506 struct pci_dev *pdev;
4507 struct cnic_dev *cdev;
4508 struct cnic_local *cp;
4509 struct cnic_eth_dev *ethdev = NULL;
Michael Chane2ee3612009-06-13 17:43:02 -07004510 struct cnic_eth_dev *(*probe)(struct net_device *) = NULL;
Michael Chana4636962009-06-08 18:14:43 -07004511
Michael Chane2ee3612009-06-13 17:43:02 -07004512 probe = symbol_get(bnx2_cnic_probe);
Michael Chana4636962009-06-08 18:14:43 -07004513 if (probe) {
4514 ethdev = (*probe)(dev);
Michael Chan64c64602009-08-14 15:49:43 +00004515 symbol_put(bnx2_cnic_probe);
Michael Chana4636962009-06-08 18:14:43 -07004516 }
4517 if (!ethdev)
4518 return NULL;
4519
4520 pdev = ethdev->pdev;
4521 if (!pdev)
4522 return NULL;
4523
4524 dev_hold(dev);
4525 pci_dev_get(pdev);
4526 if (pdev->device == PCI_DEVICE_ID_NX2_5709 ||
4527 pdev->device == PCI_DEVICE_ID_NX2_5709S) {
4528 u8 rev;
4529
4530 pci_read_config_byte(pdev, PCI_REVISION_ID, &rev);
4531 if (rev < 0x10) {
4532 pci_dev_put(pdev);
4533 goto cnic_err;
4534 }
4535 }
4536 pci_dev_put(pdev);
4537
4538 cdev = cnic_alloc_dev(dev, pdev);
4539 if (cdev == NULL)
4540 goto cnic_err;
4541
4542 set_bit(CNIC_F_BNX2_CLASS, &cdev->flags);
4543 cdev->submit_kwqes = cnic_submit_bnx2_kwqes;
4544
4545 cp = cdev->cnic_priv;
4546 cp->ethdev = ethdev;
4547 cdev->pcidev = pdev;
4548
4549 cp->cnic_ops = &cnic_bnx2_ops;
4550 cp->start_hw = cnic_start_bnx2_hw;
4551 cp->stop_hw = cnic_stop_bnx2_hw;
4552 cp->setup_pgtbl = cnic_setup_page_tbl;
4553 cp->alloc_resc = cnic_alloc_bnx2_resc;
4554 cp->free_resc = cnic_free_resc;
4555 cp->start_cm = cnic_cm_init_bnx2_hw;
4556 cp->stop_cm = cnic_cm_stop_bnx2_hw;
4557 cp->enable_int = cnic_enable_bnx2_int;
4558 cp->disable_int_sync = cnic_disable_bnx2_int_sync;
4559 cp->close_conn = cnic_close_bnx2_conn;
4560 cp->next_idx = cnic_bnx2_next_idx;
4561 cp->hw_idx = cnic_bnx2_hw_idx;
4562 return cdev;
4563
4564cnic_err:
4565 dev_put(dev);
4566 return NULL;
4567}
4568
Michael Chan71034ba2009-10-10 13:46:59 +00004569static struct cnic_dev *init_bnx2x_cnic(struct net_device *dev)
4570{
4571 struct pci_dev *pdev;
4572 struct cnic_dev *cdev;
4573 struct cnic_local *cp;
4574 struct cnic_eth_dev *ethdev = NULL;
4575 struct cnic_eth_dev *(*probe)(struct net_device *) = NULL;
4576
4577 probe = symbol_get(bnx2x_cnic_probe);
4578 if (probe) {
4579 ethdev = (*probe)(dev);
4580 symbol_put(bnx2x_cnic_probe);
4581 }
4582 if (!ethdev)
4583 return NULL;
4584
4585 pdev = ethdev->pdev;
4586 if (!pdev)
4587 return NULL;
4588
4589 dev_hold(dev);
4590 cdev = cnic_alloc_dev(dev, pdev);
4591 if (cdev == NULL) {
4592 dev_put(dev);
4593 return NULL;
4594 }
4595
4596 set_bit(CNIC_F_BNX2X_CLASS, &cdev->flags);
4597 cdev->submit_kwqes = cnic_submit_bnx2x_kwqes;
4598
4599 cp = cdev->cnic_priv;
4600 cp->ethdev = ethdev;
4601 cdev->pcidev = pdev;
4602
4603 cp->cnic_ops = &cnic_bnx2x_ops;
4604 cp->start_hw = cnic_start_bnx2x_hw;
4605 cp->stop_hw = cnic_stop_bnx2x_hw;
4606 cp->setup_pgtbl = cnic_setup_page_tbl_le;
4607 cp->alloc_resc = cnic_alloc_bnx2x_resc;
4608 cp->free_resc = cnic_free_resc;
4609 cp->start_cm = cnic_cm_init_bnx2x_hw;
4610 cp->stop_cm = cnic_cm_stop_bnx2x_hw;
4611 cp->enable_int = cnic_enable_bnx2x_int;
4612 cp->disable_int_sync = cnic_disable_bnx2x_int_sync;
4613 cp->ack_int = cnic_ack_bnx2x_msix;
4614 cp->close_conn = cnic_close_bnx2x_conn;
4615 cp->next_idx = cnic_bnx2x_next_idx;
4616 cp->hw_idx = cnic_bnx2x_hw_idx;
4617 return cdev;
4618}
4619
Michael Chana4636962009-06-08 18:14:43 -07004620static struct cnic_dev *is_cnic_dev(struct net_device *dev)
4621{
4622 struct ethtool_drvinfo drvinfo;
4623 struct cnic_dev *cdev = NULL;
4624
4625 if (dev->ethtool_ops && dev->ethtool_ops->get_drvinfo) {
4626 memset(&drvinfo, 0, sizeof(drvinfo));
4627 dev->ethtool_ops->get_drvinfo(dev, &drvinfo);
4628
4629 if (!strcmp(drvinfo.driver, "bnx2"))
4630 cdev = init_bnx2_cnic(dev);
Michael Chan71034ba2009-10-10 13:46:59 +00004631 if (!strcmp(drvinfo.driver, "bnx2x"))
4632 cdev = init_bnx2x_cnic(dev);
Michael Chana4636962009-06-08 18:14:43 -07004633 if (cdev) {
4634 write_lock(&cnic_dev_lock);
4635 list_add(&cdev->list, &cnic_dev_list);
4636 write_unlock(&cnic_dev_lock);
4637 }
4638 }
4639 return cdev;
4640}
4641
4642/**
4643 * netdev event handler
4644 */
4645static int cnic_netdev_event(struct notifier_block *this, unsigned long event,
4646 void *ptr)
4647{
4648 struct net_device *netdev = ptr;
4649 struct cnic_dev *dev;
4650 int if_type;
4651 int new_dev = 0;
4652
4653 dev = cnic_from_netdev(netdev);
4654
4655 if (!dev && (event == NETDEV_REGISTER || event == NETDEV_UP)) {
4656 /* Check for the hot-plug device */
4657 dev = is_cnic_dev(netdev);
4658 if (dev) {
4659 new_dev = 1;
4660 cnic_hold(dev);
4661 }
4662 }
4663 if (dev) {
4664 struct cnic_local *cp = dev->cnic_priv;
4665
4666 if (new_dev)
4667 cnic_ulp_init(dev);
4668 else if (event == NETDEV_UNREGISTER)
4669 cnic_ulp_exit(dev);
Michael Chan6053bbf2009-10-02 11:03:28 -07004670
4671 if (event == NETDEV_UP) {
Michael Chana3059b12009-08-14 15:49:44 +00004672 if (cnic_register_netdev(dev) != 0) {
4673 cnic_put(dev);
4674 goto done;
4675 }
Michael Chana4636962009-06-08 18:14:43 -07004676 if (!cnic_start_hw(dev))
4677 cnic_ulp_start(dev);
Michael Chana4636962009-06-08 18:14:43 -07004678 }
4679
4680 rcu_read_lock();
4681 for (if_type = 0; if_type < MAX_CNIC_ULP_TYPE; if_type++) {
4682 struct cnic_ulp_ops *ulp_ops;
4683 void *ctx;
4684
4685 ulp_ops = rcu_dereference(cp->ulp_ops[if_type]);
4686 if (!ulp_ops || !ulp_ops->indicate_netevent)
4687 continue;
4688
4689 ctx = cp->ulp_handle[if_type];
4690
4691 ulp_ops->indicate_netevent(ctx, event);
4692 }
4693 rcu_read_unlock();
4694
4695 if (event == NETDEV_GOING_DOWN) {
Michael Chana4636962009-06-08 18:14:43 -07004696 cnic_ulp_stop(dev);
4697 cnic_stop_hw(dev);
Michael Chana3059b12009-08-14 15:49:44 +00004698 cnic_unregister_netdev(dev);
Michael Chana4636962009-06-08 18:14:43 -07004699 } else if (event == NETDEV_UNREGISTER) {
4700 write_lock(&cnic_dev_lock);
4701 list_del_init(&dev->list);
4702 write_unlock(&cnic_dev_lock);
4703
4704 cnic_put(dev);
4705 cnic_free_dev(dev);
4706 goto done;
4707 }
4708 cnic_put(dev);
4709 }
4710done:
4711 return NOTIFY_DONE;
4712}
4713
4714static struct notifier_block cnic_netdev_notifier = {
4715 .notifier_call = cnic_netdev_event
4716};
4717
4718static void cnic_release(void)
4719{
4720 struct cnic_dev *dev;
4721
4722 while (!list_empty(&cnic_dev_list)) {
4723 dev = list_entry(cnic_dev_list.next, struct cnic_dev, list);
4724 if (test_bit(CNIC_F_CNIC_UP, &dev->flags)) {
4725 cnic_ulp_stop(dev);
4726 cnic_stop_hw(dev);
4727 }
4728
4729 cnic_ulp_exit(dev);
Michael Chana3059b12009-08-14 15:49:44 +00004730 cnic_unregister_netdev(dev);
Michael Chana4636962009-06-08 18:14:43 -07004731 list_del_init(&dev->list);
4732 cnic_free_dev(dev);
4733 }
4734}
4735
4736static int __init cnic_init(void)
4737{
4738 int rc = 0;
4739
Joe Perchesddf79b22010-02-17 15:01:54 +00004740 pr_info("%s", version);
Michael Chana4636962009-06-08 18:14:43 -07004741
4742 rc = register_netdevice_notifier(&cnic_netdev_notifier);
4743 if (rc) {
4744 cnic_release();
4745 return rc;
4746 }
4747
4748 return 0;
4749}
4750
4751static void __exit cnic_exit(void)
4752{
4753 unregister_netdevice_notifier(&cnic_netdev_notifier);
4754 cnic_release();
Michael Chana4636962009-06-08 18:14:43 -07004755}
4756
4757module_init(cnic_init);
4758module_exit(cnic_exit);