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Jean-Christop PLAGNIOL-VILLARD6d803ba2010-11-17 10:04:33 +01001
2config CLKDEV_LOOKUP
3 bool
4 select HAVE_CLK
Kyungmin Parkaa3831c2011-07-18 16:34:54 +09005
Shawn Guo5c77f562011-12-20 14:46:38 +08006config HAVE_CLK_PREPARE
7 bool
8
Kyungmin Parkaa3831c2011-07-18 16:34:54 +09009config HAVE_MACH_CLKDEV
10 bool
Mike Turquetteb24764902012-03-15 23:11:19 -070011
Arnd Bergmann8fb61e32012-03-17 21:10:51 +000012config COMMON_CLK
13 bool
Mike Turquetteb24764902012-03-15 23:11:19 -070014 select HAVE_CLK_PREPARE
Rob Herring01033be2012-04-09 15:24:58 -050015 select CLKDEV_LOOKUP
Pranith Kumar83fe27e2014-12-05 11:24:45 -050016 select SRCU
Mike Turquetteb24764902012-03-15 23:11:19 -070017 ---help---
18 The common clock framework is a single definition of struct
19 clk, useful across many platforms, as well as an
20 implementation of the clock API in include/linux/clk.h.
21 Architectures utilizing the common struct clk should select
Arnd Bergmann8fb61e32012-03-17 21:10:51 +000022 this option.
Mike Turquetteb24764902012-03-15 23:11:19 -070023
Arnd Bergmann8fb61e32012-03-17 21:10:51 +000024menu "Common Clock Framework"
25 depends on COMMON_CLK
Mike Turquetteb24764902012-03-15 23:11:19 -070026
Mark Brownf05259a2012-05-17 10:04:57 +010027config COMMON_CLK_WM831X
28 tristate "Clock driver for WM831x/2x PMICs"
29 depends on MFD_WM831X
30 ---help---
31 Supports the clocking subsystem of the WM831x/2x series of
Masanari Iidafe4e4372014-10-17 00:09:24 +090032 PMICs from Wolfson Microelectronics.
Mark Brownf05259a2012-05-17 10:04:57 +010033
Pawel Moll5ee2b872013-09-17 17:16:15 +010034source "drivers/clk/versatile/Kconfig"
Linus Walleijf9a6aa42012-08-06 18:32:08 +020035
Javier Martinez Canillas5dbbb002014-08-18 10:33:00 +020036config COMMON_CLK_MAX_GEN
37 bool
38
Jonghwa Lee73118e62012-08-28 17:54:28 +090039config COMMON_CLK_MAX77686
40 tristate "Clock driver for Maxim 77686 MFD"
41 depends on MFD_MAX77686
Javier Martinez Canillas1887d692014-08-18 10:33:01 +020042 select COMMON_CLK_MAX_GEN
Jonghwa Lee73118e62012-08-28 17:54:28 +090043 ---help---
44 This driver supports Maxim 77686 crystal oscillator clock.
45
Javier Martinez Canillas83ccf162014-08-18 10:33:03 +020046config COMMON_CLK_MAX77802
47 tristate "Clock driver for Maxim 77802 PMIC"
48 depends on MFD_MAX77686
49 select COMMON_CLK_MAX_GEN
50 ---help---
51 This driver supports Maxim 77802 crystal oscillator clock.
52
Chris Zhong038b8922014-10-13 15:52:44 -070053config COMMON_CLK_RK808
54 tristate "Clock driver for RK808"
55 depends on MFD_RK808
56 ---help---
57 This driver supports RK808 crystal oscillator clock. These
58 multi-function devices have two fixed-rate oscillators,
59 clocked at 32KHz each. Clkout1 is always on, Clkout2 can off
60 by control register.
61
Sebastian Hesselbarth9abd5f02013-04-11 21:42:29 +020062config COMMON_CLK_SI5351
63 tristate "Clock driver for SiLabs 5351A/B/C"
64 depends on I2C
65 select REGMAP_I2C
66 select RATIONAL
67 ---help---
68 This driver supports Silicon Labs 5351A/B/C programmable clock
69 generators.
70
Soren Brinkmann1459c832013-09-21 16:40:39 -070071config COMMON_CLK_SI570
72 tristate "Clock driver for SiLabs 570 and compatible devices"
73 depends on I2C
74 depends on OF
75 select REGMAP_I2C
76 help
77 ---help---
78 This driver supports Silicon Labs 570/571/598/599 programmable
79 clock generators.
80
Mike Looijmans19fbbbb2015-06-03 07:25:19 +020081config COMMON_CLK_CDCE925
82 tristate "Clock driver for TI CDCE925 devices"
83 depends on I2C
84 depends on OF
85 select REGMAP_I2C
86 help
87 ---help---
88 This driver supports the TI CDCE925 programmable clock synthesizer.
89 The chip contains two PLLs with spread-spectrum clocking support and
90 five output dividers. The driver only supports the following setup,
91 and uses a fixed setting for the output muxes.
92 Y1 is derived from the input clock
93 Y2 and Y3 derive from PLL1
94 Y4 and Y5 derive from PLL2
95 Given a target output frequency, the driver will set the PLL and
96 divider to best approximate the desired output.
97
Yadwinder Singh Brar7cc560d2013-07-07 17:14:20 +053098config COMMON_CLK_S2MPS11
Krzysztof Kozlowskie8b60a42014-05-21 13:23:01 +020099 tristate "Clock driver for S2MPS1X/S5M8767 MFD"
Yadwinder Singh Brar7cc560d2013-07-07 17:14:20 +0530100 depends on MFD_SEC_CORE
101 ---help---
Krzysztof Kozlowskie8b60a42014-05-21 13:23:01 +0200102 This driver supports S2MPS11/S2MPS14/S5M8767 crystal oscillator
103 clock. These multi-function devices have two (S2MPS14) or three
104 (S2MPS11, S5M8767) fixed-rate oscillators, clocked at 32KHz each.
Yadwinder Singh Brar7cc560d2013-07-07 17:14:20 +0530105
Peter Ujfalusif9f8c042012-09-14 17:30:27 +0300106config CLK_TWL6040
107 tristate "External McPDM functional clock from twl6040"
108 depends on TWL6040_CORE
109 ---help---
110 Enable the external functional clock support on OMAP4+ platforms for
111 McPDM. McPDM module is using the external bit clock on the McPDM bus
112 as functional clock.
113
Lars-Peter Clausen0e646c52013-03-11 16:22:29 +0100114config COMMON_CLK_AXI_CLKGEN
115 tristate "AXI clkgen driver"
116 depends on ARCH_ZYNQ || MICROBLAZE
117 help
118 ---help---
119 Support for the Analog Devices axi-clkgen pcore clock generator for Xilinx
120 FPGAs. It is commonly used in Analog Devices' reference designs.
121
Tang Yuantian93a17c02015-01-15 14:03:41 +0800122config CLK_QORIQ
123 bool "Clock driver for Freescale QorIQ platforms"
124 depends on (PPC_E500MC || ARM) && OF
Tang Yuantian555eae92013-04-09 16:46:26 +0800125 ---help---
Tang Yuantian93a17c02015-01-15 14:03:41 +0800126 This adds the clock driver support for Freescale QorIQ platforms
127 using common clock framework.
Tang Yuantian555eae92013-04-09 16:46:26 +0800128
Loc Ho308964c2013-06-26 11:56:09 -0600129config COMMON_CLK_XGENE
130 bool "Clock driver for APM XGene SoC"
131 default y
132 depends on ARM64
133 ---help---
134 Sypport for the APM X-Gene SoC reference, PLL, and device clocks.
135
Santosh Shilimkar6cfc2292013-09-25 21:18:15 -0400136config COMMON_CLK_KEYSTONE
137 tristate "Clock drivers for Keystone based SOCs"
138 depends on ARCH_KEYSTONE && OF
139 ---help---
140 Supports clock drivers for Keystone based SOCs. These SOCs have local
141 a power sleep control module that gate the clock to the IPs and PLLs.
142
Peter Ujfalusi942d1d62014-06-27 09:01:11 +0300143config COMMON_CLK_PALMAS
144 tristate "Clock driver for TI Palmas devices"
145 depends on MFD_PALMAS
146 ---help---
147 This driver supports TI Palmas devices 32KHz output KG and KG_AUDIO
148 using common clock framework.
149
Philipp Zabel9a74ccd2015-02-13 20:18:52 +0100150config COMMON_CLK_PWM
151 tristate "Clock driver for PWMs used as clock outputs"
152 depends on PWM
153 ---help---
154 Adapter driver so that any PWM output can be (mis)used as clock signal
155 at 50% duty cycle.
156
Robert Jarzmik98d147f2014-10-01 23:39:29 +0200157config COMMON_CLK_PXA
158 def_bool COMMON_CLK && ARCH_PXA
159 ---help---
160 Sypport for the Marvell PXA SoC.
161
Max Filippov0c7665c2015-01-12 10:20:46 +0300162config COMMON_CLK_CDCE706
163 tristate "Clock driver for TI CDCE706 clock synthesizer"
164 depends on I2C
165 select REGMAP_I2C
166 select RATIONAL
167 ---help---
168 This driver supports TI CDCE706 programmable 3-PLL clock synthesizer.
169
Stephen Boyd64a12c52015-05-14 17:38:21 -0700170source "drivers/clk/bcm/Kconfig"
Bintian Wang72ea4862015-05-29 10:08:38 +0800171source "drivers/clk/hisilicon/Kconfig"
Stephen Boyd085d7a42014-01-15 10:47:23 -0800172source "drivers/clk/qcom/Kconfig"
173
Arnd Bergmann8fb61e32012-03-17 21:10:51 +0000174endmenu
Sebastian Hesselbarth97fa4cf2012-11-17 15:22:22 +0100175
176source "drivers/clk/mvebu/Kconfig"
Pankaj Dubey4ce9b852014-05-08 13:07:08 +0900177
178source "drivers/clk/samsung/Kconfig"
Thierry Reding31b52ba2015-04-01 09:10:58 +0200179source "drivers/clk/tegra/Kconfig"