blob: 70359d089803b2ef557ae0cea2620d1a123b24da [file] [log] [blame]
Alan Kwongbb27c092016-07-20 16:41:25 -04001/*
2 * Copyright (c) 2015-2016 The Linux Foundation. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 and
6 * only version 2 as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 *
13 */
14
15#define pr_fmt(fmt) "sde-wb:[%s] " fmt, __func__
16
17#include <linux/jiffies.h>
18#include <linux/debugfs.h>
19
20#include "sde_encoder_phys.h"
21#include "sde_formats.h"
22#include "sde_hw_top.h"
23#include "sde_hw_interrupts.h"
24#include "sde_wb.h"
25
26/* wait for at most 2 vsync for lowest refresh rate (24hz) */
27#define WAIT_TIMEOUT_MSEC 84
28
29#define to_sde_encoder_phys_wb(x) \
30 container_of(x, struct sde_encoder_phys_wb, base)
31
32#define DEV(phy_enc) (phy_enc->parent->dev)
33
34/**
Lloyd Atkinsone7bcdd22016-08-11 10:53:37 -040035 * sde_encoder_phys_wb_is_master - report wb always as master encoder
36 */
37static bool sde_encoder_phys_wb_is_master(struct sde_encoder_phys *phys_enc)
38{
39 return true;
40}
41
42/**
Alan Kwongbb27c092016-07-20 16:41:25 -040043 * sde_encoder_phys_wb_get_intr_type - get interrupt type based on block mode
44 * @hw_wb: Pointer to h/w writeback driver
45 */
46static enum sde_intr_type sde_encoder_phys_wb_get_intr_type(
47 struct sde_hw_wb *hw_wb)
48{
49 return (hw_wb->caps->features & BIT(SDE_WB_BLOCK_MODE)) ?
50 SDE_IRQ_TYPE_WB_ROT_COMP : SDE_IRQ_TYPE_WB_WFD_COMP;
51}
52
53/**
54 * sde_encoder_phys_wb_set_traffic_shaper - set traffic shaper for writeback
55 * @phys_enc: Pointer to physical encoder
56 */
57static void sde_encoder_phys_wb_set_traffic_shaper(
58 struct sde_encoder_phys *phys_enc)
59{
60 struct sde_encoder_phys_wb *wb_enc = to_sde_encoder_phys_wb(phys_enc);
61 struct sde_hw_wb_cfg *wb_cfg = &wb_enc->wb_cfg;
62
63 /* traffic shaper is only enabled for rotator */
64 wb_cfg->ts_cfg.en = false;
65}
66
67/**
68 * sde_encoder_phys_setup_cdm - setup chroma down block
69 * @phys_enc: Pointer to physical encoder
70 * @fb: Pointer to output framebuffer
71 * @format: Output format
72 */
73void sde_encoder_phys_setup_cdm(struct sde_encoder_phys *phys_enc,
74 struct drm_framebuffer *fb, const struct sde_format *format,
75 struct sde_rect *wb_roi)
76{
77 struct sde_hw_cdm *hw_cdm = phys_enc->hw_cdm;
78 struct sde_hw_cdm_cfg *cdm_cfg = &phys_enc->cdm_cfg;
79 int ret;
80
81 if (!SDE_FORMAT_IS_YUV(format)) {
82 SDE_DEBUG("[cdm_disable fmt:%x]\n",
83 format->base.pixel_format);
84
85 if (hw_cdm && hw_cdm->ops.disable)
86 hw_cdm->ops.disable(hw_cdm);
87
88 return;
89 }
90
91 memset(cdm_cfg, 0, sizeof(struct sde_hw_cdm_cfg));
92
93 cdm_cfg->output_width = wb_roi->w;
94 cdm_cfg->output_height = wb_roi->h;
95 cdm_cfg->output_fmt = format;
96 cdm_cfg->output_type = CDM_CDWN_OUTPUT_WB;
97 cdm_cfg->output_bit_depth = CDM_CDWN_OUTPUT_8BIT;
98
99 /* enable 10 bit logic */
100 switch (cdm_cfg->output_fmt->chroma_sample) {
101 case SDE_CHROMA_RGB:
102 cdm_cfg->h_cdwn_type = CDM_CDWN_DISABLE;
103 cdm_cfg->v_cdwn_type = CDM_CDWN_DISABLE;
104 break;
105 case SDE_CHROMA_H2V1:
106 cdm_cfg->h_cdwn_type = CDM_CDWN_COSITE;
107 cdm_cfg->v_cdwn_type = CDM_CDWN_DISABLE;
108 break;
109 case SDE_CHROMA_420:
110 cdm_cfg->h_cdwn_type = CDM_CDWN_COSITE;
111 cdm_cfg->v_cdwn_type = CDM_CDWN_OFFSITE;
112 break;
113 case SDE_CHROMA_H1V2:
114 default:
115 SDE_ERROR("unsupported chroma sampling type\n");
116 cdm_cfg->h_cdwn_type = CDM_CDWN_DISABLE;
117 cdm_cfg->v_cdwn_type = CDM_CDWN_DISABLE;
118 break;
119 }
120
121 SDE_DEBUG("[cdm_enable:%d,%d,%X,%d,%d,%d,%d]\n",
122 cdm_cfg->output_width,
123 cdm_cfg->output_height,
124 cdm_cfg->output_fmt->base.pixel_format,
125 cdm_cfg->output_type,
126 cdm_cfg->output_bit_depth,
127 cdm_cfg->h_cdwn_type,
128 cdm_cfg->v_cdwn_type);
129
130 if (hw_cdm && hw_cdm->ops.setup_cdwn) {
131 ret = hw_cdm->ops.setup_cdwn(hw_cdm, cdm_cfg);
132 if (ret < 0) {
133 SDE_ERROR("failed to setup CDM %d\n", ret);
134 return;
135 }
136 }
137
138 if (hw_cdm && hw_cdm->ops.enable) {
139 ret = hw_cdm->ops.enable(hw_cdm, cdm_cfg);
140 if (ret < 0) {
141 SDE_ERROR("failed to enable CDM %d\n", ret);
142 return;
143 }
144 }
145}
146
147/**
148 * sde_encoder_phys_wb_setup_fb - setup output framebuffer
149 * @phys_enc: Pointer to physical encoder
150 * @fb: Pointer to output framebuffer
151 * @wb_roi: Pointer to output region of interest
152 */
153static void sde_encoder_phys_wb_setup_fb(struct sde_encoder_phys *phys_enc,
154 struct drm_framebuffer *fb, struct sde_rect *wb_roi)
155{
156 struct sde_encoder_phys_wb *wb_enc = to_sde_encoder_phys_wb(phys_enc);
157 struct sde_hw_wb *hw_wb = wb_enc->hw_wb;
158 struct sde_hw_wb_cfg *wb_cfg = &wb_enc->wb_cfg;
159 const struct msm_format *format;
160 int ret, mmu_id;
161
162 memset(wb_cfg, 0, sizeof(struct sde_hw_wb_cfg));
163
164 wb_cfg->intf_mode = INTF_MODE_WB_LINE;
165 wb_cfg->is_secure = (fb->flags & DRM_MODE_FB_SECURE) ? true : false;
166 mmu_id = (wb_cfg->is_secure) ?
167 wb_enc->mmu_id[SDE_IOMMU_DOMAIN_SECURE] :
168 wb_enc->mmu_id[SDE_IOMMU_DOMAIN_UNSECURE];
169
170 SDE_DEBUG("[fb_secure:%d]\n", wb_cfg->is_secure);
171
172 format = msm_framebuffer_format(fb);
173 wb_cfg->dest.format = sde_get_sde_format_ext(
174 format->pixel_format,
175 fb->modifier,
176 drm_format_num_planes(fb->pixel_format));
177 if (!wb_cfg->dest.format) {
178 /* this error should be detected during atomic_check */
179 SDE_ERROR("failed to get format %x\n", format->pixel_format);
180 return;
181 }
182
183 ret = sde_format_populate_layout_with_roi(mmu_id, fb, wb_roi,
184 &wb_cfg->dest);
185 if (ret) {
186 /* this error should be detected during atomic_check */
187 SDE_DEBUG("failed to populate layout %d\n", ret);
188 return;
189 }
190
191 if ((wb_cfg->dest.format->fetch_planes == SDE_PLANE_PLANAR) &&
192 (wb_cfg->dest.format->element[0] == C1_B_Cb))
193 swap(wb_cfg->dest.plane_addr[1], wb_cfg->dest.plane_addr[2]);
194
195 SDE_DEBUG("[fb_offset:%8.8x,%8.8x,%8.8x,%8.8x]\n",
196 wb_cfg->dest.plane_addr[0],
197 wb_cfg->dest.plane_addr[1],
198 wb_cfg->dest.plane_addr[2],
199 wb_cfg->dest.plane_addr[3]);
200 SDE_DEBUG("[fb_stride:%8.8x,%8.8x,%8.8x,%8.8x]\n",
201 wb_cfg->dest.plane_pitch[0],
202 wb_cfg->dest.plane_pitch[1],
203 wb_cfg->dest.plane_pitch[2],
204 wb_cfg->dest.plane_pitch[3]);
205
206 if (hw_wb->ops.setup_outformat)
207 hw_wb->ops.setup_outformat(hw_wb, wb_cfg);
208
209 if (hw_wb->ops.setup_outaddress)
210 hw_wb->ops.setup_outaddress(hw_wb, wb_cfg);
211}
212
213/**
214 * sde_encoder_phys_wb_setup_cdp - setup chroma down prefetch block
215 * @phys_enc: Pointer to physical encoder
216 */
217static void sde_encoder_phys_wb_setup_cdp(struct sde_encoder_phys *phys_enc)
218{
219 struct sde_encoder_phys_wb *wb_enc = to_sde_encoder_phys_wb(phys_enc);
220 struct sde_hw_wb *hw_wb = wb_enc->hw_wb;
221 struct sde_hw_intf_cfg *intf_cfg = &wb_enc->intf_cfg;
222
223 memset(intf_cfg, 0, sizeof(struct sde_hw_intf_cfg));
224
225 intf_cfg->intf = SDE_NONE;
226 intf_cfg->wb = hw_wb->idx;
227
228 if (phys_enc->hw_ctl->ops.setup_intf_cfg)
229 phys_enc->hw_ctl->ops.setup_intf_cfg(phys_enc->hw_ctl,
230 intf_cfg);
231}
232
233/**
234 * sde_encoder_phys_wb_atomic_check - verify and fixup given atomic states
235 * @phys_enc: Pointer to physical encoder
236 * @crtc_state: Pointer to CRTC atomic state
237 * @conn_state: Pointer to connector atomic state
238 */
239static int sde_encoder_phys_wb_atomic_check(
240 struct sde_encoder_phys *phys_enc,
241 struct drm_crtc_state *crtc_state,
242 struct drm_connector_state *conn_state)
243{
244 struct sde_encoder_phys_wb *wb_enc = to_sde_encoder_phys_wb(phys_enc);
245 struct sde_hw_wb *hw_wb = wb_enc->hw_wb;
246 const struct sde_wb_cfg *wb_cfg = hw_wb->caps;
247 struct drm_framebuffer *fb;
248 const struct sde_format *fmt;
249 struct sde_rect wb_roi;
250 const struct drm_display_mode *mode = &crtc_state->mode;
251 int rc;
252
253 SDE_DEBUG("[atomic_check:%d,%d,\"%s\",%d,%d]\n",
254 hw_wb->idx - WB_0, mode->base.id, mode->name,
255 mode->hdisplay, mode->vdisplay);
256
257 memset(&wb_roi, 0, sizeof(struct sde_rect));
258
259 rc = sde_wb_connector_state_get_output_roi(conn_state, &wb_roi);
260 if (rc) {
261 SDE_ERROR("failed to get roi %d\n", rc);
262 return rc;
263 }
264
265 SDE_DEBUG("[roi:%u,%u,%u,%u]\n", wb_roi.x, wb_roi.y,
266 wb_roi.w, wb_roi.h);
267
268 fb = sde_wb_connector_state_get_output_fb(conn_state);
269 if (!fb) {
270 SDE_ERROR("no output framebuffer\n");
271 return -EINVAL;
272 }
273
274 SDE_DEBUG("[fb_id:%u][fb:%u,%u]\n", fb->base.id,
275 fb->width, fb->height);
276
277 fmt = sde_get_sde_format_ext(fb->pixel_format, fb->modifier,
278 drm_format_num_planes(fb->pixel_format));
279 if (!fmt) {
280 SDE_ERROR("unsupported output pixel format:%d\n",
281 fb->pixel_format);
282 return -EINVAL;
283 }
284
285 SDE_DEBUG("[fb_fmt:%x,%llx]\n", fb->pixel_format,
286 fb->modifier[0]);
287
288 if (SDE_FORMAT_IS_YUV(fmt) &&
289 !(wb_cfg->features & BIT(SDE_WB_YUV_CONFIG))) {
290 SDE_ERROR("invalid output format %x\n", fmt->base.pixel_format);
291 return -EINVAL;
292 }
293
294 if (SDE_FORMAT_IS_UBWC(fmt) &&
295 !(wb_cfg->features & BIT(SDE_WB_UBWC_1_0))) {
296 SDE_ERROR("invalid output format %x\n", fmt->base.pixel_format);
297 return -EINVAL;
298 }
299
300 if (wb_roi.w && wb_roi.h) {
301 if (wb_roi.w != mode->hdisplay) {
302 SDE_ERROR("invalid roi w=%d, mode w=%d\n", wb_roi.w,
303 mode->hdisplay);
304 return -EINVAL;
305 } else if (wb_roi.h != mode->vdisplay) {
306 SDE_ERROR("invalid roi h=%d, mode h=%d\n", wb_roi.h,
307 mode->vdisplay);
308 return -EINVAL;
309 } else if (wb_roi.x + wb_roi.w > fb->width) {
310 SDE_ERROR("invalid roi x=%d, w=%d, fb w=%d\n",
311 wb_roi.x, wb_roi.w, fb->width);
312 return -EINVAL;
313 } else if (wb_roi.y + wb_roi.h > fb->height) {
314 SDE_ERROR("invalid roi y=%d, h=%d, fb h=%d\n",
315 wb_roi.y, wb_roi.h, fb->height);
316 return -EINVAL;
317 } else if (wb_roi.w > wb_cfg->sblk->maxlinewidth) {
318 SDE_ERROR("invalid roi w=%d, maxlinewidth=%u\n",
319 wb_roi.w, wb_cfg->sblk->maxlinewidth);
320 return -EINVAL;
321 }
322 } else {
323 if (wb_roi.x || wb_roi.y) {
324 SDE_ERROR("invalid roi x=%d, y=%d\n",
325 wb_roi.x, wb_roi.y);
326 return -EINVAL;
327 } else if (fb->width != mode->hdisplay) {
328 SDE_ERROR("invalid fb w=%d, mode w=%d\n", fb->width,
329 mode->hdisplay);
330 return -EINVAL;
331 } else if (fb->height != mode->vdisplay) {
332 SDE_ERROR("invalid fb h=%d, mode h=%d\n", fb->height,
333 mode->vdisplay);
334 return -EINVAL;
335 } else if (fb->width > wb_cfg->sblk->maxlinewidth) {
336 SDE_ERROR("invalid fb w=%d, maxlinewidth=%u\n",
337 fb->width, wb_cfg->sblk->maxlinewidth);
338 return -EINVAL;
339 }
340 }
341
342 return 0;
343}
344
345/**
346 * sde_encoder_phys_wb_flush - flush hardware update
347 * @phys_enc: Pointer to physical encoder
348 */
349static void sde_encoder_phys_wb_flush(struct sde_encoder_phys *phys_enc)
350{
351 struct sde_encoder_phys_wb *wb_enc = to_sde_encoder_phys_wb(phys_enc);
352 struct sde_hw_wb *hw_wb = wb_enc->hw_wb;
353 struct sde_hw_ctl *hw_ctl = phys_enc->hw_ctl;
354 struct sde_hw_cdm *hw_cdm = phys_enc->hw_cdm;
355 u32 flush_mask = 0;
356
357 SDE_DEBUG("[wb:%d]\n", hw_wb->idx - WB_0);
358
359 if (hw_ctl->ops.get_bitmask_wb)
360 hw_ctl->ops.get_bitmask_wb(hw_ctl, &flush_mask, hw_wb->idx);
361
362 if (hw_ctl->ops.get_bitmask_cdm && hw_cdm)
363 hw_ctl->ops.get_bitmask_cdm(hw_ctl, &flush_mask, hw_cdm->idx);
364
365 if (hw_ctl->ops.update_pending_flush)
366 hw_ctl->ops.update_pending_flush(hw_ctl, flush_mask);
367
368 SDE_DEBUG("Flushing CTL_ID %d, flush_mask %x, WB %d\n",
369 hw_ctl->idx - CTL_0, flush_mask, hw_wb->idx - WB_0);
370}
371
372/**
373 * sde_encoder_phys_wb_setup - setup writeback encoder
374 * @phys_enc: Pointer to physical encoder
375 */
376static void sde_encoder_phys_wb_setup(
377 struct sde_encoder_phys *phys_enc)
378{
379 struct sde_encoder_phys_wb *wb_enc = to_sde_encoder_phys_wb(phys_enc);
380 struct sde_hw_wb *hw_wb = wb_enc->hw_wb;
381 struct drm_display_mode mode = phys_enc->cached_mode;
382 struct drm_framebuffer *fb;
383 struct sde_rect *wb_roi = &wb_enc->wb_roi;
384
385 SDE_DEBUG("[mode_set:%d,%d,\"%s\",%d,%d]\n",
386 hw_wb->idx - WB_0, mode.base.id, mode.name,
387 mode.hdisplay, mode.vdisplay);
388
389 memset(wb_roi, 0, sizeof(struct sde_rect));
390
391 fb = sde_wb_get_output_fb(wb_enc->wb_dev);
392 if (!fb) {
393 SDE_DEBUG("no output framebuffer\n");
394 return;
395 }
396
397 SDE_DEBUG("[fb_id:%u][fb:%u,%u]\n", fb->base.id,
398 fb->width, fb->height);
399
400 sde_wb_get_output_roi(wb_enc->wb_dev, wb_roi);
401 if (wb_roi->w == 0 || wb_roi->h == 0) {
402 wb_roi->x = 0;
403 wb_roi->y = 0;
404 wb_roi->w = fb->width;
405 wb_roi->h = fb->height;
406 }
407
408 SDE_DEBUG("[roi:%u,%u,%u,%u]\n", wb_roi->x, wb_roi->y,
409 wb_roi->w, wb_roi->h);
410
411 wb_enc->wb_fmt = sde_get_sde_format_ext(fb->pixel_format, fb->modifier,
412 drm_format_num_planes(fb->pixel_format));
413 if (!wb_enc->wb_fmt) {
414 SDE_ERROR("unsupported output pixel format: %d\n",
415 fb->pixel_format);
416 return;
417 }
418
419 SDE_DEBUG("[fb_fmt:%x,%llx]\n", fb->pixel_format,
420 fb->modifier[0]);
421
422 sde_encoder_phys_wb_set_traffic_shaper(phys_enc);
423
424 sde_encoder_phys_setup_cdm(phys_enc, fb, wb_enc->wb_fmt, wb_roi);
425
426 sde_encoder_phys_wb_setup_fb(phys_enc, fb, wb_roi);
427
428 sde_encoder_phys_wb_setup_cdp(phys_enc);
429}
430
431/**
432 * sde_encoder_phys_wb_unregister_irq - unregister writeback interrupt handler
433 * @phys_enc: Pointer to physical encoder
434 */
435static int sde_encoder_phys_wb_unregister_irq(
436 struct sde_encoder_phys *phys_enc)
437{
438 struct sde_encoder_phys_wb *wb_enc = to_sde_encoder_phys_wb(phys_enc);
439 struct sde_hw_wb *hw_wb = wb_enc->hw_wb;
440
441 if (wb_enc->bypass_irqreg)
442 return 0;
443
444 sde_disable_irq(phys_enc->sde_kms, &wb_enc->irq_idx, 1);
445 sde_register_irq_callback(phys_enc->sde_kms, wb_enc->irq_idx, NULL);
446
447 SDE_DEBUG("un-register IRQ for wb %d, irq_idx=%d\n",
448 hw_wb->idx - WB_0,
449 wb_enc->irq_idx);
450
451 return 0;
452}
453
454/**
455 * sde_encoder_phys_wb_done_irq - writeback interrupt handler
456 * @arg: Pointer to writeback encoder
457 * @irq_idx: interrupt index
458 */
459static void sde_encoder_phys_wb_done_irq(void *arg, int irq_idx)
460{
461 struct sde_encoder_phys_wb *wb_enc = arg;
462 struct sde_encoder_phys *phys_enc = &wb_enc->base;
463 struct sde_hw_wb *hw_wb = wb_enc->hw_wb;
464
465 SDE_DEBUG("[wb:%d,%u]\n", hw_wb->idx - WB_0,
466 wb_enc->frame_count);
467
468 complete_all(&wb_enc->wbdone_complete);
469
470 phys_enc->parent_ops.handle_vblank_virt(phys_enc->parent);
471}
472
473/**
474 * sde_encoder_phys_wb_register_irq - register writeback interrupt handler
475 * @phys_enc: Pointer to physical encoder
476 */
477static int sde_encoder_phys_wb_register_irq(struct sde_encoder_phys *phys_enc)
478{
479 struct sde_encoder_phys_wb *wb_enc = to_sde_encoder_phys_wb(phys_enc);
480 struct sde_hw_wb *hw_wb = wb_enc->hw_wb;
481 struct sde_irq_callback irq_cb;
482 enum sde_intr_type intr_type;
483 int ret = 0;
484
485 if (wb_enc->bypass_irqreg)
486 return 0;
487
488 intr_type = sde_encoder_phys_wb_get_intr_type(hw_wb);
489 wb_enc->irq_idx = sde_irq_idx_lookup(phys_enc->sde_kms,
490 intr_type, hw_wb->idx);
491 if (wb_enc->irq_idx < 0) {
492 SDE_ERROR(
493 "failed to lookup IRQ index for WB_DONE with wb=%d\n",
494 hw_wb->idx - WB_0);
495 return -EINVAL;
496 }
497
498 irq_cb.func = sde_encoder_phys_wb_done_irq;
499 irq_cb.arg = wb_enc;
500 ret = sde_register_irq_callback(phys_enc->sde_kms, wb_enc->irq_idx,
501 &irq_cb);
502 if (ret) {
503 SDE_ERROR("failed to register IRQ callback WB_DONE\n");
504 return ret;
505 }
506
507 ret = sde_enable_irq(phys_enc->sde_kms, &wb_enc->irq_idx, 1);
508 if (ret) {
509 SDE_ERROR(
510 "failed to enable IRQ for WB_DONE, wb %d, irq_idx=%d\n",
511 hw_wb->idx - WB_0,
512 wb_enc->irq_idx);
513 wb_enc->irq_idx = -EINVAL;
514
515 /* Unregister callback on IRQ enable failure */
516 sde_register_irq_callback(phys_enc->sde_kms, wb_enc->irq_idx,
517 NULL);
518 return ret;
519 }
520
521 SDE_DEBUG("registered IRQ for wb %d, irq_idx=%d\n",
522 hw_wb->idx - WB_0,
523 wb_enc->irq_idx);
524
525 return ret;
526}
527
528/**
529 * sde_encoder_phys_wb_mode_set - set display mode
530 * @phys_enc: Pointer to physical encoder
531 * @mode: Pointer to requested display mode
532 * @adj_mode: Pointer to adjusted display mode
533 */
534static void sde_encoder_phys_wb_mode_set(
535 struct sde_encoder_phys *phys_enc,
536 struct drm_display_mode *mode,
537 struct drm_display_mode *adj_mode)
538{
539 struct sde_encoder_phys_wb *wb_enc = to_sde_encoder_phys_wb(phys_enc);
540 struct sde_hw_wb *hw_wb = wb_enc->hw_wb;
541
542 phys_enc->cached_mode = *adj_mode;
543
544 SDE_DEBUG("[mode_set_cache:%d,%d,\"%s\",%d,%d]\n",
545 hw_wb->idx - WB_0, mode->base.id,
546 mode->name, mode->hdisplay, mode->vdisplay);
547}
548
549/**
550 * sde_encoder_phys_wb_control_vblank_irq - Control vblank interrupt
551 * @phys_enc: Pointer to physical encoder
552 * @enable: Enable interrupt
553 */
554static int sde_encoder_phys_wb_control_vblank_irq(
555 struct sde_encoder_phys *phys_enc,
556 bool enable)
557{
558 struct sde_encoder_phys_wb *wb_enc = to_sde_encoder_phys_wb(phys_enc);
559 struct sde_hw_wb *hw_wb = wb_enc->hw_wb;
560 int ret = 0;
561
562 SDE_DEBUG("[wb:%d,%d]\n", hw_wb->idx - WB_0, enable);
563
564 if (enable)
565 ret = sde_encoder_phys_wb_register_irq(phys_enc);
566 else
567 ret = sde_encoder_phys_wb_unregister_irq(phys_enc);
568
569 if (ret)
570 SDE_ERROR("control vblank irq error %d, enable %d\n", ret,
571 enable);
572
573 return ret;
574}
575
576/**
577 * sde_encoder_phys_wb_wait_for_commit_done - wait until request is committed
578 * @phys_enc: Pointer to physical encoder
579 */
580static int sde_encoder_phys_wb_wait_for_commit_done(
581 struct sde_encoder_phys *phys_enc)
582{
583 unsigned long ret;
584 struct sde_encoder_phys_wb *wb_enc = to_sde_encoder_phys_wb(phys_enc);
585 u32 irq_status;
586 u64 wb_time = 0;
587 int rc = 0;
588
589 /* Return EWOULDBLOCK since we know the wait isn't necessary */
590 if (WARN_ON(phys_enc->enable_state != SDE_ENC_ENABLED))
591 return -EWOULDBLOCK;
592
593 MSM_EVT(DEV(phys_enc), wb_enc->frame_count, 0);
594
595 ret = wait_for_completion_timeout(&wb_enc->wbdone_complete,
596 msecs_to_jiffies(wb_enc->wbdone_timeout));
597
598 if (!ret) {
599 MSM_EVT(DEV(phys_enc), wb_enc->frame_count, 0);
600
601 irq_status = sde_read_irq(phys_enc->sde_kms,
602 wb_enc->irq_idx, true);
603 if (irq_status) {
604 SDE_DEBUG("wb:%d done but irq not triggered\n",
605 wb_enc->wb_dev->wb_idx - WB_0);
606 sde_encoder_phys_wb_done_irq(wb_enc, wb_enc->irq_idx);
607 } else {
608 SDE_ERROR("wb:%d kickoff timed out\n",
609 wb_enc->wb_dev->wb_idx - WB_0);
610 rc = -ETIMEDOUT;
611 }
612 }
613
614 sde_encoder_phys_wb_unregister_irq(phys_enc);
615
616 if (!rc)
617 wb_enc->end_time = ktime_get();
618
619 /* once operation is done, disable traffic shaper */
620 if (wb_enc->wb_cfg.ts_cfg.en && wb_enc->hw_wb &&
621 wb_enc->hw_wb->ops.setup_trafficshaper) {
622 wb_enc->wb_cfg.ts_cfg.en = false;
623 wb_enc->hw_wb->ops.setup_trafficshaper(
624 wb_enc->hw_wb, &wb_enc->wb_cfg);
625 }
626
627 /* remove vote for iommu/clk/bus */
628 wb_enc->frame_count++;
629
630 if (!rc) {
631 wb_time = (u64)ktime_to_us(wb_enc->end_time) -
632 (u64)ktime_to_us(wb_enc->start_time);
633 SDE_DEBUG("wb:%d took %llu us\n",
634 wb_enc->wb_dev->wb_idx - WB_0, wb_time);
635 }
636
637 MSM_EVT(DEV(phys_enc), wb_enc->frame_count, wb_time);
638
639 return rc;
640}
641
642/**
643 * sde_encoder_phys_wb_prepare_for_kickoff - pre-kickoff processing
644 * @phys_enc: Pointer to physical encoder
645 * @need_to_wait: Wait for next submission
646 */
647static void sde_encoder_phys_wb_prepare_for_kickoff(
648 struct sde_encoder_phys *phys_enc,
649 bool *need_to_wait)
650{
651 struct sde_encoder_phys_wb *wb_enc = to_sde_encoder_phys_wb(phys_enc);
652 int ret;
653
654 SDE_DEBUG("[wb:%d,%u]\n", wb_enc->hw_wb->idx - WB_0,
655 wb_enc->kickoff_count);
656
657 *need_to_wait = false;
658
659 reinit_completion(&wb_enc->wbdone_complete);
660
661 ret = sde_encoder_phys_wb_register_irq(phys_enc);
662 if (ret) {
663 SDE_ERROR("failed to register irq %d\n", ret);
664 return;
665 }
666
667 wb_enc->kickoff_count++;
668
669 /* set OT limit & enable traffic shaper */
670 sde_encoder_phys_wb_setup(phys_enc);
671
672 sde_encoder_phys_wb_flush(phys_enc);
673
674 /* vote for iommu/clk/bus */
675 wb_enc->start_time = ktime_get();
676
677 MSM_EVT(DEV(phys_enc), *need_to_wait, wb_enc->kickoff_count);
678}
679
680/**
681 * sde_encoder_phys_wb_handle_post_kickoff - post-kickoff processing
682 * @phys_enc: Pointer to physical encoder
683 */
684static void sde_encoder_phys_wb_handle_post_kickoff(
685 struct sde_encoder_phys *phys_enc)
686{
687 struct sde_encoder_phys_wb *wb_enc = to_sde_encoder_phys_wb(phys_enc);
688
689 SDE_DEBUG("[wb:%d]\n", wb_enc->hw_wb->idx - WB_0);
690
691 MSM_EVT(DEV(phys_enc), 0, 0);
692}
693
694/**
695 * sde_encoder_phys_wb_enable - enable writeback encoder
696 * @phys_enc: Pointer to physical encoder
697 */
698static void sde_encoder_phys_wb_enable(struct sde_encoder_phys *phys_enc)
699{
700 struct sde_encoder_phys_wb *wb_enc = to_sde_encoder_phys_wb(phys_enc);
701 struct sde_hw_wb *hw_wb = wb_enc->hw_wb;
702 struct drm_connector *connector;
703
704 SDE_DEBUG("[wb:%d]\n", hw_wb->idx - WB_0);
705
706 /* find associated writeback connector */
707 drm_for_each_connector(connector, phys_enc->parent->dev) {
708 if (connector->encoder == phys_enc->parent)
709 break;
710 }
711 if (!connector || connector->encoder != phys_enc->parent) {
712 SDE_ERROR("failed to find writeback connector\n");
713 return;
714 }
715 wb_enc->wb_dev = sde_wb_connector_get_wb(connector);
716
717 phys_enc->enable_state = SDE_ENC_ENABLED;
718}
719
720/**
721 * sde_encoder_phys_wb_disable - disable writeback encoder
722 * @phys_enc: Pointer to physical encoder
723 */
724static void sde_encoder_phys_wb_disable(struct sde_encoder_phys *phys_enc)
725{
726 struct sde_encoder_phys_wb *wb_enc = to_sde_encoder_phys_wb(phys_enc);
727 struct sde_hw_wb *hw_wb = wb_enc->hw_wb;
728
729 SDE_DEBUG("[wb:%d]\n", hw_wb->idx - WB_0);
730
731 if (phys_enc->enable_state == SDE_ENC_DISABLED) {
732 SDE_ERROR("encoder is already disabled\n");
733 return;
734 }
735
736 if (wb_enc->frame_count != wb_enc->kickoff_count) {
737 SDE_DEBUG("[wait_for_done: wb:%d, frame:%u, kickoff:%u]\n",
738 hw_wb->idx - WB_0, wb_enc->frame_count,
739 wb_enc->kickoff_count);
740 sde_encoder_phys_wb_wait_for_commit_done(phys_enc);
741 }
742
743 phys_enc->enable_state = SDE_ENC_DISABLED;
744}
745
746/**
747 * sde_encoder_phys_wb_get_hw_resources - get hardware resources
748 * @phys_enc: Pointer to physical encoder
749 * @hw_res: Pointer to encoder resources
750 */
751static void sde_encoder_phys_wb_get_hw_resources(
752 struct sde_encoder_phys *phys_enc,
753 struct sde_encoder_hw_resources *hw_res)
754{
755 struct sde_encoder_phys_wb *wb_enc = to_sde_encoder_phys_wb(phys_enc);
756 struct sde_hw_wb *hw_wb = wb_enc->hw_wb;
757 const struct sde_hw_res_map *hw_res_map;
758
759 SDE_DEBUG("[wb:%d]\n", hw_wb->idx - WB_0);
760
761 hw_res->wbs[hw_wb->idx] = INTF_MODE_WB_LINE;
762
763 /*
764 * Validate if we want to use the default map
765 * defaults should not be in use,
766 * otherwise signal/return failure
767 */
768 hw_res_map = sde_rm_get_res_map(phys_enc->sde_kms,
769 SDE_NONE, hw_wb->idx);
770 if (IS_ERR_OR_NULL(hw_res_map)) {
771 SDE_ERROR("failed to get hw_res_map: %ld\n",
772 PTR_ERR(hw_res_map));
773 return;
774 }
775
776 /*
777 * cached ctl_idx at init time, shouldn't we use that?
778 */
779 hw_res->ctls[hw_res_map->ctl] = true;
Lloyd Atkinsone7bcdd22016-08-11 10:53:37 -0400780
781}
782/**
783 * sde_encoder_phys_wb_needs_ctl_start - Whether encoder needs ctl_start
784 * @phys_enc: Pointer to physical encoder
785 * @Return: Whether encoder needs ctl_start
786 */
787static bool sde_encoder_phys_wb_needs_ctl_start(
788 struct sde_encoder_phys *phys_enc)
789{
790 return true;
Alan Kwongbb27c092016-07-20 16:41:25 -0400791}
792
793#ifdef CONFIG_DEBUG_FS
794/**
795 * sde_encoder_phys_wb_init_debugfs - initialize writeback encoder debugfs
796 * @phys_enc: Pointer to physical encoder
797 * @sde_kms: Pointer to SDE KMS object
798 */
799static int sde_encoder_phys_wb_init_debugfs(
800 struct sde_encoder_phys *phys_enc, struct sde_kms *kms)
801{
802 struct sde_encoder_phys_wb *wb_enc = to_sde_encoder_phys_wb(phys_enc);
803
804 if (!phys_enc || !kms || !wb_enc->hw_wb)
805 return -EINVAL;
806
807 snprintf(wb_enc->wb_name, ARRAY_SIZE(wb_enc->wb_name), "encoder_wb%d",
808 wb_enc->hw_wb->idx - WB_0);
809
810 wb_enc->debugfs_root =
811 debugfs_create_dir(wb_enc->wb_name,
812 sde_debugfs_get_root(kms));
813 if (!wb_enc->debugfs_root) {
814 SDE_ERROR("failed to create debugfs\n");
815 return -ENOMEM;
816 }
817
818 if (!debugfs_create_u32("wbdone_timeout", 0644,
819 wb_enc->debugfs_root, &wb_enc->wbdone_timeout)) {
820 SDE_ERROR("failed to create debugfs/wbdone_timeout\n");
821 return -ENOMEM;
822 }
823
824 if (!debugfs_create_u32("bypass_irqreg", 0644,
825 wb_enc->debugfs_root, &wb_enc->bypass_irqreg)) {
826 SDE_ERROR("failed to create debugfs/bypass_irqreg\n");
827 return -ENOMEM;
828 }
829
830 return 0;
831}
832
833/**
834 * sde_encoder_phys_wb_destroy_debugfs - destroy writeback encoder debugfs
835 * @phys_enc: Pointer to physical encoder
836 */
837static void sde_encoder_phys_wb_destroy_debugfs(
838 struct sde_encoder_phys *phys_enc)
839{
840 struct sde_encoder_phys_wb *wb_enc = to_sde_encoder_phys_wb(phys_enc);
841
842 if (!phys_enc)
843 return;
844
845 debugfs_remove_recursive(wb_enc->debugfs_root);
846}
847#else
848static void sde_encoder_phys_wb_init_debugfs(
849 struct sde_encoder_phys *phys_enc, struct sde_kms *kms)
850{
851}
852static void sde_encoder_phys_wb_destroy_debugfs(
853 struct sde_encoder_phys *phys_enc)
854{
855}
856#endif
857
858/**
859 * sde_encoder_phys_wb_destroy - destroy writeback encoder
860 * @phys_enc: Pointer to physical encoder
861 */
862static void sde_encoder_phys_wb_destroy(struct sde_encoder_phys *phys_enc)
863{
864 struct sde_encoder_phys_wb *wb_enc = to_sde_encoder_phys_wb(phys_enc);
865 struct sde_hw_wb *hw_wb = wb_enc->hw_wb;
866
867 SDE_DEBUG("[wb:%d]\n", hw_wb->idx - WB_0);
868
869 if (!phys_enc)
870 return;
871
872 sde_encoder_phys_wb_destroy_debugfs(phys_enc);
873
874 if (phys_enc->hw_ctl)
875 sde_rm_release_ctl_path(phys_enc->sde_kms,
876 phys_enc->hw_ctl->idx);
877 if (phys_enc->hw_cdm)
878 sde_rm_release_cdm_path(phys_enc->sde_kms,
879 phys_enc->hw_cdm->idx);
880 if (hw_wb)
881 sde_hw_wb_destroy(hw_wb);
882 if (phys_enc->hw_mdptop)
883 sde_hw_mdp_destroy(phys_enc->hw_mdptop);
884
885 kfree(wb_enc);
886}
887
888/**
889 * sde_encoder_phys_wb_init_ops - initialize writeback operations
890 * @ops: Pointer to encoder operation table
891 */
892static void sde_encoder_phys_wb_init_ops(struct sde_encoder_phys_ops *ops)
893{
Lloyd Atkinsone7bcdd22016-08-11 10:53:37 -0400894 ops->is_master = sde_encoder_phys_wb_is_master;
Alan Kwongbb27c092016-07-20 16:41:25 -0400895 ops->mode_set = sde_encoder_phys_wb_mode_set;
896 ops->enable = sde_encoder_phys_wb_enable;
897 ops->disable = sde_encoder_phys_wb_disable;
898 ops->destroy = sde_encoder_phys_wb_destroy;
899 ops->atomic_check = sde_encoder_phys_wb_atomic_check;
900 ops->get_hw_resources = sde_encoder_phys_wb_get_hw_resources;
901 ops->control_vblank_irq = sde_encoder_phys_wb_control_vblank_irq;
902 ops->wait_for_commit_done = sde_encoder_phys_wb_wait_for_commit_done;
903 ops->prepare_for_kickoff = sde_encoder_phys_wb_prepare_for_kickoff;
904 ops->handle_post_kickoff = sde_encoder_phys_wb_handle_post_kickoff;
Lloyd Atkinsone7bcdd22016-08-11 10:53:37 -0400905 ops->needs_ctl_start = sde_encoder_phys_wb_needs_ctl_start;
Alan Kwongbb27c092016-07-20 16:41:25 -0400906}
907
908/**
909 * sde_encoder_phys_wb_init - initialize writeback encoder
Lloyd Atkinson6ef6cb52016-07-06 11:49:18 -0400910 * @init: Pointer to init info structure with initialization params
Alan Kwongbb27c092016-07-20 16:41:25 -0400911 */
912struct sde_encoder_phys *sde_encoder_phys_wb_init(
Lloyd Atkinson6ef6cb52016-07-06 11:49:18 -0400913 struct sde_enc_phys_init_params *p)
Alan Kwongbb27c092016-07-20 16:41:25 -0400914{
915 struct sde_encoder_phys *phys_enc;
916 struct sde_encoder_phys_wb *wb_enc;
917 struct sde_hw_mdp *hw_mdp;
918 int ret = 0;
919
920 SDE_DEBUG("\n");
921
922 wb_enc = kzalloc(sizeof(*wb_enc), GFP_KERNEL);
923 if (!wb_enc) {
924 ret = -ENOMEM;
925 goto fail_alloc;
926 }
927 wb_enc->irq_idx = -EINVAL;
928 wb_enc->wbdone_timeout = WAIT_TIMEOUT_MSEC;
929 init_completion(&wb_enc->wbdone_complete);
930
931 phys_enc = &wb_enc->base;
932
Lloyd Atkinson6ef6cb52016-07-06 11:49:18 -0400933 if (p->sde_kms->vbif[VBIF_NRT]) {
Alan Kwongbb27c092016-07-20 16:41:25 -0400934 wb_enc->mmu_id[SDE_IOMMU_DOMAIN_UNSECURE] =
Lloyd Atkinson6ef6cb52016-07-06 11:49:18 -0400935 p->sde_kms->mmu_id[MSM_SMMU_DOMAIN_NRT_UNSECURE];
Alan Kwongbb27c092016-07-20 16:41:25 -0400936 wb_enc->mmu_id[SDE_IOMMU_DOMAIN_SECURE] =
Lloyd Atkinson6ef6cb52016-07-06 11:49:18 -0400937 p->sde_kms->mmu_id[MSM_SMMU_DOMAIN_NRT_SECURE];
Alan Kwongbb27c092016-07-20 16:41:25 -0400938 } else {
939 wb_enc->mmu_id[SDE_IOMMU_DOMAIN_UNSECURE] =
Lloyd Atkinson6ef6cb52016-07-06 11:49:18 -0400940 p->sde_kms->mmu_id[MSM_SMMU_DOMAIN_UNSECURE];
Alan Kwongbb27c092016-07-20 16:41:25 -0400941 wb_enc->mmu_id[SDE_IOMMU_DOMAIN_SECURE] =
Lloyd Atkinson6ef6cb52016-07-06 11:49:18 -0400942 p->sde_kms->mmu_id[MSM_SMMU_DOMAIN_SECURE];
Alan Kwongbb27c092016-07-20 16:41:25 -0400943 }
944
Lloyd Atkinson6ef6cb52016-07-06 11:49:18 -0400945 hw_mdp = sde_hw_mdptop_init(MDP_TOP, p->sde_kms->mmio,
946 p->sde_kms->catalog);
Alan Kwongbb27c092016-07-20 16:41:25 -0400947 if (IS_ERR_OR_NULL(hw_mdp)) {
948 ret = PTR_ERR(hw_mdp);
949 SDE_ERROR("failed to init hw_top: %d\n", ret);
950 goto fail_mdp_init;
951 }
952 phys_enc->hw_mdptop = hw_mdp;
953
Lloyd Atkinson6ef6cb52016-07-06 11:49:18 -0400954 if (p->wb_idx != SDE_NONE) {
Alan Kwongbb27c092016-07-20 16:41:25 -0400955 struct sde_hw_wb *hw_wb;
956
Lloyd Atkinson6ef6cb52016-07-06 11:49:18 -0400957 hw_wb = sde_hw_wb_init(p->wb_idx, p->sde_kms->mmio,
958 p->sde_kms->catalog, phys_enc->hw_mdptop);
Alan Kwongbb27c092016-07-20 16:41:25 -0400959 if (IS_ERR_OR_NULL(hw_wb)) {
960 ret = PTR_ERR(hw_wb);
961 SDE_ERROR("failed to init hw_wb%d: %d\n",
Lloyd Atkinson6ef6cb52016-07-06 11:49:18 -0400962 p->wb_idx - WB_0, ret);
Alan Kwongbb27c092016-07-20 16:41:25 -0400963 goto fail_wb_init;
964 }
965 wb_enc->hw_wb = hw_wb;
966 } else {
967 ret = -EINVAL;
968 SDE_ERROR("invalid wb_idx\n");
969 goto fail_wb_check;
970 }
971
Lloyd Atkinson6ef6cb52016-07-06 11:49:18 -0400972 if (p->cdm_idx != SDE_NONE) {
Alan Kwongbb27c092016-07-20 16:41:25 -0400973 struct sde_hw_cdm *hw_cdm;
974
Lloyd Atkinson6ef6cb52016-07-06 11:49:18 -0400975 SDE_DEBUG("Acquiring CDM %d\n", p->cdm_idx - CDM_0);
976 hw_cdm = sde_rm_acquire_cdm_path(p->sde_kms, p->cdm_idx,
Alan Kwongbb27c092016-07-20 16:41:25 -0400977 phys_enc->hw_mdptop);
978 if (IS_ERR_OR_NULL(hw_cdm)) {
979 ret = PTR_ERR(hw_cdm);
980 SDE_ERROR("failed to init hw_cdm%d: %d\n",
Lloyd Atkinson6ef6cb52016-07-06 11:49:18 -0400981 p->cdm_idx - CDM_0, ret);
Alan Kwongbb27c092016-07-20 16:41:25 -0400982 goto fail_cdm_init;
983 }
984 phys_enc->hw_cdm = hw_cdm;
985 }
986
Lloyd Atkinson6ef6cb52016-07-06 11:49:18 -0400987 if (p->ctl_idx != SDE_NONE) {
Alan Kwongbb27c092016-07-20 16:41:25 -0400988 struct sde_hw_ctl *hw_ctl;
989
Lloyd Atkinson6ef6cb52016-07-06 11:49:18 -0400990 SDE_DEBUG("Acquiring CTL %d\n", p->ctl_idx - CTL_0);
991 hw_ctl = sde_rm_acquire_ctl_path(p->sde_kms, p->ctl_idx);
Alan Kwongbb27c092016-07-20 16:41:25 -0400992 if (IS_ERR_OR_NULL(hw_ctl)) {
993 ret = PTR_ERR(hw_ctl);
994 SDE_ERROR("failed to init hw_ctl%d: %d\n",
Lloyd Atkinson6ef6cb52016-07-06 11:49:18 -0400995 p->ctl_idx - CTL_0, ret);
Alan Kwongbb27c092016-07-20 16:41:25 -0400996 goto fail_ctl_init;
997 }
998 phys_enc->hw_ctl = hw_ctl;
999 } else {
1000 ret = -EINVAL;
1001 SDE_ERROR("invalid ctl_idx\n");
1002 goto fail_ctl_check;
1003 }
1004
1005 sde_encoder_phys_wb_init_ops(&phys_enc->ops);
Lloyd Atkinson6ef6cb52016-07-06 11:49:18 -04001006 phys_enc->parent = p->parent;
1007 phys_enc->parent_ops = p->parent_ops;
1008 phys_enc->sde_kms = p->sde_kms;
1009 phys_enc->split_role = p->split_role;
Alan Kwongbb27c092016-07-20 16:41:25 -04001010 spin_lock_init(&phys_enc->spin_lock);
1011
Lloyd Atkinson6ef6cb52016-07-06 11:49:18 -04001012 ret = sde_encoder_phys_wb_init_debugfs(phys_enc, p->sde_kms);
Alan Kwongbb27c092016-07-20 16:41:25 -04001013 if (ret) {
1014 SDE_ERROR("failed to init debugfs %d\n", ret);
1015 goto fail_debugfs_init;
1016 }
1017
1018 SDE_DEBUG("Created sde_encoder_phys_wb for wb %d\n",
1019 wb_enc->hw_wb->idx - WB_0);
1020
1021 return phys_enc;
1022
1023fail_debugfs_init:
Lloyd Atkinson6ef6cb52016-07-06 11:49:18 -04001024 sde_rm_release_ctl_path(p->sde_kms, p->ctl_idx);
Alan Kwongbb27c092016-07-20 16:41:25 -04001025fail_ctl_init:
1026fail_ctl_check:
Lloyd Atkinson6ef6cb52016-07-06 11:49:18 -04001027 sde_rm_release_cdm_path(p->sde_kms, p->cdm_idx);
Alan Kwongbb27c092016-07-20 16:41:25 -04001028fail_cdm_init:
1029 sde_hw_wb_destroy(wb_enc->hw_wb);
1030fail_wb_init:
1031fail_wb_check:
1032 sde_hw_mdp_destroy(phys_enc->hw_mdptop);
1033fail_mdp_init:
1034 kfree(wb_enc);
1035fail_alloc:
1036 return ERR_PTR(ret);
1037}
1038