Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1 | /* |
| 2 | * Copyright (c) 2017, The Linux foundation. All rights reserved. |
| 3 | * |
| 4 | * This program is free software; you can redistribute it and/or modify |
| 5 | * it under the terms of the GNU General Public License version 2 and |
| 6 | * only version 2 as published by the Free Software Foundation. |
| 7 | * |
| 8 | * This program is distributed in the hope that it will be useful, |
| 9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 11 | * GNU General Public License for more details. |
| 12 | */ |
| 13 | |
| 14 | #include <linux/bitmap.h> |
| 15 | #include <linux/bitops.h> |
| 16 | #include <linux/debugfs.h> |
| 17 | #include <linux/delay.h> |
| 18 | #include <linux/console.h> |
| 19 | #include <linux/io.h> |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 20 | #include <linux/ipc_logging.h> |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 21 | #include <linux/module.h> |
| 22 | #include <linux/of.h> |
| 23 | #include <linux/of_device.h> |
| 24 | #include <linux/platform_device.h> |
Karthikeyan Ramasubramanian | 9d88c72 | 2017-04-06 16:04:39 -0600 | [diff] [blame] | 25 | #include <linux/pm_runtime.h> |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 26 | #include <linux/qcom-geni-se.h> |
| 27 | #include <linux/serial.h> |
| 28 | #include <linux/serial_core.h> |
| 29 | #include <linux/tty.h> |
| 30 | #include <linux/tty_flip.h> |
| 31 | |
| 32 | /* UART specific GENI registers */ |
| 33 | #define SE_UART_LOOPBACK_CFG (0x22C) |
| 34 | #define SE_UART_TX_TRANS_CFG (0x25C) |
| 35 | #define SE_UART_TX_WORD_LEN (0x268) |
| 36 | #define SE_UART_TX_STOP_BIT_LEN (0x26C) |
| 37 | #define SE_UART_TX_TRANS_LEN (0x270) |
| 38 | #define SE_UART_RX_TRANS_CFG (0x280) |
| 39 | #define SE_UART_RX_WORD_LEN (0x28C) |
| 40 | #define SE_UART_RX_STALE_CNT (0x294) |
| 41 | #define SE_UART_TX_PARITY_CFG (0x2A4) |
| 42 | #define SE_UART_RX_PARITY_CFG (0x2A8) |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 43 | #define SE_UART_MANUAL_RFR (0x2AC) |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 44 | |
| 45 | /* SE_UART_LOOPBACK_CFG */ |
| 46 | #define NO_LOOPBACK (0) |
| 47 | #define TX_RX_LOOPBACK (0x1) |
| 48 | #define CTS_RFR_LOOPBACK (0x2) |
| 49 | #define CTSRFR_TXRX_LOOPBACK (0x3) |
| 50 | |
| 51 | /* SE_UART_TRANS_CFG */ |
| 52 | #define UART_TX_PAR_EN (BIT(0)) |
| 53 | #define UART_CTS_MASK (BIT(1)) |
| 54 | |
| 55 | /* SE_UART_TX_WORD_LEN */ |
| 56 | #define TX_WORD_LEN_MSK (GENMASK(9, 0)) |
| 57 | |
| 58 | /* SE_UART_TX_STOP_BIT_LEN */ |
| 59 | #define TX_STOP_BIT_LEN_MSK (GENMASK(23, 0)) |
| 60 | #define TX_STOP_BIT_LEN_1 (0) |
| 61 | #define TX_STOP_BIT_LEN_1_5 (1) |
| 62 | #define TX_STOP_BIT_LEN_2 (2) |
| 63 | |
| 64 | /* SE_UART_TX_TRANS_LEN */ |
| 65 | #define TX_TRANS_LEN_MSK (GENMASK(23, 0)) |
| 66 | |
| 67 | /* SE_UART_RX_TRANS_CFG */ |
| 68 | #define UART_RX_INS_STATUS_BIT (BIT(2)) |
| 69 | #define UART_RX_PAR_EN (BIT(3)) |
| 70 | |
| 71 | /* SE_UART_RX_WORD_LEN */ |
| 72 | #define RX_WORD_LEN_MASK (GENMASK(9, 0)) |
| 73 | |
| 74 | /* SE_UART_RX_STALE_CNT */ |
| 75 | #define RX_STALE_CNT (GENMASK(23, 0)) |
| 76 | |
| 77 | /* SE_UART_TX_PARITY_CFG/RX_PARITY_CFG */ |
| 78 | #define PAR_CALC_EN (BIT(0)) |
| 79 | #define PAR_MODE_MSK (GENMASK(2, 1)) |
| 80 | #define PAR_MODE_SHFT (1) |
| 81 | #define PAR_EVEN (0x00) |
| 82 | #define PAR_ODD (0x01) |
| 83 | #define PAR_SPACE (0x10) |
| 84 | #define PAR_MARK (0x11) |
| 85 | |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 86 | /* SE_UART_MANUAL_RFR register fields */ |
| 87 | #define UART_MANUAL_RFR_EN (BIT(31)) |
| 88 | #define UART_RFR_NOT_READY (BIT(1)) |
| 89 | #define UART_RFR_READY (BIT(0)) |
| 90 | |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 91 | /* UART M_CMD OP codes */ |
| 92 | #define UART_START_TX (0x1) |
| 93 | #define UART_START_BREAK (0x4) |
| 94 | #define UART_STOP_BREAK (0x5) |
| 95 | /* UART S_CMD OP codes */ |
| 96 | #define UART_START_READ (0x1) |
| 97 | #define UART_PARAM (0x1) |
| 98 | |
| 99 | #define UART_OVERSAMPLING (32) |
| 100 | #define STALE_TIMEOUT (16) |
Girish Mahadevan | b1ab172 | 2017-04-27 16:39:11 -0600 | [diff] [blame] | 101 | #define DEFAULT_BITS_PER_CHAR (10) |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 102 | #define GENI_UART_NR_PORTS (15) |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 103 | #define GENI_UART_CONS_PORTS (1) |
Girish Mahadevan | bd9b44f | 2017-04-11 13:11:10 -0600 | [diff] [blame] | 104 | #define DEF_FIFO_DEPTH_WORDS (16) |
Girish Mahadevan | b1ab172 | 2017-04-27 16:39:11 -0600 | [diff] [blame] | 105 | #define DEF_TX_WM (2) |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 106 | #define DEF_FIFO_WIDTH_BITS (32) |
Girish Mahadevan | 3e694cc | 2017-04-19 16:50:03 -0600 | [diff] [blame] | 107 | #define UART_CORE2X_VOTE (10000) |
Girish Mahadevan | 3e694cc | 2017-04-19 16:50:03 -0600 | [diff] [blame] | 108 | |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 109 | #define WAKEBYTE_TIMEOUT_MSEC (2000) |
| 110 | #define IPC_LOG_PWR_PAGES (2) |
| 111 | #define IPC_LOG_MISC_PAGES (2) |
| 112 | #define IPC_LOG_TX_RX_PAGES (3) |
| 113 | #define DATA_BYTES_PER_LINE (32) |
| 114 | |
| 115 | #define IPC_LOG_MSG(ctx, x...) do { \ |
| 116 | if (ctx) \ |
| 117 | ipc_log_string(ctx, x); \ |
| 118 | } while (0) |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 119 | |
| 120 | struct msm_geni_serial_port { |
| 121 | struct uart_port uport; |
| 122 | char name[20]; |
| 123 | unsigned int tx_fifo_depth; |
| 124 | unsigned int tx_fifo_width; |
| 125 | unsigned int rx_fifo_depth; |
| 126 | unsigned int tx_wm; |
| 127 | unsigned int rx_wm; |
| 128 | unsigned int rx_rfr; |
| 129 | int xfer_mode; |
| 130 | struct dentry *dbg; |
| 131 | bool port_setup; |
| 132 | unsigned int *rx_fifo; |
| 133 | int (*handle_rx)(struct uart_port *uport, |
| 134 | unsigned int rx_fifo_wc, |
| 135 | unsigned int rx_last_byte_valid, |
| 136 | unsigned int rx_last); |
Karthikeyan Ramasubramanian | 0d578b7 | 2017-04-26 10:44:02 -0600 | [diff] [blame] | 137 | struct device *wrapper_dev; |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 138 | struct se_geni_rsc serial_rsc; |
| 139 | int loopback; |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 140 | int wakeup_irq; |
| 141 | unsigned char wakeup_byte; |
| 142 | struct wakeup_source geni_wake; |
| 143 | void *ipc_log_tx; |
| 144 | void *ipc_log_rx; |
| 145 | void *ipc_log_pwr; |
| 146 | void *ipc_log_misc; |
| 147 | unsigned int cur_baud; |
Girish Mahadevan | a4ed038 | 2017-05-12 11:25:30 -0600 | [diff] [blame] | 148 | int ioctl_count; |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 149 | }; |
| 150 | |
| 151 | static const struct uart_ops msm_geni_serial_pops; |
| 152 | static struct uart_driver msm_geni_console_driver; |
| 153 | static struct uart_driver msm_geni_serial_hs_driver; |
| 154 | static int handle_rx_console(struct uart_port *uport, |
| 155 | unsigned int rx_fifo_wc, |
| 156 | unsigned int rx_last_byte_valid, |
| 157 | unsigned int rx_last); |
| 158 | static int handle_rx_hs(struct uart_port *uport, |
| 159 | unsigned int rx_fifo_wc, |
| 160 | unsigned int rx_last_byte_valid, |
| 161 | unsigned int rx_last); |
Girish Mahadevan | b1ab172 | 2017-04-27 16:39:11 -0600 | [diff] [blame] | 162 | static unsigned int msm_geni_serial_tx_empty(struct uart_port *port); |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 163 | static int msm_geni_serial_power_on(struct uart_port *uport); |
| 164 | static void msm_geni_serial_power_off(struct uart_port *uport); |
Girish Mahadevan | a4ed038 | 2017-05-12 11:25:30 -0600 | [diff] [blame] | 165 | static int msm_geni_serial_poll_bit(struct uart_port *uport, |
| 166 | int offset, int bit_field, bool set); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 167 | |
| 168 | static atomic_t uart_line_id = ATOMIC_INIT(0); |
| 169 | |
| 170 | #define GET_DEV_PORT(uport) \ |
| 171 | container_of(uport, struct msm_geni_serial_port, uport) |
| 172 | |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 173 | static struct msm_geni_serial_port msm_geni_console_port; |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 174 | static struct msm_geni_serial_port msm_geni_serial_ports[GENI_UART_NR_PORTS]; |
| 175 | |
| 176 | static void msm_geni_serial_config_port(struct uart_port *uport, int cfg_flags) |
| 177 | { |
| 178 | if (cfg_flags & UART_CONFIG_TYPE) |
| 179 | uport->type = PORT_MSM; |
| 180 | } |
| 181 | |
| 182 | static ssize_t msm_geni_serial_loopback_show(struct device *dev, |
| 183 | struct device_attribute *attr, char *buf) |
| 184 | { |
| 185 | struct platform_device *pdev = to_platform_device(dev); |
| 186 | struct msm_geni_serial_port *port = platform_get_drvdata(pdev); |
| 187 | |
| 188 | return snprintf(buf, sizeof(int), "%d\n", port->loopback); |
| 189 | } |
| 190 | |
| 191 | static ssize_t msm_geni_serial_loopback_store(struct device *dev, |
| 192 | struct device_attribute *attr, const char *buf, |
| 193 | size_t size) |
| 194 | { |
| 195 | struct platform_device *pdev = to_platform_device(dev); |
| 196 | struct msm_geni_serial_port *port = platform_get_drvdata(pdev); |
| 197 | |
| 198 | if (kstrtoint(buf, 0, &port->loopback)) { |
| 199 | dev_err(dev, "Invalid input\n"); |
| 200 | return -EINVAL; |
| 201 | } |
| 202 | return size; |
| 203 | } |
| 204 | |
| 205 | static DEVICE_ATTR(loopback, 0644, msm_geni_serial_loopback_show, |
| 206 | msm_geni_serial_loopback_store); |
| 207 | |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 208 | static void dump_ipc(void *ipc_ctx, char *prefix, char *string, |
| 209 | u64 addr, int size) |
| 210 | |
| 211 | { |
| 212 | char buf[DATA_BYTES_PER_LINE * 2]; |
| 213 | int len = 0; |
| 214 | |
| 215 | if (!ipc_ctx) |
| 216 | return; |
| 217 | len = min(size, DATA_BYTES_PER_LINE); |
| 218 | hex_dump_to_buffer(string, len, DATA_BYTES_PER_LINE, 1, buf, |
| 219 | sizeof(buf), false); |
| 220 | ipc_log_string(ipc_ctx, "%s[0x%.10x:%d] : %s", prefix, |
| 221 | (unsigned int)addr, size, buf); |
| 222 | } |
| 223 | |
Girish Mahadevan | a4ed038 | 2017-05-12 11:25:30 -0600 | [diff] [blame] | 224 | static bool check_tx_active(struct uart_port *uport) |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 225 | { |
Girish Mahadevan | a4ed038 | 2017-05-12 11:25:30 -0600 | [diff] [blame] | 226 | /* |
| 227 | * Poll if the GENI STATUS bit for TX is cleared. If the bit is |
| 228 | * clear (poll condition met), return false, meaning tx isn't active |
| 229 | * else return true. So return not of the poll return. |
| 230 | */ |
| 231 | return !msm_geni_serial_poll_bit(uport, SE_GENI_STATUS, |
| 232 | M_GENI_CMD_ACTIVE, false); |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 233 | } |
| 234 | |
| 235 | static int vote_clock_on(struct uart_port *uport) |
| 236 | { |
| 237 | int ret = 0; |
| 238 | struct msm_geni_serial_port *port = GET_DEV_PORT(uport); |
Girish Mahadevan | a4ed038 | 2017-05-12 11:25:30 -0600 | [diff] [blame] | 239 | int usage_count = atomic_read(&uport->dev->power.usage_count); |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 240 | |
| 241 | if (!pm_runtime_enabled(uport->dev)) { |
| 242 | dev_err(uport->dev, "RPM not available.Can't enable clocks\n"); |
| 243 | ret = -EPERM; |
| 244 | return ret; |
| 245 | } |
| 246 | ret = msm_geni_serial_power_on(uport); |
| 247 | if (ret) { |
| 248 | dev_err(uport->dev, "Failed to vote clock on\n"); |
| 249 | return ret; |
| 250 | } |
Girish Mahadevan | a4ed038 | 2017-05-12 11:25:30 -0600 | [diff] [blame] | 251 | port->ioctl_count++; |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 252 | __pm_relax(&port->geni_wake); |
Girish Mahadevan | a4ed038 | 2017-05-12 11:25:30 -0600 | [diff] [blame] | 253 | IPC_LOG_MSG(port->ipc_log_pwr, "%s rpm %d ioctl %d\n", |
| 254 | __func__, usage_count, port->ioctl_count); |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 255 | return 0; |
| 256 | } |
| 257 | |
| 258 | static int vote_clock_off(struct uart_port *uport) |
| 259 | { |
| 260 | struct msm_geni_serial_port *port = GET_DEV_PORT(uport); |
| 261 | int ret = 0; |
Girish Mahadevan | a4ed038 | 2017-05-12 11:25:30 -0600 | [diff] [blame] | 262 | int usage_count = atomic_read(&uport->dev->power.usage_count); |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 263 | |
| 264 | if (!pm_runtime_enabled(uport->dev)) { |
| 265 | dev_err(uport->dev, "RPM not available.Can't enable clocks\n"); |
| 266 | ret = -EPERM; |
| 267 | return ret; |
| 268 | } |
Girish Mahadevan | a4ed038 | 2017-05-12 11:25:30 -0600 | [diff] [blame] | 269 | /* Check on going Tx. Don't block on this for now. */ |
| 270 | if (check_tx_active(uport)) |
| 271 | dev_warn(uport->dev, "%s: Vote off called during active Tx", |
| 272 | __func__); |
| 273 | if (!port->ioctl_count) { |
| 274 | dev_warn(uport->dev, "%s:Imbalanced vote off ioctl %d\n", |
| 275 | __func__, usage_count); |
| 276 | IPC_LOG_MSG(port->ipc_log_pwr, |
| 277 | "%s:Imbalanced vote_off from userspace rpm%d", |
| 278 | __func__, usage_count); |
| 279 | return 0; |
| 280 | } |
| 281 | port->ioctl_count--; |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 282 | msm_geni_serial_power_off(uport); |
Girish Mahadevan | a4ed038 | 2017-05-12 11:25:30 -0600 | [diff] [blame] | 283 | IPC_LOG_MSG(port->ipc_log_pwr, "%s rpm %d ioctl %d\n", |
| 284 | __func__, usage_count, port->ioctl_count); |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 285 | return 0; |
| 286 | }; |
| 287 | |
| 288 | static int msm_geni_serial_ioctl(struct uart_port *uport, unsigned int cmd, |
| 289 | unsigned long arg) |
| 290 | { |
| 291 | int ret = -ENOIOCTLCMD; |
| 292 | |
| 293 | switch (cmd) { |
| 294 | case TIOCPMGET: { |
| 295 | ret = vote_clock_on(uport); |
| 296 | break; |
| 297 | } |
| 298 | case TIOCPMPUT: { |
| 299 | ret = vote_clock_off(uport); |
| 300 | break; |
| 301 | } |
| 302 | case TIOCPMACT: { |
| 303 | ret = !pm_runtime_status_suspended(uport->dev); |
| 304 | break; |
| 305 | } |
| 306 | default: |
| 307 | break; |
| 308 | } |
| 309 | return ret; |
| 310 | } |
| 311 | |
| 312 | static void msm_geni_serial_break_ctl(struct uart_port *uport, int ctl) |
| 313 | { |
| 314 | if (!uart_console(uport) && pm_runtime_status_suspended(uport->dev)) { |
| 315 | dev_err(uport->dev, "%s Device suspended,vote clocks on.\n", |
| 316 | __func__); |
| 317 | return; |
| 318 | } |
| 319 | |
| 320 | if (ctl) { |
| 321 | check_tx_active(uport); |
| 322 | geni_setup_m_cmd(uport->membase, UART_START_BREAK, 0); |
| 323 | } else { |
| 324 | geni_setup_m_cmd(uport->membase, UART_STOP_BREAK, 0); |
| 325 | } |
| 326 | /* Ensure break start/stop command is setup before returning.*/ |
| 327 | mb(); |
| 328 | } |
| 329 | |
Karthikeyan Ramasubramanian | f5fb743 | 2017-05-24 21:59:55 -0600 | [diff] [blame] | 330 | static unsigned int msm_geni_cons_get_mctrl(struct uart_port *uport) |
| 331 | { |
| 332 | return TIOCM_DSR | TIOCM_CAR | TIOCM_CTS; |
| 333 | } |
| 334 | |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 335 | static unsigned int msm_geni_serial_get_mctrl(struct uart_port *uport) |
| 336 | { |
| 337 | u32 geni_ios = 0; |
| 338 | unsigned int mctrl = TIOCM_DSR | TIOCM_CAR; |
| 339 | |
| 340 | if (pm_runtime_status_suspended(uport->dev)) |
| 341 | return TIOCM_DSR | TIOCM_CAR | TIOCM_CTS; |
| 342 | |
| 343 | geni_ios = geni_read_reg_nolog(uport->membase, SE_GENI_IOS); |
| 344 | if (!(geni_ios & IO2_DATA_IN)) |
| 345 | mctrl |= TIOCM_CTS; |
| 346 | |
| 347 | return mctrl; |
| 348 | } |
| 349 | |
| 350 | static void msm_geni_cons_set_mctrl(struct uart_port *uport, |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 351 | unsigned int mctrl) |
| 352 | { |
| 353 | } |
| 354 | |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 355 | static void msm_geni_serial_set_mctrl(struct uart_port *uport, |
| 356 | unsigned int mctrl) |
| 357 | { |
| 358 | u32 uart_manual_rfr = 0; |
| 359 | |
| 360 | if (pm_runtime_status_suspended(uport->dev)) { |
| 361 | dev_info(uport->dev, "%sDevice suspended,vote clocks on\n", |
| 362 | __func__); |
| 363 | return; |
| 364 | } |
| 365 | if (!(mctrl & TIOCM_RTS)) |
| 366 | uart_manual_rfr |= (UART_MANUAL_RFR_EN | UART_RFR_NOT_READY); |
| 367 | geni_write_reg_nolog(uart_manual_rfr, uport->membase, |
| 368 | SE_UART_MANUAL_RFR); |
| 369 | /* Write to flow control must complete before return to client*/ |
| 370 | mb(); |
| 371 | } |
| 372 | |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 373 | static const char *msm_geni_serial_get_type(struct uart_port *uport) |
| 374 | { |
| 375 | return "MSM"; |
| 376 | } |
| 377 | |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 378 | static struct msm_geni_serial_port *get_port_from_line(int line, |
| 379 | bool is_console) |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 380 | { |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 381 | struct msm_geni_serial_port *port = NULL; |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 382 | |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 383 | if (is_console) { |
| 384 | if ((line < 0) || (line >= GENI_UART_CONS_PORTS)) |
| 385 | port = ERR_PTR(-ENXIO); |
| 386 | port = &msm_geni_console_port; |
| 387 | } else { |
| 388 | if ((line < 0) || (line >= GENI_UART_NR_PORTS)) |
| 389 | return ERR_PTR(-ENXIO); |
| 390 | port = &msm_geni_serial_ports[line]; |
| 391 | } |
| 392 | |
| 393 | return port; |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 394 | } |
| 395 | |
| 396 | static int msm_geni_serial_power_on(struct uart_port *uport) |
| 397 | { |
| 398 | int ret = 0; |
| 399 | |
| 400 | ret = pm_runtime_get_sync(uport->dev); |
| 401 | if (ret < 0) { |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 402 | pm_runtime_put_noidle(uport->dev); |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 403 | pm_runtime_set_suspended(uport->dev); |
| 404 | return ret; |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 405 | } |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 406 | return 0; |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 407 | } |
| 408 | |
| 409 | static void msm_geni_serial_power_off(struct uart_port *uport) |
| 410 | { |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 411 | pm_runtime_put_sync(uport->dev); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 412 | } |
| 413 | |
| 414 | static int msm_geni_serial_poll_bit(struct uart_port *uport, |
Girish Mahadevan | 9149f83 | 2017-04-18 11:10:51 -0600 | [diff] [blame] | 415 | int offset, int bit_field, bool set) |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 416 | { |
| 417 | int iter = 0; |
| 418 | unsigned int reg; |
| 419 | bool met = false; |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 420 | struct msm_geni_serial_port *port = NULL; |
Girish Mahadevan | 9149f83 | 2017-04-18 11:10:51 -0600 | [diff] [blame] | 421 | bool cond = false; |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 422 | unsigned int baud = 115200; |
| 423 | unsigned int fifo_bits = DEF_FIFO_DEPTH_WORDS * DEF_FIFO_WIDTH_BITS; |
Girish Mahadevan | a4ed038 | 2017-05-12 11:25:30 -0600 | [diff] [blame] | 424 | unsigned long total_iter = 1000; |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 425 | |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 426 | |
Girish Mahadevan | a4ed038 | 2017-05-12 11:25:30 -0600 | [diff] [blame] | 427 | if (uport->private_data && !uart_console(uport)) { |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 428 | port = GET_DEV_PORT(uport); |
| 429 | baud = (port->cur_baud ? port->cur_baud : 115200); |
| 430 | fifo_bits = port->tx_fifo_depth * port->tx_fifo_width; |
Girish Mahadevan | a4ed038 | 2017-05-12 11:25:30 -0600 | [diff] [blame] | 431 | /* |
| 432 | * Total polling iterations based on FIFO worth of bytes to be |
| 433 | * sent at current baud .Add a little fluff to the wait. |
| 434 | */ |
| 435 | total_iter = ((fifo_bits * USEC_PER_SEC) / baud); |
| 436 | total_iter += 50; |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 437 | } |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 438 | |
| 439 | while (iter < total_iter) { |
Girish Mahadevan | bd9b44f | 2017-04-11 13:11:10 -0600 | [diff] [blame] | 440 | reg = geni_read_reg_nolog(uport->membase, offset); |
Girish Mahadevan | 9149f83 | 2017-04-18 11:10:51 -0600 | [diff] [blame] | 441 | cond = reg & bit_field; |
| 442 | if (cond == set) { |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 443 | met = true; |
| 444 | break; |
| 445 | } |
| 446 | udelay(10); |
| 447 | iter++; |
| 448 | } |
| 449 | return met; |
| 450 | } |
| 451 | |
| 452 | static void msm_geni_serial_setup_tx(struct uart_port *uport, |
Girish Mahadevan | b1ab172 | 2017-04-27 16:39:11 -0600 | [diff] [blame] | 453 | unsigned int xmit_size) |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 454 | { |
Girish Mahadevan | 9149f83 | 2017-04-18 11:10:51 -0600 | [diff] [blame] | 455 | u32 m_cmd = 0; |
| 456 | |
Girish Mahadevan | bd9b44f | 2017-04-11 13:11:10 -0600 | [diff] [blame] | 457 | geni_write_reg_nolog(xmit_size, uport->membase, SE_UART_TX_TRANS_LEN); |
Girish Mahadevan | 9149f83 | 2017-04-18 11:10:51 -0600 | [diff] [blame] | 458 | m_cmd |= (UART_START_TX << M_OPCODE_SHFT); |
| 459 | geni_write_reg_nolog(m_cmd, uport->membase, SE_GENI_M_CMD0); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 460 | /* |
| 461 | * Writes to enable the primary sequencer should go through before |
| 462 | * exiting this function. |
| 463 | */ |
| 464 | mb(); |
| 465 | } |
| 466 | |
| 467 | static void msm_geni_serial_poll_cancel_tx(struct uart_port *uport) |
| 468 | { |
| 469 | int done = 0; |
| 470 | unsigned int irq_clear = M_CMD_DONE_EN; |
| 471 | |
Karthikeyan Ramasubramanian | 61074fa | 2017-05-24 00:18:34 -0600 | [diff] [blame] | 472 | if (!uart_console(uport)) |
| 473 | return; |
| 474 | |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 475 | done = msm_geni_serial_poll_bit(uport, SE_GENI_M_IRQ_STATUS, |
Girish Mahadevan | 9149f83 | 2017-04-18 11:10:51 -0600 | [diff] [blame] | 476 | M_CMD_DONE_EN, true); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 477 | if (!done) { |
Girish Mahadevan | a4ed038 | 2017-05-12 11:25:30 -0600 | [diff] [blame] | 478 | geni_write_reg_nolog(M_GENI_CMD_ABORT, uport->membase, |
| 479 | SE_GENI_M_CMD_CTRL_REG); |
| 480 | irq_clear |= M_CMD_ABORT_EN; |
| 481 | msm_geni_serial_poll_bit(uport, SE_GENI_M_IRQ_STATUS, |
Girish Mahadevan | 9149f83 | 2017-04-18 11:10:51 -0600 | [diff] [blame] | 482 | M_CMD_ABORT_EN, true); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 483 | } |
Girish Mahadevan | bd9b44f | 2017-04-11 13:11:10 -0600 | [diff] [blame] | 484 | geni_write_reg_nolog(irq_clear, uport->membase, SE_GENI_M_IRQ_CLEAR); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 485 | } |
| 486 | |
Girish Mahadevan | 9149f83 | 2017-04-18 11:10:51 -0600 | [diff] [blame] | 487 | static void msm_geni_serial_abort_rx(struct uart_port *uport) |
Girish Mahadevan | 24f5659 | 2017-04-15 17:35:05 -0600 | [diff] [blame] | 488 | { |
Girish Mahadevan | 24f5659 | 2017-04-15 17:35:05 -0600 | [diff] [blame] | 489 | unsigned int irq_clear = S_CMD_DONE_EN; |
| 490 | |
Girish Mahadevan | 9149f83 | 2017-04-18 11:10:51 -0600 | [diff] [blame] | 491 | geni_abort_s_cmd(uport->membase); |
| 492 | /* Ensure this goes through before polling. */ |
| 493 | mb(); |
| 494 | irq_clear |= S_CMD_ABORT_EN; |
| 495 | msm_geni_serial_poll_bit(uport, SE_GENI_S_CMD_CTRL_REG, |
| 496 | S_GENI_CMD_ABORT, false); |
Girish Mahadevan | 24f5659 | 2017-04-15 17:35:05 -0600 | [diff] [blame] | 497 | geni_write_reg_nolog(irq_clear, uport->membase, SE_GENI_S_IRQ_CLEAR); |
| 498 | } |
Girish Mahadevan | 9149f83 | 2017-04-18 11:10:51 -0600 | [diff] [blame] | 499 | |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 500 | #ifdef CONFIG_CONSOLE_POLL |
| 501 | static int msm_geni_serial_get_char(struct uart_port *uport) |
| 502 | { |
| 503 | unsigned int rx_fifo; |
| 504 | unsigned int m_irq_status; |
| 505 | unsigned int s_irq_status; |
| 506 | |
| 507 | if (!(msm_geni_serial_poll_bit(uport, SE_GENI_M_IRQ_STATUS, |
Karthikeyan Ramasubramanian | 56351b6 | 2017-04-21 15:11:03 -0600 | [diff] [blame] | 508 | M_SEC_IRQ_EN, true))) |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 509 | return -ENXIO; |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 510 | |
Girish Mahadevan | bd9b44f | 2017-04-11 13:11:10 -0600 | [diff] [blame] | 511 | m_irq_status = geni_read_reg_nolog(uport->membase, |
| 512 | SE_GENI_M_IRQ_STATUS); |
| 513 | s_irq_status = geni_read_reg_nolog(uport->membase, |
| 514 | SE_GENI_S_IRQ_STATUS); |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 515 | geni_write_reg_nolog(m_irq_status, uport->membase, |
| 516 | SE_GENI_M_IRQ_CLEAR); |
| 517 | geni_write_reg_nolog(s_irq_status, uport->membase, |
| 518 | SE_GENI_S_IRQ_CLEAR); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 519 | |
| 520 | if (!(msm_geni_serial_poll_bit(uport, SE_GENI_RX_FIFO_STATUS, |
Karthikeyan Ramasubramanian | 56351b6 | 2017-04-21 15:11:03 -0600 | [diff] [blame] | 521 | RX_FIFO_WC_MSK, true))) |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 522 | return -ENXIO; |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 523 | |
| 524 | /* |
| 525 | * Read the Rx FIFO only after clearing the interrupt registers and |
| 526 | * getting valid RX fifo status. |
| 527 | */ |
| 528 | mb(); |
Girish Mahadevan | bd9b44f | 2017-04-11 13:11:10 -0600 | [diff] [blame] | 529 | rx_fifo = geni_read_reg_nolog(uport->membase, SE_GENI_RX_FIFOn); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 530 | rx_fifo &= 0xFF; |
| 531 | return rx_fifo; |
| 532 | } |
| 533 | |
| 534 | static void msm_geni_serial_poll_put_char(struct uart_port *uport, |
| 535 | unsigned char c) |
| 536 | { |
| 537 | int b = (int) c; |
| 538 | struct msm_geni_serial_port *port = GET_DEV_PORT(uport); |
| 539 | |
Girish Mahadevan | bd9b44f | 2017-04-11 13:11:10 -0600 | [diff] [blame] | 540 | geni_write_reg_nolog(port->tx_wm, uport->membase, |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 541 | SE_GENI_TX_WATERMARK_REG); |
| 542 | msm_geni_serial_setup_tx(uport, 1); |
| 543 | if (!msm_geni_serial_poll_bit(uport, SE_GENI_M_IRQ_STATUS, |
Girish Mahadevan | 9149f83 | 2017-04-18 11:10:51 -0600 | [diff] [blame] | 544 | M_TX_FIFO_WATERMARK_EN, true)) |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 545 | WARN_ON(1); |
Girish Mahadevan | bd9b44f | 2017-04-11 13:11:10 -0600 | [diff] [blame] | 546 | geni_write_reg_nolog(b, uport->membase, SE_GENI_TX_FIFOn); |
| 547 | geni_write_reg_nolog(M_TX_FIFO_WATERMARK_EN, uport->membase, |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 548 | SE_GENI_M_IRQ_CLEAR); |
| 549 | /* |
| 550 | * Ensure FIFO write goes through before polling for status but. |
| 551 | */ |
| 552 | mb(); |
| 553 | msm_geni_serial_poll_cancel_tx(uport); |
| 554 | } |
| 555 | #endif |
| 556 | |
Girish Mahadevan | f08b110 | 2017-04-02 19:27:28 -0600 | [diff] [blame] | 557 | #if defined(CONFIG_SERIAL_CORE_CONSOLE) || defined(CONFIG_CONSOLE_POLL) |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 558 | static void msm_geni_serial_wr_char(struct uart_port *uport, int ch) |
| 559 | { |
Girish Mahadevan | bd9b44f | 2017-04-11 13:11:10 -0600 | [diff] [blame] | 560 | geni_write_reg_nolog(ch, uport->membase, SE_GENI_TX_FIFOn); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 561 | /* |
| 562 | * Ensure FIFO write clear goes through before |
| 563 | * next iteration. |
| 564 | */ |
| 565 | mb(); |
| 566 | |
| 567 | } |
| 568 | |
| 569 | static void |
| 570 | __msm_geni_serial_console_write(struct uart_port *uport, const char *s, |
| 571 | unsigned int count) |
| 572 | { |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 573 | int new_line = 0; |
| 574 | int i; |
| 575 | int bytes_to_send = count; |
Girish Mahadevan | b1ab172 | 2017-04-27 16:39:11 -0600 | [diff] [blame] | 576 | int fifo_depth = DEF_FIFO_DEPTH_WORDS; |
| 577 | int tx_wm = DEF_TX_WM; |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 578 | |
| 579 | for (i = 0; i < count; i++) { |
| 580 | if (s[i] == '\n') |
| 581 | new_line++; |
| 582 | } |
| 583 | |
| 584 | bytes_to_send += new_line; |
Girish Mahadevan | b1ab172 | 2017-04-27 16:39:11 -0600 | [diff] [blame] | 585 | geni_write_reg_nolog(tx_wm, uport->membase, |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 586 | SE_GENI_TX_WATERMARK_REG); |
| 587 | msm_geni_serial_setup_tx(uport, bytes_to_send); |
| 588 | i = 0; |
| 589 | while (i < count) { |
| 590 | u32 chars_to_write = 0; |
Girish Mahadevan | b1ab172 | 2017-04-27 16:39:11 -0600 | [diff] [blame] | 591 | u32 avail_fifo_bytes = (fifo_depth - tx_wm); |
Girish Mahadevan | 24f5659 | 2017-04-15 17:35:05 -0600 | [diff] [blame] | 592 | /* |
| 593 | * If the WM bit never set, then the Tx state machine is not |
| 594 | * in a valid state, so break, cancel/abort any existing |
| 595 | * command. Unfortunately the current data being written is |
| 596 | * lost. |
| 597 | */ |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 598 | while (!msm_geni_serial_poll_bit(uport, SE_GENI_M_IRQ_STATUS, |
Girish Mahadevan | 9149f83 | 2017-04-18 11:10:51 -0600 | [diff] [blame] | 599 | M_TX_FIFO_WATERMARK_EN, true)) |
Girish Mahadevan | 24f5659 | 2017-04-15 17:35:05 -0600 | [diff] [blame] | 600 | break; |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 601 | chars_to_write = min((unsigned int)(count - i), |
| 602 | avail_fifo_bytes); |
| 603 | if ((chars_to_write << 1) > avail_fifo_bytes) |
| 604 | chars_to_write = (avail_fifo_bytes >> 1); |
| 605 | uart_console_write(uport, (s + i), chars_to_write, |
| 606 | msm_geni_serial_wr_char); |
Girish Mahadevan | bd9b44f | 2017-04-11 13:11:10 -0600 | [diff] [blame] | 607 | geni_write_reg_nolog(M_TX_FIFO_WATERMARK_EN, uport->membase, |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 608 | SE_GENI_M_IRQ_CLEAR); |
Girish Mahadevan | bd9b44f | 2017-04-11 13:11:10 -0600 | [diff] [blame] | 609 | /* Ensure this goes through before polling for WM IRQ again.*/ |
| 610 | mb(); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 611 | i += chars_to_write; |
| 612 | } |
| 613 | msm_geni_serial_poll_cancel_tx(uport); |
| 614 | } |
| 615 | |
| 616 | static void msm_geni_serial_console_write(struct console *co, const char *s, |
| 617 | unsigned int count) |
| 618 | { |
| 619 | struct uart_port *uport; |
| 620 | struct msm_geni_serial_port *port; |
Karthikeyan Ramasubramanian | f5fb743 | 2017-05-24 21:59:55 -0600 | [diff] [blame] | 621 | int locked = 1; |
| 622 | unsigned long flags; |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 623 | |
| 624 | WARN_ON(co->index < 0 || co->index >= GENI_UART_NR_PORTS); |
| 625 | |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 626 | port = get_port_from_line(co->index, true); |
Karthikeyan Ramasubramanian | 56351b6 | 2017-04-21 15:11:03 -0600 | [diff] [blame] | 627 | if (IS_ERR_OR_NULL(port)) |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 628 | return; |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 629 | |
| 630 | uport = &port->uport; |
Karthikeyan Ramasubramanian | f5fb743 | 2017-05-24 21:59:55 -0600 | [diff] [blame] | 631 | if (oops_in_progress) |
| 632 | locked = spin_trylock_irqsave(&uport->lock, flags); |
| 633 | else |
| 634 | spin_lock_irqsave(&uport->lock, flags); |
| 635 | |
| 636 | if (locked) { |
| 637 | __msm_geni_serial_console_write(uport, s, count); |
| 638 | spin_unlock_irqrestore(&uport->lock, flags); |
| 639 | } |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 640 | } |
| 641 | |
Girish Mahadevan | f08b110 | 2017-04-02 19:27:28 -0600 | [diff] [blame] | 642 | static int handle_rx_console(struct uart_port *uport, |
| 643 | unsigned int rx_fifo_wc, |
| 644 | unsigned int rx_last_byte_valid, |
| 645 | unsigned int rx_last) |
| 646 | { |
| 647 | int i, c; |
| 648 | unsigned char *rx_char; |
| 649 | struct tty_port *tport; |
| 650 | struct msm_geni_serial_port *msm_port = GET_DEV_PORT(uport); |
| 651 | |
| 652 | tport = &uport->state->port; |
Girish Mahadevan | f08b110 | 2017-04-02 19:27:28 -0600 | [diff] [blame] | 653 | for (i = 0; i < rx_fifo_wc; i++) { |
| 654 | int bytes = 4; |
| 655 | |
| 656 | *(msm_port->rx_fifo) = |
Girish Mahadevan | bd9b44f | 2017-04-11 13:11:10 -0600 | [diff] [blame] | 657 | geni_read_reg_nolog(uport->membase, SE_GENI_RX_FIFOn); |
Girish Mahadevan | f08b110 | 2017-04-02 19:27:28 -0600 | [diff] [blame] | 658 | rx_char = (unsigned char *)msm_port->rx_fifo; |
| 659 | |
| 660 | if (i == (rx_fifo_wc - 1)) { |
| 661 | if (rx_last && rx_last_byte_valid) |
| 662 | bytes = rx_last_byte_valid; |
| 663 | } |
| 664 | for (c = 0; c < bytes; c++) { |
| 665 | char flag = TTY_NORMAL; |
| 666 | int sysrq; |
| 667 | |
| 668 | uport->icount.rx++; |
| 669 | sysrq = uart_handle_sysrq_char(uport, rx_char[c]); |
| 670 | if (!sysrq) |
| 671 | tty_insert_flip_char(tport, rx_char[c], flag); |
| 672 | } |
| 673 | } |
| 674 | tty_flip_buffer_push(tport); |
| 675 | return 0; |
| 676 | } |
| 677 | #else |
| 678 | static int handle_rx_console(struct uart_port *uport, |
| 679 | unsigned int rx_fifo_wc, |
| 680 | unsigned int rx_last_byte_valid, |
| 681 | unsigned int rx_last) |
| 682 | { |
| 683 | return -EPERM; |
| 684 | } |
| 685 | |
| 686 | #endif /* (CONFIG_SERIAL_CORE_CONSOLE) || defined(CONFIG_CONSOLE_POLL)) */ |
| 687 | |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 688 | static void msm_geni_serial_start_tx(struct uart_port *uport) |
| 689 | { |
| 690 | unsigned int geni_m_irq_en; |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 691 | struct msm_geni_serial_port *msm_port = GET_DEV_PORT(uport); |
Karthikeyan Ramasubramanian | 61074fa | 2017-05-24 00:18:34 -0600 | [diff] [blame] | 692 | unsigned int geni_status; |
Girish Mahadevan | b1ab172 | 2017-04-27 16:39:11 -0600 | [diff] [blame] | 693 | |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 694 | if (!uart_console(uport) && pm_runtime_status_suspended(uport->dev)) { |
| 695 | dev_err(uport->dev, "%s.Device is suspended.\n", __func__); |
| 696 | return; |
| 697 | } |
| 698 | |
Karthikeyan Ramasubramanian | 61074fa | 2017-05-24 00:18:34 -0600 | [diff] [blame] | 699 | geni_status = geni_read_reg_nolog(uport->membase, SE_GENI_STATUS); |
| 700 | if (geni_status & M_GENI_CMD_ACTIVE) |
| 701 | return; |
| 702 | |
| 703 | if (!msm_geni_serial_tx_empty(uport)) |
| 704 | return; |
| 705 | |
Girish Mahadevan | bd9b44f | 2017-04-11 13:11:10 -0600 | [diff] [blame] | 706 | geni_m_irq_en = geni_read_reg_nolog(uport->membase, SE_GENI_M_IRQ_EN); |
Karthikeyan Ramasubramanian | 61074fa | 2017-05-24 00:18:34 -0600 | [diff] [blame] | 707 | geni_m_irq_en |= (M_TX_FIFO_WATERMARK_EN | M_CMD_DONE_EN); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 708 | |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 709 | geni_write_reg_nolog(msm_port->tx_wm, uport->membase, |
Girish Mahadevan | bd9b44f | 2017-04-11 13:11:10 -0600 | [diff] [blame] | 710 | SE_GENI_TX_WATERMARK_REG); |
| 711 | geni_write_reg_nolog(geni_m_irq_en, uport->membase, SE_GENI_M_IRQ_EN); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 712 | /* Geni command setup/irq enables should complete before returning.*/ |
| 713 | mb(); |
| 714 | } |
| 715 | |
| 716 | static void msm_geni_serial_stop_tx(struct uart_port *uport) |
| 717 | { |
| 718 | unsigned int geni_m_irq_en; |
| 719 | unsigned int geni_status; |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 720 | struct msm_geni_serial_port *port = GET_DEV_PORT(uport); |
| 721 | |
| 722 | if (!uart_console(uport) && pm_runtime_status_suspended(uport->dev)) |
| 723 | return; |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 724 | |
Girish Mahadevan | bd9b44f | 2017-04-11 13:11:10 -0600 | [diff] [blame] | 725 | geni_m_irq_en = geni_read_reg_nolog(uport->membase, SE_GENI_M_IRQ_EN); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 726 | geni_m_irq_en &= ~(M_TX_FIFO_WATERMARK_EN | M_CMD_DONE_EN); |
Girish Mahadevan | bd9b44f | 2017-04-11 13:11:10 -0600 | [diff] [blame] | 727 | geni_write_reg_nolog(0, uport->membase, SE_GENI_TX_WATERMARK_REG); |
| 728 | geni_write_reg_nolog(geni_m_irq_en, uport->membase, SE_GENI_M_IRQ_EN); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 729 | |
Girish Mahadevan | bd9b44f | 2017-04-11 13:11:10 -0600 | [diff] [blame] | 730 | geni_status = geni_read_reg_nolog(uport->membase, |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 731 | SE_GENI_STATUS); |
| 732 | /* Possible stop tx is called multiple times. */ |
| 733 | if (!(geni_status & M_GENI_CMD_ACTIVE)) |
| 734 | return; |
| 735 | |
| 736 | geni_cancel_m_cmd(uport->membase); |
| 737 | if (!msm_geni_serial_poll_bit(uport, SE_GENI_M_IRQ_STATUS, |
Girish Mahadevan | 9149f83 | 2017-04-18 11:10:51 -0600 | [diff] [blame] | 738 | M_CMD_CANCEL_EN, true)) { |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 739 | geni_abort_m_cmd(uport->membase); |
| 740 | msm_geni_serial_poll_bit(uport, SE_GENI_M_IRQ_STATUS, |
Girish Mahadevan | 9149f83 | 2017-04-18 11:10:51 -0600 | [diff] [blame] | 741 | M_CMD_ABORT_EN, true); |
Girish Mahadevan | bd9b44f | 2017-04-11 13:11:10 -0600 | [diff] [blame] | 742 | geni_write_reg_nolog(M_CMD_ABORT_EN, uport->membase, |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 743 | SE_GENI_M_IRQ_CLEAR); |
| 744 | } |
Girish Mahadevan | bd9b44f | 2017-04-11 13:11:10 -0600 | [diff] [blame] | 745 | geni_write_reg_nolog(M_CMD_CANCEL_EN, uport, SE_GENI_M_IRQ_CLEAR); |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 746 | IPC_LOG_MSG(port->ipc_log_misc, "%s\n", __func__); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 747 | } |
| 748 | |
| 749 | static void msm_geni_serial_start_rx(struct uart_port *uport) |
| 750 | { |
| 751 | unsigned int geni_s_irq_en; |
| 752 | unsigned int geni_m_irq_en; |
Girish Mahadevan | b1ab172 | 2017-04-27 16:39:11 -0600 | [diff] [blame] | 753 | unsigned long cfg0, cfg1; |
| 754 | unsigned int rxstale = DEFAULT_BITS_PER_CHAR * STALE_TIMEOUT; |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 755 | unsigned int geni_status; |
| 756 | struct msm_geni_serial_port *port = GET_DEV_PORT(uport); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 757 | |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 758 | if (!uart_console(uport) && pm_runtime_status_suspended(uport->dev)) |
| 759 | return; |
| 760 | |
| 761 | geni_status = geni_read_reg_nolog(uport->membase, SE_GENI_STATUS); |
| 762 | if (geni_status & S_GENI_CMD_ACTIVE) |
| 763 | msm_geni_serial_abort_rx(uport); |
Girish Mahadevan | bd9b44f | 2017-04-11 13:11:10 -0600 | [diff] [blame] | 764 | geni_s_irq_en = geni_read_reg_nolog(uport->membase, |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 765 | SE_GENI_S_IRQ_EN); |
Girish Mahadevan | bd9b44f | 2017-04-11 13:11:10 -0600 | [diff] [blame] | 766 | geni_m_irq_en = geni_read_reg_nolog(uport->membase, |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 767 | SE_GENI_M_IRQ_EN); |
| 768 | geni_s_irq_en |= S_RX_FIFO_WATERMARK_EN | S_RX_FIFO_LAST_EN; |
| 769 | geni_m_irq_en |= M_RX_FIFO_WATERMARK_EN | M_RX_FIFO_LAST_EN; |
Girish Mahadevan | b1ab172 | 2017-04-27 16:39:11 -0600 | [diff] [blame] | 770 | se_get_packing_config(8, 4, false, &cfg0, &cfg1); |
| 771 | geni_write_reg_nolog(cfg0, uport->membase, SE_GENI_RX_PACKING_CFG0); |
| 772 | geni_write_reg_nolog(cfg1, uport->membase, SE_GENI_RX_PACKING_CFG1); |
| 773 | geni_write_reg_nolog(rxstale, uport->membase, SE_UART_RX_STALE_CNT); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 774 | geni_setup_s_cmd(uport->membase, UART_START_READ, 0); |
Girish Mahadevan | bd9b44f | 2017-04-11 13:11:10 -0600 | [diff] [blame] | 775 | geni_write_reg_nolog(geni_s_irq_en, uport->membase, SE_GENI_S_IRQ_EN); |
| 776 | geni_write_reg_nolog(geni_m_irq_en, uport->membase, SE_GENI_M_IRQ_EN); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 777 | /* |
| 778 | * Ensure the writes to the secondary sequencer and interrupt enables |
| 779 | * go through. |
| 780 | */ |
| 781 | mb(); |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 782 | IPC_LOG_MSG(port->ipc_log_misc, "%s\n", __func__); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 783 | } |
| 784 | |
| 785 | static void msm_geni_serial_stop_rx(struct uart_port *uport) |
| 786 | { |
| 787 | unsigned int geni_s_irq_en; |
| 788 | unsigned int geni_m_irq_en; |
| 789 | unsigned int geni_status; |
| 790 | |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 791 | if (!uart_console(uport) && pm_runtime_status_suspended(uport->dev)) |
| 792 | return; |
| 793 | |
Girish Mahadevan | bd9b44f | 2017-04-11 13:11:10 -0600 | [diff] [blame] | 794 | geni_s_irq_en = geni_read_reg_nolog(uport->membase, |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 795 | SE_GENI_S_IRQ_EN); |
Girish Mahadevan | bd9b44f | 2017-04-11 13:11:10 -0600 | [diff] [blame] | 796 | geni_m_irq_en = geni_read_reg_nolog(uport->membase, |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 797 | SE_GENI_M_IRQ_EN); |
| 798 | geni_s_irq_en &= ~(S_RX_FIFO_WATERMARK_EN | S_RX_FIFO_LAST_EN); |
| 799 | geni_m_irq_en &= ~(M_RX_FIFO_WATERMARK_EN | M_RX_FIFO_LAST_EN); |
| 800 | |
Girish Mahadevan | bd9b44f | 2017-04-11 13:11:10 -0600 | [diff] [blame] | 801 | geni_write_reg_nolog(geni_s_irq_en, uport->membase, SE_GENI_S_IRQ_EN); |
| 802 | geni_write_reg_nolog(geni_m_irq_en, uport->membase, SE_GENI_M_IRQ_EN); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 803 | |
Girish Mahadevan | bd9b44f | 2017-04-11 13:11:10 -0600 | [diff] [blame] | 804 | geni_status = geni_read_reg_nolog(uport->membase, SE_GENI_STATUS); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 805 | /* Possible stop rx is called multiple times. */ |
| 806 | if (!(geni_status & S_GENI_CMD_ACTIVE)) |
| 807 | return; |
Girish Mahadevan | 9149f83 | 2017-04-18 11:10:51 -0600 | [diff] [blame] | 808 | msm_geni_serial_abort_rx(uport); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 809 | } |
| 810 | |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 811 | static int handle_rx_hs(struct uart_port *uport, |
| 812 | unsigned int rx_fifo_wc, |
| 813 | unsigned int rx_last_byte_valid, |
| 814 | unsigned int rx_last) |
| 815 | { |
| 816 | unsigned char *rx_char; |
| 817 | struct tty_port *tport; |
| 818 | struct msm_geni_serial_port *msm_port = GET_DEV_PORT(uport); |
| 819 | int ret; |
| 820 | int rx_bytes = 0; |
| 821 | |
| 822 | rx_bytes = (msm_port->tx_fifo_width * (rx_fifo_wc - 1)) >> 3; |
| 823 | rx_bytes += ((rx_last && rx_last_byte_valid) ? |
| 824 | rx_last_byte_valid : msm_port->tx_fifo_width >> 3); |
| 825 | |
| 826 | tport = &uport->state->port; |
| 827 | ioread32_rep((uport->membase + SE_GENI_RX_FIFOn), msm_port->rx_fifo, |
| 828 | rx_fifo_wc); |
| 829 | |
| 830 | rx_char = (unsigned char *)msm_port->rx_fifo; |
| 831 | ret = tty_insert_flip_string(tport, rx_char, rx_bytes); |
| 832 | if (ret != rx_bytes) { |
| 833 | dev_err(uport->dev, "%s: ret %d rx_bytes %d\n", __func__, |
| 834 | ret, rx_bytes); |
| 835 | WARN_ON(1); |
| 836 | } |
| 837 | uport->icount.rx += ret; |
| 838 | tty_flip_buffer_push(tport); |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 839 | dump_ipc(msm_port->ipc_log_rx, "Rx", (char *)msm_port->rx_fifo, 0, |
| 840 | rx_bytes); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 841 | return ret; |
| 842 | } |
| 843 | |
| 844 | static int msm_geni_serial_handle_rx(struct uart_port *uport) |
| 845 | { |
| 846 | int ret = 0; |
| 847 | unsigned int rx_fifo_status; |
| 848 | unsigned int rx_fifo_wc = 0; |
| 849 | unsigned int rx_last_byte_valid = 0; |
| 850 | unsigned int rx_last = 0; |
| 851 | struct tty_port *tport; |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 852 | struct msm_geni_serial_port *port = GET_DEV_PORT(uport); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 853 | |
| 854 | tport = &uport->state->port; |
Girish Mahadevan | bd9b44f | 2017-04-11 13:11:10 -0600 | [diff] [blame] | 855 | rx_fifo_status = geni_read_reg_nolog(uport->membase, |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 856 | SE_GENI_RX_FIFO_STATUS); |
| 857 | rx_fifo_wc = rx_fifo_status & RX_FIFO_WC_MSK; |
| 858 | rx_last_byte_valid = ((rx_fifo_status & RX_LAST_BYTE_VALID_MSK) >> |
| 859 | RX_LAST_BYTE_VALID_SHFT); |
| 860 | rx_last = rx_fifo_status & RX_LAST; |
| 861 | if (rx_fifo_wc) |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 862 | port->handle_rx(uport, rx_fifo_wc, rx_last_byte_valid, |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 863 | rx_last); |
| 864 | return ret; |
| 865 | } |
| 866 | |
| 867 | static int msm_geni_serial_handle_tx(struct uart_port *uport) |
| 868 | { |
| 869 | int ret = 0; |
| 870 | struct msm_geni_serial_port *msm_port = GET_DEV_PORT(uport); |
| 871 | struct circ_buf *xmit = &uport->state->xmit; |
| 872 | unsigned int avail_fifo_bytes = 0; |
| 873 | unsigned int bytes_remaining = 0; |
| 874 | int i = 0; |
| 875 | unsigned int tx_fifo_status; |
| 876 | unsigned int xmit_size; |
Girish Mahadevan | b1ab172 | 2017-04-27 16:39:11 -0600 | [diff] [blame] | 877 | unsigned int fifo_width_bytes = |
| 878 | (uart_console(uport) ? 1 : (msm_port->tx_fifo_width >> 3)); |
Karthikeyan Ramasubramanian | 61074fa | 2017-05-24 00:18:34 -0600 | [diff] [blame] | 879 | unsigned int geni_m_irq_en; |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 880 | |
Girish Mahadevan | bd9b44f | 2017-04-11 13:11:10 -0600 | [diff] [blame] | 881 | tx_fifo_status = geni_read_reg_nolog(uport->membase, |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 882 | SE_GENI_TX_FIFO_STATUS); |
| 883 | if (uart_circ_empty(xmit) && !tx_fifo_status) { |
| 884 | msm_geni_serial_stop_tx(uport); |
| 885 | goto exit_handle_tx; |
| 886 | } |
| 887 | |
Karthikeyan Ramasubramanian | 61074fa | 2017-05-24 00:18:34 -0600 | [diff] [blame] | 888 | if (!uart_console(uport)) { |
| 889 | geni_m_irq_en = geni_read_reg_nolog(uport->membase, |
| 890 | SE_GENI_M_IRQ_EN); |
| 891 | geni_m_irq_en &= ~(M_TX_FIFO_WATERMARK_EN); |
| 892 | geni_write_reg_nolog(0, uport->membase, |
| 893 | SE_GENI_TX_WATERMARK_REG); |
| 894 | geni_write_reg_nolog(geni_m_irq_en, uport->membase, |
| 895 | SE_GENI_M_IRQ_EN); |
| 896 | } |
| 897 | |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 898 | avail_fifo_bytes = (msm_port->tx_fifo_depth - msm_port->tx_wm) * |
| 899 | fifo_width_bytes; |
| 900 | xmit_size = uart_circ_chars_pending(xmit); |
| 901 | if (xmit_size > (UART_XMIT_SIZE - xmit->tail)) |
| 902 | xmit_size = UART_XMIT_SIZE - xmit->tail; |
| 903 | if (xmit_size > avail_fifo_bytes) |
| 904 | xmit_size = avail_fifo_bytes; |
| 905 | |
| 906 | if (!xmit_size) |
| 907 | goto exit_handle_tx; |
| 908 | |
| 909 | msm_geni_serial_setup_tx(uport, xmit_size); |
| 910 | |
| 911 | bytes_remaining = xmit_size; |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 912 | dump_ipc(msm_port->ipc_log_tx, "Tx", (char *)&xmit->buf[xmit->tail], 0, |
| 913 | xmit_size); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 914 | while (i < xmit_size) { |
| 915 | unsigned int tx_bytes; |
| 916 | unsigned int buf = 0; |
| 917 | int c; |
| 918 | |
| 919 | tx_bytes = ((bytes_remaining < fifo_width_bytes) ? |
| 920 | bytes_remaining : fifo_width_bytes); |
| 921 | |
| 922 | for (c = 0; c < tx_bytes ; c++) |
| 923 | buf |= (xmit->buf[xmit->tail + c] << (c * 8)); |
Girish Mahadevan | bd9b44f | 2017-04-11 13:11:10 -0600 | [diff] [blame] | 924 | geni_write_reg_nolog(buf, uport->membase, SE_GENI_TX_FIFOn); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 925 | xmit->tail = (xmit->tail + tx_bytes) & (UART_XMIT_SIZE - 1); |
| 926 | i += tx_bytes; |
| 927 | uport->icount.tx += tx_bytes; |
| 928 | bytes_remaining -= tx_bytes; |
| 929 | /* Ensure FIFO write goes through */ |
| 930 | wmb(); |
| 931 | } |
| 932 | msm_geni_serial_poll_cancel_tx(uport); |
Girish Mahadevan | b1ab172 | 2017-04-27 16:39:11 -0600 | [diff] [blame] | 933 | if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) |
| 934 | uart_write_wakeup(uport); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 935 | exit_handle_tx: |
| 936 | return ret; |
| 937 | } |
| 938 | |
| 939 | static irqreturn_t msm_geni_serial_isr(int isr, void *dev) |
| 940 | { |
| 941 | unsigned int m_irq_status; |
| 942 | unsigned int s_irq_status; |
| 943 | struct uart_port *uport = dev; |
| 944 | unsigned long flags; |
Karthikeyan Ramasubramanian | 61074fa | 2017-05-24 00:18:34 -0600 | [diff] [blame] | 945 | unsigned int m_irq_en; |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 946 | |
| 947 | spin_lock_irqsave(&uport->lock, flags); |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 948 | if (uart_console(uport) && uport->suspended) |
| 949 | goto exit_geni_serial_isr; |
| 950 | if (!uart_console(uport) && pm_runtime_status_suspended(uport->dev)) |
| 951 | goto exit_geni_serial_isr; |
Girish Mahadevan | bd9b44f | 2017-04-11 13:11:10 -0600 | [diff] [blame] | 952 | m_irq_status = geni_read_reg_nolog(uport->membase, |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 953 | SE_GENI_M_IRQ_STATUS); |
Girish Mahadevan | bd9b44f | 2017-04-11 13:11:10 -0600 | [diff] [blame] | 954 | s_irq_status = geni_read_reg_nolog(uport->membase, |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 955 | SE_GENI_S_IRQ_STATUS); |
| 956 | geni_write_reg_nolog(m_irq_status, uport->membase, |
| 957 | SE_GENI_M_IRQ_CLEAR); |
| 958 | geni_write_reg_nolog(s_irq_status, uport->membase, |
| 959 | SE_GENI_S_IRQ_CLEAR); |
Karthikeyan Ramasubramanian | 61074fa | 2017-05-24 00:18:34 -0600 | [diff] [blame] | 960 | m_irq_en = geni_read_reg_nolog(uport->membase, SE_GENI_M_IRQ_EN); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 961 | |
| 962 | if ((m_irq_status & M_ILLEGAL_CMD_EN)) { |
| 963 | WARN_ON(1); |
| 964 | goto exit_geni_serial_isr; |
| 965 | } |
| 966 | |
| 967 | if ((s_irq_status & S_RX_FIFO_WATERMARK_EN) || |
| 968 | (s_irq_status & S_RX_FIFO_LAST_EN)) { |
| 969 | msm_geni_serial_handle_rx(uport); |
| 970 | } |
| 971 | |
Karthikeyan Ramasubramanian | 61074fa | 2017-05-24 00:18:34 -0600 | [diff] [blame] | 972 | if ((m_irq_status & m_irq_en) & |
| 973 | (M_TX_FIFO_WATERMARK_EN | M_CMD_DONE_EN)) |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 974 | msm_geni_serial_handle_tx(uport); |
| 975 | |
| 976 | exit_geni_serial_isr: |
| 977 | spin_unlock_irqrestore(&uport->lock, flags); |
| 978 | return IRQ_HANDLED; |
| 979 | } |
| 980 | |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 981 | static irqreturn_t msm_geni_wakeup_isr(int isr, void *dev) |
| 982 | { |
| 983 | struct uart_port *uport = dev; |
| 984 | struct msm_geni_serial_port *port = GET_DEV_PORT(uport); |
| 985 | struct tty_struct *tty; |
| 986 | unsigned long flags; |
| 987 | |
| 988 | spin_lock_irqsave(&uport->lock, flags); |
| 989 | if (port->wakeup_byte) { |
| 990 | tty = uport->state->port.tty; |
| 991 | tty_insert_flip_char(tty->port, port->wakeup_byte, TTY_NORMAL); |
| 992 | IPC_LOG_MSG(port->ipc_log_rx, "%s: Inject 0x%x\n", |
| 993 | __func__, port->wakeup_byte); |
| 994 | tty_flip_buffer_push(tty->port); |
| 995 | } |
| 996 | __pm_wakeup_event(&port->geni_wake, WAKEBYTE_TIMEOUT_MSEC); |
| 997 | IPC_LOG_MSG(port->ipc_log_misc, "%s:Holding Wake Lock for %d ms\n", |
| 998 | __func__, WAKEBYTE_TIMEOUT_MSEC); |
| 999 | spin_unlock_irqrestore(&uport->lock, flags); |
| 1000 | return IRQ_HANDLED; |
| 1001 | } |
| 1002 | |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1003 | static int get_tx_fifo_size(struct msm_geni_serial_port *port) |
| 1004 | { |
| 1005 | struct uart_port *uport; |
| 1006 | |
| 1007 | if (!port) |
| 1008 | return -ENODEV; |
| 1009 | |
| 1010 | uport = &port->uport; |
| 1011 | port->tx_fifo_depth = get_tx_fifo_depth(uport->membase); |
| 1012 | if (!port->tx_fifo_depth) { |
| 1013 | dev_err(uport->dev, "%s:Invalid TX FIFO depth read\n", |
| 1014 | __func__); |
| 1015 | return -ENXIO; |
| 1016 | } |
| 1017 | |
| 1018 | port->tx_fifo_width = get_tx_fifo_width(uport->membase); |
| 1019 | if (!port->tx_fifo_width) { |
| 1020 | dev_err(uport->dev, "%s:Invalid TX FIFO width read\n", |
Karthikeyan Ramasubramanian | 56351b6 | 2017-04-21 15:11:03 -0600 | [diff] [blame] | 1021 | __func__); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1022 | return -ENXIO; |
| 1023 | } |
| 1024 | |
| 1025 | port->rx_fifo_depth = get_rx_fifo_depth(uport->membase); |
| 1026 | if (!port->rx_fifo_depth) { |
| 1027 | dev_err(uport->dev, "%s:Invalid RX FIFO depth read\n", |
| 1028 | __func__); |
| 1029 | return -ENXIO; |
| 1030 | } |
| 1031 | |
| 1032 | uport->fifosize = |
| 1033 | ((port->tx_fifo_depth * port->tx_fifo_width) >> 3); |
| 1034 | return 0; |
| 1035 | } |
| 1036 | |
| 1037 | static void set_rfr_wm(struct msm_geni_serial_port *port) |
| 1038 | { |
| 1039 | /* |
| 1040 | * Set RFR (Flow off) to FIFO_DEPTH - 2. |
| 1041 | * RX WM level at 50% RX_FIFO_DEPTH. |
| 1042 | * TX WM level at 10% TX_FIFO_DEPTH. |
| 1043 | */ |
| 1044 | port->rx_rfr = port->rx_fifo_depth - 2; |
| 1045 | port->rx_wm = port->rx_fifo_depth >> 1; |
| 1046 | port->tx_wm = 2; |
| 1047 | } |
| 1048 | |
| 1049 | static void msm_geni_serial_shutdown(struct uart_port *uport) |
| 1050 | { |
| 1051 | struct msm_geni_serial_port *msm_port = GET_DEV_PORT(uport); |
Karthikeyan Ramasubramanian | f5fb743 | 2017-05-24 21:59:55 -0600 | [diff] [blame] | 1052 | unsigned long flags; |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1053 | |
Karthikeyan Ramasubramanian | f5fb743 | 2017-05-24 21:59:55 -0600 | [diff] [blame] | 1054 | /* Stop the console before stopping the current tx */ |
| 1055 | if (uart_console(uport)) |
| 1056 | console_stop(uport->cons); |
| 1057 | |
| 1058 | spin_lock_irqsave(&uport->lock, flags); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1059 | msm_geni_serial_stop_tx(uport); |
| 1060 | msm_geni_serial_stop_rx(uport); |
Karthikeyan Ramasubramanian | f5fb743 | 2017-05-24 21:59:55 -0600 | [diff] [blame] | 1061 | spin_unlock_irqrestore(&uport->lock, flags); |
| 1062 | |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1063 | disable_irq(uport->irq); |
| 1064 | free_irq(uport->irq, msm_port); |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 1065 | if (uart_console(uport)) { |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1066 | se_geni_resources_off(&msm_port->serial_rsc); |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 1067 | } else { |
| 1068 | if (msm_port->wakeup_irq > 0) { |
| 1069 | disable_irq(msm_port->wakeup_irq); |
| 1070 | free_irq(msm_port->wakeup_irq, msm_port); |
| 1071 | } |
| 1072 | __pm_relax(&msm_port->geni_wake); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1073 | msm_geni_serial_power_off(uport); |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 1074 | } |
| 1075 | IPC_LOG_MSG(msm_port->ipc_log_misc, "%s\n", __func__); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1076 | } |
| 1077 | |
| 1078 | static int msm_geni_serial_port_setup(struct uart_port *uport) |
| 1079 | { |
| 1080 | int ret = 0; |
| 1081 | struct msm_geni_serial_port *msm_port = GET_DEV_PORT(uport); |
Girish Mahadevan | b1ab172 | 2017-04-27 16:39:11 -0600 | [diff] [blame] | 1082 | unsigned long cfg0, cfg1; |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1083 | |
Girish Mahadevan | b1ab172 | 2017-04-27 16:39:11 -0600 | [diff] [blame] | 1084 | |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 1085 | set_rfr_wm(msm_port); |
Girish Mahadevan | b1ab172 | 2017-04-27 16:39:11 -0600 | [diff] [blame] | 1086 | if (!uart_console(uport)) { |
| 1087 | /* For now only assume FIFO mode. */ |
| 1088 | msm_port->xfer_mode = FIFO_MODE; |
Girish Mahadevan | b1ab172 | 2017-04-27 16:39:11 -0600 | [diff] [blame] | 1089 | se_get_packing_config(8, 4, false, &cfg0, &cfg1); |
| 1090 | geni_write_reg_nolog(cfg0, uport->membase, |
| 1091 | SE_GENI_TX_PACKING_CFG0); |
| 1092 | geni_write_reg_nolog(cfg1, uport->membase, |
| 1093 | SE_GENI_TX_PACKING_CFG1); |
Karthikeyan Ramasubramanian | c8b095c | 2017-05-24 00:09:01 -0600 | [diff] [blame] | 1094 | msm_port->handle_rx = handle_rx_hs; |
| 1095 | msm_port->rx_fifo = devm_kzalloc(uport->dev, |
| 1096 | sizeof(msm_port->rx_fifo_depth * sizeof(u32)), |
| 1097 | GFP_KERNEL); |
| 1098 | if (!msm_port->rx_fifo) { |
| 1099 | ret = -ENOMEM; |
| 1100 | goto exit_portsetup; |
| 1101 | } |
Girish Mahadevan | a4ed038 | 2017-05-12 11:25:30 -0600 | [diff] [blame] | 1102 | } else { |
| 1103 | /* |
| 1104 | * Make an unconditional cancel on the main sequencer to reset |
| 1105 | * it else we could end up in data loss scenarios. |
| 1106 | */ |
| 1107 | msm_port->xfer_mode = FIFO_MODE; |
| 1108 | msm_geni_serial_poll_cancel_tx(uport); |
| 1109 | se_get_packing_config(8, 1, false, &cfg0, &cfg1); |
| 1110 | geni_write_reg_nolog(cfg0, uport->membase, |
| 1111 | SE_GENI_TX_PACKING_CFG0); |
| 1112 | geni_write_reg_nolog(cfg1, uport->membase, |
| 1113 | SE_GENI_TX_PACKING_CFG1); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1114 | } |
Girish Mahadevan | a4ed038 | 2017-05-12 11:25:30 -0600 | [diff] [blame] | 1115 | ret = geni_se_init(uport->membase, msm_port->rx_wm, msm_port->rx_rfr); |
| 1116 | if (ret) { |
| 1117 | dev_err(uport->dev, "%s: Fail\n", __func__); |
| 1118 | goto exit_portsetup; |
| 1119 | } |
| 1120 | |
| 1121 | ret = geni_se_select_mode(uport->membase, msm_port->xfer_mode); |
| 1122 | if (ret) |
| 1123 | goto exit_portsetup; |
Karthikeyan Ramasubramanian | 0d578b7 | 2017-04-26 10:44:02 -0600 | [diff] [blame] | 1124 | |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1125 | msm_port->port_setup = true; |
| 1126 | /* |
| 1127 | * Ensure Port setup related IO completes before returning to |
| 1128 | * framework. |
| 1129 | */ |
| 1130 | mb(); |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 1131 | if (!uart_console(uport)) { |
| 1132 | char name[30]; |
| 1133 | |
| 1134 | memset(name, 0, sizeof(name)); |
| 1135 | if (!msm_port->ipc_log_rx) { |
| 1136 | scnprintf(name, sizeof(name), "%s%s", |
| 1137 | dev_name(uport->dev), "_rx"); |
| 1138 | msm_port->ipc_log_rx = ipc_log_context_create( |
| 1139 | IPC_LOG_TX_RX_PAGES, name, 0); |
| 1140 | if (!msm_port->ipc_log_rx) |
| 1141 | dev_info(uport->dev, "Err in Rx IPC Log\n"); |
| 1142 | } |
| 1143 | memset(name, 0, sizeof(name)); |
| 1144 | if (!msm_port->ipc_log_tx) { |
| 1145 | scnprintf(name, sizeof(name), "%s%s", |
| 1146 | dev_name(uport->dev), "_tx"); |
| 1147 | msm_port->ipc_log_tx = ipc_log_context_create( |
| 1148 | IPC_LOG_TX_RX_PAGES, name, 0); |
| 1149 | if (!msm_port->ipc_log_tx) |
| 1150 | dev_info(uport->dev, "Err in Tx IPC Log\n"); |
| 1151 | } |
| 1152 | memset(name, 0, sizeof(name)); |
| 1153 | if (!msm_port->ipc_log_pwr) { |
| 1154 | scnprintf(name, sizeof(name), "%s%s", |
| 1155 | dev_name(uport->dev), "_pwr"); |
| 1156 | msm_port->ipc_log_pwr = ipc_log_context_create( |
| 1157 | IPC_LOG_PWR_PAGES, name, 0); |
| 1158 | if (!msm_port->ipc_log_pwr) |
| 1159 | dev_info(uport->dev, "Err in Pwr IPC Log\n"); |
| 1160 | } |
| 1161 | memset(name, 0, sizeof(name)); |
| 1162 | if (!msm_port->ipc_log_misc) { |
| 1163 | scnprintf(name, sizeof(name), "%s%s", |
| 1164 | dev_name(uport->dev), "_misc"); |
| 1165 | msm_port->ipc_log_misc = ipc_log_context_create( |
| 1166 | IPC_LOG_MISC_PAGES, name, 0); |
| 1167 | if (!msm_port->ipc_log_misc) |
| 1168 | dev_info(uport->dev, "Err in Misc IPC Log\n"); |
| 1169 | } |
| 1170 | |
| 1171 | } |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1172 | exit_portsetup: |
| 1173 | return ret; |
| 1174 | } |
| 1175 | |
| 1176 | static int msm_geni_serial_startup(struct uart_port *uport) |
| 1177 | { |
| 1178 | int ret = 0; |
| 1179 | struct msm_geni_serial_port *msm_port = GET_DEV_PORT(uport); |
| 1180 | |
| 1181 | scnprintf(msm_port->name, sizeof(msm_port->name), "msm_serial_geni%d", |
| 1182 | uport->line); |
| 1183 | |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1184 | if (likely(!uart_console(uport))) { |
| 1185 | ret = msm_geni_serial_power_on(&msm_port->uport); |
| 1186 | if (ret) |
| 1187 | goto exit_startup; |
| 1188 | } |
| 1189 | |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 1190 | if (unlikely(get_se_proto(uport->membase) != UART)) { |
| 1191 | dev_err(uport->dev, "%s: Invalid FW %d loaded.\n", |
| 1192 | __func__, get_se_proto(uport->membase)); |
Girish Mahadevan | a4ed038 | 2017-05-12 11:25:30 -0600 | [diff] [blame] | 1193 | ret = -ENXIO; |
| 1194 | disable_irq(uport->irq); |
| 1195 | free_irq(uport->irq, msm_port); |
| 1196 | goto exit_startup; |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 1197 | } |
| 1198 | |
Karthikeyan Ramasubramanian | c8b095c | 2017-05-24 00:09:01 -0600 | [diff] [blame] | 1199 | get_tx_fifo_size(msm_port); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1200 | if (!msm_port->port_setup) { |
| 1201 | if (msm_geni_serial_port_setup(uport)) |
| 1202 | goto exit_startup; |
| 1203 | } |
| 1204 | |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1205 | msm_geni_serial_start_rx(uport); |
| 1206 | /* |
| 1207 | * Ensure that all the port configuration writes complete |
| 1208 | * before returning to the framework. |
| 1209 | */ |
| 1210 | mb(); |
Girish Mahadevan | 33661b8 | 2017-05-16 18:59:11 -0600 | [diff] [blame] | 1211 | ret = request_irq(uport->irq, msm_geni_serial_isr, IRQF_TRIGGER_HIGH, |
| 1212 | msm_port->name, msm_port); |
| 1213 | if (unlikely(ret)) { |
| 1214 | dev_err(uport->dev, "%s: Failed to get IRQ ret %d\n", |
| 1215 | __func__, ret); |
| 1216 | goto exit_startup; |
| 1217 | } |
| 1218 | |
| 1219 | if (msm_port->wakeup_irq > 0) { |
| 1220 | ret = request_threaded_irq(msm_port->wakeup_irq, NULL, |
| 1221 | msm_geni_wakeup_isr, |
| 1222 | IRQF_TRIGGER_FALLING | IRQF_ONESHOT, |
| 1223 | "hs_uart_wakeup", uport); |
| 1224 | if (unlikely(ret)) { |
| 1225 | dev_err(uport->dev, "%s:Failed to get WakeIRQ ret%d\n", |
| 1226 | __func__, ret); |
| 1227 | goto exit_startup; |
| 1228 | } |
| 1229 | disable_irq(msm_port->wakeup_irq); |
| 1230 | } |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 1231 | IPC_LOG_MSG(msm_port->ipc_log_misc, "%s\n", __func__); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1232 | exit_startup: |
| 1233 | return ret; |
| 1234 | } |
| 1235 | |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 1236 | static int get_clk_cfg(unsigned long clk_freq, unsigned long *ser_clk) |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1237 | { |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 1238 | unsigned long root_freq[] = {7372800, 14745600, 19200000, 29491200, |
| 1239 | 32000000, 48000000, 64000000, 80000000, 96000000, 100000000}; |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1240 | int i; |
| 1241 | int match = -1; |
| 1242 | |
| 1243 | for (i = 0; i < ARRAY_SIZE(root_freq); i++) { |
| 1244 | if (clk_freq > root_freq[i]) |
| 1245 | continue; |
| 1246 | |
| 1247 | if (!(root_freq[i] % clk_freq)) { |
| 1248 | match = i; |
| 1249 | break; |
| 1250 | } |
| 1251 | } |
| 1252 | if (match != -1) |
| 1253 | *ser_clk = root_freq[match]; |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 1254 | else |
| 1255 | pr_err("clk_freq %ld\n", clk_freq); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1256 | return match; |
| 1257 | } |
| 1258 | |
| 1259 | static void geni_serial_write_term_regs(struct uart_port *uport, u32 loopback, |
| 1260 | u32 tx_trans_cfg, u32 tx_parity_cfg, u32 rx_trans_cfg, |
| 1261 | u32 rx_parity_cfg, u32 bits_per_char, u32 stop_bit_len, |
Girish Mahadevan | b1ab172 | 2017-04-27 16:39:11 -0600 | [diff] [blame] | 1262 | u32 s_clk_cfg) |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1263 | { |
Girish Mahadevan | bd9b44f | 2017-04-11 13:11:10 -0600 | [diff] [blame] | 1264 | geni_write_reg_nolog(loopback, uport->membase, SE_UART_LOOPBACK_CFG); |
| 1265 | geni_write_reg_nolog(tx_trans_cfg, uport->membase, |
| 1266 | SE_UART_TX_TRANS_CFG); |
| 1267 | geni_write_reg_nolog(tx_parity_cfg, uport->membase, |
| 1268 | SE_UART_TX_PARITY_CFG); |
| 1269 | geni_write_reg_nolog(rx_trans_cfg, uport->membase, |
| 1270 | SE_UART_RX_TRANS_CFG); |
| 1271 | geni_write_reg_nolog(rx_parity_cfg, uport->membase, |
| 1272 | SE_UART_RX_PARITY_CFG); |
| 1273 | geni_write_reg_nolog(bits_per_char, uport->membase, |
| 1274 | SE_UART_TX_WORD_LEN); |
| 1275 | geni_write_reg_nolog(bits_per_char, uport->membase, |
| 1276 | SE_UART_RX_WORD_LEN); |
| 1277 | geni_write_reg_nolog(stop_bit_len, uport->membase, |
| 1278 | SE_UART_TX_STOP_BIT_LEN); |
Girish Mahadevan | bd9b44f | 2017-04-11 13:11:10 -0600 | [diff] [blame] | 1279 | geni_write_reg_nolog(s_clk_cfg, uport->membase, GENI_SER_M_CLK_CFG); |
| 1280 | geni_write_reg_nolog(s_clk_cfg, uport->membase, GENI_SER_S_CLK_CFG); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1281 | } |
| 1282 | |
| 1283 | static int get_clk_div_rate(unsigned int baud, unsigned long *desired_clk_rate) |
| 1284 | { |
| 1285 | unsigned long ser_clk; |
| 1286 | int dfs_index; |
| 1287 | int clk_div = 0; |
| 1288 | |
| 1289 | *desired_clk_rate = baud * UART_OVERSAMPLING; |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 1290 | dfs_index = get_clk_cfg(*desired_clk_rate, &ser_clk); |
| 1291 | if (dfs_index < 0) { |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1292 | pr_err("%s: Can't find matching DFS entry for baud %d\n", |
| 1293 | __func__, baud); |
| 1294 | clk_div = -EINVAL; |
| 1295 | goto exit_get_clk_div_rate; |
| 1296 | } |
| 1297 | |
| 1298 | clk_div = ser_clk / *desired_clk_rate; |
Girish Mahadevan | bd9b44f | 2017-04-11 13:11:10 -0600 | [diff] [blame] | 1299 | *desired_clk_rate = ser_clk; |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1300 | exit_get_clk_div_rate: |
| 1301 | return clk_div; |
| 1302 | } |
| 1303 | |
| 1304 | static void msm_geni_serial_set_termios(struct uart_port *uport, |
| 1305 | struct ktermios *termios, struct ktermios *old) |
| 1306 | { |
| 1307 | unsigned int baud; |
| 1308 | unsigned int bits_per_char = 0; |
| 1309 | unsigned int tx_trans_cfg; |
| 1310 | unsigned int tx_parity_cfg; |
| 1311 | unsigned int rx_trans_cfg; |
| 1312 | unsigned int rx_parity_cfg; |
| 1313 | unsigned int stop_bit_len; |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1314 | unsigned int clk_div; |
Girish Mahadevan | 18a9fb0 | 2017-03-29 11:26:06 -0600 | [diff] [blame] | 1315 | unsigned long ser_clk_cfg = 0; |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1316 | struct msm_geni_serial_port *port = GET_DEV_PORT(uport); |
| 1317 | unsigned long clk_rate; |
| 1318 | |
| 1319 | /* baud rate */ |
| 1320 | baud = uart_get_baud_rate(uport, termios, old, 300, 4000000); |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 1321 | port->cur_baud = baud; |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1322 | clk_div = get_clk_div_rate(baud, &clk_rate); |
| 1323 | if (clk_div <= 0) |
| 1324 | goto exit_set_termios; |
| 1325 | |
| 1326 | uport->uartclk = clk_rate; |
| 1327 | clk_set_rate(port->serial_rsc.se_clk, clk_rate); |
| 1328 | ser_clk_cfg |= SER_CLK_EN; |
| 1329 | ser_clk_cfg |= (clk_div << CLK_DIV_SHFT); |
| 1330 | |
| 1331 | /* parity */ |
Girish Mahadevan | bd9b44f | 2017-04-11 13:11:10 -0600 | [diff] [blame] | 1332 | tx_trans_cfg = geni_read_reg_nolog(uport->membase, |
| 1333 | SE_UART_TX_TRANS_CFG); |
| 1334 | tx_parity_cfg = geni_read_reg_nolog(uport->membase, |
| 1335 | SE_UART_TX_PARITY_CFG); |
| 1336 | rx_trans_cfg = geni_read_reg_nolog(uport->membase, |
| 1337 | SE_UART_RX_TRANS_CFG); |
| 1338 | rx_parity_cfg = geni_read_reg_nolog(uport->membase, |
| 1339 | SE_UART_RX_PARITY_CFG); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1340 | if (termios->c_cflag & PARENB) { |
| 1341 | tx_trans_cfg |= UART_TX_PAR_EN; |
| 1342 | rx_trans_cfg |= UART_RX_PAR_EN; |
| 1343 | tx_parity_cfg |= PAR_CALC_EN; |
| 1344 | rx_parity_cfg |= PAR_CALC_EN; |
| 1345 | if (termios->c_cflag & PARODD) { |
| 1346 | tx_parity_cfg |= PAR_ODD; |
| 1347 | rx_parity_cfg |= PAR_ODD; |
| 1348 | } else if (termios->c_cflag & CMSPAR) { |
| 1349 | tx_parity_cfg |= PAR_SPACE; |
| 1350 | rx_parity_cfg |= PAR_SPACE; |
| 1351 | } else { |
| 1352 | tx_parity_cfg |= PAR_EVEN; |
| 1353 | rx_parity_cfg |= PAR_EVEN; |
| 1354 | } |
| 1355 | } else { |
| 1356 | tx_trans_cfg &= ~UART_TX_PAR_EN; |
| 1357 | rx_trans_cfg &= ~UART_RX_PAR_EN; |
| 1358 | tx_parity_cfg &= ~PAR_CALC_EN; |
| 1359 | rx_parity_cfg &= ~PAR_CALC_EN; |
| 1360 | } |
| 1361 | |
| 1362 | /* bits per char */ |
| 1363 | switch (termios->c_cflag & CSIZE) { |
| 1364 | case CS5: |
| 1365 | bits_per_char = 5; |
| 1366 | break; |
| 1367 | case CS6: |
| 1368 | bits_per_char = 6; |
| 1369 | break; |
| 1370 | case CS7: |
| 1371 | bits_per_char = 7; |
| 1372 | break; |
| 1373 | case CS8: |
| 1374 | default: |
| 1375 | bits_per_char = 8; |
| 1376 | break; |
| 1377 | } |
| 1378 | |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1379 | |
| 1380 | /* stop bits */ |
| 1381 | if (termios->c_cflag & CSTOPB) |
| 1382 | stop_bit_len = TX_STOP_BIT_LEN_2; |
| 1383 | else |
| 1384 | stop_bit_len = TX_STOP_BIT_LEN_1; |
| 1385 | |
| 1386 | /* flow control, clear the CTS_MASK bit if using flow control. */ |
| 1387 | if (termios->c_cflag & CRTSCTS) |
| 1388 | tx_trans_cfg &= ~UART_CTS_MASK; |
| 1389 | else |
| 1390 | tx_trans_cfg |= UART_CTS_MASK; |
| 1391 | /* status bits to ignore */ |
| 1392 | |
Karthikeyan Ramasubramanian | 61074fa | 2017-05-24 00:18:34 -0600 | [diff] [blame] | 1393 | if (likely(baud)) |
| 1394 | uart_update_timeout(uport, termios->c_cflag, baud); |
| 1395 | |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1396 | geni_serial_write_term_regs(uport, port->loopback, tx_trans_cfg, |
| 1397 | tx_parity_cfg, rx_trans_cfg, rx_parity_cfg, bits_per_char, |
Girish Mahadevan | b1ab172 | 2017-04-27 16:39:11 -0600 | [diff] [blame] | 1398 | stop_bit_len, ser_clk_cfg); |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 1399 | IPC_LOG_MSG(port->ipc_log_misc, "%s: baud %d\n", __func__, baud); |
| 1400 | IPC_LOG_MSG(port->ipc_log_misc, "Tx: trans_cfg%d parity %d\n", |
| 1401 | tx_trans_cfg, tx_parity_cfg); |
| 1402 | IPC_LOG_MSG(port->ipc_log_misc, "Rx: trans_cfg%d parity %d", |
| 1403 | rx_trans_cfg, rx_parity_cfg); |
| 1404 | IPC_LOG_MSG(port->ipc_log_misc, "BitsChar%d stop bit%d\n", |
| 1405 | bits_per_char, stop_bit_len); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1406 | exit_set_termios: |
| 1407 | return; |
| 1408 | |
| 1409 | } |
| 1410 | |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 1411 | static unsigned int msm_geni_serial_tx_empty(struct uart_port *uport) |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1412 | { |
| 1413 | unsigned int tx_fifo_status; |
| 1414 | unsigned int is_tx_empty = 1; |
| 1415 | |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 1416 | tx_fifo_status = geni_read_reg_nolog(uport->membase, |
| 1417 | SE_GENI_TX_FIFO_STATUS); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1418 | if (tx_fifo_status) |
| 1419 | is_tx_empty = 0; |
| 1420 | |
| 1421 | return is_tx_empty; |
| 1422 | } |
| 1423 | |
Girish Mahadevan | f08b110 | 2017-04-02 19:27:28 -0600 | [diff] [blame] | 1424 | #if defined(CONFIG_SERIAL_CORE_CONSOLE) || defined(CONFIG_CONSOLE_POLL) |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1425 | static int __init msm_geni_console_setup(struct console *co, char *options) |
| 1426 | { |
| 1427 | struct uart_port *uport; |
| 1428 | struct msm_geni_serial_port *dev_port; |
| 1429 | int baud = 115200; |
| 1430 | int bits = 8; |
| 1431 | int parity = 'n'; |
| 1432 | int flow = 'n'; |
| 1433 | int ret = 0; |
| 1434 | |
| 1435 | if (unlikely(co->index >= GENI_UART_NR_PORTS || co->index < 0)) |
| 1436 | return -ENXIO; |
| 1437 | |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 1438 | dev_port = get_port_from_line(co->index, true); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1439 | if (IS_ERR_OR_NULL(dev_port)) { |
| 1440 | ret = PTR_ERR(dev_port); |
| 1441 | pr_err("Invalid line %d(%d)\n", co->index, ret); |
| 1442 | return ret; |
| 1443 | } |
| 1444 | |
| 1445 | uport = &dev_port->uport; |
| 1446 | |
| 1447 | if (unlikely(!uport->membase)) |
| 1448 | return -ENXIO; |
| 1449 | |
| 1450 | if (se_geni_resources_on(&dev_port->serial_rsc)) |
| 1451 | WARN_ON(1); |
| 1452 | |
| 1453 | if (unlikely(get_se_proto(uport->membase) != UART)) { |
| 1454 | se_geni_resources_off(&dev_port->serial_rsc); |
| 1455 | return -ENXIO; |
| 1456 | } |
| 1457 | |
| 1458 | if (!dev_port->port_setup) |
| 1459 | msm_geni_serial_port_setup(uport); |
| 1460 | |
| 1461 | if (options) |
| 1462 | uart_parse_options(options, &baud, &parity, &bits, &flow); |
| 1463 | |
| 1464 | return uart_set_options(uport, co, baud, parity, bits, flow); |
| 1465 | } |
| 1466 | |
Girish Mahadevan | f08b110 | 2017-04-02 19:27:28 -0600 | [diff] [blame] | 1467 | static void |
| 1468 | msm_geni_serial_early_console_write(struct console *con, const char *s, |
| 1469 | unsigned int n) |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1470 | { |
Girish Mahadevan | f08b110 | 2017-04-02 19:27:28 -0600 | [diff] [blame] | 1471 | struct earlycon_device *dev = con->data; |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1472 | |
Girish Mahadevan | f08b110 | 2017-04-02 19:27:28 -0600 | [diff] [blame] | 1473 | __msm_geni_serial_console_write(&dev->port, s, n); |
| 1474 | } |
| 1475 | |
| 1476 | static int __init |
| 1477 | msm_geni_serial_earlycon_setup(struct earlycon_device *dev, |
| 1478 | const char *opt) |
| 1479 | { |
| 1480 | struct uart_port *uport = &dev->port; |
| 1481 | int ret = 0; |
Girish Mahadevan | f08b110 | 2017-04-02 19:27:28 -0600 | [diff] [blame] | 1482 | u32 tx_trans_cfg = 0; |
| 1483 | u32 tx_parity_cfg = 0; |
| 1484 | u32 rx_trans_cfg = 0; |
| 1485 | u32 rx_parity_cfg = 0; |
| 1486 | u32 stop_bit = 0; |
| 1487 | u32 rx_stale = 0; |
| 1488 | u32 bits_per_char = 0; |
| 1489 | u32 s_clk_cfg = 0; |
| 1490 | u32 baud = 115200; |
| 1491 | u32 clk_div; |
| 1492 | unsigned long clk_rate; |
Girish Mahadevan | b1ab172 | 2017-04-27 16:39:11 -0600 | [diff] [blame] | 1493 | unsigned long cfg0, cfg1; |
Girish Mahadevan | f08b110 | 2017-04-02 19:27:28 -0600 | [diff] [blame] | 1494 | |
| 1495 | if (!uport->membase) { |
| 1496 | ret = -ENOMEM; |
| 1497 | goto exit_geni_serial_earlyconsetup; |
| 1498 | } |
| 1499 | |
| 1500 | if (get_se_proto(uport->membase) != UART) { |
| 1501 | ret = -ENXIO; |
| 1502 | goto exit_geni_serial_earlyconsetup; |
| 1503 | } |
| 1504 | |
Girish Mahadevan | f08b110 | 2017-04-02 19:27:28 -0600 | [diff] [blame] | 1505 | /* |
| 1506 | * Ignore Flow control. |
| 1507 | * Disable Tx Parity. |
| 1508 | * Don't check Parity during Rx. |
| 1509 | * Disable Rx Parity. |
| 1510 | * n = 8. |
| 1511 | * Stop bit = 0. |
| 1512 | * Stale timeout in bit-time (3 chars worth). |
| 1513 | */ |
| 1514 | tx_trans_cfg |= UART_CTS_MASK; |
| 1515 | tx_parity_cfg = 0; |
| 1516 | rx_trans_cfg = 0; |
| 1517 | rx_parity_cfg = 0; |
| 1518 | bits_per_char = 0x8; |
| 1519 | stop_bit = 0; |
| 1520 | rx_stale = 0x18; |
| 1521 | clk_div = get_clk_div_rate(baud, &clk_rate); |
| 1522 | if (clk_div <= 0) { |
| 1523 | ret = -EINVAL; |
| 1524 | goto exit_geni_serial_earlyconsetup; |
| 1525 | } |
| 1526 | |
| 1527 | s_clk_cfg |= SER_CLK_EN; |
| 1528 | s_clk_cfg |= (clk_div << CLK_DIV_SHFT); |
| 1529 | |
Girish Mahadevan | 24f5659 | 2017-04-15 17:35:05 -0600 | [diff] [blame] | 1530 | /* |
| 1531 | * Make an unconditional cancel on the main sequencer to reset |
| 1532 | * it else we could end up in data loss scenarios. |
| 1533 | */ |
| 1534 | msm_geni_serial_poll_cancel_tx(uport); |
Girish Mahadevan | a4ed038 | 2017-05-12 11:25:30 -0600 | [diff] [blame] | 1535 | msm_geni_serial_abort_rx(uport); |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 1536 | se_get_packing_config(8, 1, false, &cfg0, &cfg1); |
Girish Mahadevan | a4ed038 | 2017-05-12 11:25:30 -0600 | [diff] [blame] | 1537 | geni_se_init(uport->membase, (DEF_FIFO_DEPTH_WORDS >> 1), |
| 1538 | (DEF_FIFO_DEPTH_WORDS - 2)); |
| 1539 | geni_se_select_mode(uport->membase, FIFO_MODE); |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 1540 | geni_write_reg_nolog(cfg0, uport->membase, SE_GENI_TX_PACKING_CFG0); |
| 1541 | geni_write_reg_nolog(cfg1, uport->membase, SE_GENI_TX_PACKING_CFG1); |
| 1542 | geni_write_reg_nolog(tx_trans_cfg, uport->membase, |
| 1543 | SE_UART_TX_TRANS_CFG); |
| 1544 | geni_write_reg_nolog(tx_parity_cfg, uport->membase, |
| 1545 | SE_UART_TX_PARITY_CFG); |
| 1546 | geni_write_reg_nolog(rx_trans_cfg, uport->membase, |
| 1547 | SE_UART_RX_TRANS_CFG); |
| 1548 | geni_write_reg_nolog(rx_parity_cfg, uport->membase, |
| 1549 | SE_UART_RX_PARITY_CFG); |
| 1550 | geni_write_reg_nolog(bits_per_char, uport->membase, |
| 1551 | SE_UART_TX_WORD_LEN); |
| 1552 | geni_write_reg_nolog(bits_per_char, uport->membase, |
| 1553 | SE_UART_RX_WORD_LEN); |
| 1554 | geni_write_reg_nolog(stop_bit, uport->membase, SE_UART_TX_STOP_BIT_LEN); |
| 1555 | geni_write_reg_nolog(s_clk_cfg, uport->membase, GENI_SER_M_CLK_CFG); |
| 1556 | geni_write_reg_nolog(s_clk_cfg, uport->membase, GENI_SER_S_CLK_CFG); |
Girish Mahadevan | f08b110 | 2017-04-02 19:27:28 -0600 | [diff] [blame] | 1557 | |
| 1558 | dev->con->write = msm_geni_serial_early_console_write; |
| 1559 | dev->con->setup = NULL; |
| 1560 | /* |
| 1561 | * Ensure that the early console setup completes before |
| 1562 | * returning. |
| 1563 | */ |
| 1564 | mb(); |
| 1565 | exit_geni_serial_earlyconsetup: |
| 1566 | return ret; |
| 1567 | } |
| 1568 | OF_EARLYCON_DECLARE(msm_geni_serial, "qcom,msm-geni-uart", |
| 1569 | msm_geni_serial_earlycon_setup); |
| 1570 | |
| 1571 | static int console_register(struct uart_driver *drv) |
| 1572 | { |
| 1573 | return uart_register_driver(drv); |
| 1574 | } |
| 1575 | static void console_unregister(struct uart_driver *drv) |
| 1576 | { |
| 1577 | uart_unregister_driver(drv); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1578 | } |
| 1579 | |
| 1580 | static struct console cons_ops = { |
| 1581 | .name = "ttyMSM", |
| 1582 | .write = msm_geni_serial_console_write, |
| 1583 | .device = uart_console_device, |
| 1584 | .setup = msm_geni_console_setup, |
| 1585 | .flags = CON_PRINTBUFFER, |
| 1586 | .index = -1, |
| 1587 | .data = &msm_geni_console_driver, |
| 1588 | }; |
| 1589 | |
Girish Mahadevan | f08b110 | 2017-04-02 19:27:28 -0600 | [diff] [blame] | 1590 | static struct uart_driver msm_geni_console_driver = { |
| 1591 | .owner = THIS_MODULE, |
| 1592 | .driver_name = "msm_geni_console", |
| 1593 | .dev_name = "ttyMSM", |
| 1594 | .nr = GENI_UART_NR_PORTS, |
| 1595 | .cons = &cons_ops, |
| 1596 | }; |
| 1597 | #else |
| 1598 | static int console_register(struct uart_driver *drv) |
| 1599 | { |
| 1600 | return 0; |
| 1601 | } |
| 1602 | |
| 1603 | static void console_unregister(struct uart_driver *drv) |
| 1604 | { |
| 1605 | } |
| 1606 | #endif /* defined(CONFIG_SERIAL_CORE_CONSOLE) || defined(CONFIG_CONSOLE_POLL) */ |
| 1607 | |
| 1608 | static void msm_geni_serial_debug_init(struct uart_port *uport) |
| 1609 | { |
| 1610 | struct msm_geni_serial_port *msm_port = GET_DEV_PORT(uport); |
| 1611 | |
| 1612 | msm_port->dbg = debugfs_create_dir(dev_name(uport->dev), NULL); |
| 1613 | if (IS_ERR_OR_NULL(msm_port->dbg)) |
| 1614 | dev_err(uport->dev, "Failed to create dbg dir\n"); |
| 1615 | } |
| 1616 | |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 1617 | static const struct uart_ops msm_geni_console_pops = { |
| 1618 | .tx_empty = msm_geni_serial_tx_empty, |
| 1619 | .stop_tx = msm_geni_serial_stop_tx, |
| 1620 | .start_tx = msm_geni_serial_start_tx, |
| 1621 | .stop_rx = msm_geni_serial_stop_rx, |
| 1622 | .set_termios = msm_geni_serial_set_termios, |
| 1623 | .startup = msm_geni_serial_startup, |
| 1624 | .config_port = msm_geni_serial_config_port, |
| 1625 | .shutdown = msm_geni_serial_shutdown, |
| 1626 | .type = msm_geni_serial_get_type, |
| 1627 | .set_mctrl = msm_geni_cons_set_mctrl, |
Karthikeyan Ramasubramanian | f5fb743 | 2017-05-24 21:59:55 -0600 | [diff] [blame] | 1628 | .get_mctrl = msm_geni_cons_get_mctrl, |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 1629 | #ifdef CONFIG_CONSOLE_POLL |
| 1630 | .poll_get_char = msm_geni_serial_get_char, |
| 1631 | .poll_put_char = msm_geni_serial_poll_put_char, |
| 1632 | #endif |
| 1633 | }; |
| 1634 | |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1635 | static const struct uart_ops msm_geni_serial_pops = { |
| 1636 | .tx_empty = msm_geni_serial_tx_empty, |
| 1637 | .stop_tx = msm_geni_serial_stop_tx, |
| 1638 | .start_tx = msm_geni_serial_start_tx, |
| 1639 | .stop_rx = msm_geni_serial_stop_rx, |
| 1640 | .set_termios = msm_geni_serial_set_termios, |
| 1641 | .startup = msm_geni_serial_startup, |
| 1642 | .config_port = msm_geni_serial_config_port, |
| 1643 | .shutdown = msm_geni_serial_shutdown, |
| 1644 | .type = msm_geni_serial_get_type, |
| 1645 | .set_mctrl = msm_geni_serial_set_mctrl, |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 1646 | .get_mctrl = msm_geni_serial_get_mctrl, |
| 1647 | .break_ctl = msm_geni_serial_break_ctl, |
| 1648 | .flush_buffer = NULL, |
| 1649 | .ioctl = msm_geni_serial_ioctl, |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1650 | }; |
| 1651 | |
| 1652 | static const struct of_device_id msm_geni_device_tbl[] = { |
Girish Mahadevan | f08b110 | 2017-04-02 19:27:28 -0600 | [diff] [blame] | 1653 | #if defined(CONFIG_SERIAL_CORE_CONSOLE) || defined(CONFIG_CONSOLE_POLL) |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1654 | { .compatible = "qcom,msm-geni-console", |
| 1655 | .data = (void *)&msm_geni_console_driver}, |
Girish Mahadevan | f08b110 | 2017-04-02 19:27:28 -0600 | [diff] [blame] | 1656 | #endif |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1657 | { .compatible = "qcom,msm-geni-serial-hs", |
| 1658 | .data = (void *)&msm_geni_serial_hs_driver}, |
| 1659 | {}, |
| 1660 | }; |
| 1661 | |
| 1662 | static int msm_geni_serial_probe(struct platform_device *pdev) |
| 1663 | { |
| 1664 | int ret = 0; |
| 1665 | int line; |
| 1666 | struct msm_geni_serial_port *dev_port; |
| 1667 | struct uart_port *uport; |
| 1668 | struct resource *res; |
| 1669 | struct uart_driver *drv; |
| 1670 | const struct of_device_id *id; |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 1671 | bool is_console = false; |
Karthikeyan Ramasubramanian | 0d578b7 | 2017-04-26 10:44:02 -0600 | [diff] [blame] | 1672 | struct platform_device *wrapper_pdev; |
| 1673 | struct device_node *wrapper_ph_node; |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1674 | |
| 1675 | id = of_match_device(msm_geni_device_tbl, &pdev->dev); |
| 1676 | if (id) { |
| 1677 | dev_dbg(&pdev->dev, "%s: %s\n", __func__, id->compatible); |
| 1678 | drv = (struct uart_driver *)id->data; |
| 1679 | } else { |
| 1680 | dev_err(&pdev->dev, "%s: No matching device found", __func__); |
| 1681 | return -ENODEV; |
| 1682 | } |
| 1683 | |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 1684 | if (pdev->dev.of_node) { |
| 1685 | if (drv->cons) |
| 1686 | line = of_alias_get_id(pdev->dev.of_node, "serial"); |
| 1687 | else |
| 1688 | line = of_alias_get_id(pdev->dev.of_node, "hsuart"); |
| 1689 | } else { |
| 1690 | line = pdev->id; |
| 1691 | } |
| 1692 | |
| 1693 | if (line < 0) |
| 1694 | line = atomic_inc_return(&uart_line_id) - 1; |
| 1695 | |
| 1696 | if ((line < 0) || (line >= GENI_UART_NR_PORTS)) |
| 1697 | return -ENXIO; |
| 1698 | is_console = (drv->cons ? true : false); |
| 1699 | dev_port = get_port_from_line(line, is_console); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1700 | if (IS_ERR_OR_NULL(dev_port)) { |
| 1701 | ret = PTR_ERR(dev_port); |
| 1702 | dev_err(&pdev->dev, "Invalid line %d(%d)\n", |
| 1703 | line, ret); |
| 1704 | goto exit_geni_serial_probe; |
| 1705 | } |
| 1706 | |
| 1707 | uport = &dev_port->uport; |
| 1708 | |
| 1709 | /* Don't allow 2 drivers to access the same port */ |
| 1710 | if (uport->private_data) { |
| 1711 | ret = -ENODEV; |
| 1712 | goto exit_geni_serial_probe; |
| 1713 | } |
| 1714 | |
| 1715 | uport->dev = &pdev->dev; |
Girish Mahadevan | 3e694cc | 2017-04-19 16:50:03 -0600 | [diff] [blame] | 1716 | |
Karthikeyan Ramasubramanian | 0d578b7 | 2017-04-26 10:44:02 -0600 | [diff] [blame] | 1717 | wrapper_ph_node = of_parse_phandle(pdev->dev.of_node, |
| 1718 | "qcom,wrapper-core", 0); |
| 1719 | if (IS_ERR_OR_NULL(wrapper_ph_node)) { |
| 1720 | ret = PTR_ERR(wrapper_ph_node); |
| 1721 | goto exit_geni_serial_probe; |
Girish Mahadevan | 3e694cc | 2017-04-19 16:50:03 -0600 | [diff] [blame] | 1722 | } |
Karthikeyan Ramasubramanian | 0d578b7 | 2017-04-26 10:44:02 -0600 | [diff] [blame] | 1723 | wrapper_pdev = of_find_device_by_node(wrapper_ph_node); |
| 1724 | of_node_put(wrapper_ph_node); |
| 1725 | if (IS_ERR_OR_NULL(wrapper_pdev)) { |
| 1726 | ret = PTR_ERR(wrapper_pdev); |
| 1727 | goto exit_geni_serial_probe; |
| 1728 | } |
| 1729 | dev_port->wrapper_dev = &wrapper_pdev->dev; |
| 1730 | dev_port->serial_rsc.wrapper_dev = &wrapper_pdev->dev; |
| 1731 | ret = geni_se_resources_init(&dev_port->serial_rsc, UART_CORE2X_VOTE, |
| 1732 | (DEFAULT_SE_CLK * DEFAULT_BUS_WIDTH)); |
| 1733 | if (ret) |
| 1734 | goto exit_geni_serial_probe; |
Girish Mahadevan | 3e694cc | 2017-04-19 16:50:03 -0600 | [diff] [blame] | 1735 | |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 1736 | if (of_property_read_u8(pdev->dev.of_node, "qcom,wakeup-byte", |
| 1737 | &dev_port->wakeup_byte)) |
| 1738 | dev_info(&pdev->dev, "No Wakeup byte specified\n"); |
| 1739 | |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1740 | dev_port->serial_rsc.se_clk = devm_clk_get(&pdev->dev, "se-clk"); |
| 1741 | if (IS_ERR(dev_port->serial_rsc.se_clk)) { |
| 1742 | ret = PTR_ERR(dev_port->serial_rsc.se_clk); |
| 1743 | dev_err(&pdev->dev, "Err getting SE Core clk %d\n", ret); |
| 1744 | goto exit_geni_serial_probe; |
| 1745 | } |
| 1746 | |
| 1747 | dev_port->serial_rsc.m_ahb_clk = devm_clk_get(&pdev->dev, "m-ahb"); |
| 1748 | if (IS_ERR(dev_port->serial_rsc.m_ahb_clk)) { |
| 1749 | ret = PTR_ERR(dev_port->serial_rsc.m_ahb_clk); |
| 1750 | dev_err(&pdev->dev, "Err getting M AHB clk %d\n", ret); |
| 1751 | goto exit_geni_serial_probe; |
| 1752 | } |
| 1753 | |
| 1754 | dev_port->serial_rsc.s_ahb_clk = devm_clk_get(&pdev->dev, "s-ahb"); |
| 1755 | if (IS_ERR(dev_port->serial_rsc.s_ahb_clk)) { |
| 1756 | ret = PTR_ERR(dev_port->serial_rsc.s_ahb_clk); |
| 1757 | dev_err(&pdev->dev, "Err getting S AHB clk %d\n", ret); |
| 1758 | goto exit_geni_serial_probe; |
| 1759 | } |
| 1760 | |
| 1761 | res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "se_phys"); |
| 1762 | if (!res) { |
| 1763 | ret = -ENXIO; |
| 1764 | dev_err(&pdev->dev, "Err getting IO region\n"); |
| 1765 | goto exit_geni_serial_probe; |
| 1766 | } |
| 1767 | |
| 1768 | uport->mapbase = res->start; |
| 1769 | uport->membase = devm_ioremap(&pdev->dev, res->start, |
| 1770 | resource_size(res)); |
| 1771 | if (!uport->membase) { |
| 1772 | ret = -ENOMEM; |
| 1773 | dev_err(&pdev->dev, "Err IO mapping serial iomem"); |
| 1774 | goto exit_geni_serial_probe; |
| 1775 | } |
| 1776 | |
| 1777 | dev_port->serial_rsc.geni_pinctrl = devm_pinctrl_get(&pdev->dev); |
| 1778 | if (IS_ERR_OR_NULL(dev_port->serial_rsc.geni_pinctrl)) { |
| 1779 | dev_err(&pdev->dev, "No pinctrl config specified!\n"); |
| 1780 | ret = PTR_ERR(dev_port->serial_rsc.geni_pinctrl); |
| 1781 | goto exit_geni_serial_probe; |
| 1782 | } |
| 1783 | dev_port->serial_rsc.geni_gpio_active = |
| 1784 | pinctrl_lookup_state(dev_port->serial_rsc.geni_pinctrl, |
| 1785 | PINCTRL_DEFAULT); |
| 1786 | if (IS_ERR_OR_NULL(dev_port->serial_rsc.geni_gpio_active)) { |
| 1787 | dev_err(&pdev->dev, "No default config specified!\n"); |
| 1788 | ret = PTR_ERR(dev_port->serial_rsc.geni_gpio_active); |
| 1789 | goto exit_geni_serial_probe; |
| 1790 | } |
| 1791 | dev_port->serial_rsc.geni_gpio_sleep = |
| 1792 | pinctrl_lookup_state(dev_port->serial_rsc.geni_pinctrl, |
| 1793 | PINCTRL_SLEEP); |
| 1794 | if (IS_ERR_OR_NULL(dev_port->serial_rsc.geni_gpio_sleep)) { |
| 1795 | dev_err(&pdev->dev, "No sleep config specified!\n"); |
| 1796 | ret = PTR_ERR(dev_port->serial_rsc.geni_gpio_sleep); |
| 1797 | goto exit_geni_serial_probe; |
| 1798 | } |
| 1799 | |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 1800 | wakeup_source_init(&dev_port->geni_wake, dev_name(&pdev->dev)); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1801 | dev_port->tx_fifo_depth = DEF_FIFO_DEPTH_WORDS; |
| 1802 | dev_port->rx_fifo_depth = DEF_FIFO_DEPTH_WORDS; |
| 1803 | dev_port->tx_fifo_width = DEF_FIFO_WIDTH_BITS; |
| 1804 | uport->fifosize = |
| 1805 | ((dev_port->tx_fifo_depth * dev_port->tx_fifo_width) >> 3); |
| 1806 | |
| 1807 | uport->irq = platform_get_irq(pdev, 0); |
| 1808 | if (uport->irq < 0) { |
| 1809 | ret = uport->irq; |
| 1810 | dev_err(&pdev->dev, "Failed to get IRQ %d\n", ret); |
| 1811 | goto exit_geni_serial_probe; |
| 1812 | } |
| 1813 | |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 1814 | /* Optional to use the Rx pin as wakeup irq */ |
| 1815 | dev_port->wakeup_irq = platform_get_irq(pdev, 1); |
| 1816 | if ((dev_port->wakeup_irq < 0 && !is_console)) |
| 1817 | dev_info(&pdev->dev, "No wakeup IRQ configured\n"); |
| 1818 | |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1819 | uport->private_data = (void *)drv; |
| 1820 | platform_set_drvdata(pdev, dev_port); |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 1821 | if (is_console) { |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1822 | dev_port->handle_rx = handle_rx_console; |
| 1823 | dev_port->rx_fifo = devm_kzalloc(uport->dev, sizeof(u32), |
| 1824 | GFP_KERNEL); |
| 1825 | } else { |
Girish Mahadevan | 33661b8 | 2017-05-16 18:59:11 -0600 | [diff] [blame] | 1826 | pm_runtime_set_suspended(&pdev->dev); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1827 | pm_runtime_enable(&pdev->dev); |
| 1828 | } |
| 1829 | |
| 1830 | dev_info(&pdev->dev, "Serial port%d added.FifoSize %d is_console%d\n", |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 1831 | line, uport->fifosize, is_console); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1832 | device_create_file(uport->dev, &dev_attr_loopback); |
| 1833 | msm_geni_serial_debug_init(uport); |
| 1834 | dev_port->port_setup = false; |
| 1835 | return uart_add_one_port(drv, uport); |
| 1836 | |
| 1837 | exit_geni_serial_probe: |
| 1838 | return ret; |
| 1839 | } |
| 1840 | |
| 1841 | static int msm_geni_serial_remove(struct platform_device *pdev) |
| 1842 | { |
| 1843 | struct msm_geni_serial_port *port = platform_get_drvdata(pdev); |
| 1844 | struct uart_driver *drv = |
| 1845 | (struct uart_driver *)port->uport.private_data; |
| 1846 | |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 1847 | wakeup_source_trash(&port->geni_wake); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1848 | uart_remove_one_port(drv, &port->uport); |
| 1849 | return 0; |
| 1850 | } |
| 1851 | |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1852 | |
| 1853 | #ifdef CONFIG_PM |
| 1854 | static int msm_geni_serial_runtime_suspend(struct device *dev) |
| 1855 | { |
| 1856 | struct platform_device *pdev = to_platform_device(dev); |
| 1857 | struct msm_geni_serial_port *port = platform_get_drvdata(pdev); |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 1858 | int ret = 0; |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1859 | |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 1860 | ret = se_geni_resources_off(&port->serial_rsc); |
| 1861 | if (ret) { |
| 1862 | dev_err(dev, "%s: Error ret %d\n", __func__, ret); |
| 1863 | goto exit_runtime_suspend; |
| 1864 | } |
| 1865 | if (port->wakeup_irq > 0) |
| 1866 | enable_irq(port->wakeup_irq); |
Girish Mahadevan | a4ed038 | 2017-05-12 11:25:30 -0600 | [diff] [blame] | 1867 | IPC_LOG_MSG(port->ipc_log_pwr, "%s:\n", __func__); |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 1868 | exit_runtime_suspend: |
| 1869 | return ret; |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1870 | } |
| 1871 | |
| 1872 | static int msm_geni_serial_runtime_resume(struct device *dev) |
| 1873 | { |
| 1874 | struct platform_device *pdev = to_platform_device(dev); |
| 1875 | struct msm_geni_serial_port *port = platform_get_drvdata(pdev); |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 1876 | int ret = 0; |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1877 | |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 1878 | if (port->wakeup_irq > 0) |
| 1879 | disable_irq(port->wakeup_irq); |
| 1880 | ret = se_geni_resources_on(&port->serial_rsc); |
| 1881 | if (ret) { |
| 1882 | dev_err(dev, "%s: Error ret %d\n", __func__, ret); |
| 1883 | goto exit_runtime_resume; |
| 1884 | } |
Girish Mahadevan | a4ed038 | 2017-05-12 11:25:30 -0600 | [diff] [blame] | 1885 | IPC_LOG_MSG(port->ipc_log_pwr, "%s:\n", __func__); |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 1886 | exit_runtime_resume: |
| 1887 | return ret; |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1888 | } |
| 1889 | |
| 1890 | static int msm_geni_serial_sys_suspend_noirq(struct device *dev) |
| 1891 | { |
| 1892 | struct platform_device *pdev = to_platform_device(dev); |
| 1893 | struct msm_geni_serial_port *port = platform_get_drvdata(pdev); |
| 1894 | struct uart_port *uport = &port->uport; |
| 1895 | |
| 1896 | if (uart_console(uport)) { |
| 1897 | uart_suspend_port((struct uart_driver *)uport->private_data, |
| 1898 | uport); |
| 1899 | } else { |
| 1900 | if (!pm_runtime_status_suspended(dev)) { |
| 1901 | dev_info(dev, "%s: Is still active\n", __func__); |
| 1902 | return -EBUSY; |
| 1903 | } |
| 1904 | } |
| 1905 | return 0; |
| 1906 | } |
| 1907 | |
| 1908 | static int msm_geni_serial_sys_resume_noirq(struct device *dev) |
| 1909 | { |
| 1910 | struct platform_device *pdev = to_platform_device(dev); |
| 1911 | struct msm_geni_serial_port *port = platform_get_drvdata(pdev); |
| 1912 | struct uart_port *uport = &port->uport; |
| 1913 | |
Karthikeyan Ramasubramanian | 29d76c2 | 2017-07-19 10:55:49 -0600 | [diff] [blame] | 1914 | if (uart_console(uport) && |
| 1915 | console_suspend_enabled && uport->suspended) { |
Girish Mahadevan | b1ab172 | 2017-04-27 16:39:11 -0600 | [diff] [blame] | 1916 | se_geni_resources_on(&port->serial_rsc); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1917 | uart_resume_port((struct uart_driver *)uport->private_data, |
| 1918 | uport); |
Girish Mahadevan | b1ab172 | 2017-04-27 16:39:11 -0600 | [diff] [blame] | 1919 | } |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1920 | return 0; |
| 1921 | } |
| 1922 | #else |
| 1923 | static int msm_geni_serial_runtime_suspend(struct device *dev) |
| 1924 | { |
| 1925 | return 0; |
| 1926 | } |
| 1927 | |
| 1928 | static int msm_geni_serial_runtime_resume(struct device *dev) |
| 1929 | { |
| 1930 | return 0; |
| 1931 | } |
| 1932 | |
| 1933 | static int msm_geni_serial_sys_suspend_noirq(struct device *dev) |
| 1934 | { |
| 1935 | return 0; |
| 1936 | } |
| 1937 | |
| 1938 | static int msm_geni_serial_sys_resume_noirq(struct device *dev) |
| 1939 | { |
| 1940 | return 0; |
| 1941 | } |
| 1942 | #endif |
| 1943 | |
| 1944 | static const struct dev_pm_ops msm_geni_serial_pm_ops = { |
| 1945 | .runtime_suspend = msm_geni_serial_runtime_suspend, |
| 1946 | .runtime_resume = msm_geni_serial_runtime_resume, |
| 1947 | .suspend_noirq = msm_geni_serial_sys_suspend_noirq, |
| 1948 | .resume_noirq = msm_geni_serial_sys_resume_noirq, |
| 1949 | }; |
| 1950 | |
| 1951 | static const struct of_device_id msm_geni_serial_match_table[] = { |
| 1952 | { .compatible = "qcom,msm-geni-uart"}, |
| 1953 | {}, |
| 1954 | }; |
| 1955 | |
| 1956 | static struct platform_driver msm_geni_serial_platform_driver = { |
| 1957 | .remove = msm_geni_serial_remove, |
| 1958 | .probe = msm_geni_serial_probe, |
| 1959 | .driver = { |
| 1960 | .name = "msm_geni_serial", |
| 1961 | .of_match_table = msm_geni_serial_match_table, |
| 1962 | .pm = &msm_geni_serial_pm_ops, |
| 1963 | }, |
| 1964 | }; |
| 1965 | |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1966 | |
| 1967 | static struct uart_driver msm_geni_serial_hs_driver = { |
| 1968 | .owner = THIS_MODULE, |
| 1969 | .driver_name = "msm_geni_serial_hs", |
| 1970 | .dev_name = "ttyHS", |
| 1971 | .nr = GENI_UART_NR_PORTS, |
| 1972 | }; |
| 1973 | |
| 1974 | static int __init msm_geni_serial_init(void) |
| 1975 | { |
| 1976 | int ret = 0; |
| 1977 | int i; |
| 1978 | |
| 1979 | for (i = 0; i < GENI_UART_NR_PORTS; i++) { |
| 1980 | msm_geni_serial_ports[i].uport.iotype = UPIO_MEM; |
| 1981 | msm_geni_serial_ports[i].uport.ops = &msm_geni_serial_pops; |
| 1982 | msm_geni_serial_ports[i].uport.flags = UPF_BOOT_AUTOCONF; |
| 1983 | msm_geni_serial_ports[i].uport.line = i; |
| 1984 | } |
| 1985 | |
Girish Mahadevan | 7115f4e | 2017-03-15 15:18:34 -0600 | [diff] [blame] | 1986 | for (i = 0; i < GENI_UART_CONS_PORTS; i++) { |
| 1987 | msm_geni_console_port.uport.iotype = UPIO_MEM; |
| 1988 | msm_geni_console_port.uport.ops = &msm_geni_console_pops; |
| 1989 | msm_geni_console_port.uport.flags = UPF_BOOT_AUTOCONF; |
| 1990 | msm_geni_console_port.uport.line = i; |
| 1991 | } |
| 1992 | |
Girish Mahadevan | f08b110 | 2017-04-02 19:27:28 -0600 | [diff] [blame] | 1993 | ret = console_register(&msm_geni_console_driver); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 1994 | if (ret) |
| 1995 | return ret; |
| 1996 | |
| 1997 | ret = uart_register_driver(&msm_geni_serial_hs_driver); |
| 1998 | if (ret) { |
| 1999 | uart_unregister_driver(&msm_geni_console_driver); |
| 2000 | return ret; |
| 2001 | } |
| 2002 | |
| 2003 | ret = platform_driver_register(&msm_geni_serial_platform_driver); |
| 2004 | if (ret) { |
Girish Mahadevan | f08b110 | 2017-04-02 19:27:28 -0600 | [diff] [blame] | 2005 | console_unregister(&msm_geni_console_driver); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 2006 | uart_unregister_driver(&msm_geni_serial_hs_driver); |
| 2007 | return ret; |
| 2008 | } |
| 2009 | |
| 2010 | pr_info("%s: Driver initialized", __func__); |
| 2011 | return ret; |
| 2012 | } |
| 2013 | module_init(msm_geni_serial_init); |
| 2014 | |
| 2015 | static void __exit msm_geni_serial_exit(void) |
| 2016 | { |
| 2017 | platform_driver_unregister(&msm_geni_serial_platform_driver); |
| 2018 | uart_unregister_driver(&msm_geni_serial_hs_driver); |
Girish Mahadevan | f08b110 | 2017-04-02 19:27:28 -0600 | [diff] [blame] | 2019 | console_unregister(&msm_geni_console_driver); |
Girish Mahadevan | ebeed35 | 2016-11-23 10:59:29 -0700 | [diff] [blame] | 2020 | } |
| 2021 | module_exit(msm_geni_serial_exit); |
| 2022 | |
| 2023 | MODULE_DESCRIPTION("Serial driver for GENI based QTI serial cores"); |
| 2024 | MODULE_LICENSE("GPL v2"); |
| 2025 | MODULE_ALIAS("tty:msm_geni_geni_serial"); |