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Sathya Perla6b7c5b92009-03-11 23:32:03 -07001/*
Vasundhara Volamc7bb15a2013-03-06 20:05:05 +00002 * Copyright (C) 2005 - 2013 Emulex
Sathya Perla6b7c5b92009-03-11 23:32:03 -07003 * All rights reserved.
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License version 2
7 * as published by the Free Software Foundation. The full GNU General
8 * Public License is included in this distribution in the file called COPYING.
9 *
10 * Contact Information:
Ajit Khaparded2145cd2011-03-16 08:20:46 +000011 * linux-drivers@emulex.com
Sathya Perla6b7c5b92009-03-11 23:32:03 -070012 *
Ajit Khaparded2145cd2011-03-16 08:20:46 +000013 * Emulex
14 * 3333 Susan Street
15 * Costa Mesa, CA 92626
Sathya Perla6b7c5b92009-03-11 23:32:03 -070016 */
17
18#ifndef BE_H
19#define BE_H
20
21#include <linux/pci.h>
22#include <linux/etherdevice.h>
Sathya Perla6b7c5b92009-03-11 23:32:03 -070023#include <linux/delay.h>
24#include <net/tcp.h>
25#include <net/ip.h>
26#include <net/ipv6.h>
27#include <linux/if_vlan.h>
28#include <linux/workqueue.h>
29#include <linux/interrupt.h>
Ajit Khaparde84517482009-09-04 03:12:16 +000030#include <linux/firmware.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090031#include <linux/slab.h>
Sathya Perlaab1594e2011-07-25 19:10:15 +000032#include <linux/u64_stats_sync.h>
Sathya Perla6b7c5b92009-03-11 23:32:03 -070033
34#include "be_hw.h"
Parav Pandit045508a2012-03-26 14:27:13 +000035#include "be_roce.h"
Sathya Perla6b7c5b92009-03-11 23:32:03 -070036
Sathya Perla5721f942013-08-06 09:27:21 +053037#define DRV_VER "4.9.134.0u"
Sathya Perla6b7c5b92009-03-11 23:32:03 -070038#define DRV_NAME "be2net"
Sarveshwar Bandi00d3d512013-01-28 04:17:01 +000039#define BE_NAME "Emulex BladeEngine2"
40#define BE3_NAME "Emulex BladeEngine3"
41#define OC_NAME "Emulex OneConnect"
Sathya Perlafe6d2a32010-11-21 23:25:50 +000042#define OC_NAME_BE OC_NAME "(be3)"
43#define OC_NAME_LANCER OC_NAME "(Lancer)"
Ajit Khapardeecedb6a2011-12-15 06:31:38 +000044#define OC_NAME_SH OC_NAME "(Skyhawk)"
Sarveshwar Bandi00d3d512013-01-28 04:17:01 +000045#define DRV_DESC "Emulex OneConnect 10Gbps NIC Driver"
Sathya Perla6b7c5b92009-03-11 23:32:03 -070046
Ajit Khapardec4ca2372009-05-18 15:38:55 -070047#define BE_VENDOR_ID 0x19a2
Sathya Perlafe6d2a32010-11-21 23:25:50 +000048#define EMULEX_VENDOR_ID 0x10df
Ajit Khapardec4ca2372009-05-18 15:38:55 -070049#define BE_DEVICE_ID1 0x211
Ajit Khaparde12d7ea22009-10-16 18:02:12 -070050#define BE_DEVICE_ID2 0x221
Sathya Perlafe6d2a32010-11-21 23:25:50 +000051#define OC_DEVICE_ID1 0x700 /* Device Id for BE2 cards */
52#define OC_DEVICE_ID2 0x710 /* Device Id for BE3 cards */
53#define OC_DEVICE_ID3 0xe220 /* Device id for Lancer cards */
Mammatha Edhala12f4d0a2011-05-18 03:26:22 +000054#define OC_DEVICE_ID4 0xe228 /* Device id for VF in Lancer */
Ajit Khapardeecedb6a2011-12-15 06:31:38 +000055#define OC_DEVICE_ID5 0x720 /* Device Id for Skyhawk cards */
Padmanabh Ratnakar76b73532012-10-20 06:04:40 +000056#define OC_DEVICE_ID6 0x728 /* Device id for VF in SkyHawk */
Ajit Khaparde4762f6c2012-03-18 06:23:11 +000057#define OC_SUBSYS_DEVICE_ID1 0xE602
58#define OC_SUBSYS_DEVICE_ID2 0xE642
59#define OC_SUBSYS_DEVICE_ID3 0xE612
60#define OC_SUBSYS_DEVICE_ID4 0xE652
Ajit Khapardec4ca2372009-05-18 15:38:55 -070061
62static inline char *nic_name(struct pci_dev *pdev)
63{
Ajit Khaparde12d7ea22009-10-16 18:02:12 -070064 switch (pdev->device) {
65 case OC_DEVICE_ID1:
Ajit Khapardec4ca2372009-05-18 15:38:55 -070066 return OC_NAME;
Ajit Khapardee254f6e2010-02-09 01:28:35 +000067 case OC_DEVICE_ID2:
Sathya Perlafe6d2a32010-11-21 23:25:50 +000068 return OC_NAME_BE;
69 case OC_DEVICE_ID3:
Mammatha Edhala12f4d0a2011-05-18 03:26:22 +000070 case OC_DEVICE_ID4:
Sathya Perlafe6d2a32010-11-21 23:25:50 +000071 return OC_NAME_LANCER;
Ajit Khaparde12d7ea22009-10-16 18:02:12 -070072 case BE_DEVICE_ID2:
73 return BE3_NAME;
Ajit Khapardeecedb6a2011-12-15 06:31:38 +000074 case OC_DEVICE_ID5:
Padmanabh Ratnakar76b73532012-10-20 06:04:40 +000075 case OC_DEVICE_ID6:
Ajit Khapardeecedb6a2011-12-15 06:31:38 +000076 return OC_NAME_SH;
Ajit Khaparde12d7ea22009-10-16 18:02:12 -070077 default:
Ajit Khapardec4ca2372009-05-18 15:38:55 -070078 return BE_NAME;
Ajit Khaparde12d7ea22009-10-16 18:02:12 -070079 }
Ajit Khapardec4ca2372009-05-18 15:38:55 -070080}
81
Sathya Perla6b7c5b92009-03-11 23:32:03 -070082/* Number of bytes of an RX frame that are copied to skb->data */
Sathya Perla2e588f82011-03-11 02:49:26 +000083#define BE_HDR_LEN ((u16) 64)
Eric Dumazetbb349bb2012-01-25 03:56:30 +000084/* allocate extra space to allow tunneling decapsulation without head reallocation */
85#define BE_RX_SKB_ALLOC_SIZE (BE_HDR_LEN + 64)
86
Sathya Perla6b7c5b92009-03-11 23:32:03 -070087#define BE_MAX_JUMBO_FRAME_SIZE 9018
88#define BE_MIN_MTU 256
89
90#define BE_NUM_VLANS_SUPPORTED 64
Ajit Khaparde1aa96732013-09-27 15:18:16 -050091#define BE_UMC_NUM_VLANS_SUPPORTED 15
Sathya Perla10ef9ab2012-02-09 18:05:27 +000092#define BE_MAX_EQD 96u
Sathya Perla6b7c5b92009-03-11 23:32:03 -070093#define BE_MAX_TX_FRAG_COUNT 30
94
95#define EVNT_Q_LEN 1024
96#define TX_Q_LEN 2048
97#define TX_CQ_LEN 1024
98#define RX_Q_LEN 1024 /* Does not support any other value */
99#define RX_CQ_LEN 1024
Sathya Perla5fb379e2009-06-18 00:02:59 +0000100#define MCC_Q_LEN 128 /* total size not to exceed 8 pages */
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700101#define MCC_CQ_LEN 256
102
Sathya Perla10ef9ab2012-02-09 18:05:27 +0000103#define BE2_MAX_RSS_QS 4
Sathya Perla68d7bdc2013-08-27 16:57:35 +0530104#define BE3_MAX_RSS_QS 16
105#define BE3_MAX_TX_QS 16
106#define BE3_MAX_EVT_QS 16
Sathya Perla10ef9ab2012-02-09 18:05:27 +0000107
Sathya Perla68d7bdc2013-08-27 16:57:35 +0530108#define MAX_RX_QS 32
109#define MAX_EVT_QS 32
110#define MAX_TX_QS 32
111
Parav Pandit045508a2012-03-26 14:27:13 +0000112#define MAX_ROCE_EQS 5
Sathya Perla68d7bdc2013-08-27 16:57:35 +0530113#define MAX_MSIX_VECTORS 32
Sathya Perla92bf14a2013-08-27 16:57:32 +0530114#define MIN_MSIX_VECTORS 1
Sathya Perla10ef9ab2012-02-09 18:05:27 +0000115#define BE_TX_BUDGET 256
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700116#define BE_NAPI_WEIGHT 64
Sathya Perla10ef9ab2012-02-09 18:05:27 +0000117#define MAX_RX_POST BE_NAPI_WEIGHT /* Frags posted at a time */
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700118#define RX_FRAGS_REFILL_WM (RX_Q_LEN - MAX_RX_POST)
119
Vasundhara Volam7c5a5242012-08-28 20:37:41 +0000120#define MAX_VFS 30 /* Max VFs supported by BE3 FW */
Sathya Perla8788fdc2009-07-27 22:52:03 +0000121#define FW_VER_LEN 32
122
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700123struct be_dma_mem {
124 void *va;
125 dma_addr_t dma;
126 u32 size;
127};
128
129struct be_queue_info {
130 struct be_dma_mem dma_mem;
131 u16 len;
132 u16 entry_size; /* Size of an element in the queue */
133 u16 id;
134 u16 tail, head;
135 bool created;
136 atomic_t used; /* Number of valid elements in the queue */
137};
138
Sathya Perla5fb379e2009-06-18 00:02:59 +0000139static inline u32 MODULO(u16 val, u16 limit)
140{
141 BUG_ON(limit & (limit - 1));
142 return val & (limit - 1);
143}
144
145static inline void index_adv(u16 *index, u16 val, u16 limit)
146{
147 *index = MODULO((*index + val), limit);
148}
149
150static inline void index_inc(u16 *index, u16 limit)
151{
152 *index = MODULO((*index + 1), limit);
153}
154
155static inline void *queue_head_node(struct be_queue_info *q)
156{
157 return q->dma_mem.va + q->head * q->entry_size;
158}
159
160static inline void *queue_tail_node(struct be_queue_info *q)
161{
162 return q->dma_mem.va + q->tail * q->entry_size;
163}
164
Somnath Kotur3de09452011-09-30 07:25:05 +0000165static inline void *queue_index_node(struct be_queue_info *q, u16 index)
166{
167 return q->dma_mem.va + index * q->entry_size;
168}
169
Sathya Perla5fb379e2009-06-18 00:02:59 +0000170static inline void queue_head_inc(struct be_queue_info *q)
171{
172 index_inc(&q->head, q->len);
173}
174
Padmanabh Ratnakar652bf642012-04-25 01:47:03 +0000175static inline void index_dec(u16 *index, u16 limit)
176{
177 *index = MODULO((*index - 1), limit);
178}
179
Sathya Perla5fb379e2009-06-18 00:02:59 +0000180static inline void queue_tail_inc(struct be_queue_info *q)
181{
182 index_inc(&q->tail, q->len);
183}
184
Sathya Perla5fb379e2009-06-18 00:02:59 +0000185struct be_eq_obj {
186 struct be_queue_info q;
187 char desc[32];
188
189 /* Adaptive interrupt coalescing (AIC) info */
190 bool enable_aic;
Sathya Perla10ef9ab2012-02-09 18:05:27 +0000191 u32 min_eqd; /* in usecs */
192 u32 max_eqd; /* in usecs */
193 u32 eqd; /* configured val when aic is off */
194 u32 cur_eqd; /* in usecs */
Sathya Perla5fb379e2009-06-18 00:02:59 +0000195
Sathya Perla10ef9ab2012-02-09 18:05:27 +0000196 u8 idx; /* array index */
Sathya Perlaf2f781a2013-08-27 16:57:30 +0530197 u8 msix_idx;
Sathya Perla10ef9ab2012-02-09 18:05:27 +0000198 u16 tx_budget;
Sathya Perlad0b9cec2013-01-11 22:47:02 +0000199 u16 spurious_intr;
Sathya Perla5fb379e2009-06-18 00:02:59 +0000200 struct napi_struct napi;
Sathya Perla10ef9ab2012-02-09 18:05:27 +0000201 struct be_adapter *adapter;
202} ____cacheline_aligned_in_smp;
Sathya Perla5fb379e2009-06-18 00:02:59 +0000203
204struct be_mcc_obj {
205 struct be_queue_info q;
206 struct be_queue_info cq;
Sathya Perla7a1e9b22010-02-17 01:35:11 +0000207 bool rearm_cq;
Sathya Perla5fb379e2009-06-18 00:02:59 +0000208};
209
Sathya Perla3abcded2010-10-03 22:12:27 -0700210struct be_tx_stats {
Sathya Perlaac124ff2011-07-25 19:10:14 +0000211 u64 tx_bytes;
212 u64 tx_pkts;
213 u64 tx_reqs;
214 u64 tx_wrbs;
215 u64 tx_compl;
216 ulong tx_jiffies;
217 u32 tx_stops;
Sathya Perlaab1594e2011-07-25 19:10:15 +0000218 struct u64_stats_sync sync;
219 struct u64_stats_sync sync_compl;
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700220};
221
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700222struct be_tx_obj {
Vasundhara Volam94d73aa2013-04-21 23:28:14 +0000223 u32 db_offset;
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700224 struct be_queue_info q;
225 struct be_queue_info cq;
226 /* Remember the skbs that were transmitted */
227 struct sk_buff *sent_skb_list[TX_Q_LEN];
Sathya Perla3c8def92011-06-12 20:01:58 +0000228 struct be_tx_stats stats;
Sathya Perla10ef9ab2012-02-09 18:05:27 +0000229} ____cacheline_aligned_in_smp;
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700230
231/* Struct to remember the pages posted for rx frags */
232struct be_rx_page_info {
233 struct page *page;
FUJITA Tomonorifac6da52010-04-01 16:53:22 +0000234 DEFINE_DMA_UNMAP_ADDR(bus);
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700235 u16 page_offset;
236 bool last_page_user;
237};
238
Sathya Perla3abcded2010-10-03 22:12:27 -0700239struct be_rx_stats {
Sathya Perla3abcded2010-10-03 22:12:27 -0700240 u64 rx_bytes;
Sathya Perla3abcded2010-10-03 22:12:27 -0700241 u64 rx_pkts;
Sathya Perlaac124ff2011-07-25 19:10:14 +0000242 u64 rx_pkts_prev;
243 ulong rx_jiffies;
244 u32 rx_drops_no_skbs; /* skb allocation errors */
245 u32 rx_drops_no_frags; /* HW has no fetched frags */
246 u32 rx_post_fail; /* page post alloc failures */
Sathya Perlaac124ff2011-07-25 19:10:14 +0000247 u32 rx_compl;
Sathya Perla3abcded2010-10-03 22:12:27 -0700248 u32 rx_mcast_pkts;
Sathya Perlaac124ff2011-07-25 19:10:14 +0000249 u32 rx_compl_err; /* completions with err set */
250 u32 rx_pps; /* pkts per second */
Sathya Perlaab1594e2011-07-25 19:10:15 +0000251 struct u64_stats_sync sync;
Sathya Perla3abcded2010-10-03 22:12:27 -0700252};
253
Sathya Perla2e588f82011-03-11 02:49:26 +0000254struct be_rx_compl_info {
255 u32 rss_hash;
Somnath Kotur6709d952011-05-04 22:40:46 +0000256 u16 vlan_tag;
Sathya Perla2e588f82011-03-11 02:49:26 +0000257 u16 pkt_size;
258 u16 rxq_idx;
Sathya Perla12004ae2011-08-02 19:57:46 +0000259 u16 port;
Sathya Perla2e588f82011-03-11 02:49:26 +0000260 u8 vlanf;
261 u8 num_rcvd;
262 u8 err;
263 u8 ipf;
264 u8 tcpf;
265 u8 udpf;
266 u8 ip_csum;
267 u8 l4_csum;
268 u8 ipv6;
269 u8 vtm;
270 u8 pkt_type;
Somnath Koture38b1702013-05-29 22:55:56 +0000271 u8 ip_frag;
Sathya Perla2e588f82011-03-11 02:49:26 +0000272};
273
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700274struct be_rx_obj {
Sathya Perla3abcded2010-10-03 22:12:27 -0700275 struct be_adapter *adapter;
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700276 struct be_queue_info q;
277 struct be_queue_info cq;
Sathya Perla2e588f82011-03-11 02:49:26 +0000278 struct be_rx_compl_info rxcp;
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700279 struct be_rx_page_info page_info_tbl[RX_Q_LEN];
Sathya Perla3abcded2010-10-03 22:12:27 -0700280 struct be_rx_stats stats;
281 u8 rss_id;
282 bool rx_post_starved; /* Zero rx frags have been posted to BE */
Sathya Perla10ef9ab2012-02-09 18:05:27 +0000283} ____cacheline_aligned_in_smp;
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700284
Ajit Khaparde609ff3b2011-02-20 11:42:07 +0000285struct be_drv_stats {
Somnath Kotur9ae081c2011-09-30 07:23:35 +0000286 u32 be_on_die_temperature;
Sathya Perlaac124ff2011-07-25 19:10:14 +0000287 u32 eth_red_drops;
288 u32 rx_drops_no_pbuf;
289 u32 rx_drops_no_txpb;
290 u32 rx_drops_no_erx_descr;
291 u32 rx_drops_no_tpre_descr;
292 u32 rx_drops_too_many_frags;
Sathya Perlaac124ff2011-07-25 19:10:14 +0000293 u32 forwarded_packets;
294 u32 rx_drops_mtu;
295 u32 rx_crc_errors;
296 u32 rx_alignment_symbol_errors;
297 u32 rx_pause_frames;
298 u32 rx_priority_pause_frames;
299 u32 rx_control_frames;
300 u32 rx_in_range_errors;
301 u32 rx_out_range_errors;
302 u32 rx_frame_too_long;
Suresh Reddy18fb06a2013-04-25 23:03:21 +0000303 u32 rx_address_filtered;
Sathya Perlaac124ff2011-07-25 19:10:14 +0000304 u32 rx_dropped_too_small;
305 u32 rx_dropped_too_short;
306 u32 rx_dropped_header_too_small;
307 u32 rx_dropped_tcp_length;
308 u32 rx_dropped_runt;
309 u32 rx_ip_checksum_errs;
310 u32 rx_tcp_checksum_errs;
311 u32 rx_udp_checksum_errs;
312 u32 tx_pauseframes;
313 u32 tx_priority_pauseframes;
314 u32 tx_controlframes;
315 u32 rxpp_fifo_overflow_drop;
316 u32 rx_input_fifo_overflow_drop;
317 u32 pmem_fifo_overflow_drop;
318 u32 jabber_events;
Ajit Khaparde609ff3b2011-02-20 11:42:07 +0000319};
320
Ajit Khaparde64600ea2010-07-23 01:50:34 +0000321struct be_vf_cfg {
Sathya Perla11ac75e2011-12-13 00:58:50 +0000322 unsigned char mac_addr[ETH_ALEN];
323 int if_handle;
324 int pmac_id;
Ajit Khapardef1f3ee12012-03-18 06:23:41 +0000325 u16 def_vid;
Sathya Perla11ac75e2011-12-13 00:58:50 +0000326 u16 vlan_tag;
327 u32 tx_rate;
Ajit Khaparde64600ea2010-07-23 01:50:34 +0000328};
329
Sathya Perla39f1d942012-05-08 19:41:24 +0000330enum vf_state {
331 ENABLED = 0,
332 ASSIGNED = 1
333};
334
Ajit Khapardeb236916a2011-12-30 12:15:40 +0000335#define BE_FLAGS_LINK_STATUS_INIT 1
Sathya Perla191eb752012-02-23 18:50:13 +0000336#define BE_FLAGS_WORKER_SCHEDULED (1 << 3)
Ajit Khaparded9d604f2013-09-27 15:17:58 -0500337#define BE_FLAGS_VLAN_PROMISC (1 << 4)
Somnath Kotur04d3d622013-05-02 03:36:55 +0000338#define BE_FLAGS_NAPI_ENABLED (1 << 9)
Ajit Khapardefbc13f02012-03-18 06:23:21 +0000339#define BE_UC_PMAC_COUNT 30
340#define BE_VF_UC_PMAC_COUNT 2
Ajit Khapardebc0c3402013-04-24 11:52:50 +0000341#define BE_FLAGS_QNQ_ASYNC_EVT_RCVD (1 << 11)
Ajit Khapardeb236916a2011-12-30 12:15:40 +0000342
Somnath Kotur5c510812013-05-30 02:52:23 +0000343/* Ethtool set_dump flags */
344#define LANCER_INITIATE_FW_DUMP 0x1
345
Ajit Khaparde42f11cf2012-04-21 18:53:22 +0000346struct phy_info {
347 u8 transceiver;
348 u8 autoneg;
349 u8 fc_autoneg;
350 u8 port_type;
351 u16 phy_type;
352 u16 interface_type;
353 u32 misc_params;
354 u16 auto_speeds_supported;
355 u16 fixed_speeds_supported;
356 int link_speed;
Ajit Khaparde42f11cf2012-04-21 18:53:22 +0000357 u32 dac_cable_len;
358 u32 advertising;
359 u32 supported;
360};
361
Sathya Perla92bf14a2013-08-27 16:57:32 +0530362struct be_resources {
363 u16 max_vfs; /* Total VFs "really" supported by FW/HW */
364 u16 max_mcast_mac;
365 u16 max_tx_qs;
366 u16 max_rss_qs;
367 u16 max_rx_qs;
368 u16 max_uc_mac; /* Max UC MACs programmable */
369 u16 max_vlans; /* Number of vlans supported */
370 u16 max_evt_qs;
371 u32 if_cap_flags;
372};
373
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700374struct be_adapter {
375 struct pci_dev *pdev;
376 struct net_device *netdev;
377
Sathya Perlac5b3ad42013-03-05 22:23:20 +0000378 u8 __iomem *csr; /* CSR BAR used only for BE2/3 */
Sathya Perla8788fdc2009-07-27 22:52:03 +0000379 u8 __iomem *db; /* Door Bell */
Sathya Perla8788fdc2009-07-27 22:52:03 +0000380
Ivan Vecera29849612010-12-14 05:43:19 +0000381 struct mutex mbox_lock; /* For serializing mbox cmds to BE card */
Sathya Perla8788fdc2009-07-27 22:52:03 +0000382 struct be_dma_mem mbox_mem;
383 /* Mbox mem is adjusted to align to 16 bytes. The allocated addr
384 * is stored for freeing purpose */
385 struct be_dma_mem mbox_mem_alloced;
386
387 struct be_mcc_obj mcc_obj;
388 spinlock_t mcc_lock; /* For serializing mcc cmds to BE card */
389 spinlock_t mcc_cq_lock;
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700390
Sathya Perla92bf14a2013-08-27 16:57:32 +0530391 u16 cfg_num_qs; /* configured via set-channels */
392 u16 num_evt_qs;
393 u16 num_msix_vec;
394 struct be_eq_obj eq_obj[MAX_EVT_QS];
Sathya Perla10ef9ab2012-02-09 18:05:27 +0000395 struct msix_entry msix_entries[MAX_MSIX_VECTORS];
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700396 bool isr_registered;
397
398 /* TX Rings */
Sathya Perla92bf14a2013-08-27 16:57:32 +0530399 u16 num_tx_qs;
Sathya Perla3c8def92011-06-12 20:01:58 +0000400 struct be_tx_obj tx_obj[MAX_TX_QS];
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700401
402 /* Rx rings */
Sathya Perla92bf14a2013-08-27 16:57:32 +0530403 u16 num_rx_qs;
Sathya Perla10ef9ab2012-02-09 18:05:27 +0000404 struct be_rx_obj rx_obj[MAX_RX_QS];
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700405 u32 big_page_size; /* Compounded page size shared by rx wrbs */
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700406
Ajit Khaparde609ff3b2011-02-20 11:42:07 +0000407 struct be_drv_stats drv_stats;
Ajit Khaparde82903e42010-02-09 01:34:57 +0000408 u16 vlans_added;
Jesse Grossb7381272010-10-20 13:56:02 +0000409 u8 vlan_tag[VLAN_N_VID];
Somnath Koturcc4ce022010-10-21 07:11:14 -0700410 u8 vlan_prio_bmap; /* Available Priority BitMap */
411 u16 recommended_prio; /* Recommended Priority */
Sathya Perla5b8821b2011-08-02 19:57:44 +0000412 struct be_dma_mem rx_filter; /* Cmd DMA mem for rx-filter */
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700413
Sathya Perla3abcded2010-10-03 22:12:27 -0700414 struct be_dma_mem stats_cmd;
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700415 /* Work queue used to perform periodic tasks like getting statistics */
416 struct delayed_work work;
Ajit Khaparde609ff3b2011-02-20 11:42:07 +0000417 u16 work_counter;
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700418
Padmanabh Ratnakarf67ef7b2012-07-12 03:57:09 +0000419 struct delayed_work func_recovery_work;
Ajit Khapardeb236916a2011-12-30 12:15:40 +0000420 u32 flags;
Padmanabh Ratnakarf25b1192012-10-20 06:02:52 +0000421 u32 cmd_privileges;
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700422 /* Ethtool knobs and info */
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700423 char fw_ver[FW_VER_LEN];
Somnath Kotureeb65ce2013-05-26 21:08:36 +0000424 char fw_on_flash[FW_VER_LEN];
Sathya Perla30128032011-11-10 19:17:57 +0000425 int if_handle; /* Used to configure filtering */
Ajit Khapardefbc13f02012-03-18 06:23:21 +0000426 u32 *pmac_id; /* MAC addr handle used by BE card */
stephen hemminger1a642462011-04-04 11:06:40 +0000427 u32 beacon_state; /* for set_phys_id */
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700428
Padmanabh Ratnakarf67ef7b2012-07-12 03:57:09 +0000429 bool eeh_error;
Sathya Perla6589ade2011-11-10 19:18:00 +0000430 bool fw_timeout;
Padmanabh Ratnakarf67ef7b2012-07-12 03:57:09 +0000431 bool hw_error;
432
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700433 u32 port_num;
Sathya Perla24307ee2009-06-18 00:09:25 +0000434 bool promiscuous;
Ajit Khaparde3486be22010-07-23 02:04:54 +0000435 u32 function_mode;
Sathya Perla3abcded2010-10-03 22:12:27 -0700436 u32 function_caps;
Ajit Khaparde9e90c962009-11-06 02:06:59 +0000437 u32 rx_fc; /* Rx flow control */
438 u32 tx_fc; /* Tx flow control */
Ajit Khapardeb2aebe62011-02-20 11:41:39 +0000439 bool stats_cmd_sent;
Parav Pandit045508a2012-03-26 14:27:13 +0000440 u32 if_type;
441 struct {
Parav Pandit045508a2012-03-26 14:27:13 +0000442 u32 size;
443 u32 total_size;
444 u64 io_addr;
445 } roce_db;
446 u32 num_msix_roce_vec;
447 struct ocrdma_dev *ocrdma_dev;
448 struct list_head entry;
449
Sarveshwar Bandidd131e72010-05-25 16:16:32 -0700450 u32 flash_status;
451 struct completion flash_compl;
Sarveshwar Bandiba343c72010-03-31 02:56:12 +0000452
Sathya Perla92bf14a2013-08-27 16:57:32 +0530453 struct be_resources res; /* resources available for the func */
454 u16 num_vfs; /* Number of VFs provisioned by PF */
Sathya Perla39f1d942012-05-08 19:41:24 +0000455 u8 virtfn;
Sathya Perla11ac75e2011-12-13 00:58:50 +0000456 struct be_vf_cfg *vf_cfg;
457 bool be3_native;
Sathya Perlafe6d2a32010-11-21 23:25:50 +0000458 u32 sli_family;
Ajit Khaparde9e1453c2011-02-20 11:42:22 +0000459 u8 hba_port_num;
Ajit Khaparde3968fa12011-02-20 11:41:53 +0000460 u16 pvid;
Ajit Khaparde42f11cf2012-04-21 18:53:22 +0000461 struct phy_info phy;
Ajit Khaparde4762f6c2012-03-18 06:23:11 +0000462 u8 wol_cap;
463 bool wol;
Ajit Khapardefbc13f02012-03-18 06:23:21 +0000464 u32 uc_macs; /* Count of secondary UC MAC programmed */
Vasundhara Volam0ad31572013-04-21 23:28:16 +0000465 u16 asic_rev;
Ajit Khapardebc0c3402013-04-24 11:52:50 +0000466 u16 qnq_vid;
Somnath Kotur941a77d2012-05-17 22:59:03 +0000467 u32 msg_enable;
Padmanabh Ratnakar7aeb2152012-07-12 03:56:46 +0000468 int be_get_temp_freq;
Padmanabh Ratnakard5c18472012-10-20 06:01:53 +0000469 u8 pf_number;
Suresh Reddy594ad542013-04-25 23:03:20 +0000470 u64 rss_flags;
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700471};
472
Sathya Perla39f1d942012-05-08 19:41:24 +0000473#define be_physfn(adapter) (!adapter->virtfn)
Sathya Perla11ac75e2011-12-13 00:58:50 +0000474#define sriov_enabled(adapter) (adapter->num_vfs > 0)
Sathya Perla92bf14a2013-08-27 16:57:32 +0530475#define sriov_want(adapter) (be_max_vfs(adapter) && num_vfs && \
Sathya Perla39f1d942012-05-08 19:41:24 +0000476 be_physfn(adapter))
Sathya Perla11ac75e2011-12-13 00:58:50 +0000477#define for_all_vfs(adapter, vf_cfg, i) \
478 for (i = 0, vf_cfg = &adapter->vf_cfg[i]; i < adapter->num_vfs; \
479 i++, vf_cfg++)
Sarveshwar Bandiba343c72010-03-31 02:56:12 +0000480
Sathya Perla5b8821b2011-08-02 19:57:44 +0000481#define ON 1
482#define OFF 0
Sathya Perlaca34fe32012-11-06 17:48:56 +0000483
Sathya Perla92bf14a2013-08-27 16:57:32 +0530484#define be_max_vlans(adapter) (adapter->res.max_vlans)
485#define be_max_uc(adapter) (adapter->res.max_uc_mac)
486#define be_max_mc(adapter) (adapter->res.max_mcast_mac)
487#define be_max_vfs(adapter) (adapter->res.max_vfs)
488#define be_max_rss(adapter) (adapter->res.max_rss_qs)
489#define be_max_txqs(adapter) (adapter->res.max_tx_qs)
490#define be_max_prio_txqs(adapter) (adapter->res.max_prio_tx_qs)
491#define be_max_rxqs(adapter) (adapter->res.max_rx_qs)
492#define be_max_eqs(adapter) (adapter->res.max_evt_qs)
493#define be_if_cap_flags(adapter) (adapter->res.if_cap_flags)
494
495static inline u16 be_max_qs(struct be_adapter *adapter)
496{
497 /* If no RSS, need atleast the one def RXQ */
498 u16 num = max_t(u16, be_max_rss(adapter), 1);
499
500 num = min(num, be_max_eqs(adapter));
501 return min_t(u16, num, num_online_cpus());
502}
503
Sathya Perlaca34fe32012-11-06 17:48:56 +0000504#define lancer_chip(adapter) (adapter->pdev->device == OC_DEVICE_ID3 || \
505 adapter->pdev->device == OC_DEVICE_ID4)
Sathya Perlafe6d2a32010-11-21 23:25:50 +0000506
Padmanabh Ratnakar76b73532012-10-20 06:04:40 +0000507#define skyhawk_chip(adapter) (adapter->pdev->device == OC_DEVICE_ID5 || \
508 adapter->pdev->device == OC_DEVICE_ID6)
Padmanabh Ratnakard3bd3a52012-07-12 03:57:47 +0000509
Sathya Perlaca34fe32012-11-06 17:48:56 +0000510#define BE3_chip(adapter) (adapter->pdev->device == BE_DEVICE_ID2 || \
511 adapter->pdev->device == OC_DEVICE_ID2)
512
513#define BE2_chip(adapter) (adapter->pdev->device == BE_DEVICE_ID1 || \
514 adapter->pdev->device == OC_DEVICE_ID1)
515
516#define BEx_chip(adapter) (BE3_chip(adapter) || BE2_chip(adapter))
Padmanabh Ratnakard3bd3a52012-07-12 03:57:47 +0000517
Sathya Perladbf0f2a2012-11-06 17:49:00 +0000518#define be_roce_supported(adapter) (skyhawk_chip(adapter) && \
519 (adapter->function_mode & RDMA_ENABLED))
Parav Pandit045508a2012-03-26 14:27:13 +0000520
Stephen Hemminger0fc0b732009-09-02 01:03:33 -0700521extern const struct ethtool_ops be_ethtool_ops;
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700522
Sathya Perlaac6a0c42011-03-21 20:49:25 +0000523#define msix_enabled(adapter) (adapter->num_msix_vec > 0)
Sathya Perla10ef9ab2012-02-09 18:05:27 +0000524#define num_irqs(adapter) (msix_enabled(adapter) ? \
525 adapter->num_msix_vec : 1)
526#define tx_stats(txo) (&(txo)->stats)
527#define rx_stats(rxo) (&(rxo)->stats)
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700528
Sathya Perla10ef9ab2012-02-09 18:05:27 +0000529/* The default RXQ is the last RXQ */
530#define default_rxo(adpt) (&adpt->rx_obj[adpt->num_rx_qs - 1])
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700531
Sathya Perla3abcded2010-10-03 22:12:27 -0700532#define for_all_rx_queues(adapter, rxo, i) \
533 for (i = 0, rxo = &adapter->rx_obj[i]; i < adapter->num_rx_qs; \
534 i++, rxo++)
535
Sathya Perla10ef9ab2012-02-09 18:05:27 +0000536/* Skip the default non-rss queue (last one)*/
Sathya Perla3abcded2010-10-03 22:12:27 -0700537#define for_all_rss_queues(adapter, rxo, i) \
Sathya Perla10ef9ab2012-02-09 18:05:27 +0000538 for (i = 0, rxo = &adapter->rx_obj[i]; i < (adapter->num_rx_qs - 1);\
Sathya Perla3abcded2010-10-03 22:12:27 -0700539 i++, rxo++)
540
Sathya Perla3c8def92011-06-12 20:01:58 +0000541#define for_all_tx_queues(adapter, txo, i) \
542 for (i = 0, txo = &adapter->tx_obj[i]; i < adapter->num_tx_qs; \
543 i++, txo++)
544
Sathya Perla10ef9ab2012-02-09 18:05:27 +0000545#define for_all_evt_queues(adapter, eqo, i) \
546 for (i = 0, eqo = &adapter->eq_obj[i]; i < adapter->num_evt_qs; \
547 i++, eqo++)
548
549#define is_mcc_eqo(eqo) (eqo->idx == 0)
550#define mcc_eqo(adapter) (&adapter->eq_obj[0])
551
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700552#define PAGE_SHIFT_4K 12
553#define PAGE_SIZE_4K (1 << PAGE_SHIFT_4K)
554
555/* Returns number of pages spanned by the data starting at the given addr */
556#define PAGES_4K_SPANNED(_address, size) \
557 ((u32)((((size_t)(_address) & (PAGE_SIZE_4K - 1)) + \
558 (size) + (PAGE_SIZE_4K - 1)) >> PAGE_SHIFT_4K))
559
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700560/* Returns bit offset within a DWORD of a bitfield */
561#define AMAP_BIT_OFFSET(_struct, field) \
562 (((size_t)&(((_struct *)0)->field))%32)
563
564/* Returns the bit mask of the field that is NOT shifted into location. */
565static inline u32 amap_mask(u32 bitsize)
566{
567 return (bitsize == 32 ? 0xFFFFFFFF : (1 << bitsize) - 1);
568}
569
570static inline void
571amap_set(void *ptr, u32 dw_offset, u32 mask, u32 offset, u32 value)
572{
573 u32 *dw = (u32 *) ptr + dw_offset;
574 *dw &= ~(mask << offset);
575 *dw |= (mask & value) << offset;
576}
577
578#define AMAP_SET_BITS(_struct, field, ptr, val) \
579 amap_set(ptr, \
580 offsetof(_struct, field)/32, \
581 amap_mask(sizeof(((_struct *)0)->field)), \
582 AMAP_BIT_OFFSET(_struct, field), \
583 val)
584
585static inline u32 amap_get(void *ptr, u32 dw_offset, u32 mask, u32 offset)
586{
587 u32 *dw = (u32 *) ptr;
588 return mask & (*(dw + dw_offset) >> offset);
589}
590
591#define AMAP_GET_BITS(_struct, field, ptr) \
592 amap_get(ptr, \
593 offsetof(_struct, field)/32, \
594 amap_mask(sizeof(((_struct *)0)->field)), \
595 AMAP_BIT_OFFSET(_struct, field))
596
597#define be_dws_cpu_to_le(wrb, len) swap_dws(wrb, len)
598#define be_dws_le_to_cpu(wrb, len) swap_dws(wrb, len)
599static inline void swap_dws(void *wrb, int len)
600{
601#ifdef __BIG_ENDIAN
602 u32 *dw = wrb;
603 BUG_ON(len % 4);
604 do {
605 *dw = cpu_to_le32(*dw);
606 dw++;
607 len -= 4;
608 } while (len);
609#endif /* __BIG_ENDIAN */
610}
611
612static inline u8 is_tcp_pkt(struct sk_buff *skb)
613{
614 u8 val = 0;
615
616 if (ip_hdr(skb)->version == 4)
617 val = (ip_hdr(skb)->protocol == IPPROTO_TCP);
618 else if (ip_hdr(skb)->version == 6)
619 val = (ipv6_hdr(skb)->nexthdr == NEXTHDR_TCP);
620
621 return val;
622}
623
624static inline u8 is_udp_pkt(struct sk_buff *skb)
625{
626 u8 val = 0;
627
628 if (ip_hdr(skb)->version == 4)
629 val = (ip_hdr(skb)->protocol == IPPROTO_UDP);
630 else if (ip_hdr(skb)->version == 6)
631 val = (ipv6_hdr(skb)->nexthdr == NEXTHDR_UDP);
632
633 return val;
634}
635
Somnath Kotur93040ae2012-06-26 22:32:10 +0000636static inline bool is_ipv4_pkt(struct sk_buff *skb)
637{
Li RongQinge8efcec2012-07-04 16:05:42 +0000638 return skb->protocol == htons(ETH_P_IP) && ip_hdr(skb)->version == 4;
Somnath Kotur93040ae2012-06-26 22:32:10 +0000639}
640
Ajit Khaparde6d87f5c2010-08-25 00:32:33 +0000641static inline void be_vf_eth_addr_generate(struct be_adapter *adapter, u8 *mac)
642{
643 u32 addr;
644
645 addr = jhash(adapter->netdev->dev_addr, ETH_ALEN, 0);
646
647 mac[5] = (u8)(addr & 0xFF);
648 mac[4] = (u8)((addr >> 8) & 0xFF);
649 mac[3] = (u8)((addr >> 16) & 0xFF);
Ajit Khaparde7a2414a2011-02-11 13:36:18 +0000650 /* Use the OUI from the current MAC address */
651 memcpy(mac, adapter->netdev->dev_addr, 3);
Ajit Khaparde6d87f5c2010-08-25 00:32:33 +0000652}
653
Ajit Khaparde4b972912011-04-06 18:07:43 +0000654static inline bool be_multi_rxq(const struct be_adapter *adapter)
655{
656 return adapter->num_rx_qs > 1;
657}
658
Sathya Perla6589ade2011-11-10 19:18:00 +0000659static inline bool be_error(struct be_adapter *adapter)
660{
Padmanabh Ratnakarf67ef7b2012-07-12 03:57:09 +0000661 return adapter->eeh_error || adapter->hw_error || adapter->fw_timeout;
662}
663
Sathya Perlad23e9462012-12-17 19:38:51 +0000664static inline bool be_hw_error(struct be_adapter *adapter)
Padmanabh Ratnakarf67ef7b2012-07-12 03:57:09 +0000665{
666 return adapter->eeh_error || adapter->hw_error;
667}
668
669static inline void be_clear_all_error(struct be_adapter *adapter)
670{
671 adapter->eeh_error = false;
672 adapter->hw_error = false;
673 adapter->fw_timeout = false;
Sathya Perla6589ade2011-11-10 19:18:00 +0000674}
675
Ajit Khaparde4762f6c2012-03-18 06:23:11 +0000676static inline bool be_is_wol_excluded(struct be_adapter *adapter)
677{
678 struct pci_dev *pdev = adapter->pdev;
679
680 if (!be_physfn(adapter))
681 return true;
682
683 switch (pdev->subsystem_device) {
684 case OC_SUBSYS_DEVICE_ID1:
685 case OC_SUBSYS_DEVICE_ID2:
686 case OC_SUBSYS_DEVICE_ID3:
687 case OC_SUBSYS_DEVICE_ID4:
688 return true;
689 default:
690 return false;
691 }
692}
693
Ajit Khapardebc0c3402013-04-24 11:52:50 +0000694static inline int qnq_async_evt_rcvd(struct be_adapter *adapter)
695{
696 return adapter->flags & BE_FLAGS_QNQ_ASYNC_EVT_RCVD;
697}
698
Somnath Koture9e2a902013-10-24 14:37:53 +0530699static inline int fw_major_num(const char *fw_ver)
700{
701 int fw_major = 0;
702
703 sscanf(fw_ver, "%d.", &fw_major);
704
705 return fw_major;
706}
707
Sathya Perla8788fdc2009-07-27 22:52:03 +0000708extern void be_cq_notify(struct be_adapter *adapter, u16 qid, bool arm,
Sathya Perla5fb379e2009-06-18 00:02:59 +0000709 u16 num_popped);
Ajit Khapardeb236916a2011-12-30 12:15:40 +0000710extern void be_link_status_update(struct be_adapter *adapter, u8 link_status);
Ajit Khaparde89a88ab2011-05-16 07:36:18 +0000711extern void be_parse_stats(struct be_adapter *adapter);
Ajit Khaparde84517482009-09-04 03:12:16 +0000712extern int be_load_fw(struct be_adapter *adapter, u8 *func);
Ajit Khaparde4762f6c2012-03-18 06:23:11 +0000713extern bool be_is_wol_supported(struct be_adapter *adapter);
Ajit Khaparde42f11cf2012-04-21 18:53:22 +0000714extern bool be_pause_supported(struct be_adapter *adapter);
Somnath Kotur941a77d2012-05-17 22:59:03 +0000715extern u32 be_get_fw_log_level(struct be_adapter *adapter);
Sathya Perla68d7bdc2013-08-27 16:57:35 +0530716int be_update_queues(struct be_adapter *adapter);
717int be_poll(struct napi_struct *napi, int budget);
Somnath Kotur941a77d2012-05-17 22:59:03 +0000718
Parav Pandit045508a2012-03-26 14:27:13 +0000719/*
720 * internal function to initialize-cleanup roce device.
721 */
722extern void be_roce_dev_add(struct be_adapter *);
723extern void be_roce_dev_remove(struct be_adapter *);
724
725/*
726 * internal function to open-close roce device during ifup-ifdown.
727 */
728extern void be_roce_dev_open(struct be_adapter *);
729extern void be_roce_dev_close(struct be_adapter *);
730
Sathya Perla6b7c5b92009-03-11 23:32:03 -0700731#endif /* BE_H */