Magnus Damm | 6d9598e | 2010-11-17 10:59:31 +0000 | [diff] [blame] | 1 | /* |
| 2 | * sh73a0 processor support |
| 3 | * |
| 4 | * Copyright (C) 2010 Takashi Yoshii |
| 5 | * Copyright (C) 2010 Magnus Damm |
| 6 | * Copyright (C) 2008 Yoshihiro Shimoda |
| 7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify |
| 9 | * it under the terms of the GNU General Public License as published by |
| 10 | * the Free Software Foundation; version 2 of the License. |
| 11 | * |
| 12 | * This program is distributed in the hope that it will be useful, |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 15 | * GNU General Public License for more details. |
| 16 | * |
| 17 | * You should have received a copy of the GNU General Public License |
| 18 | * along with this program; if not, write to the Free Software |
| 19 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA |
| 20 | */ |
| 21 | #include <linux/kernel.h> |
| 22 | #include <linux/init.h> |
| 23 | #include <linux/interrupt.h> |
| 24 | #include <linux/irq.h> |
| 25 | #include <linux/platform_device.h> |
Simon Horman | 4860953 | 2012-11-21 22:00:15 +0900 | [diff] [blame] | 26 | #include <linux/of_platform.h> |
Magnus Damm | 6d9598e | 2010-11-17 10:59:31 +0000 | [diff] [blame] | 27 | #include <linux/delay.h> |
| 28 | #include <linux/input.h> |
| 29 | #include <linux/io.h> |
| 30 | #include <linux/serial_sci.h> |
Magnus Damm | 681e1b3 | 2011-05-24 10:37:16 +0000 | [diff] [blame] | 31 | #include <linux/sh_dma.h> |
Magnus Damm | 6d9598e | 2010-11-17 10:59:31 +0000 | [diff] [blame] | 32 | #include <linux/sh_intc.h> |
| 33 | #include <linux/sh_timer.h> |
Hideki EIRAKU | 9a27dee | 2013-01-21 19:54:28 +0900 | [diff] [blame] | 34 | #include <linux/platform_data/sh_ipmmu.h> |
Magnus Damm | 341eb54 | 2013-02-26 12:01:09 +0900 | [diff] [blame] | 35 | #include <linux/platform_data/irq-renesas-intc-irqpin.h> |
Kuninori Morimoto | 6088b42 | 2012-06-25 03:43:28 -0700 | [diff] [blame] | 36 | #include <mach/dma-register.h> |
Magnus Damm | 6d9598e | 2010-11-17 10:59:31 +0000 | [diff] [blame] | 37 | #include <mach/hardware.h> |
Rob Herring | 250a272 | 2012-01-03 16:57:33 -0600 | [diff] [blame] | 38 | #include <mach/irqs.h> |
Magnus Damm | 681e1b3 | 2011-05-24 10:37:16 +0000 | [diff] [blame] | 39 | #include <mach/sh73a0.h> |
Magnus Damm | 50e15c3 | 2012-02-29 21:37:27 +0900 | [diff] [blame] | 40 | #include <mach/common.h> |
Magnus Damm | 6d9598e | 2010-11-17 10:59:31 +0000 | [diff] [blame] | 41 | #include <asm/mach-types.h> |
Magnus Damm | 50e15c3 | 2012-02-29 21:37:27 +0900 | [diff] [blame] | 42 | #include <asm/mach/map.h> |
Magnus Damm | 6d9598e | 2010-11-17 10:59:31 +0000 | [diff] [blame] | 43 | #include <asm/mach/arch.h> |
Magnus Damm | 3be26fd | 2012-03-06 17:36:45 +0900 | [diff] [blame] | 44 | #include <asm/mach/time.h> |
Magnus Damm | 6d9598e | 2010-11-17 10:59:31 +0000 | [diff] [blame] | 45 | |
Magnus Damm | 50e15c3 | 2012-02-29 21:37:27 +0900 | [diff] [blame] | 46 | static struct map_desc sh73a0_io_desc[] __initdata = { |
| 47 | /* create a 1:1 entity map for 0xe6xxxxxx |
| 48 | * used by CPGA, INTC and PFC. |
| 49 | */ |
| 50 | { |
| 51 | .virtual = 0xe6000000, |
| 52 | .pfn = __phys_to_pfn(0xe6000000), |
| 53 | .length = 256 << 20, |
| 54 | .type = MT_DEVICE_NONSHARED |
| 55 | }, |
| 56 | }; |
| 57 | |
| 58 | void __init sh73a0_map_io(void) |
| 59 | { |
| 60 | iotable_init(sh73a0_io_desc, ARRAY_SIZE(sh73a0_io_desc)); |
| 61 | } |
| 62 | |
Magnus Damm | 474f675 | 2013-06-27 17:09:01 +0900 | [diff] [blame] | 63 | /* PFC */ |
| 64 | static struct resource pfc_resources[] __initdata = { |
| 65 | DEFINE_RES_MEM(0xe6050000, 0x8000), |
| 66 | DEFINE_RES_MEM(0xe605801c, 0x000c), |
Laurent Pinchart | 994d66a | 2012-12-15 23:51:28 +0100 | [diff] [blame] | 67 | }; |
| 68 | |
| 69 | void __init sh73a0_pinmux_init(void) |
| 70 | { |
Magnus Damm | 474f675 | 2013-06-27 17:09:01 +0900 | [diff] [blame] | 71 | platform_device_register_simple("pfc-sh73a0", -1, pfc_resources, |
| 72 | ARRAY_SIZE(pfc_resources)); |
Laurent Pinchart | 994d66a | 2012-12-15 23:51:28 +0100 | [diff] [blame] | 73 | } |
| 74 | |
Magnus Damm | 6d9598e | 2010-11-17 10:59:31 +0000 | [diff] [blame] | 75 | static struct plat_sci_port scif0_platform_data = { |
| 76 | .mapbase = 0xe6c40000, |
| 77 | .flags = UPF_BOOT_AUTOCONF, |
Paul Mundt | f43dc23 | 2011-01-13 15:06:28 +0900 | [diff] [blame] | 78 | .scscr = SCSCR_RE | SCSCR_TE, |
| 79 | .scbrr_algo_id = SCBRR_ALGO_4, |
Magnus Damm | 6d9598e | 2010-11-17 10:59:31 +0000 | [diff] [blame] | 80 | .type = PORT_SCIFA, |
| 81 | .irqs = { gic_spi(72), gic_spi(72), |
| 82 | gic_spi(72), gic_spi(72) }, |
| 83 | }; |
| 84 | |
| 85 | static struct platform_device scif0_device = { |
| 86 | .name = "sh-sci", |
| 87 | .id = 0, |
| 88 | .dev = { |
| 89 | .platform_data = &scif0_platform_data, |
| 90 | }, |
| 91 | }; |
| 92 | |
| 93 | static struct plat_sci_port scif1_platform_data = { |
| 94 | .mapbase = 0xe6c50000, |
| 95 | .flags = UPF_BOOT_AUTOCONF, |
Paul Mundt | f43dc23 | 2011-01-13 15:06:28 +0900 | [diff] [blame] | 96 | .scscr = SCSCR_RE | SCSCR_TE, |
| 97 | .scbrr_algo_id = SCBRR_ALGO_4, |
Magnus Damm | 6d9598e | 2010-11-17 10:59:31 +0000 | [diff] [blame] | 98 | .type = PORT_SCIFA, |
| 99 | .irqs = { gic_spi(73), gic_spi(73), |
| 100 | gic_spi(73), gic_spi(73) }, |
| 101 | }; |
| 102 | |
| 103 | static struct platform_device scif1_device = { |
| 104 | .name = "sh-sci", |
| 105 | .id = 1, |
| 106 | .dev = { |
| 107 | .platform_data = &scif1_platform_data, |
| 108 | }, |
| 109 | }; |
| 110 | |
| 111 | static struct plat_sci_port scif2_platform_data = { |
| 112 | .mapbase = 0xe6c60000, |
| 113 | .flags = UPF_BOOT_AUTOCONF, |
Paul Mundt | f43dc23 | 2011-01-13 15:06:28 +0900 | [diff] [blame] | 114 | .scscr = SCSCR_RE | SCSCR_TE, |
| 115 | .scbrr_algo_id = SCBRR_ALGO_4, |
Magnus Damm | 6d9598e | 2010-11-17 10:59:31 +0000 | [diff] [blame] | 116 | .type = PORT_SCIFA, |
| 117 | .irqs = { gic_spi(74), gic_spi(74), |
| 118 | gic_spi(74), gic_spi(74) }, |
| 119 | }; |
| 120 | |
| 121 | static struct platform_device scif2_device = { |
| 122 | .name = "sh-sci", |
| 123 | .id = 2, |
| 124 | .dev = { |
| 125 | .platform_data = &scif2_platform_data, |
| 126 | }, |
| 127 | }; |
| 128 | |
| 129 | static struct plat_sci_port scif3_platform_data = { |
| 130 | .mapbase = 0xe6c70000, |
| 131 | .flags = UPF_BOOT_AUTOCONF, |
Paul Mundt | f43dc23 | 2011-01-13 15:06:28 +0900 | [diff] [blame] | 132 | .scscr = SCSCR_RE | SCSCR_TE, |
| 133 | .scbrr_algo_id = SCBRR_ALGO_4, |
Magnus Damm | 6d9598e | 2010-11-17 10:59:31 +0000 | [diff] [blame] | 134 | .type = PORT_SCIFA, |
| 135 | .irqs = { gic_spi(75), gic_spi(75), |
| 136 | gic_spi(75), gic_spi(75) }, |
| 137 | }; |
| 138 | |
| 139 | static struct platform_device scif3_device = { |
| 140 | .name = "sh-sci", |
| 141 | .id = 3, |
| 142 | .dev = { |
| 143 | .platform_data = &scif3_platform_data, |
| 144 | }, |
| 145 | }; |
| 146 | |
| 147 | static struct plat_sci_port scif4_platform_data = { |
| 148 | .mapbase = 0xe6c80000, |
| 149 | .flags = UPF_BOOT_AUTOCONF, |
Paul Mundt | f43dc23 | 2011-01-13 15:06:28 +0900 | [diff] [blame] | 150 | .scscr = SCSCR_RE | SCSCR_TE, |
| 151 | .scbrr_algo_id = SCBRR_ALGO_4, |
Magnus Damm | 6d9598e | 2010-11-17 10:59:31 +0000 | [diff] [blame] | 152 | .type = PORT_SCIFA, |
| 153 | .irqs = { gic_spi(78), gic_spi(78), |
| 154 | gic_spi(78), gic_spi(78) }, |
| 155 | }; |
| 156 | |
| 157 | static struct platform_device scif4_device = { |
| 158 | .name = "sh-sci", |
| 159 | .id = 4, |
| 160 | .dev = { |
| 161 | .platform_data = &scif4_platform_data, |
| 162 | }, |
| 163 | }; |
| 164 | |
| 165 | static struct plat_sci_port scif5_platform_data = { |
| 166 | .mapbase = 0xe6cb0000, |
| 167 | .flags = UPF_BOOT_AUTOCONF, |
Paul Mundt | f43dc23 | 2011-01-13 15:06:28 +0900 | [diff] [blame] | 168 | .scscr = SCSCR_RE | SCSCR_TE, |
| 169 | .scbrr_algo_id = SCBRR_ALGO_4, |
Magnus Damm | 6d9598e | 2010-11-17 10:59:31 +0000 | [diff] [blame] | 170 | .type = PORT_SCIFA, |
| 171 | .irqs = { gic_spi(79), gic_spi(79), |
| 172 | gic_spi(79), gic_spi(79) }, |
| 173 | }; |
| 174 | |
| 175 | static struct platform_device scif5_device = { |
| 176 | .name = "sh-sci", |
| 177 | .id = 5, |
| 178 | .dev = { |
| 179 | .platform_data = &scif5_platform_data, |
| 180 | }, |
| 181 | }; |
| 182 | |
| 183 | static struct plat_sci_port scif6_platform_data = { |
| 184 | .mapbase = 0xe6cc0000, |
| 185 | .flags = UPF_BOOT_AUTOCONF, |
Paul Mundt | f43dc23 | 2011-01-13 15:06:28 +0900 | [diff] [blame] | 186 | .scscr = SCSCR_RE | SCSCR_TE, |
| 187 | .scbrr_algo_id = SCBRR_ALGO_4, |
Magnus Damm | 6d9598e | 2010-11-17 10:59:31 +0000 | [diff] [blame] | 188 | .type = PORT_SCIFA, |
| 189 | .irqs = { gic_spi(156), gic_spi(156), |
| 190 | gic_spi(156), gic_spi(156) }, |
| 191 | }; |
| 192 | |
| 193 | static struct platform_device scif6_device = { |
| 194 | .name = "sh-sci", |
| 195 | .id = 6, |
| 196 | .dev = { |
| 197 | .platform_data = &scif6_platform_data, |
| 198 | }, |
| 199 | }; |
| 200 | |
| 201 | static struct plat_sci_port scif7_platform_data = { |
| 202 | .mapbase = 0xe6cd0000, |
| 203 | .flags = UPF_BOOT_AUTOCONF, |
Paul Mundt | f43dc23 | 2011-01-13 15:06:28 +0900 | [diff] [blame] | 204 | .scscr = SCSCR_RE | SCSCR_TE, |
| 205 | .scbrr_algo_id = SCBRR_ALGO_4, |
Magnus Damm | 6d9598e | 2010-11-17 10:59:31 +0000 | [diff] [blame] | 206 | .type = PORT_SCIFA, |
| 207 | .irqs = { gic_spi(143), gic_spi(143), |
| 208 | gic_spi(143), gic_spi(143) }, |
| 209 | }; |
| 210 | |
| 211 | static struct platform_device scif7_device = { |
| 212 | .name = "sh-sci", |
| 213 | .id = 7, |
| 214 | .dev = { |
| 215 | .platform_data = &scif7_platform_data, |
| 216 | }, |
| 217 | }; |
| 218 | |
| 219 | static struct plat_sci_port scif8_platform_data = { |
| 220 | .mapbase = 0xe6c30000, |
| 221 | .flags = UPF_BOOT_AUTOCONF, |
Paul Mundt | f43dc23 | 2011-01-13 15:06:28 +0900 | [diff] [blame] | 222 | .scscr = SCSCR_RE | SCSCR_TE, |
| 223 | .scbrr_algo_id = SCBRR_ALGO_4, |
Magnus Damm | 6d9598e | 2010-11-17 10:59:31 +0000 | [diff] [blame] | 224 | .type = PORT_SCIFB, |
| 225 | .irqs = { gic_spi(80), gic_spi(80), |
| 226 | gic_spi(80), gic_spi(80) }, |
| 227 | }; |
| 228 | |
| 229 | static struct platform_device scif8_device = { |
| 230 | .name = "sh-sci", |
| 231 | .id = 8, |
| 232 | .dev = { |
| 233 | .platform_data = &scif8_platform_data, |
| 234 | }, |
| 235 | }; |
| 236 | |
| 237 | static struct sh_timer_config cmt10_platform_data = { |
| 238 | .name = "CMT10", |
| 239 | .channel_offset = 0x10, |
| 240 | .timer_bit = 0, |
Simon Horman | 5600a84 | 2013-05-22 19:47:05 +0900 | [diff] [blame] | 241 | .clockevent_rating = 80, |
Magnus Damm | 6d9598e | 2010-11-17 10:59:31 +0000 | [diff] [blame] | 242 | .clocksource_rating = 125, |
| 243 | }; |
| 244 | |
| 245 | static struct resource cmt10_resources[] = { |
| 246 | [0] = { |
| 247 | .name = "CMT10", |
| 248 | .start = 0xe6138010, |
| 249 | .end = 0xe613801b, |
| 250 | .flags = IORESOURCE_MEM, |
| 251 | }, |
| 252 | [1] = { |
| 253 | .start = gic_spi(65), |
| 254 | .flags = IORESOURCE_IRQ, |
| 255 | }, |
| 256 | }; |
| 257 | |
| 258 | static struct platform_device cmt10_device = { |
| 259 | .name = "sh_cmt", |
| 260 | .id = 10, |
| 261 | .dev = { |
| 262 | .platform_data = &cmt10_platform_data, |
| 263 | }, |
| 264 | .resource = cmt10_resources, |
| 265 | .num_resources = ARRAY_SIZE(cmt10_resources), |
| 266 | }; |
| 267 | |
Magnus Damm | 5010f3d | 2010-12-21 08:40:59 +0000 | [diff] [blame] | 268 | /* TMU */ |
| 269 | static struct sh_timer_config tmu00_platform_data = { |
| 270 | .name = "TMU00", |
| 271 | .channel_offset = 0x4, |
| 272 | .timer_bit = 0, |
| 273 | .clockevent_rating = 200, |
| 274 | }; |
| 275 | |
| 276 | static struct resource tmu00_resources[] = { |
Simon Horman | abbec5f | 2013-04-23 02:27:15 +0000 | [diff] [blame] | 277 | [0] = DEFINE_RES_MEM_NAMED(0xfff60008, 0xc, "TMU00"), |
Magnus Damm | 5010f3d | 2010-12-21 08:40:59 +0000 | [diff] [blame] | 278 | [1] = { |
| 279 | .start = intcs_evt2irq(0x0e80), /* TMU0_TUNI00 */ |
| 280 | .flags = IORESOURCE_IRQ, |
| 281 | }, |
| 282 | }; |
| 283 | |
| 284 | static struct platform_device tmu00_device = { |
| 285 | .name = "sh_tmu", |
| 286 | .id = 0, |
| 287 | .dev = { |
| 288 | .platform_data = &tmu00_platform_data, |
| 289 | }, |
| 290 | .resource = tmu00_resources, |
| 291 | .num_resources = ARRAY_SIZE(tmu00_resources), |
| 292 | }; |
| 293 | |
| 294 | static struct sh_timer_config tmu01_platform_data = { |
| 295 | .name = "TMU01", |
| 296 | .channel_offset = 0x10, |
| 297 | .timer_bit = 1, |
| 298 | .clocksource_rating = 200, |
| 299 | }; |
| 300 | |
| 301 | static struct resource tmu01_resources[] = { |
Simon Horman | abbec5f | 2013-04-23 02:27:15 +0000 | [diff] [blame] | 302 | [0] = DEFINE_RES_MEM_NAMED(0xfff60014, 0xc, "TMU00"), |
Magnus Damm | 5010f3d | 2010-12-21 08:40:59 +0000 | [diff] [blame] | 303 | [1] = { |
| 304 | .start = intcs_evt2irq(0x0ea0), /* TMU0_TUNI01 */ |
| 305 | .flags = IORESOURCE_IRQ, |
| 306 | }, |
| 307 | }; |
| 308 | |
| 309 | static struct platform_device tmu01_device = { |
| 310 | .name = "sh_tmu", |
| 311 | .id = 1, |
| 312 | .dev = { |
| 313 | .platform_data = &tmu01_platform_data, |
| 314 | }, |
| 315 | .resource = tmu01_resources, |
| 316 | .num_resources = ARRAY_SIZE(tmu01_resources), |
| 317 | }; |
| 318 | |
Yoshii Takashi | b028f94 | 2010-11-19 13:20:45 +0000 | [diff] [blame] | 319 | static struct resource i2c0_resources[] = { |
Simon Horman | abbec5f | 2013-04-23 02:27:15 +0000 | [diff] [blame] | 320 | [0] = DEFINE_RES_MEM_NAMED(0xe6820000, 0x426, "IIC0"), |
Yoshii Takashi | b028f94 | 2010-11-19 13:20:45 +0000 | [diff] [blame] | 321 | [1] = { |
| 322 | .start = gic_spi(167), |
| 323 | .end = gic_spi(170), |
| 324 | .flags = IORESOURCE_IRQ, |
| 325 | }, |
| 326 | }; |
| 327 | |
| 328 | static struct resource i2c1_resources[] = { |
Simon Horman | abbec5f | 2013-04-23 02:27:15 +0000 | [diff] [blame] | 329 | [0] = DEFINE_RES_MEM_NAMED(0xe6822000, 0x426, "IIC1"), |
Yoshii Takashi | b028f94 | 2010-11-19 13:20:45 +0000 | [diff] [blame] | 330 | [1] = { |
| 331 | .start = gic_spi(51), |
| 332 | .end = gic_spi(54), |
| 333 | .flags = IORESOURCE_IRQ, |
| 334 | }, |
| 335 | }; |
| 336 | |
| 337 | static struct resource i2c2_resources[] = { |
Simon Horman | abbec5f | 2013-04-23 02:27:15 +0000 | [diff] [blame] | 338 | [0] = DEFINE_RES_MEM_NAMED(0xe6824000, 0x426, "IIC2"), |
Yoshii Takashi | b028f94 | 2010-11-19 13:20:45 +0000 | [diff] [blame] | 339 | [1] = { |
| 340 | .start = gic_spi(171), |
| 341 | .end = gic_spi(174), |
| 342 | .flags = IORESOURCE_IRQ, |
| 343 | }, |
| 344 | }; |
| 345 | |
| 346 | static struct resource i2c3_resources[] = { |
Simon Horman | abbec5f | 2013-04-23 02:27:15 +0000 | [diff] [blame] | 347 | [0] = DEFINE_RES_MEM_NAMED(0xe6826000, 0x426, "IIC3"), |
Yoshii Takashi | b028f94 | 2010-11-19 13:20:45 +0000 | [diff] [blame] | 348 | [1] = { |
| 349 | .start = gic_spi(183), |
| 350 | .end = gic_spi(186), |
| 351 | .flags = IORESOURCE_IRQ, |
| 352 | }, |
| 353 | }; |
| 354 | |
| 355 | static struct resource i2c4_resources[] = { |
Simon Horman | abbec5f | 2013-04-23 02:27:15 +0000 | [diff] [blame] | 356 | [0] = DEFINE_RES_MEM_NAMED(0xe6828000, 0x426, "IIC4"), |
Yoshii Takashi | b028f94 | 2010-11-19 13:20:45 +0000 | [diff] [blame] | 357 | [1] = { |
| 358 | .start = gic_spi(187), |
| 359 | .end = gic_spi(190), |
| 360 | .flags = IORESOURCE_IRQ, |
| 361 | }, |
| 362 | }; |
| 363 | |
| 364 | static struct platform_device i2c0_device = { |
| 365 | .name = "i2c-sh_mobile", |
| 366 | .id = 0, |
| 367 | .resource = i2c0_resources, |
| 368 | .num_resources = ARRAY_SIZE(i2c0_resources), |
| 369 | }; |
| 370 | |
| 371 | static struct platform_device i2c1_device = { |
| 372 | .name = "i2c-sh_mobile", |
| 373 | .id = 1, |
| 374 | .resource = i2c1_resources, |
| 375 | .num_resources = ARRAY_SIZE(i2c1_resources), |
| 376 | }; |
| 377 | |
| 378 | static struct platform_device i2c2_device = { |
| 379 | .name = "i2c-sh_mobile", |
| 380 | .id = 2, |
| 381 | .resource = i2c2_resources, |
| 382 | .num_resources = ARRAY_SIZE(i2c2_resources), |
| 383 | }; |
| 384 | |
| 385 | static struct platform_device i2c3_device = { |
| 386 | .name = "i2c-sh_mobile", |
| 387 | .id = 3, |
| 388 | .resource = i2c3_resources, |
| 389 | .num_resources = ARRAY_SIZE(i2c3_resources), |
| 390 | }; |
| 391 | |
| 392 | static struct platform_device i2c4_device = { |
| 393 | .name = "i2c-sh_mobile", |
| 394 | .id = 4, |
| 395 | .resource = i2c4_resources, |
| 396 | .num_resources = ARRAY_SIZE(i2c4_resources), |
| 397 | }; |
| 398 | |
Magnus Damm | 681e1b3 | 2011-05-24 10:37:16 +0000 | [diff] [blame] | 399 | static const struct sh_dmae_slave_config sh73a0_dmae_slaves[] = { |
| 400 | { |
| 401 | .slave_id = SHDMA_SLAVE_SCIF0_TX, |
| 402 | .addr = 0xe6c40020, |
| 403 | .chcr = CHCR_TX(XMIT_SZ_8BIT), |
| 404 | .mid_rid = 0x21, |
| 405 | }, { |
| 406 | .slave_id = SHDMA_SLAVE_SCIF0_RX, |
| 407 | .addr = 0xe6c40024, |
| 408 | .chcr = CHCR_RX(XMIT_SZ_8BIT), |
| 409 | .mid_rid = 0x22, |
| 410 | }, { |
| 411 | .slave_id = SHDMA_SLAVE_SCIF1_TX, |
| 412 | .addr = 0xe6c50020, |
| 413 | .chcr = CHCR_TX(XMIT_SZ_8BIT), |
| 414 | .mid_rid = 0x25, |
| 415 | }, { |
| 416 | .slave_id = SHDMA_SLAVE_SCIF1_RX, |
| 417 | .addr = 0xe6c50024, |
| 418 | .chcr = CHCR_RX(XMIT_SZ_8BIT), |
| 419 | .mid_rid = 0x26, |
| 420 | }, { |
| 421 | .slave_id = SHDMA_SLAVE_SCIF2_TX, |
| 422 | .addr = 0xe6c60020, |
| 423 | .chcr = CHCR_TX(XMIT_SZ_8BIT), |
| 424 | .mid_rid = 0x29, |
| 425 | }, { |
| 426 | .slave_id = SHDMA_SLAVE_SCIF2_RX, |
| 427 | .addr = 0xe6c60024, |
| 428 | .chcr = CHCR_RX(XMIT_SZ_8BIT), |
| 429 | .mid_rid = 0x2a, |
| 430 | }, { |
| 431 | .slave_id = SHDMA_SLAVE_SCIF3_TX, |
| 432 | .addr = 0xe6c70020, |
| 433 | .chcr = CHCR_TX(XMIT_SZ_8BIT), |
| 434 | .mid_rid = 0x2d, |
| 435 | }, { |
| 436 | .slave_id = SHDMA_SLAVE_SCIF3_RX, |
| 437 | .addr = 0xe6c70024, |
| 438 | .chcr = CHCR_RX(XMIT_SZ_8BIT), |
| 439 | .mid_rid = 0x2e, |
| 440 | }, { |
| 441 | .slave_id = SHDMA_SLAVE_SCIF4_TX, |
| 442 | .addr = 0xe6c80020, |
| 443 | .chcr = CHCR_TX(XMIT_SZ_8BIT), |
| 444 | .mid_rid = 0x39, |
| 445 | }, { |
| 446 | .slave_id = SHDMA_SLAVE_SCIF4_RX, |
| 447 | .addr = 0xe6c80024, |
| 448 | .chcr = CHCR_RX(XMIT_SZ_8BIT), |
| 449 | .mid_rid = 0x3a, |
| 450 | }, { |
| 451 | .slave_id = SHDMA_SLAVE_SCIF5_TX, |
| 452 | .addr = 0xe6cb0020, |
| 453 | .chcr = CHCR_TX(XMIT_SZ_8BIT), |
| 454 | .mid_rid = 0x35, |
| 455 | }, { |
| 456 | .slave_id = SHDMA_SLAVE_SCIF5_RX, |
| 457 | .addr = 0xe6cb0024, |
| 458 | .chcr = CHCR_RX(XMIT_SZ_8BIT), |
| 459 | .mid_rid = 0x36, |
| 460 | }, { |
| 461 | .slave_id = SHDMA_SLAVE_SCIF6_TX, |
| 462 | .addr = 0xe6cc0020, |
| 463 | .chcr = CHCR_TX(XMIT_SZ_8BIT), |
| 464 | .mid_rid = 0x1d, |
| 465 | }, { |
| 466 | .slave_id = SHDMA_SLAVE_SCIF6_RX, |
| 467 | .addr = 0xe6cc0024, |
| 468 | .chcr = CHCR_RX(XMIT_SZ_8BIT), |
| 469 | .mid_rid = 0x1e, |
| 470 | }, { |
| 471 | .slave_id = SHDMA_SLAVE_SCIF7_TX, |
| 472 | .addr = 0xe6cd0020, |
| 473 | .chcr = CHCR_TX(XMIT_SZ_8BIT), |
| 474 | .mid_rid = 0x19, |
| 475 | }, { |
| 476 | .slave_id = SHDMA_SLAVE_SCIF7_RX, |
| 477 | .addr = 0xe6cd0024, |
| 478 | .chcr = CHCR_RX(XMIT_SZ_8BIT), |
| 479 | .mid_rid = 0x1a, |
| 480 | }, { |
| 481 | .slave_id = SHDMA_SLAVE_SCIF8_TX, |
| 482 | .addr = 0xe6c30040, |
| 483 | .chcr = CHCR_TX(XMIT_SZ_8BIT), |
| 484 | .mid_rid = 0x3d, |
| 485 | }, { |
| 486 | .slave_id = SHDMA_SLAVE_SCIF8_RX, |
| 487 | .addr = 0xe6c30060, |
| 488 | .chcr = CHCR_RX(XMIT_SZ_8BIT), |
| 489 | .mid_rid = 0x3e, |
| 490 | }, { |
| 491 | .slave_id = SHDMA_SLAVE_SDHI0_TX, |
| 492 | .addr = 0xee100030, |
| 493 | .chcr = CHCR_TX(XMIT_SZ_16BIT), |
| 494 | .mid_rid = 0xc1, |
| 495 | }, { |
| 496 | .slave_id = SHDMA_SLAVE_SDHI0_RX, |
| 497 | .addr = 0xee100030, |
| 498 | .chcr = CHCR_RX(XMIT_SZ_16BIT), |
| 499 | .mid_rid = 0xc2, |
| 500 | }, { |
| 501 | .slave_id = SHDMA_SLAVE_SDHI1_TX, |
| 502 | .addr = 0xee120030, |
| 503 | .chcr = CHCR_TX(XMIT_SZ_16BIT), |
| 504 | .mid_rid = 0xc9, |
| 505 | }, { |
| 506 | .slave_id = SHDMA_SLAVE_SDHI1_RX, |
| 507 | .addr = 0xee120030, |
| 508 | .chcr = CHCR_RX(XMIT_SZ_16BIT), |
| 509 | .mid_rid = 0xca, |
| 510 | }, { |
| 511 | .slave_id = SHDMA_SLAVE_SDHI2_TX, |
| 512 | .addr = 0xee140030, |
| 513 | .chcr = CHCR_TX(XMIT_SZ_16BIT), |
| 514 | .mid_rid = 0xcd, |
| 515 | }, { |
| 516 | .slave_id = SHDMA_SLAVE_SDHI2_RX, |
| 517 | .addr = 0xee140030, |
| 518 | .chcr = CHCR_RX(XMIT_SZ_16BIT), |
| 519 | .mid_rid = 0xce, |
| 520 | }, { |
| 521 | .slave_id = SHDMA_SLAVE_MMCIF_TX, |
| 522 | .addr = 0xe6bd0034, |
| 523 | .chcr = CHCR_TX(XMIT_SZ_32BIT), |
| 524 | .mid_rid = 0xd1, |
| 525 | }, { |
| 526 | .slave_id = SHDMA_SLAVE_MMCIF_RX, |
| 527 | .addr = 0xe6bd0034, |
| 528 | .chcr = CHCR_RX(XMIT_SZ_32BIT), |
| 529 | .mid_rid = 0xd2, |
| 530 | }, |
| 531 | }; |
| 532 | |
| 533 | #define DMAE_CHANNEL(_offset) \ |
| 534 | { \ |
| 535 | .offset = _offset - 0x20, \ |
| 536 | .dmars = _offset - 0x20 + 0x40, \ |
| 537 | } |
| 538 | |
| 539 | static const struct sh_dmae_channel sh73a0_dmae_channels[] = { |
| 540 | DMAE_CHANNEL(0x8000), |
| 541 | DMAE_CHANNEL(0x8080), |
| 542 | DMAE_CHANNEL(0x8100), |
| 543 | DMAE_CHANNEL(0x8180), |
| 544 | DMAE_CHANNEL(0x8200), |
| 545 | DMAE_CHANNEL(0x8280), |
| 546 | DMAE_CHANNEL(0x8300), |
| 547 | DMAE_CHANNEL(0x8380), |
| 548 | DMAE_CHANNEL(0x8400), |
| 549 | DMAE_CHANNEL(0x8480), |
| 550 | DMAE_CHANNEL(0x8500), |
| 551 | DMAE_CHANNEL(0x8580), |
| 552 | DMAE_CHANNEL(0x8600), |
| 553 | DMAE_CHANNEL(0x8680), |
| 554 | DMAE_CHANNEL(0x8700), |
| 555 | DMAE_CHANNEL(0x8780), |
| 556 | DMAE_CHANNEL(0x8800), |
| 557 | DMAE_CHANNEL(0x8880), |
| 558 | DMAE_CHANNEL(0x8900), |
| 559 | DMAE_CHANNEL(0x8980), |
| 560 | }; |
| 561 | |
Magnus Damm | 681e1b3 | 2011-05-24 10:37:16 +0000 | [diff] [blame] | 562 | static struct sh_dmae_pdata sh73a0_dmae_platform_data = { |
| 563 | .slave = sh73a0_dmae_slaves, |
| 564 | .slave_num = ARRAY_SIZE(sh73a0_dmae_slaves), |
| 565 | .channel = sh73a0_dmae_channels, |
| 566 | .channel_num = ARRAY_SIZE(sh73a0_dmae_channels), |
Kuninori Morimoto | 6088b42 | 2012-06-25 03:43:28 -0700 | [diff] [blame] | 567 | .ts_low_shift = TS_LOW_SHIFT, |
| 568 | .ts_low_mask = TS_LOW_BIT << TS_LOW_SHIFT, |
| 569 | .ts_high_shift = TS_HI_SHIFT, |
| 570 | .ts_high_mask = TS_HI_BIT << TS_HI_SHIFT, |
| 571 | .ts_shift = dma_ts_shift, |
| 572 | .ts_shift_num = ARRAY_SIZE(dma_ts_shift), |
Magnus Damm | 681e1b3 | 2011-05-24 10:37:16 +0000 | [diff] [blame] | 573 | .dmaor_init = DMAOR_DME, |
| 574 | }; |
| 575 | |
| 576 | static struct resource sh73a0_dmae_resources[] = { |
Simon Horman | abbec5f | 2013-04-23 02:27:15 +0000 | [diff] [blame] | 577 | DEFINE_RES_MEM(0xfe000020, 0x89e0), |
Magnus Damm | 681e1b3 | 2011-05-24 10:37:16 +0000 | [diff] [blame] | 578 | { |
Shimoda, Yoshihiro | 2005246 | 2012-01-10 14:21:31 +0900 | [diff] [blame] | 579 | .name = "error_irq", |
Magnus Damm | 681e1b3 | 2011-05-24 10:37:16 +0000 | [diff] [blame] | 580 | .start = gic_spi(129), |
| 581 | .end = gic_spi(129), |
| 582 | .flags = IORESOURCE_IRQ, |
| 583 | }, |
| 584 | { |
| 585 | /* IRQ for channels 0-19 */ |
| 586 | .start = gic_spi(109), |
| 587 | .end = gic_spi(128), |
| 588 | .flags = IORESOURCE_IRQ, |
| 589 | }, |
| 590 | }; |
| 591 | |
| 592 | static struct platform_device dma0_device = { |
| 593 | .name = "sh-dma-engine", |
| 594 | .id = 0, |
| 595 | .resource = sh73a0_dmae_resources, |
| 596 | .num_resources = ARRAY_SIZE(sh73a0_dmae_resources), |
| 597 | .dev = { |
| 598 | .platform_data = &sh73a0_dmae_platform_data, |
| 599 | }, |
| 600 | }; |
| 601 | |
Kuninori Morimoto | 832290b | 2012-06-25 03:39:20 -0700 | [diff] [blame] | 602 | /* MPDMAC */ |
| 603 | static const struct sh_dmae_slave_config sh73a0_mpdma_slaves[] = { |
| 604 | { |
| 605 | .slave_id = SHDMA_SLAVE_FSI2A_RX, |
| 606 | .addr = 0xec230020, |
| 607 | .chcr = CHCR_RX(XMIT_SZ_32BIT), |
| 608 | .mid_rid = 0xd6, /* CHECK ME */ |
| 609 | }, { |
| 610 | .slave_id = SHDMA_SLAVE_FSI2A_TX, |
| 611 | .addr = 0xec230024, |
| 612 | .chcr = CHCR_TX(XMIT_SZ_32BIT), |
| 613 | .mid_rid = 0xd5, /* CHECK ME */ |
| 614 | }, { |
| 615 | .slave_id = SHDMA_SLAVE_FSI2C_RX, |
| 616 | .addr = 0xec230060, |
| 617 | .chcr = CHCR_RX(XMIT_SZ_32BIT), |
| 618 | .mid_rid = 0xda, /* CHECK ME */ |
| 619 | }, { |
| 620 | .slave_id = SHDMA_SLAVE_FSI2C_TX, |
| 621 | .addr = 0xec230064, |
| 622 | .chcr = CHCR_TX(XMIT_SZ_32BIT), |
| 623 | .mid_rid = 0xd9, /* CHECK ME */ |
| 624 | }, { |
| 625 | .slave_id = SHDMA_SLAVE_FSI2B_RX, |
| 626 | .addr = 0xec240020, |
| 627 | .chcr = CHCR_RX(XMIT_SZ_32BIT), |
| 628 | .mid_rid = 0x8e, /* CHECK ME */ |
| 629 | }, { |
| 630 | .slave_id = SHDMA_SLAVE_FSI2B_TX, |
| 631 | .addr = 0xec240024, |
| 632 | .chcr = CHCR_RX(XMIT_SZ_32BIT), |
| 633 | .mid_rid = 0x8d, /* CHECK ME */ |
| 634 | }, { |
| 635 | .slave_id = SHDMA_SLAVE_FSI2D_RX, |
| 636 | .addr = 0xec240060, |
| 637 | .chcr = CHCR_RX(XMIT_SZ_32BIT), |
| 638 | .mid_rid = 0x9a, /* CHECK ME */ |
| 639 | }, |
| 640 | }; |
| 641 | |
| 642 | #define MPDMA_CHANNEL(a, b, c) \ |
| 643 | { \ |
| 644 | .offset = a, \ |
| 645 | .dmars = b, \ |
| 646 | .dmars_bit = c, \ |
| 647 | .chclr_offset = (0x220 - 0x20) + a \ |
| 648 | } |
| 649 | |
| 650 | static const struct sh_dmae_channel sh73a0_mpdma_channels[] = { |
| 651 | MPDMA_CHANNEL(0x00, 0, 0), |
| 652 | MPDMA_CHANNEL(0x10, 0, 8), |
| 653 | MPDMA_CHANNEL(0x20, 4, 0), |
| 654 | MPDMA_CHANNEL(0x30, 4, 8), |
| 655 | MPDMA_CHANNEL(0x50, 8, 0), |
| 656 | MPDMA_CHANNEL(0x70, 8, 8), |
| 657 | }; |
| 658 | |
| 659 | static struct sh_dmae_pdata sh73a0_mpdma_platform_data = { |
| 660 | .slave = sh73a0_mpdma_slaves, |
| 661 | .slave_num = ARRAY_SIZE(sh73a0_mpdma_slaves), |
| 662 | .channel = sh73a0_mpdma_channels, |
| 663 | .channel_num = ARRAY_SIZE(sh73a0_mpdma_channels), |
Kuninori Morimoto | 6088b42 | 2012-06-25 03:43:28 -0700 | [diff] [blame] | 664 | .ts_low_shift = TS_LOW_SHIFT, |
| 665 | .ts_low_mask = TS_LOW_BIT << TS_LOW_SHIFT, |
| 666 | .ts_high_shift = TS_HI_SHIFT, |
| 667 | .ts_high_mask = TS_HI_BIT << TS_HI_SHIFT, |
| 668 | .ts_shift = dma_ts_shift, |
| 669 | .ts_shift_num = ARRAY_SIZE(dma_ts_shift), |
Kuninori Morimoto | 832290b | 2012-06-25 03:39:20 -0700 | [diff] [blame] | 670 | .dmaor_init = DMAOR_DME, |
| 671 | .chclr_present = 1, |
| 672 | }; |
| 673 | |
| 674 | /* Resource order important! */ |
| 675 | static struct resource sh73a0_mpdma_resources[] = { |
Simon Horman | abbec5f | 2013-04-23 02:27:15 +0000 | [diff] [blame] | 676 | /* Channel registers and DMAOR */ |
| 677 | DEFINE_RES_MEM(0xec618020, 0x270), |
| 678 | /* DMARSx */ |
| 679 | DEFINE_RES_MEM(0xec619000, 0xc), |
Kuninori Morimoto | 832290b | 2012-06-25 03:39:20 -0700 | [diff] [blame] | 680 | { |
| 681 | .name = "error_irq", |
| 682 | .start = gic_spi(181), |
| 683 | .end = gic_spi(181), |
| 684 | .flags = IORESOURCE_IRQ, |
| 685 | }, |
| 686 | { |
| 687 | /* IRQ for channels 0-5 */ |
| 688 | .start = gic_spi(175), |
| 689 | .end = gic_spi(180), |
| 690 | .flags = IORESOURCE_IRQ, |
| 691 | }, |
| 692 | }; |
| 693 | |
| 694 | static struct platform_device mpdma0_device = { |
| 695 | .name = "sh-dma-engine", |
| 696 | .id = 1, |
| 697 | .resource = sh73a0_mpdma_resources, |
| 698 | .num_resources = ARRAY_SIZE(sh73a0_mpdma_resources), |
| 699 | .dev = { |
| 700 | .platform_data = &sh73a0_mpdma_platform_data, |
| 701 | }, |
| 702 | }; |
| 703 | |
Tetsuyuki Kobayashi | f23f5be | 2012-09-06 20:14:06 +0900 | [diff] [blame] | 704 | static struct resource pmu_resources[] = { |
| 705 | [0] = { |
| 706 | .start = gic_spi(55), |
| 707 | .end = gic_spi(55), |
| 708 | .flags = IORESOURCE_IRQ, |
| 709 | }, |
| 710 | [1] = { |
| 711 | .start = gic_spi(56), |
| 712 | .end = gic_spi(56), |
| 713 | .flags = IORESOURCE_IRQ, |
| 714 | }, |
| 715 | }; |
| 716 | |
| 717 | static struct platform_device pmu_device = { |
| 718 | .name = "arm-pmu", |
| 719 | .id = -1, |
| 720 | .num_resources = ARRAY_SIZE(pmu_resources), |
| 721 | .resource = pmu_resources, |
| 722 | }; |
| 723 | |
Hideki EIRAKU | 9a27dee | 2013-01-21 19:54:28 +0900 | [diff] [blame] | 724 | /* an IPMMU module for ICB */ |
| 725 | static struct resource ipmmu_resources[] = { |
Simon Horman | abbec5f | 2013-04-23 02:27:15 +0000 | [diff] [blame] | 726 | DEFINE_RES_MEM_NAMED(0xfe951000, 0x100, "IPMMU"), |
Hideki EIRAKU | 9a27dee | 2013-01-21 19:54:28 +0900 | [diff] [blame] | 727 | }; |
| 728 | |
| 729 | static const char * const ipmmu_dev_names[] = { |
| 730 | "sh_mobile_lcdc_fb.0", |
| 731 | }; |
| 732 | |
| 733 | static struct shmobile_ipmmu_platform_data ipmmu_platform_data = { |
| 734 | .dev_names = ipmmu_dev_names, |
| 735 | .num_dev_names = ARRAY_SIZE(ipmmu_dev_names), |
| 736 | }; |
| 737 | |
| 738 | static struct platform_device ipmmu_device = { |
| 739 | .name = "ipmmu", |
| 740 | .id = -1, |
| 741 | .dev = { |
| 742 | .platform_data = &ipmmu_platform_data, |
| 743 | }, |
| 744 | .resource = ipmmu_resources, |
| 745 | .num_resources = ARRAY_SIZE(ipmmu_resources), |
| 746 | }; |
| 747 | |
Magnus Damm | 1461f8b | 2013-03-06 15:08:31 +0900 | [diff] [blame] | 748 | static struct renesas_intc_irqpin_config irqpin0_platform_data = { |
Magnus Damm | 341eb54 | 2013-02-26 12:01:09 +0900 | [diff] [blame] | 749 | .irq_base = irq_pin(0), /* IRQ0 -> IRQ7 */ |
| 750 | }; |
| 751 | |
| 752 | static struct resource irqpin0_resources[] = { |
| 753 | DEFINE_RES_MEM(0xe6900000, 4), /* ICR1A */ |
| 754 | DEFINE_RES_MEM(0xe6900010, 4), /* INTPRI00A */ |
| 755 | DEFINE_RES_MEM(0xe6900020, 1), /* INTREQ00A */ |
| 756 | DEFINE_RES_MEM(0xe6900040, 1), /* INTMSK00A */ |
| 757 | DEFINE_RES_MEM(0xe6900060, 1), /* INTMSKCLR00A */ |
| 758 | DEFINE_RES_IRQ(gic_spi(1)), /* IRQ0 */ |
| 759 | DEFINE_RES_IRQ(gic_spi(2)), /* IRQ1 */ |
| 760 | DEFINE_RES_IRQ(gic_spi(3)), /* IRQ2 */ |
| 761 | DEFINE_RES_IRQ(gic_spi(4)), /* IRQ3 */ |
| 762 | DEFINE_RES_IRQ(gic_spi(5)), /* IRQ4 */ |
| 763 | DEFINE_RES_IRQ(gic_spi(6)), /* IRQ5 */ |
| 764 | DEFINE_RES_IRQ(gic_spi(7)), /* IRQ6 */ |
| 765 | DEFINE_RES_IRQ(gic_spi(8)), /* IRQ7 */ |
| 766 | }; |
| 767 | |
| 768 | static struct platform_device irqpin0_device = { |
| 769 | .name = "renesas_intc_irqpin", |
| 770 | .id = 0, |
| 771 | .resource = irqpin0_resources, |
| 772 | .num_resources = ARRAY_SIZE(irqpin0_resources), |
| 773 | .dev = { |
| 774 | .platform_data = &irqpin0_platform_data, |
| 775 | }, |
| 776 | }; |
| 777 | |
Magnus Damm | 1461f8b | 2013-03-06 15:08:31 +0900 | [diff] [blame] | 778 | static struct renesas_intc_irqpin_config irqpin1_platform_data = { |
Magnus Damm | 341eb54 | 2013-02-26 12:01:09 +0900 | [diff] [blame] | 779 | .irq_base = irq_pin(8), /* IRQ8 -> IRQ15 */ |
| 780 | .control_parent = true, /* Disable spurious IRQ10 */ |
| 781 | }; |
| 782 | |
| 783 | static struct resource irqpin1_resources[] = { |
| 784 | DEFINE_RES_MEM(0xe6900004, 4), /* ICR2A */ |
| 785 | DEFINE_RES_MEM(0xe6900014, 4), /* INTPRI10A */ |
| 786 | DEFINE_RES_MEM(0xe6900024, 1), /* INTREQ10A */ |
| 787 | DEFINE_RES_MEM(0xe6900044, 1), /* INTMSK10A */ |
| 788 | DEFINE_RES_MEM(0xe6900064, 1), /* INTMSKCLR10A */ |
| 789 | DEFINE_RES_IRQ(gic_spi(9)), /* IRQ8 */ |
| 790 | DEFINE_RES_IRQ(gic_spi(10)), /* IRQ9 */ |
| 791 | DEFINE_RES_IRQ(gic_spi(11)), /* IRQ10 */ |
| 792 | DEFINE_RES_IRQ(gic_spi(12)), /* IRQ11 */ |
| 793 | DEFINE_RES_IRQ(gic_spi(13)), /* IRQ12 */ |
| 794 | DEFINE_RES_IRQ(gic_spi(14)), /* IRQ13 */ |
| 795 | DEFINE_RES_IRQ(gic_spi(15)), /* IRQ14 */ |
| 796 | DEFINE_RES_IRQ(gic_spi(16)), /* IRQ15 */ |
| 797 | }; |
| 798 | |
| 799 | static struct platform_device irqpin1_device = { |
| 800 | .name = "renesas_intc_irqpin", |
| 801 | .id = 1, |
| 802 | .resource = irqpin1_resources, |
| 803 | .num_resources = ARRAY_SIZE(irqpin1_resources), |
| 804 | .dev = { |
| 805 | .platform_data = &irqpin1_platform_data, |
| 806 | }, |
| 807 | }; |
| 808 | |
Magnus Damm | 1461f8b | 2013-03-06 15:08:31 +0900 | [diff] [blame] | 809 | static struct renesas_intc_irqpin_config irqpin2_platform_data = { |
Magnus Damm | 341eb54 | 2013-02-26 12:01:09 +0900 | [diff] [blame] | 810 | .irq_base = irq_pin(16), /* IRQ16 -> IRQ23 */ |
| 811 | }; |
| 812 | |
| 813 | static struct resource irqpin2_resources[] = { |
| 814 | DEFINE_RES_MEM(0xe6900008, 4), /* ICR3A */ |
| 815 | DEFINE_RES_MEM(0xe6900018, 4), /* INTPRI20A */ |
| 816 | DEFINE_RES_MEM(0xe6900028, 1), /* INTREQ20A */ |
| 817 | DEFINE_RES_MEM(0xe6900048, 1), /* INTMSK20A */ |
| 818 | DEFINE_RES_MEM(0xe6900068, 1), /* INTMSKCLR20A */ |
| 819 | DEFINE_RES_IRQ(gic_spi(17)), /* IRQ16 */ |
| 820 | DEFINE_RES_IRQ(gic_spi(18)), /* IRQ17 */ |
| 821 | DEFINE_RES_IRQ(gic_spi(19)), /* IRQ18 */ |
| 822 | DEFINE_RES_IRQ(gic_spi(20)), /* IRQ19 */ |
| 823 | DEFINE_RES_IRQ(gic_spi(21)), /* IRQ20 */ |
| 824 | DEFINE_RES_IRQ(gic_spi(22)), /* IRQ21 */ |
| 825 | DEFINE_RES_IRQ(gic_spi(23)), /* IRQ22 */ |
| 826 | DEFINE_RES_IRQ(gic_spi(24)), /* IRQ23 */ |
| 827 | }; |
| 828 | |
| 829 | static struct platform_device irqpin2_device = { |
| 830 | .name = "renesas_intc_irqpin", |
| 831 | .id = 2, |
| 832 | .resource = irqpin2_resources, |
| 833 | .num_resources = ARRAY_SIZE(irqpin2_resources), |
| 834 | .dev = { |
| 835 | .platform_data = &irqpin2_platform_data, |
| 836 | }, |
| 837 | }; |
| 838 | |
Magnus Damm | 1461f8b | 2013-03-06 15:08:31 +0900 | [diff] [blame] | 839 | static struct renesas_intc_irqpin_config irqpin3_platform_data = { |
Magnus Damm | 341eb54 | 2013-02-26 12:01:09 +0900 | [diff] [blame] | 840 | .irq_base = irq_pin(24), /* IRQ24 -> IRQ31 */ |
| 841 | }; |
| 842 | |
| 843 | static struct resource irqpin3_resources[] = { |
| 844 | DEFINE_RES_MEM(0xe690000c, 4), /* ICR4A */ |
| 845 | DEFINE_RES_MEM(0xe690001c, 4), /* INTPRI30A */ |
| 846 | DEFINE_RES_MEM(0xe690002c, 1), /* INTREQ30A */ |
| 847 | DEFINE_RES_MEM(0xe690004c, 1), /* INTMSK30A */ |
| 848 | DEFINE_RES_MEM(0xe690006c, 1), /* INTMSKCLR30A */ |
| 849 | DEFINE_RES_IRQ(gic_spi(25)), /* IRQ24 */ |
| 850 | DEFINE_RES_IRQ(gic_spi(26)), /* IRQ25 */ |
| 851 | DEFINE_RES_IRQ(gic_spi(27)), /* IRQ26 */ |
| 852 | DEFINE_RES_IRQ(gic_spi(28)), /* IRQ27 */ |
| 853 | DEFINE_RES_IRQ(gic_spi(29)), /* IRQ28 */ |
| 854 | DEFINE_RES_IRQ(gic_spi(30)), /* IRQ29 */ |
| 855 | DEFINE_RES_IRQ(gic_spi(31)), /* IRQ30 */ |
| 856 | DEFINE_RES_IRQ(gic_spi(32)), /* IRQ31 */ |
| 857 | }; |
| 858 | |
| 859 | static struct platform_device irqpin3_device = { |
| 860 | .name = "renesas_intc_irqpin", |
| 861 | .id = 3, |
| 862 | .resource = irqpin3_resources, |
| 863 | .num_resources = ARRAY_SIZE(irqpin3_resources), |
| 864 | .dev = { |
| 865 | .platform_data = &irqpin3_platform_data, |
| 866 | }, |
| 867 | }; |
| 868 | |
Simon Horman | 3b00f93 | 2013-02-19 10:53:05 +0900 | [diff] [blame] | 869 | static struct platform_device *sh73a0_devices_dt[] __initdata = { |
Magnus Damm | 6d9598e | 2010-11-17 10:59:31 +0000 | [diff] [blame] | 870 | &scif0_device, |
| 871 | &scif1_device, |
| 872 | &scif2_device, |
| 873 | &scif3_device, |
| 874 | &scif4_device, |
| 875 | &scif5_device, |
| 876 | &scif6_device, |
| 877 | &scif7_device, |
| 878 | &scif8_device, |
| 879 | &cmt10_device, |
Simon Horman | 4860953 | 2012-11-21 22:00:15 +0900 | [diff] [blame] | 880 | }; |
| 881 | |
| 882 | static struct platform_device *sh73a0_early_devices[] __initdata = { |
Magnus Damm | 5010f3d | 2010-12-21 08:40:59 +0000 | [diff] [blame] | 883 | &tmu00_device, |
| 884 | &tmu01_device, |
Hideki EIRAKU | 9a27dee | 2013-01-21 19:54:28 +0900 | [diff] [blame] | 885 | &ipmmu_device, |
Magnus Damm | 6d9598e | 2010-11-17 10:59:31 +0000 | [diff] [blame] | 886 | }; |
| 887 | |
Yoshii Takashi | b028f94 | 2010-11-19 13:20:45 +0000 | [diff] [blame] | 888 | static struct platform_device *sh73a0_late_devices[] __initdata = { |
| 889 | &i2c0_device, |
| 890 | &i2c1_device, |
| 891 | &i2c2_device, |
| 892 | &i2c3_device, |
| 893 | &i2c4_device, |
Magnus Damm | 681e1b3 | 2011-05-24 10:37:16 +0000 | [diff] [blame] | 894 | &dma0_device, |
Kuninori Morimoto | 832290b | 2012-06-25 03:39:20 -0700 | [diff] [blame] | 895 | &mpdma0_device, |
Tetsuyuki Kobayashi | f23f5be | 2012-09-06 20:14:06 +0900 | [diff] [blame] | 896 | &pmu_device, |
Magnus Damm | 341eb54 | 2013-02-26 12:01:09 +0900 | [diff] [blame] | 897 | &irqpin0_device, |
| 898 | &irqpin1_device, |
| 899 | &irqpin2_device, |
| 900 | &irqpin3_device, |
Yoshii Takashi | b028f94 | 2010-11-19 13:20:45 +0000 | [diff] [blame] | 901 | }; |
| 902 | |
Arnd Bergmann | 0a4b04d | 2012-09-14 20:08:08 +0000 | [diff] [blame] | 903 | #define SRCR2 IOMEM(0xe61580b0) |
Magnus Damm | 681e1b3 | 2011-05-24 10:37:16 +0000 | [diff] [blame] | 904 | |
Magnus Damm | 6d9598e | 2010-11-17 10:59:31 +0000 | [diff] [blame] | 905 | void __init sh73a0_add_standard_devices(void) |
| 906 | { |
Magnus Damm | 681e1b3 | 2011-05-24 10:37:16 +0000 | [diff] [blame] | 907 | /* Clear software reset bit on SY-DMAC module */ |
| 908 | __raw_writel(__raw_readl(SRCR2) & ~(1 << 18), SRCR2); |
| 909 | |
Simon Horman | 3b00f93 | 2013-02-19 10:53:05 +0900 | [diff] [blame] | 910 | platform_add_devices(sh73a0_devices_dt, |
| 911 | ARRAY_SIZE(sh73a0_devices_dt)); |
Magnus Damm | 6d9598e | 2010-11-17 10:59:31 +0000 | [diff] [blame] | 912 | platform_add_devices(sh73a0_early_devices, |
| 913 | ARRAY_SIZE(sh73a0_early_devices)); |
Yoshii Takashi | b028f94 | 2010-11-19 13:20:45 +0000 | [diff] [blame] | 914 | platform_add_devices(sh73a0_late_devices, |
| 915 | ARRAY_SIZE(sh73a0_late_devices)); |
Magnus Damm | 6d9598e | 2010-11-17 10:59:31 +0000 | [diff] [blame] | 916 | } |
| 917 | |
Magnus Damm | 43cb8cb | 2013-05-22 15:04:14 +0900 | [diff] [blame] | 918 | void __init sh73a0_init_delay(void) |
| 919 | { |
| 920 | shmobile_setup_delay(1196, 44, 46); /* Cortex-A9 @ 1196MHz */ |
| 921 | } |
| 922 | |
Kuninori Morimoto | d672000 | 2012-05-10 00:26:58 -0700 | [diff] [blame] | 923 | /* do nothing for !CONFIG_SMP or !CONFIG_HAVE_TWD */ |
| 924 | void __init __weak sh73a0_register_twd(void) { } |
| 925 | |
Stephen Warren | 6bb27d7 | 2012-11-08 12:40:59 -0700 | [diff] [blame] | 926 | void __init sh73a0_earlytimer_init(void) |
Magnus Damm | 3be26fd | 2012-03-06 17:36:45 +0900 | [diff] [blame] | 927 | { |
Magnus Damm | 43cb8cb | 2013-05-22 15:04:14 +0900 | [diff] [blame] | 928 | sh73a0_init_delay(); |
Magnus Damm | 3be26fd | 2012-03-06 17:36:45 +0900 | [diff] [blame] | 929 | sh73a0_clock_init(); |
| 930 | shmobile_earlytimer_init(); |
Kuninori Morimoto | d672000 | 2012-05-10 00:26:58 -0700 | [diff] [blame] | 931 | sh73a0_register_twd(); |
Magnus Damm | 3be26fd | 2012-03-06 17:36:45 +0900 | [diff] [blame] | 932 | } |
| 933 | |
Magnus Damm | 6d9598e | 2010-11-17 10:59:31 +0000 | [diff] [blame] | 934 | void __init sh73a0_add_early_devices(void) |
| 935 | { |
Simon Horman | 3b00f93 | 2013-02-19 10:53:05 +0900 | [diff] [blame] | 936 | early_platform_add_devices(sh73a0_devices_dt, |
| 937 | ARRAY_SIZE(sh73a0_devices_dt)); |
Magnus Damm | 6d9598e | 2010-11-17 10:59:31 +0000 | [diff] [blame] | 938 | early_platform_add_devices(sh73a0_early_devices, |
| 939 | ARRAY_SIZE(sh73a0_early_devices)); |
Magnus Damm | 50e15c3 | 2012-02-29 21:37:27 +0900 | [diff] [blame] | 940 | |
| 941 | /* setup early console here as well */ |
| 942 | shmobile_setup_console(); |
Magnus Damm | 6d9598e | 2010-11-17 10:59:31 +0000 | [diff] [blame] | 943 | } |
Simon Horman | 4860953 | 2012-11-21 22:00:15 +0900 | [diff] [blame] | 944 | |
| 945 | #ifdef CONFIG_USE_OF |
| 946 | |
Simon Horman | 4860953 | 2012-11-21 22:00:15 +0900 | [diff] [blame] | 947 | void __init sh73a0_add_standard_devices_dt(void) |
| 948 | { |
Guennadi Liakhovetski | d234738 | 2013-04-05 12:00:38 +0200 | [diff] [blame] | 949 | struct platform_device_info devinfo = { .name = "cpufreq-cpu0", .id = -1, }; |
| 950 | |
Simon Horman | 4860953 | 2012-11-21 22:00:15 +0900 | [diff] [blame] | 951 | /* clocks are setup late during boot in the case of DT */ |
| 952 | sh73a0_clock_init(); |
| 953 | |
Simon Horman | 3b00f93 | 2013-02-19 10:53:05 +0900 | [diff] [blame] | 954 | platform_add_devices(sh73a0_devices_dt, |
| 955 | ARRAY_SIZE(sh73a0_devices_dt)); |
Magnus Damm | ea31597 | 2013-07-01 14:42:04 +0900 | [diff] [blame^] | 956 | of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); |
Guennadi Liakhovetski | d234738 | 2013-04-05 12:00:38 +0200 | [diff] [blame] | 957 | |
| 958 | /* Instantiate cpufreq-cpu0 */ |
| 959 | platform_device_register_full(&devinfo); |
Simon Horman | 4860953 | 2012-11-21 22:00:15 +0900 | [diff] [blame] | 960 | } |
| 961 | |
| 962 | static const char *sh73a0_boards_compat_dt[] __initdata = { |
| 963 | "renesas,sh73a0", |
| 964 | NULL, |
| 965 | }; |
| 966 | |
| 967 | DT_MACHINE_START(SH73A0_DT, "Generic SH73A0 (Flattened Device Tree)") |
Simon Horman | f998950 | 2013-02-15 21:38:20 +0900 | [diff] [blame] | 968 | .smp = smp_ops(sh73a0_smp_ops), |
Simon Horman | 4860953 | 2012-11-21 22:00:15 +0900 | [diff] [blame] | 969 | .map_io = sh73a0_map_io, |
Simon Horman | 3b00f93 | 2013-02-19 10:53:05 +0900 | [diff] [blame] | 970 | .init_early = sh73a0_init_delay, |
Simon Horman | 4860953 | 2012-11-21 22:00:15 +0900 | [diff] [blame] | 971 | .nr_irqs = NR_IRQS_LEGACY, |
Simon Horman | 4860953 | 2012-11-21 22:00:15 +0900 | [diff] [blame] | 972 | .init_machine = sh73a0_add_standard_devices_dt, |
Simon Horman | 4860953 | 2012-11-21 22:00:15 +0900 | [diff] [blame] | 973 | .dt_compat = sh73a0_boards_compat_dt, |
| 974 | MACHINE_END |
| 975 | #endif /* CONFIG_USE_OF */ |