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Magnus Damm9570ef22009-05-01 06:51:00 +00001/*
2 * SuperH Timer Support - TMU
3 *
4 * Copyright (C) 2009 Magnus Damm
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */
19
20#include <linux/init.h>
21#include <linux/platform_device.h>
22#include <linux/spinlock.h>
23#include <linux/interrupt.h>
24#include <linux/ioport.h>
25#include <linux/delay.h>
26#include <linux/io.h>
27#include <linux/clk.h>
28#include <linux/irq.h>
29#include <linux/err.h>
30#include <linux/clocksource.h>
31#include <linux/clockchips.h>
Paul Mundt46a12f72009-05-03 17:57:17 +090032#include <linux/sh_timer.h>
Tejun Heo5a0e3ad2010-03-24 17:04:11 +090033#include <linux/slab.h>
Paul Gortmaker7deeab52011-07-03 13:36:22 -040034#include <linux/module.h>
Rafael J. Wysocki2ee619f2012-03-13 22:40:00 +010035#include <linux/pm_domain.h>
Rafael J. Wysockieaa49a82012-08-06 01:41:20 +020036#include <linux/pm_runtime.h>
Magnus Damm9570ef22009-05-01 06:51:00 +000037
38struct sh_tmu_priv {
39 void __iomem *mapbase;
40 struct clk *clk;
41 struct irqaction irqaction;
42 struct platform_device *pdev;
43 unsigned long rate;
44 unsigned long periodic;
45 struct clock_event_device ced;
46 struct clocksource cs;
Rafael J. Wysockieaa49a82012-08-06 01:41:20 +020047 bool cs_enabled;
Magnus Damm9570ef22009-05-01 06:51:00 +000048};
49
Paul Mundtc2225a52012-05-25 13:39:09 +090050static DEFINE_RAW_SPINLOCK(sh_tmu_lock);
Magnus Damm9570ef22009-05-01 06:51:00 +000051
52#define TSTR -1 /* shared register */
53#define TCOR 0 /* channel register */
54#define TCNT 1 /* channel register */
55#define TCR 2 /* channel register */
56
57static inline unsigned long sh_tmu_read(struct sh_tmu_priv *p, int reg_nr)
58{
Paul Mundt46a12f72009-05-03 17:57:17 +090059 struct sh_timer_config *cfg = p->pdev->dev.platform_data;
Magnus Damm9570ef22009-05-01 06:51:00 +000060 void __iomem *base = p->mapbase;
61 unsigned long offs;
62
63 if (reg_nr == TSTR)
64 return ioread8(base - cfg->channel_offset);
65
66 offs = reg_nr << 2;
67
68 if (reg_nr == TCR)
69 return ioread16(base + offs);
70 else
71 return ioread32(base + offs);
72}
73
74static inline void sh_tmu_write(struct sh_tmu_priv *p, int reg_nr,
75 unsigned long value)
76{
Paul Mundt46a12f72009-05-03 17:57:17 +090077 struct sh_timer_config *cfg = p->pdev->dev.platform_data;
Magnus Damm9570ef22009-05-01 06:51:00 +000078 void __iomem *base = p->mapbase;
79 unsigned long offs;
80
81 if (reg_nr == TSTR) {
82 iowrite8(value, base - cfg->channel_offset);
83 return;
84 }
85
86 offs = reg_nr << 2;
87
88 if (reg_nr == TCR)
89 iowrite16(value, base + offs);
90 else
91 iowrite32(value, base + offs);
92}
93
94static void sh_tmu_start_stop_ch(struct sh_tmu_priv *p, int start)
95{
Paul Mundt46a12f72009-05-03 17:57:17 +090096 struct sh_timer_config *cfg = p->pdev->dev.platform_data;
Magnus Damm9570ef22009-05-01 06:51:00 +000097 unsigned long flags, value;
98
99 /* start stop register shared by multiple timer channels */
Paul Mundtc2225a52012-05-25 13:39:09 +0900100 raw_spin_lock_irqsave(&sh_tmu_lock, flags);
Magnus Damm9570ef22009-05-01 06:51:00 +0000101 value = sh_tmu_read(p, TSTR);
102
103 if (start)
104 value |= 1 << cfg->timer_bit;
105 else
106 value &= ~(1 << cfg->timer_bit);
107
108 sh_tmu_write(p, TSTR, value);
Paul Mundtc2225a52012-05-25 13:39:09 +0900109 raw_spin_unlock_irqrestore(&sh_tmu_lock, flags);
Magnus Damm9570ef22009-05-01 06:51:00 +0000110}
111
112static int sh_tmu_enable(struct sh_tmu_priv *p)
113{
Magnus Damm9570ef22009-05-01 06:51:00 +0000114 int ret;
115
Paul Mundtd4905ce2011-05-31 15:23:20 +0900116 /* enable clock */
Magnus Damm9570ef22009-05-01 06:51:00 +0000117 ret = clk_enable(p->clk);
118 if (ret) {
Paul Mundt214a6072010-03-10 16:26:25 +0900119 dev_err(&p->pdev->dev, "cannot enable clock\n");
Magnus Damm9570ef22009-05-01 06:51:00 +0000120 return ret;
121 }
122
123 /* make sure channel is disabled */
124 sh_tmu_start_stop_ch(p, 0);
125
126 /* maximum timeout */
127 sh_tmu_write(p, TCOR, 0xffffffff);
128 sh_tmu_write(p, TCNT, 0xffffffff);
129
130 /* configure channel to parent clock / 4, irq off */
131 p->rate = clk_get_rate(p->clk) / 4;
132 sh_tmu_write(p, TCR, 0x0000);
133
134 /* enable channel */
135 sh_tmu_start_stop_ch(p, 1);
136
137 return 0;
138}
139
140static void sh_tmu_disable(struct sh_tmu_priv *p)
141{
142 /* disable channel */
143 sh_tmu_start_stop_ch(p, 0);
144
Magnus Dammbe890a12009-06-17 05:04:04 +0000145 /* disable interrupts in TMU block */
146 sh_tmu_write(p, TCR, 0x0000);
147
Paul Mundtd4905ce2011-05-31 15:23:20 +0900148 /* stop clock */
Magnus Damm9570ef22009-05-01 06:51:00 +0000149 clk_disable(p->clk);
150}
151
152static void sh_tmu_set_next(struct sh_tmu_priv *p, unsigned long delta,
153 int periodic)
154{
155 /* stop timer */
156 sh_tmu_start_stop_ch(p, 0);
157
158 /* acknowledge interrupt */
159 sh_tmu_read(p, TCR);
160
161 /* enable interrupt */
162 sh_tmu_write(p, TCR, 0x0020);
163
164 /* reload delta value in case of periodic timer */
165 if (periodic)
166 sh_tmu_write(p, TCOR, delta);
167 else
Shin-ichiro KAWASAKI6f4b67b2009-06-21 10:56:22 +0000168 sh_tmu_write(p, TCOR, 0xffffffff);
Magnus Damm9570ef22009-05-01 06:51:00 +0000169
170 sh_tmu_write(p, TCNT, delta);
171
172 /* start timer */
173 sh_tmu_start_stop_ch(p, 1);
174}
175
176static irqreturn_t sh_tmu_interrupt(int irq, void *dev_id)
177{
178 struct sh_tmu_priv *p = dev_id;
179
180 /* disable or acknowledge interrupt */
181 if (p->ced.mode == CLOCK_EVT_MODE_ONESHOT)
182 sh_tmu_write(p, TCR, 0x0000);
183 else
184 sh_tmu_write(p, TCR, 0x0020);
185
186 /* notify clockevent layer */
187 p->ced.event_handler(&p->ced);
188 return IRQ_HANDLED;
189}
190
191static struct sh_tmu_priv *cs_to_sh_tmu(struct clocksource *cs)
192{
193 return container_of(cs, struct sh_tmu_priv, cs);
194}
195
196static cycle_t sh_tmu_clocksource_read(struct clocksource *cs)
197{
198 struct sh_tmu_priv *p = cs_to_sh_tmu(cs);
199
200 return sh_tmu_read(p, TCNT) ^ 0xffffffff;
201}
202
203static int sh_tmu_clocksource_enable(struct clocksource *cs)
204{
205 struct sh_tmu_priv *p = cs_to_sh_tmu(cs);
Magnus Damm0aeac452011-04-25 22:38:37 +0900206 int ret;
Magnus Damm9570ef22009-05-01 06:51:00 +0000207
Magnus Damm0aeac452011-04-25 22:38:37 +0900208 ret = sh_tmu_enable(p);
Rafael J. Wysockieaa49a82012-08-06 01:41:20 +0200209 if (!ret) {
Magnus Damm0aeac452011-04-25 22:38:37 +0900210 __clocksource_updatefreq_hz(cs, p->rate);
Rafael J. Wysockieaa49a82012-08-06 01:41:20 +0200211 p->cs_enabled = true;
212 }
Magnus Damm0aeac452011-04-25 22:38:37 +0900213 return ret;
Magnus Damm9570ef22009-05-01 06:51:00 +0000214}
215
216static void sh_tmu_clocksource_disable(struct clocksource *cs)
217{
Rafael J. Wysockieaa49a82012-08-06 01:41:20 +0200218 struct sh_tmu_priv *p = cs_to_sh_tmu(cs);
219
220 WARN_ON(!p->cs_enabled);
221
222 sh_tmu_disable(p);
223 p->cs_enabled = false;
224}
225
226static void sh_tmu_clocksource_suspend(struct clocksource *cs)
227{
228 struct sh_tmu_priv *p = cs_to_sh_tmu(cs);
229
230 if (p->cs_enabled)
231 sh_tmu_disable(p);
232
233 pm_genpd_syscore_poweroff(&p->pdev->dev);
234}
235
236static void sh_tmu_clocksource_resume(struct clocksource *cs)
237{
238 struct sh_tmu_priv *p = cs_to_sh_tmu(cs);
239
240 pm_genpd_syscore_poweron(&p->pdev->dev);
241 if (p->cs_enabled)
242 sh_tmu_enable(p);
Magnus Damm9570ef22009-05-01 06:51:00 +0000243}
244
245static int sh_tmu_register_clocksource(struct sh_tmu_priv *p,
246 char *name, unsigned long rating)
247{
248 struct clocksource *cs = &p->cs;
249
250 cs->name = name;
251 cs->rating = rating;
252 cs->read = sh_tmu_clocksource_read;
253 cs->enable = sh_tmu_clocksource_enable;
254 cs->disable = sh_tmu_clocksource_disable;
Rafael J. Wysockieaa49a82012-08-06 01:41:20 +0200255 cs->suspend = sh_tmu_clocksource_suspend;
256 cs->resume = sh_tmu_clocksource_resume;
Magnus Damm9570ef22009-05-01 06:51:00 +0000257 cs->mask = CLOCKSOURCE_MASK(32);
258 cs->flags = CLOCK_SOURCE_IS_CONTINUOUS;
Aurelien Jarno66f49122010-05-31 21:45:48 +0000259
Paul Mundt214a6072010-03-10 16:26:25 +0900260 dev_info(&p->pdev->dev, "used as clock source\n");
Magnus Damm0aeac452011-04-25 22:38:37 +0900261
262 /* Register with dummy 1 Hz value, gets updated in ->enable() */
263 clocksource_register_hz(cs, 1);
Magnus Damm9570ef22009-05-01 06:51:00 +0000264 return 0;
265}
266
267static struct sh_tmu_priv *ced_to_sh_tmu(struct clock_event_device *ced)
268{
269 return container_of(ced, struct sh_tmu_priv, ced);
270}
271
272static void sh_tmu_clock_event_start(struct sh_tmu_priv *p, int periodic)
273{
274 struct clock_event_device *ced = &p->ced;
275
276 sh_tmu_enable(p);
277
Paul Mundt39774072012-06-11 17:10:16 +0900278 clockevents_config(ced, p->rate);
Magnus Damm9570ef22009-05-01 06:51:00 +0000279
280 if (periodic) {
281 p->periodic = (p->rate + HZ/2) / HZ;
282 sh_tmu_set_next(p, p->periodic, 1);
283 }
284}
285
286static void sh_tmu_clock_event_mode(enum clock_event_mode mode,
287 struct clock_event_device *ced)
288{
289 struct sh_tmu_priv *p = ced_to_sh_tmu(ced);
290 int disabled = 0;
291
292 /* deal with old setting first */
293 switch (ced->mode) {
294 case CLOCK_EVT_MODE_PERIODIC:
295 case CLOCK_EVT_MODE_ONESHOT:
296 sh_tmu_disable(p);
297 disabled = 1;
298 break;
299 default:
300 break;
301 }
302
303 switch (mode) {
304 case CLOCK_EVT_MODE_PERIODIC:
Paul Mundt214a6072010-03-10 16:26:25 +0900305 dev_info(&p->pdev->dev, "used for periodic clock events\n");
Magnus Damm9570ef22009-05-01 06:51:00 +0000306 sh_tmu_clock_event_start(p, 1);
307 break;
308 case CLOCK_EVT_MODE_ONESHOT:
Paul Mundt214a6072010-03-10 16:26:25 +0900309 dev_info(&p->pdev->dev, "used for oneshot clock events\n");
Magnus Damm9570ef22009-05-01 06:51:00 +0000310 sh_tmu_clock_event_start(p, 0);
311 break;
312 case CLOCK_EVT_MODE_UNUSED:
313 if (!disabled)
314 sh_tmu_disable(p);
315 break;
316 case CLOCK_EVT_MODE_SHUTDOWN:
317 default:
318 break;
319 }
320}
321
322static int sh_tmu_clock_event_next(unsigned long delta,
323 struct clock_event_device *ced)
324{
325 struct sh_tmu_priv *p = ced_to_sh_tmu(ced);
326
327 BUG_ON(ced->mode != CLOCK_EVT_MODE_ONESHOT);
328
329 /* program new delta value */
330 sh_tmu_set_next(p, delta, 0);
331 return 0;
332}
333
Rafael J. Wysockieaa49a82012-08-06 01:41:20 +0200334static void sh_tmu_clock_event_suspend(struct clock_event_device *ced)
335{
336 pm_genpd_syscore_poweroff(&ced_to_sh_tmu(ced)->pdev->dev);
337}
338
339static void sh_tmu_clock_event_resume(struct clock_event_device *ced)
340{
341 pm_genpd_syscore_poweron(&ced_to_sh_tmu(ced)->pdev->dev);
342}
343
Magnus Damm9570ef22009-05-01 06:51:00 +0000344static void sh_tmu_register_clockevent(struct sh_tmu_priv *p,
345 char *name, unsigned long rating)
346{
347 struct clock_event_device *ced = &p->ced;
348 int ret;
349
350 memset(ced, 0, sizeof(*ced));
351
352 ced->name = name;
353 ced->features = CLOCK_EVT_FEAT_PERIODIC;
354 ced->features |= CLOCK_EVT_FEAT_ONESHOT;
355 ced->rating = rating;
356 ced->cpumask = cpumask_of(0);
357 ced->set_next_event = sh_tmu_clock_event_next;
358 ced->set_mode = sh_tmu_clock_event_mode;
Rafael J. Wysockieaa49a82012-08-06 01:41:20 +0200359 ced->suspend = sh_tmu_clock_event_suspend;
360 ced->resume = sh_tmu_clock_event_resume;
Magnus Damm9570ef22009-05-01 06:51:00 +0000361
Paul Mundt214a6072010-03-10 16:26:25 +0900362 dev_info(&p->pdev->dev, "used for clock events\n");
Paul Mundt39774072012-06-11 17:10:16 +0900363
364 clockevents_config_and_register(ced, 1, 0x300, 0xffffffff);
Paul Mundtda64c2a2010-02-25 16:37:46 +0900365
Magnus Damm9570ef22009-05-01 06:51:00 +0000366 ret = setup_irq(p->irqaction.irq, &p->irqaction);
367 if (ret) {
Paul Mundt214a6072010-03-10 16:26:25 +0900368 dev_err(&p->pdev->dev, "failed to request irq %d\n",
369 p->irqaction.irq);
Magnus Damm9570ef22009-05-01 06:51:00 +0000370 return;
371 }
Magnus Damm9570ef22009-05-01 06:51:00 +0000372}
373
374static int sh_tmu_register(struct sh_tmu_priv *p, char *name,
375 unsigned long clockevent_rating,
376 unsigned long clocksource_rating)
377{
378 if (clockevent_rating)
379 sh_tmu_register_clockevent(p, name, clockevent_rating);
380 else if (clocksource_rating)
381 sh_tmu_register_clocksource(p, name, clocksource_rating);
382
383 return 0;
384}
385
386static int sh_tmu_setup(struct sh_tmu_priv *p, struct platform_device *pdev)
387{
Paul Mundt46a12f72009-05-03 17:57:17 +0900388 struct sh_timer_config *cfg = pdev->dev.platform_data;
Magnus Damm9570ef22009-05-01 06:51:00 +0000389 struct resource *res;
390 int irq, ret;
391 ret = -ENXIO;
392
393 memset(p, 0, sizeof(*p));
394 p->pdev = pdev;
395
396 if (!cfg) {
397 dev_err(&p->pdev->dev, "missing platform data\n");
398 goto err0;
399 }
400
401 platform_set_drvdata(pdev, p);
402
403 res = platform_get_resource(p->pdev, IORESOURCE_MEM, 0);
404 if (!res) {
405 dev_err(&p->pdev->dev, "failed to get I/O memory\n");
406 goto err0;
407 }
408
409 irq = platform_get_irq(p->pdev, 0);
410 if (irq < 0) {
411 dev_err(&p->pdev->dev, "failed to get irq\n");
412 goto err0;
413 }
414
415 /* map memory, let mapbase point to our channel */
416 p->mapbase = ioremap_nocache(res->start, resource_size(res));
417 if (p->mapbase == NULL) {
Paul Mundt214a6072010-03-10 16:26:25 +0900418 dev_err(&p->pdev->dev, "failed to remap I/O memory\n");
Magnus Damm9570ef22009-05-01 06:51:00 +0000419 goto err0;
420 }
421
422 /* setup data for setup_irq() (too early for request_irq()) */
Paul Mundt214a6072010-03-10 16:26:25 +0900423 p->irqaction.name = dev_name(&p->pdev->dev);
Magnus Damm9570ef22009-05-01 06:51:00 +0000424 p->irqaction.handler = sh_tmu_interrupt;
425 p->irqaction.dev_id = p;
426 p->irqaction.irq = irq;
Paul Mundtfecf0662010-04-15 11:59:28 +0900427 p->irqaction.flags = IRQF_DISABLED | IRQF_TIMER | \
428 IRQF_IRQPOLL | IRQF_NOBALANCING;
Magnus Damm9570ef22009-05-01 06:51:00 +0000429
430 /* get hold of clock */
Paul Mundtc2a25e82010-03-29 16:55:43 +0900431 p->clk = clk_get(&p->pdev->dev, "tmu_fck");
Magnus Damm9570ef22009-05-01 06:51:00 +0000432 if (IS_ERR(p->clk)) {
Magnus Damm03ff8582010-10-13 07:36:38 +0000433 dev_err(&p->pdev->dev, "cannot get clock\n");
434 ret = PTR_ERR(p->clk);
435 goto err1;
Magnus Damm9570ef22009-05-01 06:51:00 +0000436 }
437
Paul Mundt214a6072010-03-10 16:26:25 +0900438 return sh_tmu_register(p, (char *)dev_name(&p->pdev->dev),
Magnus Damm9570ef22009-05-01 06:51:00 +0000439 cfg->clockevent_rating,
440 cfg->clocksource_rating);
441 err1:
442 iounmap(p->mapbase);
443 err0:
444 return ret;
445}
446
447static int __devinit sh_tmu_probe(struct platform_device *pdev)
448{
449 struct sh_tmu_priv *p = platform_get_drvdata(pdev);
Magnus Damm9570ef22009-05-01 06:51:00 +0000450 int ret;
451
Rafael J. Wysockieaa49a82012-08-06 01:41:20 +0200452 if (!is_early_platform_device(pdev)) {
453 struct sh_timer_config *cfg = pdev->dev.platform_data;
454
455 if (cfg->clocksource_rating || cfg->clockevent_rating)
456 pm_genpd_dev_always_on(&pdev->dev, true);
457 }
Rafael J. Wysocki2ee619f2012-03-13 22:40:00 +0100458
Magnus Damm9570ef22009-05-01 06:51:00 +0000459 if (p) {
Paul Mundt214a6072010-03-10 16:26:25 +0900460 dev_info(&pdev->dev, "kept as earlytimer\n");
Magnus Damm9570ef22009-05-01 06:51:00 +0000461 return 0;
462 }
463
464 p = kmalloc(sizeof(*p), GFP_KERNEL);
465 if (p == NULL) {
466 dev_err(&pdev->dev, "failed to allocate driver data\n");
467 return -ENOMEM;
468 }
469
470 ret = sh_tmu_setup(p, pdev);
471 if (ret) {
472 kfree(p);
473 platform_set_drvdata(pdev, NULL);
474 }
Magnus Damm9570ef22009-05-01 06:51:00 +0000475 return ret;
476}
477
478static int __devexit sh_tmu_remove(struct platform_device *pdev)
479{
480 return -EBUSY; /* cannot unregister clockevent and clocksource */
481}
482
483static struct platform_driver sh_tmu_device_driver = {
484 .probe = sh_tmu_probe,
485 .remove = __devexit_p(sh_tmu_remove),
486 .driver = {
487 .name = "sh_tmu",
488 }
489};
490
491static int __init sh_tmu_init(void)
492{
493 return platform_driver_register(&sh_tmu_device_driver);
494}
495
496static void __exit sh_tmu_exit(void)
497{
498 platform_driver_unregister(&sh_tmu_device_driver);
499}
500
501early_platform_init("earlytimer", &sh_tmu_device_driver);
502module_init(sh_tmu_init);
503module_exit(sh_tmu_exit);
504
505MODULE_AUTHOR("Magnus Damm");
506MODULE_DESCRIPTION("SuperH TMU Timer Driver");
507MODULE_LICENSE("GPL v2");