Joerg Roedel | db3c33c | 2011-09-27 15:57:13 +0200 | [diff] [blame] | 1 | /* |
| 2 | * drivers/pci/ats.c |
| 3 | * |
| 4 | * Copyright (C) 2009 Intel Corporation, Yu Zhao <yu.zhao@intel.com> |
Joerg Roedel | c320b97 | 2011-09-27 15:57:15 +0200 | [diff] [blame] | 5 | * Copyright (C) 2011 Advanced Micro Devices, |
Joerg Roedel | db3c33c | 2011-09-27 15:57:13 +0200 | [diff] [blame] | 6 | * |
| 7 | * PCI Express I/O Virtualization (IOV) support. |
| 8 | * Address Translation Service 1.0 |
Joerg Roedel | c320b97 | 2011-09-27 15:57:15 +0200 | [diff] [blame] | 9 | * Page Request Interface added by Joerg Roedel <joerg.roedel@amd.com> |
Joerg Roedel | 086ac11 | 2011-09-27 15:57:16 +0200 | [diff] [blame] | 10 | * PASID support added by Joerg Roedel <joerg.roedel@amd.com> |
Joerg Roedel | db3c33c | 2011-09-27 15:57:13 +0200 | [diff] [blame] | 11 | */ |
| 12 | |
Paul Gortmaker | 363c75d | 2011-05-27 09:37:25 -0400 | [diff] [blame] | 13 | #include <linux/export.h> |
Joerg Roedel | db3c33c | 2011-09-27 15:57:13 +0200 | [diff] [blame] | 14 | #include <linux/pci-ats.h> |
| 15 | #include <linux/pci.h> |
James Bottomley | 8c45194 | 2011-11-29 19:20:23 +0000 | [diff] [blame] | 16 | #include <linux/slab.h> |
Joerg Roedel | db3c33c | 2011-09-27 15:57:13 +0200 | [diff] [blame] | 17 | |
| 18 | #include "pci.h" |
| 19 | |
Bjorn Helgaas | edc90fe | 2015-07-17 15:05:46 -0500 | [diff] [blame^] | 20 | static void ats_alloc_one(struct pci_dev *dev) |
Joerg Roedel | db3c33c | 2011-09-27 15:57:13 +0200 | [diff] [blame] | 21 | { |
| 22 | int pos; |
| 23 | u16 cap; |
| 24 | struct pci_ats *ats; |
| 25 | |
| 26 | pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ATS); |
| 27 | if (!pos) |
Bjorn Helgaas | edc90fe | 2015-07-17 15:05:46 -0500 | [diff] [blame^] | 28 | return; |
Joerg Roedel | db3c33c | 2011-09-27 15:57:13 +0200 | [diff] [blame] | 29 | |
| 30 | ats = kzalloc(sizeof(*ats), GFP_KERNEL); |
Bjorn Helgaas | edc90fe | 2015-07-17 15:05:46 -0500 | [diff] [blame^] | 31 | if (!ats) { |
| 32 | dev_warn(&dev->dev, "can't allocate space for ATS state\n"); |
| 33 | return; |
| 34 | } |
Joerg Roedel | db3c33c | 2011-09-27 15:57:13 +0200 | [diff] [blame] | 35 | |
| 36 | ats->pos = pos; |
Joerg Roedel | db3c33c | 2011-09-27 15:57:13 +0200 | [diff] [blame] | 37 | pci_read_config_word(dev, pos + PCI_ATS_CAP, &cap); |
| 38 | ats->qdep = PCI_ATS_CAP_QDEP(cap) ? PCI_ATS_CAP_QDEP(cap) : |
| 39 | PCI_ATS_MAX_QDEP; |
| 40 | dev->ats = ats; |
Joerg Roedel | db3c33c | 2011-09-27 15:57:13 +0200 | [diff] [blame] | 41 | } |
| 42 | |
| 43 | static void ats_free_one(struct pci_dev *dev) |
| 44 | { |
| 45 | kfree(dev->ats); |
| 46 | dev->ats = NULL; |
| 47 | } |
| 48 | |
Bjorn Helgaas | edc90fe | 2015-07-17 15:05:46 -0500 | [diff] [blame^] | 49 | void pci_ats_init(struct pci_dev *dev) |
| 50 | { |
| 51 | ats_alloc_one(dev); |
| 52 | } |
| 53 | |
| 54 | void pci_ats_free(struct pci_dev *dev) |
| 55 | { |
| 56 | ats_free_one(dev); |
| 57 | } |
| 58 | |
Joerg Roedel | db3c33c | 2011-09-27 15:57:13 +0200 | [diff] [blame] | 59 | /** |
| 60 | * pci_enable_ats - enable the ATS capability |
| 61 | * @dev: the PCI device |
| 62 | * @ps: the IOMMU page shift |
| 63 | * |
| 64 | * Returns 0 on success, or negative on failure. |
| 65 | */ |
| 66 | int pci_enable_ats(struct pci_dev *dev, int ps) |
| 67 | { |
Joerg Roedel | db3c33c | 2011-09-27 15:57:13 +0200 | [diff] [blame] | 68 | u16 ctrl; |
| 69 | |
| 70 | BUG_ON(dev->ats && dev->ats->is_enabled); |
| 71 | |
Bjorn Helgaas | edc90fe | 2015-07-17 15:05:46 -0500 | [diff] [blame^] | 72 | if (!dev->ats) |
| 73 | return -EINVAL; |
| 74 | |
Joerg Roedel | db3c33c | 2011-09-27 15:57:13 +0200 | [diff] [blame] | 75 | if (ps < PCI_ATS_MIN_STU) |
| 76 | return -EINVAL; |
| 77 | |
Bjorn Helgaas | edc90fe | 2015-07-17 15:05:46 -0500 | [diff] [blame^] | 78 | /* |
| 79 | * Note that enabling ATS on a VF fails unless it's already enabled |
| 80 | * with the same STU on the PF. |
| 81 | */ |
Joerg Roedel | db3c33c | 2011-09-27 15:57:13 +0200 | [diff] [blame] | 82 | ctrl = PCI_ATS_CTRL_ENABLE; |
Bjorn Helgaas | edc90fe | 2015-07-17 15:05:46 -0500 | [diff] [blame^] | 83 | if (dev->is_virtfn) { |
| 84 | struct pci_dev *pdev = dev->physfn; |
| 85 | |
| 86 | if (pdev->ats->stu != ps) |
| 87 | return -EINVAL; |
| 88 | |
| 89 | atomic_inc(&pdev->ats->ref_cnt); /* count enabled VFs */ |
| 90 | } else { |
| 91 | dev->ats->stu = ps; |
| 92 | ctrl |= PCI_ATS_CTRL_STU(dev->ats->stu - PCI_ATS_MIN_STU); |
| 93 | } |
Joerg Roedel | db3c33c | 2011-09-27 15:57:13 +0200 | [diff] [blame] | 94 | pci_write_config_word(dev, dev->ats->pos + PCI_ATS_CTRL, ctrl); |
| 95 | |
| 96 | dev->ats->is_enabled = 1; |
Joerg Roedel | db3c33c | 2011-09-27 15:57:13 +0200 | [diff] [blame] | 97 | return 0; |
| 98 | } |
Joerg Roedel | d4c0636 | 2011-09-27 15:57:14 +0200 | [diff] [blame] | 99 | EXPORT_SYMBOL_GPL(pci_enable_ats); |
Joerg Roedel | db3c33c | 2011-09-27 15:57:13 +0200 | [diff] [blame] | 100 | |
| 101 | /** |
| 102 | * pci_disable_ats - disable the ATS capability |
| 103 | * @dev: the PCI device |
| 104 | */ |
| 105 | void pci_disable_ats(struct pci_dev *dev) |
| 106 | { |
| 107 | u16 ctrl; |
| 108 | |
| 109 | BUG_ON(!dev->ats || !dev->ats->is_enabled); |
| 110 | |
Bjorn Helgaas | edc90fe | 2015-07-17 15:05:46 -0500 | [diff] [blame^] | 111 | if (atomic_read(&dev->ats->ref_cnt)) |
| 112 | return; /* VFs still enabled */ |
| 113 | |
| 114 | if (dev->is_virtfn) { |
| 115 | struct pci_dev *pdev = dev->physfn; |
| 116 | |
| 117 | atomic_dec(&pdev->ats->ref_cnt); |
| 118 | } |
| 119 | |
Joerg Roedel | db3c33c | 2011-09-27 15:57:13 +0200 | [diff] [blame] | 120 | pci_read_config_word(dev, dev->ats->pos + PCI_ATS_CTRL, &ctrl); |
| 121 | ctrl &= ~PCI_ATS_CTRL_ENABLE; |
| 122 | pci_write_config_word(dev, dev->ats->pos + PCI_ATS_CTRL, ctrl); |
| 123 | |
| 124 | dev->ats->is_enabled = 0; |
Joerg Roedel | db3c33c | 2011-09-27 15:57:13 +0200 | [diff] [blame] | 125 | } |
Joerg Roedel | d4c0636 | 2011-09-27 15:57:14 +0200 | [diff] [blame] | 126 | EXPORT_SYMBOL_GPL(pci_disable_ats); |
Joerg Roedel | db3c33c | 2011-09-27 15:57:13 +0200 | [diff] [blame] | 127 | |
Hao, Xudong | 1900ca1 | 2011-12-17 21:24:40 +0800 | [diff] [blame] | 128 | void pci_restore_ats_state(struct pci_dev *dev) |
| 129 | { |
| 130 | u16 ctrl; |
| 131 | |
| 132 | if (!pci_ats_enabled(dev)) |
| 133 | return; |
| 134 | if (!pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ATS)) |
| 135 | BUG(); |
| 136 | |
| 137 | ctrl = PCI_ATS_CTRL_ENABLE; |
| 138 | if (!dev->is_virtfn) |
| 139 | ctrl |= PCI_ATS_CTRL_STU(dev->ats->stu - PCI_ATS_MIN_STU); |
Hao, Xudong | 1900ca1 | 2011-12-17 21:24:40 +0800 | [diff] [blame] | 140 | pci_write_config_word(dev, dev->ats->pos + PCI_ATS_CTRL, ctrl); |
| 141 | } |
| 142 | EXPORT_SYMBOL_GPL(pci_restore_ats_state); |
| 143 | |
Joerg Roedel | db3c33c | 2011-09-27 15:57:13 +0200 | [diff] [blame] | 144 | /** |
| 145 | * pci_ats_queue_depth - query the ATS Invalidate Queue Depth |
| 146 | * @dev: the PCI device |
| 147 | * |
| 148 | * Returns the queue depth on success, or negative on failure. |
| 149 | * |
| 150 | * The ATS spec uses 0 in the Invalidate Queue Depth field to |
| 151 | * indicate that the function can accept 32 Invalidate Request. |
| 152 | * But here we use the `real' values (i.e. 1~32) for the Queue |
| 153 | * Depth; and 0 indicates the function shares the Queue with |
| 154 | * other functions (doesn't exclusively own a Queue). |
| 155 | */ |
| 156 | int pci_ats_queue_depth(struct pci_dev *dev) |
| 157 | { |
Joerg Roedel | db3c33c | 2011-09-27 15:57:13 +0200 | [diff] [blame] | 158 | if (dev->is_virtfn) |
| 159 | return 0; |
| 160 | |
| 161 | if (dev->ats) |
| 162 | return dev->ats->qdep; |
| 163 | |
Bjorn Helgaas | edc90fe | 2015-07-17 15:05:46 -0500 | [diff] [blame^] | 164 | return -ENODEV; |
Joerg Roedel | db3c33c | 2011-09-27 15:57:13 +0200 | [diff] [blame] | 165 | } |
Joerg Roedel | d4c0636 | 2011-09-27 15:57:14 +0200 | [diff] [blame] | 166 | EXPORT_SYMBOL_GPL(pci_ats_queue_depth); |
Joerg Roedel | c320b97 | 2011-09-27 15:57:15 +0200 | [diff] [blame] | 167 | |
| 168 | #ifdef CONFIG_PCI_PRI |
| 169 | /** |
| 170 | * pci_enable_pri - Enable PRI capability |
| 171 | * @ pdev: PCI device structure |
| 172 | * |
| 173 | * Returns 0 on success, negative value on error |
| 174 | */ |
| 175 | int pci_enable_pri(struct pci_dev *pdev, u32 reqs) |
| 176 | { |
| 177 | u16 control, status; |
| 178 | u32 max_requests; |
| 179 | int pos; |
| 180 | |
Alex Williamson | 69166fb | 2011-11-02 14:07:15 -0600 | [diff] [blame] | 181 | pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PRI); |
Joerg Roedel | c320b97 | 2011-09-27 15:57:15 +0200 | [diff] [blame] | 182 | if (!pos) |
| 183 | return -EINVAL; |
| 184 | |
Alex Williamson | 91f57d5 | 2011-11-11 10:07:36 -0700 | [diff] [blame] | 185 | pci_read_config_word(pdev, pos + PCI_PRI_CTRL, &control); |
| 186 | pci_read_config_word(pdev, pos + PCI_PRI_STATUS, &status); |
| 187 | if ((control & PCI_PRI_CTRL_ENABLE) || |
| 188 | !(status & PCI_PRI_STATUS_STOPPED)) |
Joerg Roedel | c320b97 | 2011-09-27 15:57:15 +0200 | [diff] [blame] | 189 | return -EBUSY; |
| 190 | |
Alex Williamson | 91f57d5 | 2011-11-11 10:07:36 -0700 | [diff] [blame] | 191 | pci_read_config_dword(pdev, pos + PCI_PRI_MAX_REQ, &max_requests); |
Joerg Roedel | c320b97 | 2011-09-27 15:57:15 +0200 | [diff] [blame] | 192 | reqs = min(max_requests, reqs); |
Alex Williamson | 91f57d5 | 2011-11-11 10:07:36 -0700 | [diff] [blame] | 193 | pci_write_config_dword(pdev, pos + PCI_PRI_ALLOC_REQ, reqs); |
Joerg Roedel | c320b97 | 2011-09-27 15:57:15 +0200 | [diff] [blame] | 194 | |
Alex Williamson | 91f57d5 | 2011-11-11 10:07:36 -0700 | [diff] [blame] | 195 | control |= PCI_PRI_CTRL_ENABLE; |
| 196 | pci_write_config_word(pdev, pos + PCI_PRI_CTRL, control); |
Joerg Roedel | c320b97 | 2011-09-27 15:57:15 +0200 | [diff] [blame] | 197 | |
| 198 | return 0; |
| 199 | } |
| 200 | EXPORT_SYMBOL_GPL(pci_enable_pri); |
| 201 | |
| 202 | /** |
| 203 | * pci_disable_pri - Disable PRI capability |
| 204 | * @pdev: PCI device structure |
| 205 | * |
| 206 | * Only clears the enabled-bit, regardless of its former value |
| 207 | */ |
| 208 | void pci_disable_pri(struct pci_dev *pdev) |
| 209 | { |
| 210 | u16 control; |
| 211 | int pos; |
| 212 | |
Alex Williamson | 69166fb | 2011-11-02 14:07:15 -0600 | [diff] [blame] | 213 | pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PRI); |
Joerg Roedel | c320b97 | 2011-09-27 15:57:15 +0200 | [diff] [blame] | 214 | if (!pos) |
| 215 | return; |
| 216 | |
Alex Williamson | 91f57d5 | 2011-11-11 10:07:36 -0700 | [diff] [blame] | 217 | pci_read_config_word(pdev, pos + PCI_PRI_CTRL, &control); |
| 218 | control &= ~PCI_PRI_CTRL_ENABLE; |
| 219 | pci_write_config_word(pdev, pos + PCI_PRI_CTRL, control); |
Joerg Roedel | c320b97 | 2011-09-27 15:57:15 +0200 | [diff] [blame] | 220 | } |
| 221 | EXPORT_SYMBOL_GPL(pci_disable_pri); |
| 222 | |
| 223 | /** |
Joerg Roedel | c320b97 | 2011-09-27 15:57:15 +0200 | [diff] [blame] | 224 | * pci_reset_pri - Resets device's PRI state |
| 225 | * @pdev: PCI device structure |
| 226 | * |
| 227 | * The PRI capability must be disabled before this function is called. |
| 228 | * Returns 0 on success, negative value on error. |
| 229 | */ |
| 230 | int pci_reset_pri(struct pci_dev *pdev) |
| 231 | { |
| 232 | u16 control; |
| 233 | int pos; |
| 234 | |
Alex Williamson | 69166fb | 2011-11-02 14:07:15 -0600 | [diff] [blame] | 235 | pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PRI); |
Joerg Roedel | c320b97 | 2011-09-27 15:57:15 +0200 | [diff] [blame] | 236 | if (!pos) |
| 237 | return -EINVAL; |
| 238 | |
Alex Williamson | 91f57d5 | 2011-11-11 10:07:36 -0700 | [diff] [blame] | 239 | pci_read_config_word(pdev, pos + PCI_PRI_CTRL, &control); |
| 240 | if (control & PCI_PRI_CTRL_ENABLE) |
Joerg Roedel | c320b97 | 2011-09-27 15:57:15 +0200 | [diff] [blame] | 241 | return -EBUSY; |
| 242 | |
Alex Williamson | 91f57d5 | 2011-11-11 10:07:36 -0700 | [diff] [blame] | 243 | control |= PCI_PRI_CTRL_RESET; |
Joerg Roedel | c320b97 | 2011-09-27 15:57:15 +0200 | [diff] [blame] | 244 | |
Alex Williamson | 91f57d5 | 2011-11-11 10:07:36 -0700 | [diff] [blame] | 245 | pci_write_config_word(pdev, pos + PCI_PRI_CTRL, control); |
Joerg Roedel | c320b97 | 2011-09-27 15:57:15 +0200 | [diff] [blame] | 246 | |
| 247 | return 0; |
| 248 | } |
| 249 | EXPORT_SYMBOL_GPL(pci_reset_pri); |
Joerg Roedel | c320b97 | 2011-09-27 15:57:15 +0200 | [diff] [blame] | 250 | #endif /* CONFIG_PCI_PRI */ |
Joerg Roedel | 086ac11 | 2011-09-27 15:57:16 +0200 | [diff] [blame] | 251 | |
| 252 | #ifdef CONFIG_PCI_PASID |
| 253 | /** |
| 254 | * pci_enable_pasid - Enable the PASID capability |
| 255 | * @pdev: PCI device structure |
| 256 | * @features: Features to enable |
| 257 | * |
| 258 | * Returns 0 on success, negative value on error. This function checks |
| 259 | * whether the features are actually supported by the device and returns |
| 260 | * an error if not. |
| 261 | */ |
| 262 | int pci_enable_pasid(struct pci_dev *pdev, int features) |
| 263 | { |
| 264 | u16 control, supported; |
| 265 | int pos; |
| 266 | |
Alex Williamson | 69166fb | 2011-11-02 14:07:15 -0600 | [diff] [blame] | 267 | pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PASID); |
Joerg Roedel | 086ac11 | 2011-09-27 15:57:16 +0200 | [diff] [blame] | 268 | if (!pos) |
| 269 | return -EINVAL; |
| 270 | |
Alex Williamson | 91f57d5 | 2011-11-11 10:07:36 -0700 | [diff] [blame] | 271 | pci_read_config_word(pdev, pos + PCI_PASID_CTRL, &control); |
| 272 | pci_read_config_word(pdev, pos + PCI_PASID_CAP, &supported); |
Joerg Roedel | 086ac11 | 2011-09-27 15:57:16 +0200 | [diff] [blame] | 273 | |
Alex Williamson | 91f57d5 | 2011-11-11 10:07:36 -0700 | [diff] [blame] | 274 | if (control & PCI_PASID_CTRL_ENABLE) |
Joerg Roedel | 086ac11 | 2011-09-27 15:57:16 +0200 | [diff] [blame] | 275 | return -EINVAL; |
| 276 | |
Alex Williamson | 91f57d5 | 2011-11-11 10:07:36 -0700 | [diff] [blame] | 277 | supported &= PCI_PASID_CAP_EXEC | PCI_PASID_CAP_PRIV; |
Joerg Roedel | 086ac11 | 2011-09-27 15:57:16 +0200 | [diff] [blame] | 278 | |
| 279 | /* User wants to enable anything unsupported? */ |
| 280 | if ((supported & features) != features) |
| 281 | return -EINVAL; |
| 282 | |
Alex Williamson | 91f57d5 | 2011-11-11 10:07:36 -0700 | [diff] [blame] | 283 | control = PCI_PASID_CTRL_ENABLE | features; |
Joerg Roedel | 086ac11 | 2011-09-27 15:57:16 +0200 | [diff] [blame] | 284 | |
Alex Williamson | 91f57d5 | 2011-11-11 10:07:36 -0700 | [diff] [blame] | 285 | pci_write_config_word(pdev, pos + PCI_PASID_CTRL, control); |
Joerg Roedel | 086ac11 | 2011-09-27 15:57:16 +0200 | [diff] [blame] | 286 | |
| 287 | return 0; |
| 288 | } |
| 289 | EXPORT_SYMBOL_GPL(pci_enable_pasid); |
| 290 | |
| 291 | /** |
| 292 | * pci_disable_pasid - Disable the PASID capability |
| 293 | * @pdev: PCI device structure |
| 294 | * |
| 295 | */ |
| 296 | void pci_disable_pasid(struct pci_dev *pdev) |
| 297 | { |
| 298 | u16 control = 0; |
| 299 | int pos; |
| 300 | |
Alex Williamson | 69166fb | 2011-11-02 14:07:15 -0600 | [diff] [blame] | 301 | pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PASID); |
Joerg Roedel | 086ac11 | 2011-09-27 15:57:16 +0200 | [diff] [blame] | 302 | if (!pos) |
| 303 | return; |
| 304 | |
Alex Williamson | 91f57d5 | 2011-11-11 10:07:36 -0700 | [diff] [blame] | 305 | pci_write_config_word(pdev, pos + PCI_PASID_CTRL, control); |
Joerg Roedel | 086ac11 | 2011-09-27 15:57:16 +0200 | [diff] [blame] | 306 | } |
| 307 | EXPORT_SYMBOL_GPL(pci_disable_pasid); |
| 308 | |
| 309 | /** |
| 310 | * pci_pasid_features - Check which PASID features are supported |
| 311 | * @pdev: PCI device structure |
| 312 | * |
| 313 | * Returns a negative value when no PASI capability is present. |
| 314 | * Otherwise is returns a bitmask with supported features. Current |
| 315 | * features reported are: |
Alex Williamson | 91f57d5 | 2011-11-11 10:07:36 -0700 | [diff] [blame] | 316 | * PCI_PASID_CAP_EXEC - Execute permission supported |
Bjorn Helgaas | f762598 | 2013-11-14 11:28:18 -0700 | [diff] [blame] | 317 | * PCI_PASID_CAP_PRIV - Privileged mode supported |
Joerg Roedel | 086ac11 | 2011-09-27 15:57:16 +0200 | [diff] [blame] | 318 | */ |
| 319 | int pci_pasid_features(struct pci_dev *pdev) |
| 320 | { |
| 321 | u16 supported; |
| 322 | int pos; |
| 323 | |
Alex Williamson | 69166fb | 2011-11-02 14:07:15 -0600 | [diff] [blame] | 324 | pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PASID); |
Joerg Roedel | 086ac11 | 2011-09-27 15:57:16 +0200 | [diff] [blame] | 325 | if (!pos) |
| 326 | return -EINVAL; |
| 327 | |
Alex Williamson | 91f57d5 | 2011-11-11 10:07:36 -0700 | [diff] [blame] | 328 | pci_read_config_word(pdev, pos + PCI_PASID_CAP, &supported); |
Joerg Roedel | 086ac11 | 2011-09-27 15:57:16 +0200 | [diff] [blame] | 329 | |
Alex Williamson | 91f57d5 | 2011-11-11 10:07:36 -0700 | [diff] [blame] | 330 | supported &= PCI_PASID_CAP_EXEC | PCI_PASID_CAP_PRIV; |
Joerg Roedel | 086ac11 | 2011-09-27 15:57:16 +0200 | [diff] [blame] | 331 | |
| 332 | return supported; |
| 333 | } |
| 334 | EXPORT_SYMBOL_GPL(pci_pasid_features); |
| 335 | |
| 336 | #define PASID_NUMBER_SHIFT 8 |
| 337 | #define PASID_NUMBER_MASK (0x1f << PASID_NUMBER_SHIFT) |
| 338 | /** |
| 339 | * pci_max_pasid - Get maximum number of PASIDs supported by device |
| 340 | * @pdev: PCI device structure |
| 341 | * |
| 342 | * Returns negative value when PASID capability is not present. |
| 343 | * Otherwise it returns the numer of supported PASIDs. |
| 344 | */ |
| 345 | int pci_max_pasids(struct pci_dev *pdev) |
| 346 | { |
| 347 | u16 supported; |
| 348 | int pos; |
| 349 | |
Alex Williamson | 69166fb | 2011-11-02 14:07:15 -0600 | [diff] [blame] | 350 | pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PASID); |
Joerg Roedel | 086ac11 | 2011-09-27 15:57:16 +0200 | [diff] [blame] | 351 | if (!pos) |
| 352 | return -EINVAL; |
| 353 | |
Alex Williamson | 91f57d5 | 2011-11-11 10:07:36 -0700 | [diff] [blame] | 354 | pci_read_config_word(pdev, pos + PCI_PASID_CAP, &supported); |
Joerg Roedel | 086ac11 | 2011-09-27 15:57:16 +0200 | [diff] [blame] | 355 | |
| 356 | supported = (supported & PASID_NUMBER_MASK) >> PASID_NUMBER_SHIFT; |
| 357 | |
| 358 | return (1 << supported); |
| 359 | } |
| 360 | EXPORT_SYMBOL_GPL(pci_max_pasids); |
| 361 | #endif /* CONFIG_PCI_PASID */ |