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gerrit-public.fairphone.software / kernel / msm-4.9 / eeea8b40cd2866ca24f25e5ef09225edb076ae45 / . / arch / x86 / include / asm / fpu / xstate.h
blob: ae55a43e09c0f20846919680f85a1c15538432bc [file] [log] [blame]
Suresh Siddhadc1e35c2008-07-29 10:29:19 -0700[diff] [blame]1#ifndef __ASM_X86_XSAVE_H
2#define __ASM_X86_XSAVE_H
3
H. Peter Anvin6152e4b2008-07-29 17:23:16 -0700[diff] [blame]4#include <linux/types.h>
Suresh Siddhadc1e35c2008-07-29 10:29:19 -0700[diff] [blame]5#include <asm/processor.h>
Ingo Molnar59a36d12015-04-30 08:53:18 +0200[diff] [blame]6#include <linux/uaccess.h>
Suresh Siddhadc1e35c2008-07-29 10:29:19 -0700[diff] [blame]7
Liu, Jinsong56c103e2014-02-21 17:39:02 +0000[diff] [blame]8/* Bit 63 of XCR0 is reserved for future expansion */
Dave Hansend91cab72015-09-02 16:31:26 -0700[diff] [blame]9#define XFEATURE_MASK_EXTEND (~(XFEATURE_MASK_FPSSE | (1ULL << 63)))
Suresh Siddhadc1e35c2008-07-29 10:29:19 -0700[diff] [blame]10
Ingo Molnar677b98b2015-04-28 09:40:26 +0200[diff] [blame]11#define XSTATE_CPUID 0x0000000d
12
Suresh Siddhadc1e35c2008-07-29 10:29:19 -0700[diff] [blame]13#define FXSAVE_SIZE 512
14
Sheng Yang2d5b5a62010-06-13 17:29:39 +0800[diff] [blame]15#define XSAVE_HDR_SIZE 64
16#define XSAVE_HDR_OFFSET FXSAVE_SIZE
17
18#define XSAVE_YMM_SIZE 256
19#define XSAVE_YMM_OFFSET (XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET)
Sheng Yang5ee481d2010-05-17 17:22:23 +0800[diff] [blame]20
Yu-cheng Yu1499ce2d2016-06-17 13:07:16 -0700[diff] [blame]21/* Supervisor features */
22#define XFEATURE_MASK_SUPERVISOR (XFEATURE_MASK_PT)
23
Qiaowei Rene7d820a2013-12-05 17:15:34 +0800[diff] [blame]24/* Supported features which support lazy state saving */
Dave Hansend91cab72015-09-02 16:31:26 -0700[diff] [blame]25#define XFEATURE_MASK_LAZY (XFEATURE_MASK_FP | \
Yu-cheng Yua65050c2016-03-09 16:28:54 -0800[diff] [blame]26 XFEATURE_MASK_SSE | \
yu-cheng yu394db202016-01-06 14:24:54 -0800[diff] [blame]27 XFEATURE_MASK_YMM | \
28 XFEATURE_MASK_OPMASK | \
29 XFEATURE_MASK_ZMM_Hi256 | \
Dave Hansenc8df4002016-02-12 13:02:04 -0800[diff] [blame]30 XFEATURE_MASK_Hi16_ZMM | \
31 XFEATURE_MASK_PKRU)
Qiaowei Rene7d820a2013-12-05 17:15:34 +0800[diff] [blame]32
Yu-cheng Yua65050c2016-03-09 16:28:54 -0800[diff] [blame]33/* Supported features which require eager state saving */
34#define XFEATURE_MASK_EAGER (XFEATURE_MASK_BNDREGS | XFEATURE_MASK_BNDCSR)
35
Qiaowei Rene7d820a2013-12-05 17:15:34 +0800[diff] [blame]36/* All currently supported features */
Dave Hansend91cab72015-09-02 16:31:26 -0700[diff] [blame]37#define XCNTXT_MASK (XFEATURE_MASK_LAZY | XFEATURE_MASK_EAGER)
Suresh Siddhadc1e35c2008-07-29 10:29:19 -0700[diff] [blame]38
Suresh Siddhab359e8a2008-07-29 10:29:20 -0700[diff] [blame]39#ifdef CONFIG_X86_64
40#define REX_PREFIX "0x48, "
41#else
42#define REX_PREFIX
43#endif
44
Ingo Molnar614df7f2015-04-24 09:20:33 +0200[diff] [blame]45extern u64 xfeatures_mask;
Suresh Siddha5b3efd52010-02-11 11:50:59 -0800[diff] [blame]46extern u64 xstate_fx_sw_bytes[USER_XSTATE_FX_SW_WORDS];
Suresh Siddhadc1e35c2008-07-29 10:29:19 -0700[diff] [blame]47
Suresh Siddha5b3efd52010-02-11 11:50:59 -0800[diff] [blame]48extern void update_regset_xstate_info(unsigned int size, u64 xstate_mask);
Suresh Siddhadc1e35c2008-07-29 10:29:19 -0700[diff] [blame]49
Dave Hansen0a265372015-09-02 16:31:24 -0700[diff] [blame]50void fpu__xstate_clear_all_cpu_caps(void);
Ingo Molnarc47ada32015-04-30 17:15:32 +0200[diff] [blame]51void *get_xsave_addr(struct xregs_state *xsave, int xstate);
Dave Hansen04cd0272015-06-07 11:37:00 -0700[diff] [blame]52const void *get_xsave_field_ptr(int xstate_field);
Yu-cheng Yu99aa22d2016-05-20 10:47:08 -0700[diff] [blame]53int using_compacted_format(void);
Yu-cheng Yu91c3dba2016-06-17 13:07:17 -0700[diff] [blame]54int copyout_from_xsaves(unsigned int pos, unsigned int count, void *kbuf,
55 void __user *ubuf, struct xregs_state *xsave);
56int copyin_to_xsaves(const void *kbuf, const void __user *ubuf,
57 struct xregs_state *xsave);
Suresh Siddhadc1e35c2008-07-29 10:29:19 -0700[diff] [blame]58#endif