blob: a8fb8b60b6d2a9edd508e44414a001a828100ca2 [file] [log] [blame]
Andy Gross5d144e32014-04-24 11:31:21 -05001#
2# QCOM Soc drivers
3#
Channagoud Kadabi7e8d55a2016-08-23 14:04:44 -07004config QCOM_CPUSS_DUMP
5 bool "CPU Subsystem Dumping support"
6 help
7 Add support to dump various hardware entities such as the instruction
8 and data tlb's as well as the unified tlb, which are a part of the
9 cpu subsystem to an allocated buffer. This allows for analysis of the
10 the entities if corruption is suspected.
11 If unsure, say N
12
Kyle Yan36d78702016-08-23 16:07:11 -070013config QCOM_RUN_QUEUE_STATS
14 bool "Enable collection and exporting of QTI Run Queue stats to userspace"
15 help
16 This option enables the driver to periodically collecting the statistics
17 of kernel run queue information and calculate the load of the system.
18 This information is exported to usespace via sysfs entries and userspace
19 algorithms uses info and decide when to turn on/off the cpu cores.
20
Andy Gross5d144e32014-04-24 11:31:21 -050021config QCOM_GSBI
22 tristate "QCOM General Serial Bus Interface"
23 depends on ARCH_QCOM
Andy Grosse5fdad62015-02-09 16:01:06 -060024 select MFD_SYSCON
Andy Gross5d144e32014-04-24 11:31:21 -050025 help
26 Say y here to enable GSBI support. The GSBI provides control
27 functions for connecting the underlying serial UART, SPI, and I2C
28 devices to the output pins.
29
Channagoud Kadabi97335b22016-08-17 13:40:46 -070030config QCOM_LLCC
31 tristate "Qualcomm Technologies, Inc. LLCC driver"
32 depends on ARCH_QCOM
33 help
34 Qualcomm Technologies, Inc. platform specific LLCC driver for Last
35 Level Cache. This provides interfaces to client's that use the LLCC.
36 Say yes here to enable LLCC slice driver.
37
Kyle Yan6a20fae2017-02-14 13:34:41 -080038config QCOM_SDM845_LLCC
39 tristate "Qualcomm Technologies, Inc. SDM845 LLCC driver"
Channagoud Kadabib1fec942016-08-17 17:00:26 -070040 depends on QCOM_LLCC
41 help
Kyle Yan6a20fae2017-02-14 13:34:41 -080042 Say yes here to enable the LLCC driver for SDM845. This is provides
Channagoud Kadabib1fec942016-08-17 17:00:26 -070043 data required to configure LLCC so that clients can start using the
44 LLCC slices.
45
Lingutla Chandrasekhar9cecdb22017-05-30 10:36:38 +053046config QCOM_SDM670_LLCC
47 tristate "Qualcomm Technologies, Inc. SDM670 LLCC driver"
48 depends on QCOM_LLCC
49 help
50 This provides Last level cache controller driver for SDM670.
51 This driver provides data required to configure LLCC, so that clients
52 can start using the LLCC slices.
53 Say yes here to enable llcc driver for SDM670.
54
55
Imran Khan1b223902016-09-21 17:11:58 +053056config QCOM_LLCC_AMON
57 tristate "Qualcomm Technologies, Inc. LLCC Activity Monitor(AMON) driver"
58 depends on QCOM_LLCC
59 help
60 This option enables a activity monitor driver for last level cache
61 controller. This driver configures the activity monitor as
62 deadlock detector and dumps the AMON registers upon detection of
63 deadlock.
64
65config QCOM_LLCC_AMON_PANIC
66 tristate "Panic on detecting LLCC Activity Monitor(AMON) error"
67 depends on QCOM_LLCC_AMON
68 help
69 This option enables panic upon detection of LLCC Activity Monitor(AMON)
70 errors. Say yes here to enable deadlock detection mode of AMON. In
71 deadlock detection mode AMON will trigger an interrupt if some LLCC request
72 ages out.
73
Lina Iyer7ce75bb2015-04-09 13:20:41 -060074config QCOM_PM
75 bool "Qualcomm Power Management"
76 depends on ARCH_QCOM && !ARM64
Arnd Bergmannd9d68882015-11-24 23:13:09 +010077 select ARM_CPU_SUSPEND
Lina Iyer23b38ce2015-07-10 14:18:00 -060078 select QCOM_SCM
Lina Iyer7ce75bb2015-04-09 13:20:41 -060079 help
80 QCOM Platform specific power driver to manage cores and L2 low power
81 modes. It interface with various system drivers to put the cores in
82 low power modes.
Bjorn Andersson4b638df42015-06-26 14:50:10 -070083
Stephen Boyd7d0c8be2015-08-28 11:23:33 -070084config QCOM_SMEM
85 tristate "Qualcomm Shared Memory Manager (SMEM)"
86 depends on ARCH_QCOM
Arnd Bergmann73ebb852015-10-13 17:05:39 +020087 depends on HWSPINLOCK
Stephen Boyd7d0c8be2015-08-28 11:23:33 -070088 help
89 Say y here to enable support for the Qualcomm Shared Memory Manager.
90 The driver provides an interface to items in a heap shared among all
91 processors in a Qualcomm platform.
92
Channagoud Kadabi4d480b02016-12-20 11:57:51 -080093config MSM_SERVICE_LOCATOR
94 bool "Service Locator"
95 depends on MSM_QMI_INTERFACE
96 help
97 The Service Locator provides a library to retrieve location
98 information given a service identifier. Location here translates
99 to what process domain exports the service, and which subsystem
100 that process domain will execute in.
101
102config MSM_SERVICE_NOTIFIER
103 bool "Service Notifier"
104 depends on MSM_SERVICE_LOCATOR && MSM_SUBSYSTEM_RESTART
105 help
106 The Service Notifier provides a library for a kernel client to
107 register for state change notifications regarding a remote service.
108 A remote service here refers to a process providing certain services
109 like audio, the identifier for which is provided by the service
110 locator.
111
Bjorn Anderssonf2ab3292015-07-27 20:20:30 -0700112config QCOM_SMD
113 tristate "Qualcomm Shared Memory Driver (SMD)"
114 depends on QCOM_SMEM
115 help
116 Say y here to enable support for the Qualcomm Shared Memory Driver
117 providing communication channels to remote processors in Qualcomm
118 platforms.
119
Bjorn Andersson936f14c2015-07-27 20:20:32 -0700120config QCOM_SMD_RPM
121 tristate "Qualcomm Resource Power Manager (RPM) over SMD"
122 depends on QCOM_SMD && OF
123 help
124 If you say yes to this option, support will be included for the
125 Resource Power Manager system found in the Qualcomm 8974 based
126 devices.
127
128 This is required to access many regulators, clocks and bus
129 frequencies controlled by the RPM on these devices.
130
131 Say M here if you want to include support for the Qualcomm RPM as a
132 module. This will build a module called "qcom-smd-rpm".
Bjorn Andersson9460ae22015-09-24 18:25:01 -0700133
Channagoud Kadabieee0ffd2016-08-11 14:18:17 -0700134config QCOM_SCM
135 bool "Secure Channel Manager (SCM) support"
136 default n
137
Bjorn Andersson9460ae22015-09-24 18:25:01 -0700138config QCOM_SMEM_STATE
139 bool
Bjorn Anderssonc97c4092015-09-24 18:25:02 -0700140
Bjorn Andersson50e99642015-09-24 18:25:03 -0700141config QCOM_SMP2P
Arnd Bergmann10475d52015-11-20 11:32:21 +0100142 tristate "Qualcomm Shared Memory Point to Point support"
Bjorn Andersson50e99642015-09-24 18:25:03 -0700143 depends on QCOM_SMEM
144 select QCOM_SMEM_STATE
145 help
146 Say yes here to support the Qualcomm Shared Memory Point to Point
147 protocol.
148
Bjorn Anderssonc97c4092015-09-24 18:25:02 -0700149config QCOM_SMSM
Arnd Bergmann10475d52015-11-20 11:32:21 +0100150 tristate "Qualcomm Shared Memory State Machine"
Bjorn Anderssonc97c4092015-09-24 18:25:02 -0700151 depends on QCOM_SMEM
152 select QCOM_SMEM_STATE
153 help
154 Say yes here to support the Qualcomm Shared Memory State Machine.
155 The state machine is represented by bits in shared memory.
Bjorn Anderssonea7a1f22015-09-21 10:52:55 -0700156
157config QCOM_WCNSS_CTRL
158 tristate "Qualcomm WCNSS control driver"
159 depends on QCOM_SMD
160 help
161 Client driver for the WCNSS_CTRL SMD channel, used to download nv
162 firmware to a newly booted WCNSS chip.
Kyle Yanbf6dedf2016-08-19 16:47:30 -0700163
Channagoud Kadabi0fb6cf62016-08-23 15:12:52 -0700164config MSM_BOOT_STATS
165 bool "Use MSM boot stats reporting"
166 help
167 Use this to report msm boot stats such as bootloader throughput,
168 display init, total boot time.
169 This figures are reported in mpm sleep clock cycles and have a
170 resolution of 31 bits as 1 bit is used as an overflow check.
171
Kyle Yana6029442016-08-19 17:07:58 -0700172config MSM_CORE_HANG_DETECT
173 tristate "MSM Core Hang Detection Support"
174 help
175 This enables the core hang detection module. It causes SoC
176 reset on core hang detection and collects the core context
177 for hang.
178
Kyle Yanbf6dedf2016-08-19 16:47:30 -0700179config MSM_GLADIATOR_HANG_DETECT
180 tristate "MSM Gladiator Hang Detection Support"
181 help
182 This enables the gladiator hang detection module.
183 If the configured threshold is reached, it causes SoC reset on
184 gladiator hang detection and collects the context for the
185 gladiator hang.
Kyle Yancc90ead2016-08-19 16:53:28 -0700186
Kyle Yan3a641f42016-11-21 14:00:04 -0800187config MSM_GLADIATOR_ERP
188 tristate "GLADIATOR coherency interconnect error reporting driver"
Kyle Yancc90ead2016-08-19 16:53:28 -0700189 help
190 Support dumping debug information for the GLADIATOR
191 cache interconnect in the error interrupt handler.
192 Meant to be used for debug scenarios only.
193
194 If unsure, say N.
195
Kyle Yan3a641f42016-11-21 14:00:04 -0800196config PANIC_ON_GLADIATOR_ERROR
197 depends on MSM_GLADIATOR_ERP
198 bool "Panic on GLADIATOR error report"
Kyle Yancc90ead2016-08-19 16:53:28 -0700199 help
200 Panic upon detection of an Gladiator coherency interconnect error
201 in order to support dumping debug information.
202 Meant to be used for debug scenarios only.
203
204 If unsure, say N.
Satyajit Desai5255cea2016-08-04 16:02:50 -0700205
Satya Durga Srinivasu Prabhala60909002016-09-12 11:36:09 -0700206config QCOM_EUD
207 tristate "QTI Embedded USB Debugger (EUD)"
208 depends on ARCH_QCOM
209 select SERIAL_CORE
210 help
211 The EUD (Embedded USB Debugger) is a mini-USB hub implemented
212 on chip to support the USB-based debug and trace capabilities.
213 This module enables support for Qualcomm Technologies, Inc.
214 Embedded USB Debugger (EUD).
215
216 If unsure, say N.
217
Satyajit Desai5255cea2016-08-04 16:02:50 -0700218config QCOM_WATCHDOG_V2
219 bool "Qualcomm Watchdog Support"
220 depends on ARCH_QCOM
221 help
222 This enables the watchdog module. It causes kernel panic if the
223 watchdog times out. It allows for detection of cpu hangs and
224 deadlocks. It does not run during the bootup process, so it will
225 not catch any early lockups.
Satyajit Desai11e470c2016-08-10 15:36:45 -0700226
Kiran Gunda04967c82017-02-14 14:22:18 +0530227config QPNP_PBS
228 tristate "PBS trigger support for QPNP PMIC"
229 depends on SPMI
230 help
231 This driver supports configuring software PBS trigger event through PBS
232 RAM on Qualcomm Technologies, Inc. QPNP PMICs. This module provides
233 the APIs to the client drivers that wants to send the PBS trigger
234 event to the PBS RAM.
235
Satyajit Desai11e470c2016-08-10 15:36:45 -0700236config QCOM_MEMORY_DUMP_V2
237 bool "QCOM Memory Dump V2 Support"
238 help
239 This enables memory dump feature. It allows various client
240 subsystems to register respective dump regions. At the time
241 of deadlocks or cpu hangs these dump regions are captured to
242 give a snapshot of the system at the time of the crash.
David Dai87584a42016-09-01 17:13:35 -0700243
244config QCOM_BUS_SCALING
245 bool "Bus scaling driver"
246 help
247 This option enables bus scaling on MSM devices. Bus scaling
248 allows devices to request the clocks be set to rates sufficient
249 for the active devices needs without keeping the clocks at max
250 frequency when a slower speed is sufficient.
Chris Lewb4791c32016-08-01 11:58:55 -0700251
David Dai04ce4202016-09-26 16:24:13 -0700252config QCOM_BUS_CONFIG_RPMH
253 bool "RPMH Bus scaling driver"
254 depends on QCOM_BUS_SCALING
255 help
256 This option enables bus scaling using QCOM specific hardware
257 accelerators. It enables the translation of bandwidth requests
258 from logical nodes to hardware nodes controlled by the BCM (Bus
259 Clock Manager)
260
Patrick Dalya125d5d2016-09-30 16:16:10 -0700261config QCOM_SECURE_BUFFER
262 bool "Helper functions for securing buffers through TZ"
263 help
264 Say 'Y' here for targets that need to call into TZ to secure
265 memory buffers. This ensures that only the correct clients can
266 use this memory and no unauthorized access is made to the
267 buffer
268
Laura Abbott130e1d02013-08-09 18:17:06 -0700269config QCOM_EARLY_RANDOM
270 bool "Initialize random pool very early"
271 help
272 The standard random pool may not initialize until late in the boot
273 process which means that any calls to get random numbers before then
274 may not be truly random. Select this option to make an early call
275 to get some random data to put in the pool. If unsure, say N.
276
Chris Lewb4791c32016-08-01 11:58:55 -0700277config MSM_SMEM
278 depends on ARCH_QCOM
279 depends on REMOTE_SPINLOCK_MSM
280 bool "MSM Shared Memory (SMEM)"
281 help
282 Support for the shared memory interface between the various
283 processors in the System on a Chip (SoC) which allows basic
284 inter-processor communication.
Chris Lewfa6135e2016-08-01 13:29:46 -0700285
286config MSM_GLINK
287 bool "Generic Link (G-Link)"
288 help
289 G-Link is a generic link transport that replaces SMD. It is used
290 within a System-on-Chip (SoC) for communication between both internal
291 processors and external peripherals. The actual physical transport
292 is handled by transport plug-ins that can be individually enabled and
293 configured separately.
294
295config MSM_GLINK_LOOPBACK_SERVER
296 bool "Generic Link (G-Link) Loopback Server"
297 help
298 G-Link Loopback Server that enable loopback test framework to test
299 and validate the G-Link protocol stack. It support both local and
300 remote clients to configure the loopback server and echo back the
301 data received from the clients.
302
303config MSM_GLINK_SMEM_NATIVE_XPRT
304 depends on MSM_SMEM
305 depends on MSM_GLINK
306 bool "Generic Link (G-Link) SMEM Native Transport"
307 help
308 G-Link SMEM Native Transport is a G-Link Transport plug-in. It allows
309 G-Link communication to remote entities through a shared memory
310 physical transport. The nature of shared memory limits this G-Link
311 transport to only connecting with entities internal to the
312 System-on-Chip.
313
314config MSM_GLINK_SPI_XPRT
315 depends on MSM_GLINK
316 tristate "Generic Link (G-Link) SPI Transport"
317 help
318 G-Link SPI Transport is a Transport plug-in developed over SPI
319 bus. This transport plug-in performs marshaling of G-Link
320 commands & data to the appropriate SPI bus wire format and
321 allows for G-Link communication with remote subsystems that are
322 external to the System-on-Chip.
323
Kineret Berger5bb47422017-02-09 11:51:32 +0200324config MSM_SPCOM
325 depends on MSM_GLINK
326 bool "Secure Processor Communication over GLINK"
327 help
328 spcom driver allows loading Secure Processor Applications and
329 sending messages to Secure Processor Applications.
330 spcom provides interface to both user space app and kernel driver.
331 It is using glink as the transport layer, which provides multiple
332 logical channels over single physical channel.
333 The physical layer is based on shared memory and interrupts.
334 spcom provides clients/server API, although currently only one client
335 or server is allowed per logical channel.
336
Reut Zysman92bfac82017-04-05 18:18:50 +0300337config MSM_SPSS_UTILS
338 depends on MSM_PIL
339 bool "Secure Processor Utilities"
340 help
341 spss-utils driver selects Secure Processor firmware file name.
342 The firmware file name for dev, test or production is selected
343 based on two fuses.
344 Different file name is used for differnt SPSS HW versions,
345 because the SPSS firmware size is too small to support multiple
346 HW versions.
347
Chris Lewfa6135e2016-08-01 13:29:46 -0700348config TRACER_PKT
349 bool "Tracer Packet"
350 help
351 Tracer Packet helps in profiling the performance of inter-
352 processor communication protocols. The profiling information
353 can be logged into the tracer packet itself.
Lina Iyerd7194ff2016-04-20 17:13:34 -0600354
355config QTI_RPMH_API
356 bool "QTI RPMH (h/w accelerators) Communication API"
357 select MAILBOX
358 select QTI_RPMH_MBOX
Lina Iyer15d6df32016-08-18 12:10:27 -0600359 select QTI_SYSTEM_PM
Lina Iyerd7194ff2016-04-20 17:13:34 -0600360 help
361 This option enables RPMH hardware communication for making shared
362 resource requests on Qualcomm Technologies Inc SoCs.
Lina Iyer15d6df32016-08-18 12:10:27 -0600363
364config QTI_SYSTEM_PM
365 bool
Karthikeyan Ramasubramanian97a10282016-09-16 12:01:18 -0600366
367config MSM_SMP2P
368 bool "SMSM Point-to-Point (SMP2P)"
369 depends on MSM_SMEM
370 help
371 Provide point-to-point remote signaling support.
372 SMP2P enables transferring 32-bit values between
373 the local and a remote system using shared
374 memory and interrupts. A client can open multiple
375 32-bit values by specifying a unique string and
376 remote processor ID.
377
378config MSM_SMP2P_TEST
379 bool "SMSM Point-to-Point Test"
380 depends on MSM_SMP2P
381 help
382 Enables loopback and unit testing support for
383 SMP2P. Loopback support is used by other
384 processors to do unit testing. Unit tests
385 are used to verify the local and remote
386 implementations.
Karthikeyan Ramasubramanian9f9c4a72016-10-18 14:06:18 -0600387
388config MSM_IPC_ROUTER_SMD_XPRT
389 depends on MSM_SMD
390 depends on IPC_ROUTER
391 bool "MSM SMD XPRT Layer"
392 help
393 SMD Transport Layer that enables IPC Router communication within
394 a System-on-Chip(SoC). When the SMD channels become available,
395 this layer registers a transport with IPC Router and enable
396 message exchange.
Karthikeyan Ramasubramanianf0d46a82016-09-16 16:43:51 -0600397
398config MSM_IPC_ROUTER_HSIC_XPRT
399 depends on USB_QCOM_IPC_BRIDGE
400 depends on IPC_ROUTER
401 bool "MSM HSIC XPRT Layer"
402 help
403 HSIC Transport Layer that enables off-chip communication of
404 IPC Router. When the HSIC endpoint becomes available, this layer
405 registers the transport with IPC Router and enable message
406 exchange.
Karthikeyan Ramasubramanianbf94cab2016-09-16 16:50:04 -0600407
408config MSM_IPC_ROUTER_MHI_XPRT
409 depends on MSM_MHI
410 depends on IPC_ROUTER
411 bool "MSM MHI XPRT Layer"
412 help
413 MHI Transport Layer that enables off-chip communication of
414 IPC Router. When the MHI endpoint becomes available, this layer
415 registers the transport with IPC Router and enable message
416 exchange.
Karthikeyan Ramasubramanian4f4074f2016-09-16 16:53:30 -0600417
418config MSM_IPC_ROUTER_GLINK_XPRT
419 depends on MSM_GLINK
420 depends on IPC_ROUTER
421 bool "MSM GLINK XPRT Layer"
422 help
423 GLINK Transport Layer that enables IPC Router communication within
424 a System-on-Chip(SoC). When the GLINK channels become available,
425 this layer registers a transport with IPC Router and enable
426 message exchange.
Karthikeyan Ramasubramanianfafd67f12016-09-16 17:15:13 -0600427
428config MSM_QMI_INTERFACE
429 depends on IPC_ROUTER
430 depends on QMI_ENCDEC
431 bool "MSM QMI Interface Library"
432 help
433 Library to send and receive QMI messages over IPC Router.
434 This library provides interface functions to the kernel drivers
435 to perform QMI message marshaling and transport them over IPC
436 Router.
Karthikeyan Ramasubramanian5d797a82016-09-16 17:56:18 -0600437
438config MSM_GLINK_PKT
439 bool "Enable device interface for GLINK packet channels"
440 depends on MSM_GLINK
441 help
442 G-link packet driver provides the interface for the userspace
443 clients to communicate over G-Link via device nodes.
444 This enable the userspace clients to read and write to
445 some glink packets channel.
Karthikeyan Ramasubramanian04e3f902016-09-19 09:24:36 -0600446
447config MSM_SYSTEM_HEALTH_MONITOR
448 bool "System Health Monitor"
449 depends on MSM_QMI_INTERFACE && MSM_SUBSYSTEM_RESTART
450 help
451 System Health Monitor (SHM) passively monitors the health of the
452 peripherals connected to the application processor. Software
453 components in the application processor that experience
454 communication failure can request the SHM to perform a system-wide
455 health check. If any failures are detected during the health-check,
456 then a subsystem restart will be triggered for the failed subsystem.
Kyle Yane45fa022016-08-29 11:40:26 -0700457
458config MSM_SUBSYSTEM_RESTART
459 bool "MSM Subsystem Restart"
460 help
461 This option enables the MSM subsystem restart framework.
462
463 The MSM subsystem restart framework provides support to boot,
464 shutdown, and restart subsystems with a reference counted API.
465 It also notifies userspace of transitions between these states via
466 sysfs.
467
468config MSM_PIL
469 bool "Peripheral image loading"
470 select FW_LOADER
471 default n
472 help
473 Some peripherals need to be loaded into memory before they can be
474 brought out of reset.
475
476 Say yes to support these devices.
477
478config MSM_SYSMON_GLINK_COMM
479 bool "MSM System Monitor communication support using GLINK transport"
480 depends on MSM_GLINK && MSM_SUBSYSTEM_RESTART
481 help
482 This option adds support for MSM System Monitor APIs using the GLINK
483 transport layer. The APIs provided may be used for notifying
484 subsystems within the SoC about other subsystems' power-up/down
485 state-changes.
486
487config MSM_PIL_SSR_GENERIC
488 tristate "MSM Subsystem Boot Support"
489 depends on MSM_PIL && MSM_SUBSYSTEM_RESTART
490 help
491 Support for booting and shutting down MSM Subsystem processors.
492 This driver also monitors the SMSM status bits and the watchdog
493 interrupt for the subsystem and restarts it on a watchdog bite
494 or a fatal error. Subsystems include LPASS, Venus, VPU, WCNSS and
495 BCSS.
496
497config MSM_PIL_MSS_QDSP6V5
498 tristate "MSS QDSP6v5 (Hexagon) Boot Support"
499 depends on MSM_PIL && MSM_SUBSYSTEM_RESTART
500 help
501 Support for booting and shutting down QDSP6v5 (Hexagon) processors
502 in modem subsystems. If you would like to make or receive phone
503 calls then say Y here.
504
505 If unsure, say N.
Yuanyuan Liu607051c2016-11-28 17:04:13 -0800506
507config ICNSS
508 tristate "Platform driver for Q6 integrated connectivity"
Yuanyuan Liu13e7cdf2017-06-13 11:48:00 -0700509 select CNSS_UTILS
Yuanyuan Liu607051c2016-11-28 17:04:13 -0800510 ---help---
511 This module adds support for Q6 integrated WLAN connectivity
512 subsystem. This module is responsible for communicating WLAN on/off
513 control messages to FW over QMI channel. It is also responsible for
514 handling WLAN PD restart notifications.
515
516config ICNSS_DEBUG
517 bool "ICNSS debug support"
518 depends on ICNSS
519 ---help---
520 Say 'Y' here to enable ICNSS driver debug support. Debug support
521 primarily consists of logs consisting of information related to
522 hardware register access and enabling BUG_ON for certain cases to aid
Mahesh Sivasubramaniancb649522016-08-19 14:04:44 -0600523 the debugging.
524
525config QCOM_COMMAND_DB
526 bool "Command DB"
527 help
528 Command DB queries shared memory by key string for shared system
529 resources
Banajit Goswamiaec1b462016-11-21 21:54:23 -0800530
Vijay Ganti10772c02017-05-05 11:47:40 -0700531config MSM_PERFORMANCE
532 tristate "msm performacne driver to support userspace hotplug requests"
533 default n
534 help
535 This driver is used to provide CPU hotplug support to userspace.
536 It ensures that no more than a user specified number of CPUs stay
537 online at any given point in time. This module can also restrict
538 max freq or min freq of cpu cluster
539
540config MSM_PERFORMANCE_HOTPLUG_ON
541 bool "Hotplug functionality through msm_performance turned on"
542 depends on MSM_PERFORMANCE
543 default y
544 help
545 If some other core-control driver is present turn off the core-control
546 capability of msm_performance driver. Setting this flag to false will
547 compile out the nodes needed for core-control functionality through
548 msm_performance.
549
Sathish Ambley5a8b3102017-01-23 09:56:24 -0800550config MSM_CDSP_LOADER
551 tristate "CDSP loader support"
552 depends on MSM_GLINK
553 help
554 Enable CDSP image loader.
555 The CDSP loader brings CDSP out of reset
556 for platforms that have compute DSP.
557 Say M if you want to enable this module.
558
AnilKumar Chimata4cf128e2017-07-13 01:22:31 +0530559config QCOM_SMCINVOKE
560 bool "Secure QSEE Support"
561 help
562 Enable SMCInvoke driver which supports capability based secure
563 communication between QTI Secure Execution Environment (QSEE)
564 and high level operating system. It exposes APIs for both
565 userspace and kernel clients.
566
Mahesh Sivasubramanianc2ea76f2016-02-01 10:40:26 -0700567config MSM_EVENT_TIMER
568 bool "Event timer"
569 help
570 This option enables a modules that manages a list of event timers
571 that need to be monitored by the PM. The enables the PM code to
572 monitor events that require the core to be awake and ready to
573 handle the event.
574
575config MSM_PM
576 depends on PM
577 select MSM_IDLE_STATS if DEBUG_FS
578 select CPU_IDLE_MULTIPLE_DRIVERS
579 bool "Qualcomm platform specific PM driver"
580 help
581 Platform specific power driver to manage cores and l2 low power
582 modes. It interface with various system driver and put the cores
583 into low power modes. It implements OS initiated scheme and
584 determines last CPU to call into PSCI for cluster Low power
585 modes.
586
587config MSM_NOPM
588 default y if !PM
589 bool
590 help
591 This enables bare minimum support of power management at platform level.
592 i.e WFI
593
Abir Ghosh989d5e92016-10-09 11:47:28 +0300594config MSM_QBT1000
595 bool "QBT1000 Ultrasonic Fingerprint Sensor"
596 help
597 This driver provides services for configuring the fingerprint
598 sensor hardware and for communicating with the trusted app which
599 uses it. It enables clocks and provides commands for loading
600 trusted apps, unloading them and marshalling buffers to the
601 trusted fingerprint app.
602
Mahesh Sivasubramanianc2ea76f2016-02-01 10:40:26 -0700603config APSS_CORE_EA
604 depends on CPU_FREQ && PM_OPP
605 bool "Qualcomm Technology Inc specific power aware driver"
606 help
607 Platform specific power aware driver to provide power
608 and temperature information to the scheduler.
609
610if MSM_PM
611menuconfig MSM_IDLE_STATS
612 bool "Collect idle statistics"
613 help
614 Collect cores various low power mode idle statistics
615 and export them in proc/msm_pm_stats. User can read
616 this data and determine what low power modes and how
617 many times cores have entered into LPM modes.
618
619if MSM_IDLE_STATS
620
621config MSM_IDLE_STATS_FIRST_BUCKET
622 int "First bucket time"
623 default 62500
624 help
625 Upper time limit in nanoseconds of first bucket.
626
627config MSM_IDLE_STATS_BUCKET_SHIFT
628 int "Bucket shift"
629 default 2
630
631config MSM_IDLE_STATS_BUCKET_COUNT
632 int "Bucket count"
633 default 10
634
635config MSM_SUSPEND_STATS_FIRST_BUCKET
636 int "First bucket time for suspend"
637 default 1000000000
638 help
639 Upper time limit in nanoseconds of first bucket of the
640 histogram. This is for collecting statistics on suspend.
641
642endif # MSM_IDLE_STATS
643endif # MSM_PM
Satyajit Desai765e7ef2016-11-09 14:27:45 -0800644
645config QCOM_DCC_V2
646 bool "Qualcomm Technologies Data Capture and Compare enigne support for V2"
647 help
648 This option enables driver for Data Capture and Compare engine. DCC
649 driver provides interface to configure DCC block and read back
650 captured data from DCC's internal SRAM.
Mahesh Sivasubramanian6d0cfea2016-04-12 14:46:05 -0600651
652config QTI_RPM_STATS_LOG
653 bool "Qualcomm Technologies RPM Stats Driver"
Mahesh Sivasubramanian7c9528f2017-05-30 11:02:59 -0600654 depends on SYSFS
Mahesh Sivasubramanian6d0cfea2016-04-12 14:46:05 -0600655 default n
656 help
657 This option enables a driver which reads RPM messages from a shared
658 memory location. These messages provide statistical information about
659 the low power modes that RPM enters. The drivers outputs the message
660 via a debugfs node.
Satyajit Desaia6dfbd62017-05-02 10:49:52 -0700661
662config QCOM_FORCE_WDOG_BITE_ON_PANIC
663 bool "QCOM force watchdog bite"
664 depends on QCOM_WATCHDOG_V2
665 help
666 This forces a watchdog bite when the device restarts due to a
667 kernel panic. On certain MSM SoCs, this provides us
668 additional debugging information.
Manoj Prabhu Bc0c03572017-04-24 18:16:50 +0530669
Mahesh Sivasubramaniana8b87902017-06-15 14:56:23 -0600670config QMP_DEBUGFS_CLIENT
671 bool "Debugfs Client to communicate with AOP using QMP protocol"
672 depends on DEBUG_FS
673 default n
674 help
675 This options enables a driver which allows clients to send messages
676 to Alway On processor using QMP transport.
677
Manoj Prabhu Bc0c03572017-04-24 18:16:50 +0530678source "drivers/soc/qcom/memshare/Kconfig"
Chris Lewd2f6d512017-05-17 11:40:13 -0700679
Satyajit Desaid57f0e22017-08-15 12:53:00 -0700680config MSM_REMOTEQDSS
681 bool "Allow debug tools to enable events on other processors"
682 depends on QCOM_SCM && DEBUG_FS
683 help
684 Other onchip processors/execution environments may support debug
685 events. Provide a sysfs interface for debug tools to dynamically
686 enable/disable these events. Interface located in
687 /sys/class/remoteqdss.
688
Chris Lewd2f6d512017-05-17 11:40:13 -0700689config QSEE_IPC_IRQ_BRIDGE
690 tristate "QSEE IPC Interrupt Bridge"
691 help
692 This module enables bridging an Inter-Processor Communication(IPC)
693 interrupt from a remote subsystem directed towards Qualcomm
694 Technologies, Inc. Secure Execution Environment(QSEE).
Satyajit Desai66b6c452017-06-27 17:10:46 -0700695
696config MSM_JTAGV8
697 bool "Debug and ETM trace support across power collapse for ARMv8"
698 default y if CORESIGHT_SOURCE_ETM4X
699 help
700 Enables support for debugging (specifically breakpoints) and ETM
701 processor tracing across power collapse both for JTag and OS hosted
702 software running on ARMv8 target. Enabling this will ensure debug
703 and ETM registers are saved and restored across power collapse.
704 If unsure, say 'N' here to avoid potential power, performance and
705 memory penalty.