David Collins | 7370f1a | 2017-01-18 16:21:53 -0800 | [diff] [blame] | 1 | /* |
Tirupathi Reddy | 2b798d6 | 2018-05-17 11:15:14 +0530 | [diff] [blame] | 2 | * Copyright (c) 2015-2018, The Linux Foundation. All rights reserved. |
David Collins | 7370f1a | 2017-01-18 16:21:53 -0800 | [diff] [blame] | 3 | * |
| 4 | * This program is free software; you can redistribute it and/or modify |
| 5 | * it under the terms of the GNU General Public License version 2 and |
| 6 | * only version 2 as published by the Free Software Foundation. |
| 7 | * |
| 8 | * This program is distributed in the hope that it will be useful, |
| 9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 11 | * GNU General Public License for more details. |
| 12 | */ |
| 13 | |
| 14 | #ifndef __REGULATOR_CPR3_REGULATOR_H__ |
| 15 | #define __REGULATOR_CPR3_REGULATOR_H__ |
| 16 | |
| 17 | #include <linux/clk.h> |
| 18 | #include <linux/mutex.h> |
| 19 | #include <linux/of.h> |
| 20 | #include <linux/platform_device.h> |
| 21 | #include <linux/types.h> |
| 22 | #include <linux/power/qcom/apm.h> |
| 23 | #include <linux/regulator/driver.h> |
| 24 | |
| 25 | struct cpr3_controller; |
| 26 | struct cpr3_thread; |
| 27 | |
| 28 | /** |
| 29 | * struct cpr3_fuse_param - defines one contiguous segment of a fuse parameter |
| 30 | * that is contained within a given row. |
| 31 | * @row: Fuse row number |
| 32 | * @bit_start: The first bit within the row of the fuse parameter segment |
| 33 | * @bit_end: The last bit within the row of the fuse parameter segment |
| 34 | * |
| 35 | * Each fuse row is 64 bits in length. bit_start and bit_end may take values |
| 36 | * from 0 to 63. bit_start must be less than or equal to bit_end. |
| 37 | */ |
| 38 | struct cpr3_fuse_param { |
| 39 | unsigned int row; |
| 40 | unsigned int bit_start; |
| 41 | unsigned int bit_end; |
| 42 | }; |
| 43 | |
| 44 | /* Each CPR3 sensor has 16 ring oscillators */ |
| 45 | #define CPR3_RO_COUNT 16 |
| 46 | |
| 47 | /* The maximum number of sensors that can be present on a single CPR loop. */ |
| 48 | #define CPR3_MAX_SENSOR_COUNT 256 |
| 49 | |
| 50 | /* This constant is used when allocating array printing buffers. */ |
| 51 | #define MAX_CHARS_PER_INT 10 |
| 52 | |
| 53 | /** |
| 54 | * struct cpr4_sdelta - CPR4 controller specific data structure for the sdelta |
| 55 | * adjustment table which is used to adjust the VDD supply |
| 56 | * voltage automatically based upon the temperature and/or |
| 57 | * the number of online CPU cores. |
| 58 | * @allow_core_count_adj: Core count adjustments are allowed. |
| 59 | * @allow_temp_adj: Temperature based adjustments are allowed. |
| 60 | * @max_core_count: Maximum number of cores considered for core count |
| 61 | * adjustment logic. |
| 62 | * @temp_band_count: Number of temperature bands considered for temperature |
| 63 | * based adjustment logic. |
| 64 | * @cap_volt: CAP in uV to apply to SDELTA margins with multiple |
| 65 | * cpr3-regulators defined for single controller. |
| 66 | * @table: SDELTA table with per-online-core and temperature based |
| 67 | * adjustments of size (max_core_count * temp_band_count) |
| 68 | * Outer: core count |
| 69 | * Inner: temperature band |
| 70 | * Each element has units of VDD supply steps. Positive |
| 71 | * values correspond to a reduction in voltage and negative |
| 72 | * value correspond to an increase (this follows the SDELTA |
| 73 | * register semantics). |
| 74 | * @allow_boost: Voltage boost allowed. |
| 75 | * @boost_num_cores: The number of online cores at which the boost voltage |
| 76 | * adjustments will be applied |
| 77 | * @boost_table: SDELTA table with boost voltage adjustments of size |
| 78 | * temp_band_count. Each element has units of VDD supply |
| 79 | * steps. Positive values correspond to a reduction in |
| 80 | * voltage and negative value correspond to an increase |
| 81 | * (this follows the SDELTA register semantics). |
| 82 | */ |
| 83 | struct cpr4_sdelta { |
| 84 | bool allow_core_count_adj; |
| 85 | bool allow_temp_adj; |
| 86 | int max_core_count; |
| 87 | int temp_band_count; |
| 88 | int cap_volt; |
| 89 | int *table; |
| 90 | bool allow_boost; |
| 91 | int boost_num_cores; |
| 92 | int *boost_table; |
| 93 | }; |
| 94 | |
| 95 | /** |
| 96 | * struct cpr3_corner - CPR3 virtual voltage corner data structure |
| 97 | * @floor_volt: CPR closed-loop floor voltage in microvolts |
| 98 | * @ceiling_volt: CPR closed-loop ceiling voltage in microvolts |
| 99 | * @open_loop_volt: CPR open-loop voltage (i.e. initial voltage) in |
| 100 | * microvolts |
| 101 | * @last_volt: Last known settled CPR closed-loop voltage which is used |
| 102 | * when switching to a new corner |
| 103 | * @abs_ceiling_volt: The absolute CPR closed-loop ceiling voltage in |
| 104 | * microvolts. This is used to limit the ceiling_volt |
| 105 | * value when it is increased as a result of aging |
| 106 | * adjustment. |
| 107 | * @unaged_floor_volt: The CPR closed-loop floor voltage in microvolts before |
| 108 | * any aging adjustment is performed |
| 109 | * @unaged_ceiling_volt: The CPR closed-loop ceiling voltage in microvolts |
| 110 | * before any aging adjustment is performed |
| 111 | * @unaged_open_loop_volt: The CPR open-loop voltage (i.e. initial voltage) in |
| 112 | * microvolts before any aging adjusment is performed |
| 113 | * @system_volt: The system-supply voltage in microvolts or corners or |
| 114 | * levels |
| 115 | * @mem_acc_volt: The mem-acc-supply voltage in corners |
| 116 | * @proc_freq: Processor frequency in Hertz. For CPR rev. 3 and 4 |
| 117 | * conrollers, this field is only used by platform specific |
| 118 | * CPR3 driver for interpolation. For CPRh-compliant |
| 119 | * controllers, this frequency is also utilized by the |
| 120 | * clock driver to determine the corner to CPU clock |
| 121 | * frequency mappings. |
| 122 | * @cpr_fuse_corner: Fused corner index associated with this virtual corner |
| 123 | * (only used by platform specific CPR3 driver for |
| 124 | * mapping purposes) |
| 125 | * @target_quot: Array of target quotient values to use for each ring |
| 126 | * oscillator (RO) for this corner. A value of 0 should be |
| 127 | * specified as the target quotient for each RO that is |
| 128 | * unused by this corner. |
| 129 | * @ro_scale: Array of CPR ring oscillator (RO) scaling factors. The |
| 130 | * scaling factor for each RO is defined from RO0 to RO15 |
| 131 | * with units of QUOT/V. A value of 0 may be specified for |
| 132 | * an RO that is unused. |
| 133 | * @ro_mask: Bitmap where each of the 16 LSBs indicate if the |
| 134 | * corresponding ROs should be masked for this corner |
| 135 | * @irq_en: Bitmap of the CPR interrupts to enable for this corner |
| 136 | * @aging_derate: The amount to derate the aging voltage adjustment |
| 137 | * determined for the reference corner in units of uV/mV. |
| 138 | * E.g. a value of 900 would imply that the adjustment for |
| 139 | * this corner should be 90% (900/1000) of that for the |
| 140 | * reference corner. |
| 141 | * @use_open_loop: Boolean indicating that open-loop (i.e CPR disabled) as |
| 142 | * opposed to closed-loop operation must be used for this |
| 143 | * corner on CPRh controllers. |
| 144 | * @ldo_mode_allowed: Boolean which indicates if LDO mode is allowed for this |
| 145 | * corner. This field is applicable for CPR4 controllers |
| 146 | * that manage LDO300 supply regulator. |
| 147 | * @sdelta: The CPR4 controller specific data for this corner. This |
| 148 | * field is applicable for CPR4 controllers. |
| 149 | * |
| 150 | * The value of last_volt is initialized inside of the cpr3_regulator_register() |
| 151 | * call with the open_loop_volt value. It can later be updated to the settled |
| 152 | * VDD supply voltage. The values for unaged_floor_volt, unaged_ceiling_volt, |
| 153 | * and unaged_open_loop_volt are initialized inside of cpr3_regulator_register() |
| 154 | * if ctrl->aging_required == true. These three values must be pre-initialized |
| 155 | * if cpr3_regulator_register() is called with ctrl->aging_required == false and |
| 156 | * ctrl->aging_succeeded == true. |
| 157 | * |
| 158 | * The values of ro_mask and irq_en are initialized inside of the |
| 159 | * cpr3_regulator_register() call. |
| 160 | */ |
| 161 | struct cpr3_corner { |
| 162 | int floor_volt; |
| 163 | int ceiling_volt; |
| 164 | int open_loop_volt; |
| 165 | int last_volt; |
| 166 | int abs_ceiling_volt; |
| 167 | int unaged_floor_volt; |
| 168 | int unaged_ceiling_volt; |
| 169 | int unaged_open_loop_volt; |
| 170 | int system_volt; |
| 171 | int mem_acc_volt; |
| 172 | u32 proc_freq; |
| 173 | int cpr_fuse_corner; |
| 174 | u32 target_quot[CPR3_RO_COUNT]; |
| 175 | u32 ro_scale[CPR3_RO_COUNT]; |
| 176 | u32 ro_mask; |
| 177 | u32 irq_en; |
| 178 | int aging_derate; |
| 179 | bool use_open_loop; |
| 180 | bool ldo_mode_allowed; |
| 181 | struct cpr4_sdelta *sdelta; |
| 182 | }; |
| 183 | |
| 184 | /** |
| 185 | * struct cprh_corner_band - CPRh controller specific data structure which |
| 186 | * encapsulates the range of corners and the SDELTA |
| 187 | * adjustment table to be applied to the corners within |
| 188 | * the min and max bounds of the corner band. |
| 189 | * @corner: Corner number which defines the corner band boundary |
| 190 | * @sdelta: The SDELTA adjustment table which contains core-count |
| 191 | * and temp based margin adjustments that are applicable |
| 192 | * to the corner band. |
| 193 | */ |
| 194 | struct cprh_corner_band { |
| 195 | int corner; |
| 196 | struct cpr4_sdelta *sdelta; |
| 197 | }; |
| 198 | |
| 199 | /** |
| 200 | * enum cpr3_ldo_type - Constants which define the LDO supply regulator |
| 201 | * types used to manage the subsystem component rail voltage. |
| 202 | * %CPR3_LDO_KRYO: Kryo LDO regulator used to sub-regulate the HMSS |
| 203 | * per-cluster voltage. |
| 204 | * %CPR3_LDO300: LDO regulator used to sub-regulate the GFX voltage. |
| 205 | */ |
| 206 | enum cpr3_ldo_type { |
| 207 | CPR3_LDO_KRYO = 0, |
| 208 | CPR3_LDO300 = 1, |
| 209 | }; |
| 210 | |
| 211 | /** |
| 212 | * struct cpr3_regulator - CPR3 logical regulator instance associated with a |
| 213 | * given CPR3 hardware thread |
| 214 | * @of_node: Device node associated with the device tree child node |
| 215 | * of this CPR3 regulator |
| 216 | * @thread: Pointer to the CPR3 thread which manages this CPR3 |
| 217 | * regulator |
| 218 | * @name: Unique name for this CPR3 regulator which is filled |
| 219 | * using the device tree regulator-name property |
| 220 | * @rdesc: Regulator description for this CPR3 regulator |
| 221 | * @rdev: Regulator device pointer for the regulator registered |
| 222 | * for this CPR3 regulator |
| 223 | * @mem_acc_regulator: Pointer to the optional mem-acc supply regulator used |
| 224 | * to manage memory circuitry settings based upon CPR3 |
| 225 | * regulator output voltage. |
| 226 | * @ldo_regulator: Pointer to the LDO supply regulator used to manage |
| 227 | * per-cluster LDO voltage and bypass state |
| 228 | * @ldo_regulator_bypass: Cached copy of the LDO regulator bypass state |
| 229 | * @ldo_ret_regulator: Pointer to the LDO retention supply regulator used to |
| 230 | * manage LDO retention bypass state |
| 231 | * @corner: Array of all corners supported by this CPR3 regulator |
| 232 | * @corner_count: The number of elements in the corner array |
| 233 | * @corner_band: Array of all corner bands supported by CPRh compatible |
| 234 | * controllers |
| 235 | * @corner_band_count: The number of elements in the corner band array |
| 236 | * @platform_fuses: Pointer to platform specific CPR fuse data (only used by |
| 237 | * platform specific CPR3 driver) |
| 238 | * @speed_bin_fuse: Value read from the speed bin fuse parameter |
| 239 | * @speed_bins_supported: The number of speed bins supported by the device tree |
| 240 | * configuration for this CPR3 regulator |
| 241 | * @cpr_rev_fuse: Value read from the CPR fusing revision fuse parameter |
| 242 | * @fuse_combo: Platform specific enum value identifying the specific |
| 243 | * combination of fuse values found on a given chip |
| 244 | * @fuse_combos_supported: The number of fuse combinations supported by the |
| 245 | * device tree configuration for this CPR3 regulator |
| 246 | * @fuse_corner_count: Number of corners defined by fuse parameters |
| 247 | * @fuse_corner_map: Array of length fuse_corner_count which specifies the |
| 248 | * highest corner associated with each fuse corner. Note |
| 249 | * that each element must correspond to a valid corner |
| 250 | * and that element values must be strictly increasing. |
| 251 | * Also, it is acceptable for the lowest fuse corner to map |
| 252 | * to a corner other than the lowest. Likewise, it is |
| 253 | * acceptable for the highest fuse corner to map to a |
| 254 | * corner other than the highest. |
| 255 | * @fuse_combo_corner_sum: The sum of the corner counts across all fuse combos |
| 256 | * @fuse_combo_offset: The device tree property array offset for the selected |
| 257 | * fuse combo |
| 258 | * @speed_bin_corner_sum: The sum of the corner counts across all speed bins |
| 259 | * This may be specified as 0 if per speed bin parsing |
| 260 | * support is not required. |
| 261 | * @speed_bin_offset: The device tree property array offset for the selected |
| 262 | * speed bin |
| 263 | * @fuse_combo_corner_band_sum: The sum of the corner band counts across all |
| 264 | * fuse combos |
| 265 | * @fuse_combo_corner_band_offset: The device tree property array offset for |
| 266 | * the corner band count corresponding to the selected |
| 267 | * fuse combo |
| 268 | * @speed_bin_corner_band_sum: The sum of the corner band counts across all |
| 269 | * speed bins. This may be specified as 0 if per speed bin |
| 270 | * parsing support is not required |
| 271 | * @speed_bin_corner_band_offset: The device tree property array offset for the |
| 272 | * corner band count corresponding to the selected speed |
| 273 | * bin |
| 274 | * @pd_bypass_mask: Bit mask of power domains associated with this CPR3 |
| 275 | * regulator |
| 276 | * @dynamic_floor_corner: Index identifying the voltage corner for the CPR3 |
| 277 | * regulator whose last_volt value should be used as the |
| 278 | * global CPR floor voltage if all of the power domains |
| 279 | * associated with this CPR3 regulator are bypassed |
| 280 | * @uses_dynamic_floor: Boolean flag indicating that dynamic_floor_corner should |
| 281 | * be utilized for the CPR3 regulator |
| 282 | * @current_corner: Index identifying the currently selected voltage corner |
| 283 | * for the CPR3 regulator or less than 0 if no corner has |
| 284 | * been requested |
| 285 | * @last_closed_loop_corner: Index identifying the last voltage corner for the |
| 286 | * CPR3 regulator which was configured when operating in |
| 287 | * CPR closed-loop mode or less than 0 if no corner has |
| 288 | * been requested. CPR registers are only written to when |
| 289 | * using closed-loop mode. |
| 290 | * @aggregated: Boolean flag indicating that this CPR3 regulator |
| 291 | * participated in the last aggregation event |
| 292 | * @debug_corner: Index identifying voltage corner used for displaying |
| 293 | * corner configuration values in debugfs |
| 294 | * @ldo_type: LDO regulator type. |
| 295 | * @ldo_min_headroom_volt: Minimum voltage difference in microvolts required |
| 296 | * between the VDD supply voltage and the LDO output in |
| 297 | * order for the LDO operate |
| 298 | * @ldo_max_headroom_volt: Maximum voltage difference in microvolts between |
| 299 | * the input and output of the active LDO hardware to |
| 300 | * maintain optimum operability. |
| 301 | * @ldo_adjust_volt: Voltage in microvolts used to offset margin assigned |
| 302 | * to IR drop between PMIC and CPU |
| 303 | * @ldo_ret_volt: The lowest supported CPU retention voltage in |
| 304 | * microvolts. This voltage may vary part-to-part based |
| 305 | * upon the value of hardware fuses. |
| 306 | * @ldo_max_volt: The maximum physically supported LDO voltage in |
| 307 | * microvolts |
| 308 | * @ldo_mode_allowed: Boolean which indicates if LDO mode is allowed for this |
| 309 | * CPR3 regulator |
| 310 | * @vreg_enabled: Boolean defining the enable state of the CPR3 |
| 311 | * regulator's regulator within the regulator framework. |
| 312 | * @aging_allowed: Boolean defining if CPR aging adjustments are allowed |
| 313 | * for this CPR3 regulator given the fuse combo of the |
| 314 | * device |
| 315 | * @aging_allow_open_loop_adj: Boolean defining if the open-loop voltage of each |
| 316 | * corner of this regulator should be adjusted as a result |
| 317 | * of an aging measurement. This flag can be set to false |
| 318 | * when the open-loop voltage adjustments have been |
| 319 | * specified such that they include the maximum possible |
| 320 | * aging adjustment. This flag is only used if |
| 321 | * aging_allowed == true. |
| 322 | * @aging_corner: The corner that should be configured for this regulator |
| 323 | * when an aging measurement is performed. |
| 324 | * @aging_max_adjust_volt: The maximum aging voltage margin in microvolts that |
| 325 | * may be added to the target quotients of this regulator. |
| 326 | * A value of 0 may be specified if this regulator does not |
| 327 | * require any aging adjustment. |
| 328 | * @allow_core_count_adj: Core count adjustments are allowed for this regulator. |
| 329 | * @allow_temp_adj: Temperature based adjustments are allowed for this |
| 330 | * regulator. |
| 331 | * @max_core_count: Maximum number of cores considered for core count |
| 332 | * adjustment logic. |
| 333 | * @allow_boost: Voltage boost allowed for this regulator. |
| 334 | * |
| 335 | * This structure contains both configuration and runtime state data. The |
| 336 | * elements current_corner, last_closed_loop_corner, aggregated, debug_corner, |
| 337 | * ldo_mode_allowed, and vreg_enabled are state variables. |
| 338 | */ |
| 339 | struct cpr3_regulator { |
| 340 | struct device_node *of_node; |
| 341 | struct cpr3_thread *thread; |
| 342 | const char *name; |
| 343 | struct regulator_desc rdesc; |
| 344 | struct regulator_dev *rdev; |
| 345 | struct regulator *mem_acc_regulator; |
| 346 | struct regulator *ldo_regulator; |
| 347 | bool ldo_regulator_bypass; |
| 348 | struct regulator *ldo_ret_regulator; |
| 349 | struct cpr3_corner *corner; |
| 350 | int corner_count; |
| 351 | struct cprh_corner_band *corner_band; |
| 352 | u32 corner_band_count; |
| 353 | |
| 354 | void *platform_fuses; |
| 355 | int speed_bin_fuse; |
| 356 | int speed_bins_supported; |
| 357 | int cpr_rev_fuse; |
| 358 | int fuse_combo; |
| 359 | int fuse_combos_supported; |
| 360 | int fuse_corner_count; |
| 361 | int *fuse_corner_map; |
| 362 | int fuse_combo_corner_sum; |
| 363 | int fuse_combo_offset; |
| 364 | int speed_bin_corner_sum; |
| 365 | int speed_bin_offset; |
| 366 | int fuse_combo_corner_band_sum; |
| 367 | int fuse_combo_corner_band_offset; |
| 368 | int speed_bin_corner_band_sum; |
| 369 | int speed_bin_corner_band_offset; |
| 370 | u32 pd_bypass_mask; |
| 371 | int dynamic_floor_corner; |
| 372 | bool uses_dynamic_floor; |
| 373 | |
| 374 | int current_corner; |
| 375 | int last_closed_loop_corner; |
| 376 | bool aggregated; |
| 377 | int debug_corner; |
| 378 | enum cpr3_ldo_type ldo_type; |
| 379 | int ldo_min_headroom_volt; |
| 380 | int ldo_max_headroom_volt; |
| 381 | int ldo_adjust_volt; |
| 382 | int ldo_ret_volt; |
| 383 | int ldo_max_volt; |
| 384 | bool ldo_mode_allowed; |
| 385 | bool vreg_enabled; |
| 386 | |
| 387 | bool aging_allowed; |
| 388 | bool aging_allow_open_loop_adj; |
| 389 | int aging_corner; |
| 390 | int aging_max_adjust_volt; |
| 391 | |
| 392 | bool allow_core_count_adj; |
| 393 | bool allow_temp_adj; |
| 394 | int max_core_count; |
| 395 | bool allow_boost; |
| 396 | }; |
| 397 | |
| 398 | /** |
| 399 | * struct cpr3_thread - CPR3 hardware thread data structure |
| 400 | * @thread_id: Hardware thread ID |
| 401 | * @of_node: Device node associated with the device tree child node |
| 402 | * of this CPR3 thread |
| 403 | * @ctrl: Pointer to the CPR3 controller which manages this thread |
| 404 | * @vreg: Array of CPR3 regulators handled by the CPR3 thread |
| 405 | * @vreg_count: Number of elements in the vreg array |
| 406 | * @aggr_corner: CPR corner containing the in process aggregated voltage |
| 407 | * and target quotient configurations which will be applied |
| 408 | * @last_closed_loop_aggr_corner: CPR corner containing the most recent |
| 409 | * configurations which were written into hardware |
| 410 | * registers when operating in closed loop mode (i.e. with |
| 411 | * CPR enabled) |
| 412 | * @consecutive_up: The number of consecutive CPR step up events needed to |
| 413 | * to trigger an up interrupt |
| 414 | * @consecutive_down: The number of consecutive CPR step down events needed to |
| 415 | * to trigger a down interrupt |
| 416 | * @up_threshold: The number CPR error steps required to generate an up |
| 417 | * event |
| 418 | * @down_threshold: The number CPR error steps required to generate a down |
| 419 | * event |
| 420 | * |
| 421 | * This structure contains both configuration and runtime state data. The |
| 422 | * elements aggr_corner and last_closed_loop_aggr_corner are state variables. |
| 423 | */ |
| 424 | struct cpr3_thread { |
| 425 | u32 thread_id; |
| 426 | struct device_node *of_node; |
| 427 | struct cpr3_controller *ctrl; |
| 428 | struct cpr3_regulator *vreg; |
| 429 | int vreg_count; |
| 430 | struct cpr3_corner aggr_corner; |
| 431 | struct cpr3_corner last_closed_loop_aggr_corner; |
| 432 | |
| 433 | u32 consecutive_up; |
| 434 | u32 consecutive_down; |
| 435 | u32 up_threshold; |
| 436 | u32 down_threshold; |
| 437 | }; |
| 438 | |
| 439 | /* Per CPR controller data */ |
| 440 | /** |
| 441 | * enum cpr3_mem_acc_corners - Constants which define the number of mem-acc |
| 442 | * regulator corners available in the mem-acc corner map array. |
| 443 | * %CPR3_MEM_ACC_LOW_CORNER: Index in mem-acc corner map array mapping to the |
| 444 | * mem-acc regulator corner |
| 445 | * to be used for low voltage vdd supply |
| 446 | * %CPR3_MEM_ACC_HIGH_CORNER: Index in mem-acc corner map array mapping to the |
| 447 | * mem-acc regulator corner to be used for high |
| 448 | * voltage vdd supply |
| 449 | * %CPR3_MEM_ACC_CORNERS: Number of elements in the mem-acc corner map |
| 450 | * array |
| 451 | */ |
| 452 | enum cpr3_mem_acc_corners { |
| 453 | CPR3_MEM_ACC_LOW_CORNER = 0, |
| 454 | CPR3_MEM_ACC_HIGH_CORNER = 1, |
| 455 | CPR3_MEM_ACC_CORNERS = 2, |
| 456 | }; |
| 457 | |
| 458 | /** |
| 459 | * enum cpr3_count_mode - CPR3 controller count mode which defines the |
| 460 | * method that CPR sensor data is acquired |
| 461 | * %CPR3_COUNT_MODE_ALL_AT_ONCE_MIN: Capture all CPR sensor readings |
| 462 | * simultaneously and report the minimum |
| 463 | * value seen in successive measurements |
| 464 | * %CPR3_COUNT_MODE_ALL_AT_ONCE_MAX: Capture all CPR sensor readings |
| 465 | * simultaneously and report the maximum |
| 466 | * value seen in successive measurements |
| 467 | * %CPR3_COUNT_MODE_STAGGERED: Read one sensor at a time in a |
| 468 | * sequential fashion |
| 469 | * %CPR3_COUNT_MODE_ALL_AT_ONCE_AGE: Capture all CPR aging sensor readings |
| 470 | * simultaneously. |
| 471 | */ |
| 472 | enum cpr3_count_mode { |
| 473 | CPR3_COUNT_MODE_ALL_AT_ONCE_MIN = 0, |
| 474 | CPR3_COUNT_MODE_ALL_AT_ONCE_MAX = 1, |
| 475 | CPR3_COUNT_MODE_STAGGERED = 2, |
| 476 | CPR3_COUNT_MODE_ALL_AT_ONCE_AGE = 3, |
| 477 | }; |
| 478 | |
| 479 | /** |
| 480 | * enum cpr_controller_type - supported CPR controller hardware types |
| 481 | * %CPR_CTRL_TYPE_CPR3: HW has CPR3 controller |
| 482 | * %CPR_CTRL_TYPE_CPR4: HW has CPR4 controller |
| 483 | * %CPR_CTRL_TYPE_CPRH: HW has CPRh controller |
| 484 | */ |
| 485 | enum cpr_controller_type { |
| 486 | CPR_CTRL_TYPE_CPR3, |
| 487 | CPR_CTRL_TYPE_CPR4, |
| 488 | CPR_CTRL_TYPE_CPRH, |
| 489 | }; |
| 490 | |
| 491 | /** |
| 492 | * struct cpr3_aging_sensor_info - CPR3 aging sensor information |
| 493 | * @sensor_id The index of the CPR3 sensor to be used in the aging |
| 494 | * measurement. |
| 495 | * @ro_scale The CPR ring oscillator (RO) scaling factor for the |
| 496 | * aging sensor with units of QUOT/V. |
| 497 | * @init_quot_diff: The fused quotient difference between aged and un-aged |
| 498 | * paths that was measured at manufacturing time. |
| 499 | * @measured_quot_diff: The quotient difference measured at runtime. |
| 500 | * @bypass_mask: Bit mask of the CPR sensors that must be bypassed during |
| 501 | * the aging measurement for this sensor |
| 502 | * |
| 503 | * This structure contains both configuration and runtime state data. The |
| 504 | * element measured_quot_diff is a state variable. |
| 505 | */ |
| 506 | struct cpr3_aging_sensor_info { |
| 507 | u32 sensor_id; |
| 508 | u32 ro_scale; |
| 509 | int init_quot_diff; |
| 510 | int measured_quot_diff; |
| 511 | u32 bypass_mask[CPR3_MAX_SENSOR_COUNT / 32]; |
| 512 | }; |
| 513 | |
| 514 | /** |
| 515 | * struct cpr3_reg_info - Register information data structure |
| 516 | * @name: Register name |
| 517 | * @addr: Register physical address |
| 518 | * @value: Register content |
| 519 | * @virt_addr: Register virtual address |
| 520 | * |
| 521 | * This data structure is used to dump some critical register contents |
| 522 | * when the device crashes due to a kernel panic. |
| 523 | */ |
| 524 | struct cpr3_reg_info { |
| 525 | const char *name; |
| 526 | u32 addr; |
| 527 | u32 value; |
| 528 | void __iomem *virt_addr; |
| 529 | }; |
| 530 | |
| 531 | /** |
| 532 | * struct cpr3_panic_regs_info - Data structure to dump critical register |
| 533 | * contents. |
| 534 | * @reg_count: Number of elements in the regs array |
| 535 | * @regs: Array of critical registers information |
| 536 | * |
| 537 | * This data structure is used to dump critical register contents when |
| 538 | * the device crashes due to a kernel panic. |
| 539 | */ |
| 540 | struct cpr3_panic_regs_info { |
| 541 | int reg_count; |
| 542 | struct cpr3_reg_info *regs; |
| 543 | }; |
| 544 | |
| 545 | /** |
| 546 | * struct cpr3_controller - CPR3 controller data structure |
| 547 | * @dev: Device pointer for the CPR3 controller device |
| 548 | * @name: Unique name for the CPR3 controller |
| 549 | * @ctrl_id: Controller ID corresponding to the VDD supply number |
| 550 | * that this CPR3 controller manages. |
| 551 | * @cpr_ctrl_base: Virtual address of the CPR3 controller base register |
| 552 | * @fuse_base: Virtual address of fuse row 0 |
David Collins | 54f78b7 | 2017-02-24 11:18:57 -0800 | [diff] [blame] | 553 | * @saw_base: Virtual address of the SAW module base register. This |
| 554 | * is used for CPR controllers that support HW closed-loop |
| 555 | * on platforms which lack an SPM. |
David Collins | 7370f1a | 2017-01-18 16:21:53 -0800 | [diff] [blame] | 556 | * @aging_possible_reg: Virtual address of an optional platform-specific |
| 557 | * register that must be ready to determine if it is |
| 558 | * possible to perform an aging measurement. |
| 559 | * @list: list head used in a global cpr3-regulator list so that |
| 560 | * cpr3-regulator structs can be found easily in RAM dumps |
| 561 | * @thread: Array of CPR3 threads managed by the CPR3 controller |
| 562 | * @thread_count: Number of elements in the thread array |
| 563 | * @sensor_owner: Array of thread IDs indicating which thread owns a given |
| 564 | * CPR sensor |
| 565 | * @sensor_count: The number of CPR sensors found on the CPR loop managed |
| 566 | * by this CPR controller. Must be equal to the number of |
| 567 | * elements in the sensor_owner array |
| 568 | * @soc_revision: Revision number of the SoC. This may be unused by |
| 569 | * platforms that do not have different behavior for |
| 570 | * different SoC revisions. |
David Collins | 54f78b7 | 2017-02-24 11:18:57 -0800 | [diff] [blame] | 571 | * @cpr_hw_version: CPR controller version register value |
David Collins | 7370f1a | 2017-01-18 16:21:53 -0800 | [diff] [blame] | 572 | * @lock: Mutex lock used to ensure mutual exclusion between |
| 573 | * all of the threads associated with the controller |
| 574 | * @vdd_regulator: Pointer to the VDD supply regulator which this CPR3 |
| 575 | * controller manages |
| 576 | * @system_regulator: Pointer to the optional system-supply regulator upon |
| 577 | * which the VDD supply regulator depends. |
| 578 | * @mem_acc_regulator: Pointer to the optional mem-acc supply regulator used |
| 579 | * to manage memory circuitry settings based upon the |
| 580 | * VDD supply output voltage. |
| 581 | * @vdd_limit_regulator: Pointer to the VDD supply limit regulator which is used |
| 582 | * for hardware closed-loop in order specify ceiling and |
| 583 | * floor voltage limits (platform specific) |
| 584 | * @system_supply_max_volt: Voltage in microvolts which corresponds to the |
| 585 | * absolute ceiling voltage of the system-supply |
| 586 | * @mem_acc_threshold_volt: mem-acc threshold voltage in microvolts |
| 587 | * @mem_acc_corner_map: mem-acc regulator corners mapping to low and high |
| 588 | * voltage mem-acc settings for the memories powered by |
| 589 | * this CPR3 controller and its associated CPR3 regulators |
| 590 | * @mem_acc_crossover_volt: Voltage in microvolts corresponding to the voltage |
| 591 | * that the VDD supply must be set to while a MEM ACC |
| 592 | * switch is in progress. This element must be initialized |
| 593 | * for CPRh controllers when a MEM ACC threshold voltage is |
| 594 | * defined. |
| 595 | * @core_clk: Pointer to the CPR3 controller core clock |
| 596 | * @iface_clk: Pointer to the CPR3 interface clock (platform specific) |
| 597 | * @bus_clk: Pointer to the CPR3 bus clock (platform specific) |
| 598 | * @irq: CPR interrupt number |
| 599 | * @irq_affinity_mask: The cpumask for the CPUs which the CPR interrupt should |
| 600 | * have affinity for |
| 601 | * @cpu_hotplug_notifier: CPU hotplug notifier used to reset IRQ affinity when a |
| 602 | * CPU is brought back online |
| 603 | * @ceiling_irq: Interrupt number for the interrupt that is triggered |
| 604 | * when hardware closed-loop attempts to exceed the ceiling |
| 605 | * voltage |
| 606 | * @apm: Handle to the array power mux (APM) |
| 607 | * @apm_threshold_volt: Voltage in microvolts which defines the threshold |
| 608 | * voltage to determine the APM supply selection for |
| 609 | * each corner |
| 610 | * @apm_crossover_volt: Voltage in microvolts corresponding to the voltage that |
| 611 | * the VDD supply must be set to while an APM switch is in |
| 612 | * progress. This element must be initialized for CPRh |
| 613 | * controllers when an APM threshold voltage is defined |
| 614 | * @apm_adj_volt: Minimum difference between APM threshold voltage and |
| 615 | * open-loop voltage which allows the APM threshold voltage |
| 616 | * to be used as a ceiling |
| 617 | * @apm_high_supply: APM supply to configure if VDD voltage is greater than |
| 618 | * or equal to the APM threshold voltage |
| 619 | * @apm_low_supply: APM supply to configure if the VDD voltage is less than |
| 620 | * the APM threshold voltage |
| 621 | * @base_volt: Minimum voltage in microvolts supported by the VDD |
| 622 | * supply managed by this CPR controller |
| 623 | * @corner_switch_delay_time: The delay time in nanoseconds used by the CPR |
| 624 | * controller to wait for voltage settling before |
| 625 | * acknowledging the OSM block after corner changes |
| 626 | * @cpr_clock_rate: CPR reference clock frequency in Hz. |
| 627 | * @sensor_time: The time in nanoseconds that each sensor takes to |
| 628 | * perform a measurement. |
| 629 | * @loop_time: The time in nanoseconds between consecutive CPR |
| 630 | * measurements. |
| 631 | * @up_down_delay_time: The time to delay in nanoseconds between consecutive CPR |
| 632 | * measurements when the last measurement recommended |
| 633 | * increasing or decreasing the vdd-supply voltage. |
| 634 | * (platform specific) |
| 635 | * @idle_clocks: Number of CPR reference clock ticks that the CPR |
| 636 | * controller waits in transitional states. |
| 637 | * @step_quot_init_min: The default minimum CPR step quotient value. The step |
| 638 | * quotient is the number of additional ring oscillator |
| 639 | * ticks observed when increasing one step in vdd-supply |
| 640 | * output voltage. |
| 641 | * @step_quot_init_max: The default maximum CPR step quotient value. |
| 642 | * @step_volt: Step size in microvolts between available set points |
| 643 | * of the VDD supply |
| 644 | * @down_error_step_limit: CPR4 hardware closed-loop down error step limit which |
| 645 | * defines the maximum number of VDD supply regulator steps |
| 646 | * that the voltage may be reduced as the result of a |
| 647 | * single CPR measurement. |
| 648 | * @up_error_step_limit: CPR4 hardware closed-loop up error step limit which |
| 649 | * defines the maximum number of VDD supply regulator steps |
| 650 | * that the voltage may be increased as the result of a |
| 651 | * single CPR measurement. |
Osvaldo Banuelos | d688dded | 2017-03-22 13:35:46 -0700 | [diff] [blame] | 652 | * @acd_adj_down_step_limit: Limits the number of PMIC steps to go down within |
| 653 | * a given corner due to all ACD adjustments on some CPRh |
| 654 | * controllers. |
| 655 | * @acd_adj_up_step_limit: Limits the number of PMIC steps to go up within a |
| 656 | * given corner due to all ACD adjustments on some CPRh |
| 657 | * controllers. |
| 658 | * @acd_adj_down_step_size: ACD step size in units of PMIC steps used for |
| 659 | * target quotient adjustment due to an ACD down |
| 660 | * recommendation. |
| 661 | * @acd_adj_up_step_size: ACD step size in units of PMIC steps used for |
| 662 | * target quotient adjustment due to an ACD up |
| 663 | * recommendation. |
Osvaldo Banuelos | 3bdabd0 | 2017-03-22 13:39:39 -0700 | [diff] [blame] | 664 | * @acd_notwait_for_cl_settled: Boolean which indicates ACD down recommendations |
| 665 | * do not need to wait for CPR closed-loop to settle. |
| 666 | * @acd_adj_avg_fast_update: Boolean which indicates if CPR should issue |
| 667 | * immediate voltage updates on ACD requests. |
Osvaldo Banuelos | d688dded | 2017-03-22 13:35:46 -0700 | [diff] [blame] | 668 | * @acd_avg_enabled: Boolean defining the enable state of the ACD AVG |
| 669 | * feature. |
David Collins | 7370f1a | 2017-01-18 16:21:53 -0800 | [diff] [blame] | 670 | * @count_mode: CPR controller count mode |
| 671 | * @count_repeat: Number of times to perform consecutive sensor |
| 672 | * measurements when using all-at-once count modes. |
| 673 | * @proc_clock_throttle: Defines the processor clock frequency throttling |
| 674 | * register value to use. This can be used to reduce the |
| 675 | * clock frequency when a power domain exits a low power |
| 676 | * mode until CPR settles at a new voltage. |
| 677 | * (platform specific) |
| 678 | * @cpr_allowed_hw: Boolean which indicates if closed-loop CPR operation is |
| 679 | * permitted for a given chip based upon hardware fuse |
| 680 | * values |
| 681 | * @cpr_allowed_sw: Boolean which indicates if closed-loop CPR operation is |
| 682 | * permitted based upon software policies |
| 683 | * @supports_hw_closed_loop: Boolean which indicates if this CPR3/4 controller |
| 684 | * physically supports hardware closed-loop CPR operation |
| 685 | * @use_hw_closed_loop: Boolean which indicates that this controller will be |
| 686 | * using hardware closed-loop operation in place of |
| 687 | * software closed-loop operation. |
| 688 | * @ctrl_type: CPR controller type |
| 689 | * @saw_use_unit_mV: Boolean which indicates the unit used in SAW PVC |
| 690 | * interface is mV. |
| 691 | * @aggr_corner: CPR corner containing the most recently aggregated |
| 692 | * voltage configurations which are being used currently |
| 693 | * @cpr_enabled: Boolean which indicates that the CPR controller is |
| 694 | * enabled and operating in closed-loop mode. CPR clocks |
| 695 | * have been prepared and enabled whenever this flag is |
| 696 | * true. |
| 697 | * @last_corner_was_closed_loop: Boolean indicating if the last known corners |
| 698 | * were updated during closed loop operation. |
| 699 | * @cpr_suspended: Boolean which indicates that CPR has been temporarily |
| 700 | * disabled while enterring system suspend. |
| 701 | * @debugfs: Pointer to the debugfs directory of this CPR3 controller |
| 702 | * @aging_ref_volt: Reference voltage in microvolts to configure when |
| 703 | * performing CPR aging measurements. |
| 704 | * @aging_vdd_mode: vdd-supply regulator mode to configure before performing |
| 705 | * a CPR aging measurement. It should be one of |
| 706 | * REGULATOR_MODE_*. |
| 707 | * @aging_complete_vdd_mode: vdd-supply regulator mode to configure after |
| 708 | * performing a CPR aging measurement. It should be one of |
| 709 | * REGULATOR_MODE_*. |
| 710 | * @aging_ref_adjust_volt: The reference aging voltage margin in microvolts that |
| 711 | * should be added to the target quotients of the |
| 712 | * regulators managed by this controller after derating. |
| 713 | * @aging_required: Flag which indicates that a CPR aging measurement still |
| 714 | * needs to be performed for this CPR3 controller. |
| 715 | * @aging_succeeded: Flag which indicates that a CPR aging measurement has |
| 716 | * completed successfully. |
| 717 | * @aging_failed: Flag which indicates that a CPR aging measurement has |
| 718 | * failed to complete successfully. |
| 719 | * @aging_sensor: Array of CPR3 aging sensors which are used to perform |
| 720 | * aging measurements at a runtime. |
| 721 | * @aging_sensor_count: Number of elements in the aging_sensor array |
| 722 | * @aging_possible_mask: Optional bitmask used to mask off the |
| 723 | * aging_possible_reg register. |
| 724 | * @aging_possible_val: Optional value that the masked aging_possible_reg |
| 725 | * register must have in order for a CPR aging measurement |
| 726 | * to be possible. |
David Collins | 044e9e7 | 2017-03-06 16:47:09 -0800 | [diff] [blame] | 727 | * @ignore_invalid_fuses: Flag which indicates that invalid fuse parameter |
| 728 | * values should be ignored. This is used on simulator |
| 729 | * targets which do not initialize fuse parameters. |
David Collins | 7370f1a | 2017-01-18 16:21:53 -0800 | [diff] [blame] | 730 | * @step_quot_fixed: Fixed step quotient value used for target quotient |
| 731 | * adjustment if use_dynamic_step_quot is not set. |
| 732 | * This parameter is only relevant for CPR4 controllers |
| 733 | * when using the per-online-core or per-temperature |
| 734 | * adjustments. |
| 735 | * @initial_temp_band: Temperature band used for calculation of base-line |
| 736 | * target quotients (fused). |
| 737 | * @use_dynamic_step_quot: Boolean value which indicates that margin adjustment |
| 738 | * of target quotient will be based on the step quotient |
| 739 | * calculated dynamically in hardware for each RO. |
| 740 | * @allow_core_count_adj: Core count adjustments are allowed for this controller |
| 741 | * @allow_temp_adj: Temperature based adjustments are allowed for |
| 742 | * this controller |
| 743 | * @allow_boost: Voltage boost allowed for this controller. |
| 744 | * @temp_band_count: Number of temperature bands used for temperature based |
| 745 | * adjustment logic |
| 746 | * @temp_points: Array of temperature points in decidegrees Celsius used |
| 747 | * to specify the ranges for selected temperature bands. |
| 748 | * The array must have (temp_band_count - 1) elements |
| 749 | * allocated. |
| 750 | * @temp_sensor_id_start: Start ID of temperature sensors used for temperature |
| 751 | * based adjustments. |
| 752 | * @temp_sensor_id_end: End ID of temperature sensors used for temperature |
| 753 | * based adjustments. |
| 754 | * @voltage_settling_time: The time in nanoseconds that it takes for the |
| 755 | * VDD supply voltage to settle after being increased or |
| 756 | * decreased by step_volt microvolts which is used when |
| 757 | * SDELTA voltage margin adjustments are applied. |
| 758 | * @panic_regs_info: Array of panic registers information which provides the |
| 759 | * list of registers to dump when the device crashes. |
| 760 | * @panic_notifier: Notifier block registered to global panic notifier list. |
| 761 | * @support_ldo300_vreg: Boolean value which indicates that this CPR controller |
| 762 | * manages an underlying LDO regulator of type LDO300. |
Tirupathi Reddy | 718bc80 | 2017-02-09 16:29:24 +0530 | [diff] [blame] | 763 | * @reset_step_quot_loop_en: Boolean value which indicates that this CPR |
| 764 | * controller should be configured to reset step_quot on |
| 765 | * each loop_en = 0 transition. This configuration allows |
| 766 | * the CPR controller to first use the default step_quot |
| 767 | * and then later switch to the run-time calibrated |
| 768 | * step_quot. |
Tirupathi Reddy | 2b798d6 | 2018-05-17 11:15:14 +0530 | [diff] [blame] | 769 | * @thread_has_always_vote_en: Boolean value which indicates that this CPR |
| 770 | * controller should be configured to keep thread vote |
| 771 | * always enabled. This configuration allows the CPR |
| 772 | * controller to not consider MID/DN recommendations from |
| 773 | * other thread when all sensors mapped to a thread |
| 774 | * collapsed. |
David Collins | 7370f1a | 2017-01-18 16:21:53 -0800 | [diff] [blame] | 775 | * |
| 776 | * This structure contains both configuration and runtime state data. The |
| 777 | * elements cpr_allowed_sw, use_hw_closed_loop, aggr_corner, cpr_enabled, |
| 778 | * last_corner_was_closed_loop, cpr_suspended, aging_ref_adjust_volt, |
| 779 | * aging_required, aging_succeeded, and aging_failed are state variables. |
| 780 | * |
| 781 | * The apm* elements do not need to be initialized if the VDD supply managed by |
| 782 | * the CPR3 controller does not utilize an APM. |
| 783 | * |
| 784 | * The elements step_quot_fixed, initial_temp_band, allow_core_count_adj, |
| 785 | * allow_temp_adj and temp* need to be initialized for CPR4 controllers which |
| 786 | * are using per-online-core or per-temperature adjustments. |
| 787 | */ |
| 788 | struct cpr3_controller { |
| 789 | struct device *dev; |
| 790 | const char *name; |
| 791 | int ctrl_id; |
| 792 | void __iomem *cpr_ctrl_base; |
| 793 | void __iomem *fuse_base; |
David Collins | 54f78b7 | 2017-02-24 11:18:57 -0800 | [diff] [blame] | 794 | void __iomem *saw_base; |
David Collins | 7370f1a | 2017-01-18 16:21:53 -0800 | [diff] [blame] | 795 | void __iomem *aging_possible_reg; |
| 796 | struct list_head list; |
| 797 | struct cpr3_thread *thread; |
| 798 | int thread_count; |
| 799 | u8 *sensor_owner; |
| 800 | int sensor_count; |
| 801 | int soc_revision; |
David Collins | 54f78b7 | 2017-02-24 11:18:57 -0800 | [diff] [blame] | 802 | u32 cpr_hw_version; |
David Collins | 7370f1a | 2017-01-18 16:21:53 -0800 | [diff] [blame] | 803 | struct mutex lock; |
| 804 | struct regulator *vdd_regulator; |
| 805 | struct regulator *system_regulator; |
| 806 | struct regulator *mem_acc_regulator; |
| 807 | struct regulator *vdd_limit_regulator; |
| 808 | int system_supply_max_volt; |
| 809 | int mem_acc_threshold_volt; |
| 810 | int mem_acc_corner_map[CPR3_MEM_ACC_CORNERS]; |
| 811 | int mem_acc_crossover_volt; |
| 812 | struct clk *core_clk; |
| 813 | struct clk *iface_clk; |
| 814 | struct clk *bus_clk; |
| 815 | int irq; |
| 816 | struct cpumask irq_affinity_mask; |
| 817 | struct notifier_block cpu_hotplug_notifier; |
| 818 | int ceiling_irq; |
| 819 | struct msm_apm_ctrl_dev *apm; |
| 820 | int apm_threshold_volt; |
| 821 | int apm_crossover_volt; |
| 822 | int apm_adj_volt; |
| 823 | enum msm_apm_supply apm_high_supply; |
| 824 | enum msm_apm_supply apm_low_supply; |
| 825 | int base_volt; |
| 826 | u32 corner_switch_delay_time; |
| 827 | u32 cpr_clock_rate; |
| 828 | u32 sensor_time; |
| 829 | u32 loop_time; |
| 830 | u32 up_down_delay_time; |
| 831 | u32 idle_clocks; |
| 832 | u32 step_quot_init_min; |
| 833 | u32 step_quot_init_max; |
| 834 | int step_volt; |
| 835 | u32 down_error_step_limit; |
| 836 | u32 up_error_step_limit; |
Osvaldo Banuelos | d688dded | 2017-03-22 13:35:46 -0700 | [diff] [blame] | 837 | u32 acd_adj_down_step_limit; |
| 838 | u32 acd_adj_up_step_limit; |
| 839 | u32 acd_adj_down_step_size; |
| 840 | u32 acd_adj_up_step_size; |
Osvaldo Banuelos | 3bdabd0 | 2017-03-22 13:39:39 -0700 | [diff] [blame] | 841 | bool acd_notwait_for_cl_settled; |
| 842 | bool acd_adj_avg_fast_update; |
Osvaldo Banuelos | d688dded | 2017-03-22 13:35:46 -0700 | [diff] [blame] | 843 | bool acd_avg_enabled; |
David Collins | 7370f1a | 2017-01-18 16:21:53 -0800 | [diff] [blame] | 844 | enum cpr3_count_mode count_mode; |
| 845 | u32 count_repeat; |
| 846 | u32 proc_clock_throttle; |
| 847 | bool cpr_allowed_hw; |
| 848 | bool cpr_allowed_sw; |
| 849 | bool supports_hw_closed_loop; |
| 850 | bool use_hw_closed_loop; |
| 851 | enum cpr_controller_type ctrl_type; |
| 852 | bool saw_use_unit_mV; |
| 853 | struct cpr3_corner aggr_corner; |
| 854 | bool cpr_enabled; |
| 855 | bool last_corner_was_closed_loop; |
| 856 | bool cpr_suspended; |
| 857 | struct dentry *debugfs; |
| 858 | |
| 859 | int aging_ref_volt; |
| 860 | unsigned int aging_vdd_mode; |
| 861 | unsigned int aging_complete_vdd_mode; |
| 862 | int aging_ref_adjust_volt; |
| 863 | bool aging_required; |
| 864 | bool aging_succeeded; |
| 865 | bool aging_failed; |
| 866 | struct cpr3_aging_sensor_info *aging_sensor; |
| 867 | int aging_sensor_count; |
| 868 | u32 aging_possible_mask; |
| 869 | u32 aging_possible_val; |
| 870 | |
David Collins | 044e9e7 | 2017-03-06 16:47:09 -0800 | [diff] [blame] | 871 | bool ignore_invalid_fuses; |
| 872 | |
David Collins | 7370f1a | 2017-01-18 16:21:53 -0800 | [diff] [blame] | 873 | u32 step_quot_fixed; |
| 874 | u32 initial_temp_band; |
| 875 | bool use_dynamic_step_quot; |
| 876 | bool allow_core_count_adj; |
| 877 | bool allow_temp_adj; |
| 878 | bool allow_boost; |
| 879 | int temp_band_count; |
| 880 | int *temp_points; |
| 881 | u32 temp_sensor_id_start; |
| 882 | u32 temp_sensor_id_end; |
| 883 | u32 voltage_settling_time; |
| 884 | struct cpr3_panic_regs_info *panic_regs_info; |
| 885 | struct notifier_block panic_notifier; |
| 886 | bool support_ldo300_vreg; |
Tirupathi Reddy | 718bc80 | 2017-02-09 16:29:24 +0530 | [diff] [blame] | 887 | bool reset_step_quot_loop_en; |
Tirupathi Reddy | 2b798d6 | 2018-05-17 11:15:14 +0530 | [diff] [blame] | 888 | bool thread_has_always_vote_en; |
David Collins | 7370f1a | 2017-01-18 16:21:53 -0800 | [diff] [blame] | 889 | }; |
| 890 | |
| 891 | /* Used for rounding voltages to the closest physically available set point. */ |
| 892 | #define CPR3_ROUND(n, d) (DIV_ROUND_UP(n, d) * (d)) |
| 893 | |
| 894 | #define cpr3_err(cpr3_thread, message, ...) \ |
| 895 | pr_err("%s: " message, (cpr3_thread)->name, ##__VA_ARGS__) |
| 896 | #define cpr3_info(cpr3_thread, message, ...) \ |
| 897 | pr_info("%s: " message, (cpr3_thread)->name, ##__VA_ARGS__) |
| 898 | #define cpr3_debug(cpr3_thread, message, ...) \ |
| 899 | pr_debug("%s: " message, (cpr3_thread)->name, ##__VA_ARGS__) |
| 900 | |
| 901 | /* |
| 902 | * Offset subtracted from voltage corner values passed in from the regulator |
| 903 | * framework in order to get internal voltage corner values. This is needed |
| 904 | * since the regulator framework treats 0 as an error value at regulator |
| 905 | * registration time. |
| 906 | */ |
| 907 | #define CPR3_CORNER_OFFSET 1 |
| 908 | |
| 909 | #ifdef CONFIG_REGULATOR_CPR3 |
| 910 | |
| 911 | int cpr3_regulator_register(struct platform_device *pdev, |
| 912 | struct cpr3_controller *ctrl); |
| 913 | int cpr3_regulator_unregister(struct cpr3_controller *ctrl); |
| 914 | int cpr3_regulator_suspend(struct cpr3_controller *ctrl); |
| 915 | int cpr3_regulator_resume(struct cpr3_controller *ctrl); |
| 916 | |
| 917 | int cpr3_allocate_threads(struct cpr3_controller *ctrl, u32 min_thread_id, |
| 918 | u32 max_thread_id); |
| 919 | int cpr3_map_fuse_base(struct cpr3_controller *ctrl, |
| 920 | struct platform_device *pdev); |
| 921 | int cpr3_read_fuse_param(void __iomem *fuse_base_addr, |
| 922 | const struct cpr3_fuse_param *param, u64 *param_value); |
| 923 | int cpr3_convert_open_loop_voltage_fuse(int ref_volt, int step_volt, u32 fuse, |
| 924 | int fuse_len); |
| 925 | u64 cpr3_interpolate(u64 x1, u64 y1, u64 x2, u64 y2, u64 x); |
| 926 | int cpr3_parse_array_property(struct cpr3_regulator *vreg, |
| 927 | const char *prop_name, int tuple_size, u32 *out); |
| 928 | int cpr3_parse_corner_array_property(struct cpr3_regulator *vreg, |
| 929 | const char *prop_name, int tuple_size, u32 *out); |
| 930 | int cpr3_parse_corner_band_array_property(struct cpr3_regulator *vreg, |
| 931 | const char *prop_name, int tuple_size, u32 *out); |
| 932 | int cpr3_parse_common_corner_data(struct cpr3_regulator *vreg); |
| 933 | int cpr3_parse_thread_u32(struct cpr3_thread *thread, const char *propname, |
| 934 | u32 *out_value, u32 value_min, u32 value_max); |
| 935 | int cpr3_parse_ctrl_u32(struct cpr3_controller *ctrl, const char *propname, |
| 936 | u32 *out_value, u32 value_min, u32 value_max); |
| 937 | int cpr3_parse_common_thread_data(struct cpr3_thread *thread); |
| 938 | int cpr3_parse_common_ctrl_data(struct cpr3_controller *ctrl); |
| 939 | int cpr3_limit_open_loop_voltages(struct cpr3_regulator *vreg); |
| 940 | void cpr3_open_loop_voltage_as_ceiling(struct cpr3_regulator *vreg); |
| 941 | int cpr3_limit_floor_voltages(struct cpr3_regulator *vreg); |
| 942 | void cpr3_print_quots(struct cpr3_regulator *vreg); |
| 943 | int cpr3_adjust_fused_open_loop_voltages(struct cpr3_regulator *vreg, |
| 944 | int *fuse_volt); |
| 945 | int cpr3_adjust_open_loop_voltages(struct cpr3_regulator *vreg); |
| 946 | int cpr3_quot_adjustment(int ro_scale, int volt_adjust); |
| 947 | int cpr3_voltage_adjustment(int ro_scale, int quot_adjust); |
| 948 | int cpr3_parse_closed_loop_voltage_adjustments(struct cpr3_regulator *vreg, |
| 949 | u64 *ro_sel, int *volt_adjust, |
| 950 | int *volt_adjust_fuse, int *ro_scale); |
| 951 | int cpr4_parse_core_count_temp_voltage_adj(struct cpr3_regulator *vreg, |
| 952 | bool use_corner_band); |
| 953 | int cpr3_apm_init(struct cpr3_controller *ctrl); |
| 954 | int cpr3_mem_acc_init(struct cpr3_regulator *vreg); |
| 955 | void cprh_adjust_voltages_for_apm(struct cpr3_regulator *vreg); |
| 956 | void cprh_adjust_voltages_for_mem_acc(struct cpr3_regulator *vreg); |
| 957 | int cpr3_adjust_target_quotients(struct cpr3_regulator *vreg, |
| 958 | int *fuse_volt_adjust); |
Tirupathi Reddy | 53d99a0 | 2016-08-08 17:04:23 +0530 | [diff] [blame] | 959 | int cpr3_parse_fuse_combo_map(struct cpr3_regulator *vreg, u64 *fuse_val, |
| 960 | int fuse_count); |
David Collins | 7370f1a | 2017-01-18 16:21:53 -0800 | [diff] [blame] | 961 | |
| 962 | #else |
| 963 | |
| 964 | static inline int cpr3_regulator_register(struct platform_device *pdev, |
| 965 | struct cpr3_controller *ctrl) |
| 966 | { |
| 967 | return -ENXIO; |
| 968 | } |
| 969 | |
| 970 | static inline int cpr3_regulator_unregister(struct cpr3_controller *ctrl) |
| 971 | { |
| 972 | return -ENXIO; |
| 973 | } |
| 974 | |
| 975 | static inline int cpr3_regulator_suspend(struct cpr3_controller *ctrl) |
| 976 | { |
| 977 | return -ENXIO; |
| 978 | } |
| 979 | |
| 980 | static inline int cpr3_regulator_resume(struct cpr3_controller *ctrl) |
| 981 | { |
| 982 | return -ENXIO; |
| 983 | } |
| 984 | |
| 985 | static inline int cpr3_get_thread_name(struct cpr3_thread *thread, |
| 986 | struct device_node *thread_node) |
| 987 | { |
| 988 | return -EPERM; |
| 989 | } |
| 990 | |
| 991 | static inline int cpr3_allocate_threads(struct cpr3_controller *ctrl, |
| 992 | u32 min_thread_id, u32 max_thread_id) |
| 993 | { |
| 994 | return -EPERM; |
| 995 | } |
| 996 | |
| 997 | static inline int cpr3_map_fuse_base(struct cpr3_controller *ctrl, |
| 998 | struct platform_device *pdev) |
| 999 | { |
| 1000 | return -ENXIO; |
| 1001 | } |
| 1002 | |
| 1003 | static inline int cpr3_read_fuse_param(void __iomem *fuse_base_addr, |
| 1004 | const struct cpr3_fuse_param *param, u64 *param_value) |
| 1005 | { |
| 1006 | return -EPERM; |
| 1007 | } |
| 1008 | |
| 1009 | static inline int cpr3_convert_open_loop_voltage_fuse(int ref_volt, |
| 1010 | int step_volt, u32 fuse, int fuse_len) |
| 1011 | { |
| 1012 | return -EPERM; |
| 1013 | } |
| 1014 | |
| 1015 | static inline u64 cpr3_interpolate(u64 x1, u64 y1, u64 x2, u64 y2, u64 x) |
| 1016 | { |
| 1017 | return 0; |
| 1018 | } |
| 1019 | |
| 1020 | static inline int cpr3_parse_array_property(struct cpr3_regulator *vreg, |
| 1021 | const char *prop_name, int tuple_size, u32 *out) |
| 1022 | { |
| 1023 | return -EPERM; |
| 1024 | } |
| 1025 | |
| 1026 | static inline int cpr3_parse_corner_array_property(struct cpr3_regulator *vreg, |
| 1027 | const char *prop_name, int tuple_size, u32 *out) |
| 1028 | { |
| 1029 | return -EPERM; |
| 1030 | } |
| 1031 | |
| 1032 | static inline int cpr3_parse_corner_band_array_property( |
| 1033 | struct cpr3_regulator *vreg, const char *prop_name, |
| 1034 | int tuple_size, u32 *out) |
| 1035 | { |
| 1036 | return -EPERM; |
| 1037 | } |
| 1038 | |
| 1039 | static inline int cpr3_parse_common_corner_data(struct cpr3_regulator *vreg) |
| 1040 | { |
| 1041 | return -EPERM; |
| 1042 | } |
| 1043 | |
| 1044 | static inline int cpr3_parse_thread_u32(struct cpr3_thread *thread, |
| 1045 | const char *propname, u32 *out_value, u32 value_min, |
| 1046 | u32 value_max) |
| 1047 | { |
| 1048 | return -EPERM; |
| 1049 | } |
| 1050 | |
| 1051 | static inline int cpr3_parse_ctrl_u32(struct cpr3_controller *ctrl, |
| 1052 | const char *propname, u32 *out_value, u32 value_min, |
| 1053 | u32 value_max) |
| 1054 | { |
| 1055 | return -EPERM; |
| 1056 | } |
| 1057 | |
| 1058 | static inline int cpr3_parse_common_thread_data(struct cpr3_thread *thread) |
| 1059 | { |
| 1060 | return -EPERM; |
| 1061 | } |
| 1062 | |
| 1063 | static inline int cpr3_parse_common_ctrl_data(struct cpr3_controller *ctrl) |
| 1064 | { |
| 1065 | return -EPERM; |
| 1066 | } |
| 1067 | |
| 1068 | static inline int cpr3_limit_open_loop_voltages(struct cpr3_regulator *vreg) |
| 1069 | { |
| 1070 | return -EPERM; |
| 1071 | } |
| 1072 | |
| 1073 | static inline void cpr3_open_loop_voltage_as_ceiling( |
| 1074 | struct cpr3_regulator *vreg) |
| 1075 | { |
| 1076 | } |
| 1077 | |
| 1078 | static inline int cpr3_limit_floor_voltages(struct cpr3_regulator *vreg) |
| 1079 | { |
| 1080 | return -EPERM; |
| 1081 | } |
| 1082 | |
| 1083 | static inline void cpr3_print_quots(struct cpr3_regulator *vreg) |
| 1084 | { |
| 1085 | } |
| 1086 | |
| 1087 | static inline int cpr3_adjust_fused_open_loop_voltages( |
| 1088 | struct cpr3_regulator *vreg, int *fuse_volt) |
| 1089 | { |
| 1090 | return -EPERM; |
| 1091 | } |
| 1092 | |
| 1093 | static inline int cpr3_adjust_open_loop_voltages(struct cpr3_regulator *vreg) |
| 1094 | { |
| 1095 | return -EPERM; |
| 1096 | } |
| 1097 | |
| 1098 | static inline int cpr3_quot_adjustment(int ro_scale, int volt_adjust) |
| 1099 | { |
| 1100 | return 0; |
| 1101 | } |
| 1102 | |
| 1103 | static inline int cpr3_voltage_adjustment(int ro_scale, int quot_adjust) |
| 1104 | { |
| 1105 | return 0; |
| 1106 | } |
| 1107 | |
| 1108 | static inline int cpr3_parse_closed_loop_voltage_adjustments( |
| 1109 | struct cpr3_regulator *vreg, u64 *ro_sel, |
| 1110 | int *volt_adjust, int *volt_adjust_fuse, int *ro_scale) |
| 1111 | { |
| 1112 | return 0; |
| 1113 | } |
| 1114 | |
| 1115 | static inline int cpr4_parse_core_count_temp_voltage_adj( |
| 1116 | struct cpr3_regulator *vreg, bool use_corner_band) |
| 1117 | { |
| 1118 | return 0; |
| 1119 | } |
| 1120 | |
| 1121 | static inline int cpr3_apm_init(struct cpr3_controller *ctrl) |
| 1122 | { |
| 1123 | return 0; |
| 1124 | } |
| 1125 | |
| 1126 | static inline int cpr3_mem_acc_init(struct cpr3_regulator *vreg) |
| 1127 | { |
| 1128 | return 0; |
| 1129 | } |
| 1130 | |
| 1131 | static inline void cprh_adjust_voltages_for_apm(struct cpr3_regulator *vreg) |
| 1132 | { |
| 1133 | } |
| 1134 | |
| 1135 | static inline void cprh_adjust_voltages_for_mem_acc(struct cpr3_regulator *vreg) |
| 1136 | { |
| 1137 | } |
| 1138 | |
| 1139 | static inline int cpr3_adjust_target_quotients(struct cpr3_regulator *vreg, |
| 1140 | int *fuse_volt_adjust) |
| 1141 | { |
| 1142 | return 0; |
| 1143 | } |
| 1144 | |
Tirupathi Reddy | 53d99a0 | 2016-08-08 17:04:23 +0530 | [diff] [blame] | 1145 | static int cpr3_parse_fuse_combo_map(struct cpr3_regulator *vreg, u64 *fuse_val, |
| 1146 | int fuse_count) |
| 1147 | { |
| 1148 | return -EPERM; |
| 1149 | } |
| 1150 | |
David Collins | 7370f1a | 2017-01-18 16:21:53 -0800 | [diff] [blame] | 1151 | #endif /* CONFIG_REGULATOR_CPR3 */ |
| 1152 | |
| 1153 | #endif /* __REGULATOR_CPR_REGULATOR_H__ */ |