Shawn Guo | 73d2b4c | 2011-10-17 08:42:16 +0800 | [diff] [blame] | 1 | /* |
| 2 | * Copyright 2011 Freescale Semiconductor, Inc. |
| 3 | * Copyright 2011 Linaro Ltd. |
| 4 | * |
| 5 | * The code contained herein is licensed under the GNU General Public |
| 6 | * License. You may obtain a copy of the GNU General Public License |
| 7 | * Version 2 or later at the following locations: |
| 8 | * |
| 9 | * http://www.opensource.org/licenses/gpl-license.html |
| 10 | * http://www.gnu.org/copyleft/gpl.html |
| 11 | */ |
| 12 | |
Shawn Guo | 36dffd8 | 2013-04-07 10:49:34 +0800 | [diff] [blame] | 13 | #include "skeleton.dtsi" |
Shawn Guo | e164153 | 2013-02-20 10:32:52 +0800 | [diff] [blame] | 14 | #include "imx53-pinfunc.h" |
Lucas Stach | 564695d | 2013-11-14 11:18:58 +0100 | [diff] [blame] | 15 | #include <dt-bindings/clock/imx5-clock.h> |
Denis Carikli | 4e05a7a | 2014-01-06 17:16:07 +0100 | [diff] [blame] | 16 | #include <dt-bindings/gpio/gpio.h> |
| 17 | #include <dt-bindings/input/input.h> |
Shawn Guo | 73d2b4c | 2011-10-17 08:42:16 +0800 | [diff] [blame] | 18 | |
| 19 | / { |
| 20 | aliases { |
Marek Vasut | 2297007 | 2014-02-28 12:58:41 +0100 | [diff] [blame] | 21 | ethernet0 = &fec; |
Shawn Guo | 5230f8f | 2012-08-05 14:01:28 +0800 | [diff] [blame] | 22 | gpio0 = &gpio1; |
| 23 | gpio1 = &gpio2; |
| 24 | gpio2 = &gpio3; |
| 25 | gpio3 = &gpio4; |
| 26 | gpio4 = &gpio5; |
| 27 | gpio5 = &gpio6; |
| 28 | gpio6 = &gpio7; |
Philipp Zabel | c60dc1d | 2013-04-09 19:18:47 +0200 | [diff] [blame] | 29 | i2c0 = &i2c1; |
| 30 | i2c1 = &i2c2; |
| 31 | i2c2 = &i2c3; |
Sascha Hauer | c63d06d | 2014-01-16 13:44:18 +0100 | [diff] [blame] | 32 | mmc0 = &esdhc1; |
| 33 | mmc1 = &esdhc2; |
| 34 | mmc2 = &esdhc3; |
| 35 | mmc3 = &esdhc4; |
Sascha Hauer | cf4e577 | 2013-06-25 15:51:56 +0200 | [diff] [blame] | 36 | serial0 = &uart1; |
| 37 | serial1 = &uart2; |
| 38 | serial2 = &uart3; |
| 39 | serial3 = &uart4; |
| 40 | serial4 = &uart5; |
| 41 | spi0 = &ecspi1; |
| 42 | spi1 = &ecspi2; |
| 43 | spi2 = &cspi; |
Shawn Guo | 73d2b4c | 2011-10-17 08:42:16 +0800 | [diff] [blame] | 44 | }; |
| 45 | |
Fabio Estevam | 070bd7e | 2013-07-07 10:12:30 -0300 | [diff] [blame] | 46 | cpus { |
| 47 | #address-cells = <1>; |
| 48 | #size-cells = <0>; |
Lucas Stach | 791f416 | 2014-09-26 15:41:03 +0200 | [diff] [blame] | 49 | cpu0: cpu@0 { |
Fabio Estevam | 070bd7e | 2013-07-07 10:12:30 -0300 | [diff] [blame] | 50 | device_type = "cpu"; |
| 51 | compatible = "arm,cortex-a8"; |
| 52 | reg = <0x0>; |
Lucas Stach | 791f416 | 2014-09-26 15:41:03 +0200 | [diff] [blame] | 53 | clocks = <&clks IMX5_CLK_ARM>; |
| 54 | clock-latency = <61036>; |
| 55 | voltage-tolerance = <5>; |
| 56 | operating-points = < |
| 57 | /* kHz */ |
| 58 | 166666 850000 |
| 59 | 400000 900000 |
| 60 | 800000 1050000 |
| 61 | 1000000 1200000 |
| 62 | 1200000 1300000 |
| 63 | >; |
Fabio Estevam | 070bd7e | 2013-07-07 10:12:30 -0300 | [diff] [blame] | 64 | }; |
| 65 | }; |
| 66 | |
Philipp Zabel | e05c8c9 | 2014-03-05 10:21:00 +0100 | [diff] [blame] | 67 | display-subsystem { |
| 68 | compatible = "fsl,imx-display-subsystem"; |
| 69 | ports = <&ipu_di0>, <&ipu_di1>; |
| 70 | }; |
| 71 | |
Shawn Guo | 73d2b4c | 2011-10-17 08:42:16 +0800 | [diff] [blame] | 72 | tzic: tz-interrupt-controller@0fffc000 { |
| 73 | compatible = "fsl,imx53-tzic", "fsl,tzic"; |
| 74 | interrupt-controller; |
| 75 | #interrupt-cells = <1>; |
| 76 | reg = <0x0fffc000 0x4000>; |
| 77 | }; |
| 78 | |
| 79 | clocks { |
| 80 | #address-cells = <1>; |
| 81 | #size-cells = <0>; |
| 82 | |
| 83 | ckil { |
| 84 | compatible = "fsl,imx-ckil", "fixed-clock"; |
Shawn Guo | 4b2b404 | 2014-04-11 09:56:46 +0800 | [diff] [blame] | 85 | #clock-cells = <0>; |
Shawn Guo | 73d2b4c | 2011-10-17 08:42:16 +0800 | [diff] [blame] | 86 | clock-frequency = <32768>; |
| 87 | }; |
| 88 | |
| 89 | ckih1 { |
| 90 | compatible = "fsl,imx-ckih1", "fixed-clock"; |
Shawn Guo | 4b2b404 | 2014-04-11 09:56:46 +0800 | [diff] [blame] | 91 | #clock-cells = <0>; |
Shawn Guo | 73d2b4c | 2011-10-17 08:42:16 +0800 | [diff] [blame] | 92 | clock-frequency = <22579200>; |
| 93 | }; |
| 94 | |
| 95 | ckih2 { |
| 96 | compatible = "fsl,imx-ckih2", "fixed-clock"; |
Shawn Guo | 4b2b404 | 2014-04-11 09:56:46 +0800 | [diff] [blame] | 97 | #clock-cells = <0>; |
Shawn Guo | 73d2b4c | 2011-10-17 08:42:16 +0800 | [diff] [blame] | 98 | clock-frequency = <0>; |
| 99 | }; |
| 100 | |
| 101 | osc { |
| 102 | compatible = "fsl,imx-osc", "fixed-clock"; |
Shawn Guo | 4b2b404 | 2014-04-11 09:56:46 +0800 | [diff] [blame] | 103 | #clock-cells = <0>; |
Shawn Guo | 73d2b4c | 2011-10-17 08:42:16 +0800 | [diff] [blame] | 104 | clock-frequency = <24000000>; |
| 105 | }; |
| 106 | }; |
| 107 | |
| 108 | soc { |
| 109 | #address-cells = <1>; |
| 110 | #size-cells = <1>; |
| 111 | compatible = "simple-bus"; |
| 112 | interrupt-parent = <&tzic>; |
| 113 | ranges; |
| 114 | |
Marek Vasut | 7affee4 | 2013-11-22 12:05:03 +0100 | [diff] [blame] | 115 | sata: sata@10000000 { |
| 116 | compatible = "fsl,imx53-ahci"; |
| 117 | reg = <0x10000000 0x1000>; |
| 118 | interrupts = <28>; |
| 119 | clocks = <&clks IMX5_CLK_SATA_GATE>, |
| 120 | <&clks IMX5_CLK_SATA_REF>, |
| 121 | <&clks IMX5_CLK_AHB>; |
Shawn Guo | 0257815 | 2014-07-08 16:14:47 +0800 | [diff] [blame] | 122 | clock-names = "sata", "sata_ref", "ahb"; |
Marek Vasut | 7affee4 | 2013-11-22 12:05:03 +0100 | [diff] [blame] | 123 | status = "disabled"; |
| 124 | }; |
| 125 | |
Sascha Hauer | abed9a6 | 2012-06-05 13:52:10 +0200 | [diff] [blame] | 126 | ipu: ipu@18000000 { |
Philipp Zabel | e05c8c9 | 2014-03-05 10:21:00 +0100 | [diff] [blame] | 127 | #address-cells = <1>; |
| 128 | #size-cells = <0>; |
Sascha Hauer | abed9a6 | 2012-06-05 13:52:10 +0200 | [diff] [blame] | 129 | compatible = "fsl,imx53-ipu"; |
Sascha Hauer | 6d66da8 | 2014-05-06 13:01:34 +0200 | [diff] [blame] | 130 | reg = <0x18000000 0x08000000>; |
Sascha Hauer | abed9a6 | 2012-06-05 13:52:10 +0200 | [diff] [blame] | 131 | interrupts = <11 10>; |
Lucas Stach | 564695d | 2013-11-14 11:18:58 +0100 | [diff] [blame] | 132 | clocks = <&clks IMX5_CLK_IPU_GATE>, |
| 133 | <&clks IMX5_CLK_IPU_DI0_GATE>, |
| 134 | <&clks IMX5_CLK_IPU_DI1_GATE>; |
Philipp Zabel | 4438a6a | 2013-03-27 18:30:36 +0100 | [diff] [blame] | 135 | clock-names = "bus", "di0", "di1"; |
Philipp Zabel | 8d84c37 | 2013-03-28 17:35:23 +0100 | [diff] [blame] | 136 | resets = <&src 2>; |
Philipp Zabel | e05c8c9 | 2014-03-05 10:21:00 +0100 | [diff] [blame] | 137 | |
| 138 | ipu_di0: port@2 { |
| 139 | #address-cells = <1>; |
| 140 | #size-cells = <0>; |
| 141 | reg = <2>; |
| 142 | |
| 143 | ipu_di0_disp0: endpoint@0 { |
| 144 | reg = <0>; |
| 145 | }; |
| 146 | |
| 147 | ipu_di0_lvds0: endpoint@1 { |
| 148 | reg = <1>; |
| 149 | remote-endpoint = <&lvds0_in>; |
| 150 | }; |
| 151 | }; |
| 152 | |
| 153 | ipu_di1: port@3 { |
| 154 | #address-cells = <1>; |
| 155 | #size-cells = <0>; |
| 156 | reg = <3>; |
| 157 | |
| 158 | ipu_di1_disp1: endpoint@0 { |
| 159 | reg = <0>; |
| 160 | }; |
| 161 | |
| 162 | ipu_di1_lvds1: endpoint@1 { |
| 163 | reg = <1>; |
| 164 | remote-endpoint = <&lvds1_in>; |
| 165 | }; |
| 166 | |
| 167 | ipu_di1_tve: endpoint@2 { |
| 168 | reg = <2>; |
| 169 | remote-endpoint = <&tve_in>; |
| 170 | }; |
| 171 | }; |
Sascha Hauer | abed9a6 | 2012-06-05 13:52:10 +0200 | [diff] [blame] | 172 | }; |
| 173 | |
Shawn Guo | 73d2b4c | 2011-10-17 08:42:16 +0800 | [diff] [blame] | 174 | aips@50000000 { /* AIPS1 */ |
| 175 | compatible = "fsl,aips-bus", "simple-bus"; |
| 176 | #address-cells = <1>; |
| 177 | #size-cells = <1>; |
| 178 | reg = <0x50000000 0x10000000>; |
| 179 | ranges; |
| 180 | |
| 181 | spba@50000000 { |
| 182 | compatible = "fsl,spba-bus", "simple-bus"; |
| 183 | #address-cells = <1>; |
| 184 | #size-cells = <1>; |
| 185 | reg = <0x50000000 0x40000>; |
| 186 | ranges; |
| 187 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 188 | esdhc1: esdhc@50004000 { |
Shawn Guo | 73d2b4c | 2011-10-17 08:42:16 +0800 | [diff] [blame] | 189 | compatible = "fsl,imx53-esdhc"; |
| 190 | reg = <0x50004000 0x4000>; |
| 191 | interrupts = <1>; |
Lucas Stach | 564695d | 2013-11-14 11:18:58 +0100 | [diff] [blame] | 192 | clocks = <&clks IMX5_CLK_ESDHC1_IPG_GATE>, |
| 193 | <&clks IMX5_CLK_DUMMY>, |
| 194 | <&clks IMX5_CLK_ESDHC1_PER_GATE>; |
Fabio Estevam | f40f38d | 2012-11-21 13:43:05 -0200 | [diff] [blame] | 195 | clock-names = "ipg", "ahb", "per"; |
Sascha Hauer | c104b6a | 2012-09-25 11:49:33 +0200 | [diff] [blame] | 196 | bus-width = <4>; |
Shawn Guo | 73d2b4c | 2011-10-17 08:42:16 +0800 | [diff] [blame] | 197 | status = "disabled"; |
| 198 | }; |
| 199 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 200 | esdhc2: esdhc@50008000 { |
Shawn Guo | 73d2b4c | 2011-10-17 08:42:16 +0800 | [diff] [blame] | 201 | compatible = "fsl,imx53-esdhc"; |
| 202 | reg = <0x50008000 0x4000>; |
| 203 | interrupts = <2>; |
Lucas Stach | 564695d | 2013-11-14 11:18:58 +0100 | [diff] [blame] | 204 | clocks = <&clks IMX5_CLK_ESDHC2_IPG_GATE>, |
| 205 | <&clks IMX5_CLK_DUMMY>, |
| 206 | <&clks IMX5_CLK_ESDHC2_PER_GATE>; |
Fabio Estevam | f40f38d | 2012-11-21 13:43:05 -0200 | [diff] [blame] | 207 | clock-names = "ipg", "ahb", "per"; |
Sascha Hauer | c104b6a | 2012-09-25 11:49:33 +0200 | [diff] [blame] | 208 | bus-width = <4>; |
Shawn Guo | 73d2b4c | 2011-10-17 08:42:16 +0800 | [diff] [blame] | 209 | status = "disabled"; |
| 210 | }; |
| 211 | |
Shawn Guo | 0c456cf | 2012-04-02 14:39:26 +0800 | [diff] [blame] | 212 | uart3: serial@5000c000 { |
Shawn Guo | 73d2b4c | 2011-10-17 08:42:16 +0800 | [diff] [blame] | 213 | compatible = "fsl,imx53-uart", "fsl,imx21-uart"; |
| 214 | reg = <0x5000c000 0x4000>; |
| 215 | interrupts = <33>; |
Lucas Stach | 564695d | 2013-11-14 11:18:58 +0100 | [diff] [blame] | 216 | clocks = <&clks IMX5_CLK_UART3_IPG_GATE>, |
| 217 | <&clks IMX5_CLK_UART3_PER_GATE>; |
Fabio Estevam | f40f38d | 2012-11-21 13:43:05 -0200 | [diff] [blame] | 218 | clock-names = "ipg", "per"; |
Shawn Guo | 73d2b4c | 2011-10-17 08:42:16 +0800 | [diff] [blame] | 219 | status = "disabled"; |
| 220 | }; |
| 221 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 222 | ecspi1: ecspi@50010000 { |
Shawn Guo | 73d2b4c | 2011-10-17 08:42:16 +0800 | [diff] [blame] | 223 | #address-cells = <1>; |
| 224 | #size-cells = <0>; |
| 225 | compatible = "fsl,imx53-ecspi", "fsl,imx51-ecspi"; |
| 226 | reg = <0x50010000 0x4000>; |
| 227 | interrupts = <36>; |
Lucas Stach | 564695d | 2013-11-14 11:18:58 +0100 | [diff] [blame] | 228 | clocks = <&clks IMX5_CLK_ECSPI1_IPG_GATE>, |
| 229 | <&clks IMX5_CLK_ECSPI1_PER_GATE>; |
Fabio Estevam | f40f38d | 2012-11-21 13:43:05 -0200 | [diff] [blame] | 230 | clock-names = "ipg", "per"; |
Shawn Guo | 73d2b4c | 2011-10-17 08:42:16 +0800 | [diff] [blame] | 231 | status = "disabled"; |
| 232 | }; |
| 233 | |
Shawn Guo | ffc505c | 2012-05-11 13:12:01 +0800 | [diff] [blame] | 234 | ssi2: ssi@50014000 { |
Alexander Shiyan | 6ff7f51 | 2014-08-19 20:00:09 +0400 | [diff] [blame] | 235 | #sound-dai-cells = <0>; |
Markus Pargmann | 28f93d0 | 2014-01-17 10:07:42 +0100 | [diff] [blame] | 236 | compatible = "fsl,imx53-ssi", |
| 237 | "fsl,imx51-ssi", |
| 238 | "fsl,imx21-ssi"; |
Shawn Guo | ffc505c | 2012-05-11 13:12:01 +0800 | [diff] [blame] | 239 | reg = <0x50014000 0x4000>; |
| 240 | interrupts = <30>; |
Fabio Estevam | 685570a | 2014-09-18 20:23:48 -0300 | [diff] [blame] | 241 | clocks = <&clks IMX5_CLK_SSI2_IPG_GATE>, |
| 242 | <&clks IMX5_CLK_SSI2_ROOT_GATE>; |
| 243 | clock-names = "ipg", "baud"; |
Shawn Guo | 5da826a | 2013-07-17 13:50:54 +0800 | [diff] [blame] | 244 | dmas = <&sdma 24 1 0>, |
| 245 | <&sdma 25 1 0>; |
| 246 | dma-names = "rx", "tx"; |
Shawn Guo | ffc505c | 2012-05-11 13:12:01 +0800 | [diff] [blame] | 247 | fsl,fifo-depth = <15>; |
Shawn Guo | ffc505c | 2012-05-11 13:12:01 +0800 | [diff] [blame] | 248 | status = "disabled"; |
| 249 | }; |
| 250 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 251 | esdhc3: esdhc@50020000 { |
Shawn Guo | 73d2b4c | 2011-10-17 08:42:16 +0800 | [diff] [blame] | 252 | compatible = "fsl,imx53-esdhc"; |
| 253 | reg = <0x50020000 0x4000>; |
| 254 | interrupts = <3>; |
Lucas Stach | 564695d | 2013-11-14 11:18:58 +0100 | [diff] [blame] | 255 | clocks = <&clks IMX5_CLK_ESDHC3_IPG_GATE>, |
| 256 | <&clks IMX5_CLK_DUMMY>, |
| 257 | <&clks IMX5_CLK_ESDHC3_PER_GATE>; |
Fabio Estevam | f40f38d | 2012-11-21 13:43:05 -0200 | [diff] [blame] | 258 | clock-names = "ipg", "ahb", "per"; |
Sascha Hauer | c104b6a | 2012-09-25 11:49:33 +0200 | [diff] [blame] | 259 | bus-width = <4>; |
Shawn Guo | 73d2b4c | 2011-10-17 08:42:16 +0800 | [diff] [blame] | 260 | status = "disabled"; |
| 261 | }; |
| 262 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 263 | esdhc4: esdhc@50024000 { |
Shawn Guo | 73d2b4c | 2011-10-17 08:42:16 +0800 | [diff] [blame] | 264 | compatible = "fsl,imx53-esdhc"; |
| 265 | reg = <0x50024000 0x4000>; |
| 266 | interrupts = <4>; |
Lucas Stach | 564695d | 2013-11-14 11:18:58 +0100 | [diff] [blame] | 267 | clocks = <&clks IMX5_CLK_ESDHC4_IPG_GATE>, |
| 268 | <&clks IMX5_CLK_DUMMY>, |
| 269 | <&clks IMX5_CLK_ESDHC4_PER_GATE>; |
Fabio Estevam | f40f38d | 2012-11-21 13:43:05 -0200 | [diff] [blame] | 270 | clock-names = "ipg", "ahb", "per"; |
Sascha Hauer | c104b6a | 2012-09-25 11:49:33 +0200 | [diff] [blame] | 271 | bus-width = <4>; |
Shawn Guo | 73d2b4c | 2011-10-17 08:42:16 +0800 | [diff] [blame] | 272 | status = "disabled"; |
| 273 | }; |
| 274 | }; |
| 275 | |
Steffen Trumtrar | ac08281 | 2014-06-25 13:01:30 +0200 | [diff] [blame] | 276 | aipstz1: bridge@53f00000 { |
| 277 | compatible = "fsl,imx53-aipstz"; |
| 278 | reg = <0x53f00000 0x60>; |
| 279 | }; |
| 280 | |
Michael Grzeschik | a79025c | 2013-04-11 12:13:16 +0200 | [diff] [blame] | 281 | usbphy0: usbphy@0 { |
| 282 | compatible = "usb-nop-xceiv"; |
Lucas Stach | 564695d | 2013-11-14 11:18:58 +0100 | [diff] [blame] | 283 | clocks = <&clks IMX5_CLK_USB_PHY1_GATE>; |
Michael Grzeschik | a79025c | 2013-04-11 12:13:16 +0200 | [diff] [blame] | 284 | clock-names = "main_clk"; |
| 285 | status = "okay"; |
| 286 | }; |
| 287 | |
| 288 | usbphy1: usbphy@1 { |
| 289 | compatible = "usb-nop-xceiv"; |
Lucas Stach | 564695d | 2013-11-14 11:18:58 +0100 | [diff] [blame] | 290 | clocks = <&clks IMX5_CLK_USB_PHY2_GATE>; |
Michael Grzeschik | a79025c | 2013-04-11 12:13:16 +0200 | [diff] [blame] | 291 | clock-names = "main_clk"; |
| 292 | status = "okay"; |
| 293 | }; |
| 294 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 295 | usbotg: usb@53f80000 { |
Michael Grzeschik | 212d0b8 | 2012-08-23 12:35:57 +0200 | [diff] [blame] | 296 | compatible = "fsl,imx53-usb", "fsl,imx27-usb"; |
| 297 | reg = <0x53f80000 0x0200>; |
| 298 | interrupts = <18>; |
Lucas Stach | 564695d | 2013-11-14 11:18:58 +0100 | [diff] [blame] | 299 | clocks = <&clks IMX5_CLK_USBOH3_GATE>; |
Michael Grzeschik | a573502 | 2013-04-11 12:13:14 +0200 | [diff] [blame] | 300 | fsl,usbmisc = <&usbmisc 0>; |
Michael Grzeschik | a79025c | 2013-04-11 12:13:16 +0200 | [diff] [blame] | 301 | fsl,usbphy = <&usbphy0>; |
Michael Grzeschik | 212d0b8 | 2012-08-23 12:35:57 +0200 | [diff] [blame] | 302 | status = "disabled"; |
| 303 | }; |
| 304 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 305 | usbh1: usb@53f80200 { |
Michael Grzeschik | 212d0b8 | 2012-08-23 12:35:57 +0200 | [diff] [blame] | 306 | compatible = "fsl,imx53-usb", "fsl,imx27-usb"; |
| 307 | reg = <0x53f80200 0x0200>; |
| 308 | interrupts = <14>; |
Lucas Stach | 564695d | 2013-11-14 11:18:58 +0100 | [diff] [blame] | 309 | clocks = <&clks IMX5_CLK_USBOH3_GATE>; |
Michael Grzeschik | a573502 | 2013-04-11 12:13:14 +0200 | [diff] [blame] | 310 | fsl,usbmisc = <&usbmisc 1>; |
Michael Grzeschik | a79025c | 2013-04-11 12:13:16 +0200 | [diff] [blame] | 311 | fsl,usbphy = <&usbphy1>; |
Michael Grzeschik | 212d0b8 | 2012-08-23 12:35:57 +0200 | [diff] [blame] | 312 | status = "disabled"; |
| 313 | }; |
| 314 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 315 | usbh2: usb@53f80400 { |
Michael Grzeschik | 212d0b8 | 2012-08-23 12:35:57 +0200 | [diff] [blame] | 316 | compatible = "fsl,imx53-usb", "fsl,imx27-usb"; |
| 317 | reg = <0x53f80400 0x0200>; |
| 318 | interrupts = <16>; |
Lucas Stach | 564695d | 2013-11-14 11:18:58 +0100 | [diff] [blame] | 319 | clocks = <&clks IMX5_CLK_USBOH3_GATE>; |
Michael Grzeschik | a573502 | 2013-04-11 12:13:14 +0200 | [diff] [blame] | 320 | fsl,usbmisc = <&usbmisc 2>; |
Michael Grzeschik | 212d0b8 | 2012-08-23 12:35:57 +0200 | [diff] [blame] | 321 | status = "disabled"; |
| 322 | }; |
| 323 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 324 | usbh3: usb@53f80600 { |
Michael Grzeschik | 212d0b8 | 2012-08-23 12:35:57 +0200 | [diff] [blame] | 325 | compatible = "fsl,imx53-usb", "fsl,imx27-usb"; |
| 326 | reg = <0x53f80600 0x0200>; |
| 327 | interrupts = <17>; |
Lucas Stach | 564695d | 2013-11-14 11:18:58 +0100 | [diff] [blame] | 328 | clocks = <&clks IMX5_CLK_USBOH3_GATE>; |
Michael Grzeschik | a573502 | 2013-04-11 12:13:14 +0200 | [diff] [blame] | 329 | fsl,usbmisc = <&usbmisc 3>; |
Michael Grzeschik | 212d0b8 | 2012-08-23 12:35:57 +0200 | [diff] [blame] | 330 | status = "disabled"; |
| 331 | }; |
| 332 | |
Michael Grzeschik | a573502 | 2013-04-11 12:13:14 +0200 | [diff] [blame] | 333 | usbmisc: usbmisc@53f80800 { |
| 334 | #index-cells = <1>; |
| 335 | compatible = "fsl,imx53-usbmisc"; |
| 336 | reg = <0x53f80800 0x200>; |
Lucas Stach | 564695d | 2013-11-14 11:18:58 +0100 | [diff] [blame] | 337 | clocks = <&clks IMX5_CLK_USBOH3_GATE>; |
Michael Grzeschik | a573502 | 2013-04-11 12:13:14 +0200 | [diff] [blame] | 338 | }; |
| 339 | |
Richard Zhao | 4d19186 | 2011-12-14 09:26:44 +0800 | [diff] [blame] | 340 | gpio1: gpio@53f84000 { |
Benoît Thébaudeau | aeb2774 | 2012-06-22 21:04:06 +0200 | [diff] [blame] | 341 | compatible = "fsl,imx53-gpio", "fsl,imx35-gpio"; |
Shawn Guo | 73d2b4c | 2011-10-17 08:42:16 +0800 | [diff] [blame] | 342 | reg = <0x53f84000 0x4000>; |
| 343 | interrupts = <50 51>; |
| 344 | gpio-controller; |
| 345 | #gpio-cells = <2>; |
| 346 | interrupt-controller; |
Shawn Guo | 88cde8b | 2012-07-06 20:03:37 +0800 | [diff] [blame] | 347 | #interrupt-cells = <2>; |
Shawn Guo | 73d2b4c | 2011-10-17 08:42:16 +0800 | [diff] [blame] | 348 | }; |
| 349 | |
Richard Zhao | 4d19186 | 2011-12-14 09:26:44 +0800 | [diff] [blame] | 350 | gpio2: gpio@53f88000 { |
Benoît Thébaudeau | aeb2774 | 2012-06-22 21:04:06 +0200 | [diff] [blame] | 351 | compatible = "fsl,imx53-gpio", "fsl,imx35-gpio"; |
Shawn Guo | 73d2b4c | 2011-10-17 08:42:16 +0800 | [diff] [blame] | 352 | reg = <0x53f88000 0x4000>; |
| 353 | interrupts = <52 53>; |
| 354 | gpio-controller; |
| 355 | #gpio-cells = <2>; |
| 356 | interrupt-controller; |
Shawn Guo | 88cde8b | 2012-07-06 20:03:37 +0800 | [diff] [blame] | 357 | #interrupt-cells = <2>; |
Shawn Guo | 73d2b4c | 2011-10-17 08:42:16 +0800 | [diff] [blame] | 358 | }; |
| 359 | |
Richard Zhao | 4d19186 | 2011-12-14 09:26:44 +0800 | [diff] [blame] | 360 | gpio3: gpio@53f8c000 { |
Benoît Thébaudeau | aeb2774 | 2012-06-22 21:04:06 +0200 | [diff] [blame] | 361 | compatible = "fsl,imx53-gpio", "fsl,imx35-gpio"; |
Shawn Guo | 73d2b4c | 2011-10-17 08:42:16 +0800 | [diff] [blame] | 362 | reg = <0x53f8c000 0x4000>; |
| 363 | interrupts = <54 55>; |
| 364 | gpio-controller; |
| 365 | #gpio-cells = <2>; |
| 366 | interrupt-controller; |
Shawn Guo | 88cde8b | 2012-07-06 20:03:37 +0800 | [diff] [blame] | 367 | #interrupt-cells = <2>; |
Shawn Guo | 73d2b4c | 2011-10-17 08:42:16 +0800 | [diff] [blame] | 368 | }; |
| 369 | |
Richard Zhao | 4d19186 | 2011-12-14 09:26:44 +0800 | [diff] [blame] | 370 | gpio4: gpio@53f90000 { |
Benoît Thébaudeau | aeb2774 | 2012-06-22 21:04:06 +0200 | [diff] [blame] | 371 | compatible = "fsl,imx53-gpio", "fsl,imx35-gpio"; |
Shawn Guo | 73d2b4c | 2011-10-17 08:42:16 +0800 | [diff] [blame] | 372 | reg = <0x53f90000 0x4000>; |
| 373 | interrupts = <56 57>; |
| 374 | gpio-controller; |
| 375 | #gpio-cells = <2>; |
| 376 | interrupt-controller; |
Shawn Guo | 88cde8b | 2012-07-06 20:03:37 +0800 | [diff] [blame] | 377 | #interrupt-cells = <2>; |
Shawn Guo | 73d2b4c | 2011-10-17 08:42:16 +0800 | [diff] [blame] | 378 | }; |
| 379 | |
Rostislav Lisovy | 675e4d0 | 2013-10-22 19:07:21 +0200 | [diff] [blame] | 380 | kpp: kpp@53f94000 { |
| 381 | compatible = "fsl,imx53-kpp", "fsl,imx21-kpp"; |
| 382 | reg = <0x53f94000 0x4000>; |
| 383 | interrupts = <60>; |
Lucas Stach | 564695d | 2013-11-14 11:18:58 +0100 | [diff] [blame] | 384 | clocks = <&clks IMX5_CLK_DUMMY>; |
Rostislav Lisovy | 675e4d0 | 2013-10-22 19:07:21 +0200 | [diff] [blame] | 385 | status = "disabled"; |
| 386 | }; |
| 387 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 388 | wdog1: wdog@53f98000 { |
Shawn Guo | 73d2b4c | 2011-10-17 08:42:16 +0800 | [diff] [blame] | 389 | compatible = "fsl,imx53-wdt", "fsl,imx21-wdt"; |
| 390 | reg = <0x53f98000 0x4000>; |
| 391 | interrupts = <58>; |
Lucas Stach | 564695d | 2013-11-14 11:18:58 +0100 | [diff] [blame] | 392 | clocks = <&clks IMX5_CLK_DUMMY>; |
Shawn Guo | 73d2b4c | 2011-10-17 08:42:16 +0800 | [diff] [blame] | 393 | }; |
| 394 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 395 | wdog2: wdog@53f9c000 { |
Shawn Guo | 73d2b4c | 2011-10-17 08:42:16 +0800 | [diff] [blame] | 396 | compatible = "fsl,imx53-wdt", "fsl,imx21-wdt"; |
| 397 | reg = <0x53f9c000 0x4000>; |
| 398 | interrupts = <59>; |
Lucas Stach | 564695d | 2013-11-14 11:18:58 +0100 | [diff] [blame] | 399 | clocks = <&clks IMX5_CLK_DUMMY>; |
Shawn Guo | 73d2b4c | 2011-10-17 08:42:16 +0800 | [diff] [blame] | 400 | status = "disabled"; |
| 401 | }; |
| 402 | |
Sascha Hauer | cc8aae9 | 2013-03-14 13:09:00 +0100 | [diff] [blame] | 403 | gpt: timer@53fa0000 { |
| 404 | compatible = "fsl,imx53-gpt", "fsl,imx31-gpt"; |
| 405 | reg = <0x53fa0000 0x4000>; |
| 406 | interrupts = <39>; |
Lucas Stach | 564695d | 2013-11-14 11:18:58 +0100 | [diff] [blame] | 407 | clocks = <&clks IMX5_CLK_GPT_IPG_GATE>, |
| 408 | <&clks IMX5_CLK_GPT_HF_GATE>; |
Sascha Hauer | cc8aae9 | 2013-03-14 13:09:00 +0100 | [diff] [blame] | 409 | clock-names = "ipg", "per"; |
| 410 | }; |
| 411 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 412 | iomuxc: iomuxc@53fa8000 { |
Shawn Guo | 5be03a7 | 2012-08-12 20:02:10 +0800 | [diff] [blame] | 413 | compatible = "fsl,imx53-iomuxc"; |
| 414 | reg = <0x53fa8000 0x4000>; |
Shawn Guo | 5be03a7 | 2012-08-12 20:02:10 +0800 | [diff] [blame] | 415 | }; |
| 416 | |
Philipp Zabel | 5af9f14 | 2013-03-27 18:30:43 +0100 | [diff] [blame] | 417 | gpr: iomuxc-gpr@53fa8000 { |
| 418 | compatible = "fsl,imx53-iomuxc-gpr", "syscon"; |
| 419 | reg = <0x53fa8000 0xc>; |
| 420 | }; |
| 421 | |
Philipp Zabel | 420714a | 2013-03-27 18:30:44 +0100 | [diff] [blame] | 422 | ldb: ldb@53fa8008 { |
| 423 | #address-cells = <1>; |
| 424 | #size-cells = <0>; |
| 425 | compatible = "fsl,imx53-ldb"; |
| 426 | reg = <0x53fa8008 0x4>; |
| 427 | gpr = <&gpr>; |
Lucas Stach | 564695d | 2013-11-14 11:18:58 +0100 | [diff] [blame] | 428 | clocks = <&clks IMX5_CLK_LDB_DI0_SEL>, |
| 429 | <&clks IMX5_CLK_LDB_DI1_SEL>, |
| 430 | <&clks IMX5_CLK_IPU_DI0_SEL>, |
| 431 | <&clks IMX5_CLK_IPU_DI1_SEL>, |
| 432 | <&clks IMX5_CLK_LDB_DI0_GATE>, |
| 433 | <&clks IMX5_CLK_LDB_DI1_GATE>; |
Philipp Zabel | 420714a | 2013-03-27 18:30:44 +0100 | [diff] [blame] | 434 | clock-names = "di0_pll", "di1_pll", |
| 435 | "di0_sel", "di1_sel", |
| 436 | "di0", "di1"; |
| 437 | status = "disabled"; |
| 438 | |
| 439 | lvds-channel@0 { |
Markus Niebel | 1b134c9 | 2014-09-11 15:56:56 +0800 | [diff] [blame] | 440 | #address-cells = <1>; |
| 441 | #size-cells = <0>; |
Philipp Zabel | 420714a | 2013-03-27 18:30:44 +0100 | [diff] [blame] | 442 | reg = <0>; |
Philipp Zabel | 420714a | 2013-03-27 18:30:44 +0100 | [diff] [blame] | 443 | status = "disabled"; |
Philipp Zabel | e05c8c9 | 2014-03-05 10:21:00 +0100 | [diff] [blame] | 444 | |
Markus Niebel | 1b134c9 | 2014-09-11 15:56:56 +0800 | [diff] [blame] | 445 | port@0 { |
| 446 | reg = <0>; |
| 447 | |
Philipp Zabel | e05c8c9 | 2014-03-05 10:21:00 +0100 | [diff] [blame] | 448 | lvds0_in: endpoint { |
| 449 | remote-endpoint = <&ipu_di0_lvds0>; |
| 450 | }; |
| 451 | }; |
Philipp Zabel | 420714a | 2013-03-27 18:30:44 +0100 | [diff] [blame] | 452 | }; |
| 453 | |
| 454 | lvds-channel@1 { |
Markus Niebel | 1b134c9 | 2014-09-11 15:56:56 +0800 | [diff] [blame] | 455 | #address-cells = <1>; |
| 456 | #size-cells = <0>; |
Philipp Zabel | 420714a | 2013-03-27 18:30:44 +0100 | [diff] [blame] | 457 | reg = <1>; |
Philipp Zabel | 420714a | 2013-03-27 18:30:44 +0100 | [diff] [blame] | 458 | status = "disabled"; |
Philipp Zabel | e05c8c9 | 2014-03-05 10:21:00 +0100 | [diff] [blame] | 459 | |
Markus Niebel | 1b134c9 | 2014-09-11 15:56:56 +0800 | [diff] [blame] | 460 | port@1 { |
| 461 | reg = <1>; |
| 462 | |
Philipp Zabel | e05c8c9 | 2014-03-05 10:21:00 +0100 | [diff] [blame] | 463 | lvds1_in: endpoint { |
Lothar Waßmann | fa1746a | 2014-04-10 10:03:40 +0200 | [diff] [blame] | 464 | remote-endpoint = <&ipu_di1_lvds1>; |
Philipp Zabel | e05c8c9 | 2014-03-05 10:21:00 +0100 | [diff] [blame] | 465 | }; |
| 466 | }; |
Philipp Zabel | 420714a | 2013-03-27 18:30:44 +0100 | [diff] [blame] | 467 | }; |
| 468 | }; |
| 469 | |
Sascha Hauer | 9ae90af | 2012-07-04 12:30:37 +0200 | [diff] [blame] | 470 | pwm1: pwm@53fb4000 { |
| 471 | #pwm-cells = <2>; |
| 472 | compatible = "fsl,imx53-pwm", "fsl,imx27-pwm"; |
| 473 | reg = <0x53fb4000 0x4000>; |
Lucas Stach | 564695d | 2013-11-14 11:18:58 +0100 | [diff] [blame] | 474 | clocks = <&clks IMX5_CLK_PWM1_IPG_GATE>, |
| 475 | <&clks IMX5_CLK_PWM1_HF_GATE>; |
Sascha Hauer | 9ae90af | 2012-07-04 12:30:37 +0200 | [diff] [blame] | 476 | clock-names = "ipg", "per"; |
| 477 | interrupts = <61>; |
| 478 | }; |
| 479 | |
| 480 | pwm2: pwm@53fb8000 { |
| 481 | #pwm-cells = <2>; |
| 482 | compatible = "fsl,imx53-pwm", "fsl,imx27-pwm"; |
| 483 | reg = <0x53fb8000 0x4000>; |
Lucas Stach | 564695d | 2013-11-14 11:18:58 +0100 | [diff] [blame] | 484 | clocks = <&clks IMX5_CLK_PWM2_IPG_GATE>, |
| 485 | <&clks IMX5_CLK_PWM2_HF_GATE>; |
Sascha Hauer | 9ae90af | 2012-07-04 12:30:37 +0200 | [diff] [blame] | 486 | clock-names = "ipg", "per"; |
| 487 | interrupts = <94>; |
| 488 | }; |
| 489 | |
Shawn Guo | 0c456cf | 2012-04-02 14:39:26 +0800 | [diff] [blame] | 490 | uart1: serial@53fbc000 { |
Shawn Guo | 73d2b4c | 2011-10-17 08:42:16 +0800 | [diff] [blame] | 491 | compatible = "fsl,imx53-uart", "fsl,imx21-uart"; |
| 492 | reg = <0x53fbc000 0x4000>; |
| 493 | interrupts = <31>; |
Lucas Stach | 564695d | 2013-11-14 11:18:58 +0100 | [diff] [blame] | 494 | clocks = <&clks IMX5_CLK_UART1_IPG_GATE>, |
| 495 | <&clks IMX5_CLK_UART1_PER_GATE>; |
Fabio Estevam | f40f38d | 2012-11-21 13:43:05 -0200 | [diff] [blame] | 496 | clock-names = "ipg", "per"; |
Shawn Guo | 73d2b4c | 2011-10-17 08:42:16 +0800 | [diff] [blame] | 497 | status = "disabled"; |
| 498 | }; |
| 499 | |
Shawn Guo | 0c456cf | 2012-04-02 14:39:26 +0800 | [diff] [blame] | 500 | uart2: serial@53fc0000 { |
Shawn Guo | 73d2b4c | 2011-10-17 08:42:16 +0800 | [diff] [blame] | 501 | compatible = "fsl,imx53-uart", "fsl,imx21-uart"; |
| 502 | reg = <0x53fc0000 0x4000>; |
| 503 | interrupts = <32>; |
Lucas Stach | 564695d | 2013-11-14 11:18:58 +0100 | [diff] [blame] | 504 | clocks = <&clks IMX5_CLK_UART2_IPG_GATE>, |
| 505 | <&clks IMX5_CLK_UART2_PER_GATE>; |
Fabio Estevam | f40f38d | 2012-11-21 13:43:05 -0200 | [diff] [blame] | 506 | clock-names = "ipg", "per"; |
Shawn Guo | 73d2b4c | 2011-10-17 08:42:16 +0800 | [diff] [blame] | 507 | status = "disabled"; |
| 508 | }; |
| 509 | |
Steffen Trumtrar | a9d1f92 | 2012-07-18 11:42:43 +0200 | [diff] [blame] | 510 | can1: can@53fc8000 { |
| 511 | compatible = "fsl,imx53-flexcan", "fsl,p1010-flexcan"; |
| 512 | reg = <0x53fc8000 0x4000>; |
| 513 | interrupts = <82>; |
Lucas Stach | 564695d | 2013-11-14 11:18:58 +0100 | [diff] [blame] | 514 | clocks = <&clks IMX5_CLK_CAN1_IPG_GATE>, |
| 515 | <&clks IMX5_CLK_CAN1_SERIAL_GATE>; |
Fabio Estevam | f40f38d | 2012-11-21 13:43:05 -0200 | [diff] [blame] | 516 | clock-names = "ipg", "per"; |
Steffen Trumtrar | a9d1f92 | 2012-07-18 11:42:43 +0200 | [diff] [blame] | 517 | status = "disabled"; |
| 518 | }; |
| 519 | |
| 520 | can2: can@53fcc000 { |
| 521 | compatible = "fsl,imx53-flexcan", "fsl,p1010-flexcan"; |
| 522 | reg = <0x53fcc000 0x4000>; |
| 523 | interrupts = <83>; |
Lucas Stach | 564695d | 2013-11-14 11:18:58 +0100 | [diff] [blame] | 524 | clocks = <&clks IMX5_CLK_CAN2_IPG_GATE>, |
| 525 | <&clks IMX5_CLK_CAN2_SERIAL_GATE>; |
Fabio Estevam | f40f38d | 2012-11-21 13:43:05 -0200 | [diff] [blame] | 526 | clock-names = "ipg", "per"; |
Steffen Trumtrar | a9d1f92 | 2012-07-18 11:42:43 +0200 | [diff] [blame] | 527 | status = "disabled"; |
| 528 | }; |
| 529 | |
Philipp Zabel | 8d84c37 | 2013-03-28 17:35:23 +0100 | [diff] [blame] | 530 | src: src@53fd0000 { |
| 531 | compatible = "fsl,imx53-src", "fsl,imx51-src"; |
| 532 | reg = <0x53fd0000 0x4000>; |
| 533 | #reset-cells = <1>; |
| 534 | }; |
| 535 | |
Fabio Estevam | f40f38d | 2012-11-21 13:43:05 -0200 | [diff] [blame] | 536 | clks: ccm@53fd4000{ |
| 537 | compatible = "fsl,imx53-ccm"; |
| 538 | reg = <0x53fd4000 0x4000>; |
| 539 | interrupts = <0 71 0x04 0 72 0x04>; |
| 540 | #clock-cells = <1>; |
| 541 | }; |
| 542 | |
Richard Zhao | 4d19186 | 2011-12-14 09:26:44 +0800 | [diff] [blame] | 543 | gpio5: gpio@53fdc000 { |
Benoît Thébaudeau | aeb2774 | 2012-06-22 21:04:06 +0200 | [diff] [blame] | 544 | compatible = "fsl,imx53-gpio", "fsl,imx35-gpio"; |
Shawn Guo | 73d2b4c | 2011-10-17 08:42:16 +0800 | [diff] [blame] | 545 | reg = <0x53fdc000 0x4000>; |
| 546 | interrupts = <103 104>; |
| 547 | gpio-controller; |
| 548 | #gpio-cells = <2>; |
| 549 | interrupt-controller; |
Shawn Guo | 88cde8b | 2012-07-06 20:03:37 +0800 | [diff] [blame] | 550 | #interrupt-cells = <2>; |
Shawn Guo | 73d2b4c | 2011-10-17 08:42:16 +0800 | [diff] [blame] | 551 | }; |
| 552 | |
Richard Zhao | 4d19186 | 2011-12-14 09:26:44 +0800 | [diff] [blame] | 553 | gpio6: gpio@53fe0000 { |
Benoît Thébaudeau | aeb2774 | 2012-06-22 21:04:06 +0200 | [diff] [blame] | 554 | compatible = "fsl,imx53-gpio", "fsl,imx35-gpio"; |
Shawn Guo | 73d2b4c | 2011-10-17 08:42:16 +0800 | [diff] [blame] | 555 | reg = <0x53fe0000 0x4000>; |
| 556 | interrupts = <105 106>; |
| 557 | gpio-controller; |
| 558 | #gpio-cells = <2>; |
| 559 | interrupt-controller; |
Shawn Guo | 88cde8b | 2012-07-06 20:03:37 +0800 | [diff] [blame] | 560 | #interrupt-cells = <2>; |
Shawn Guo | 73d2b4c | 2011-10-17 08:42:16 +0800 | [diff] [blame] | 561 | }; |
| 562 | |
Richard Zhao | 4d19186 | 2011-12-14 09:26:44 +0800 | [diff] [blame] | 563 | gpio7: gpio@53fe4000 { |
Benoît Thébaudeau | aeb2774 | 2012-06-22 21:04:06 +0200 | [diff] [blame] | 564 | compatible = "fsl,imx53-gpio", "fsl,imx35-gpio"; |
Shawn Guo | 73d2b4c | 2011-10-17 08:42:16 +0800 | [diff] [blame] | 565 | reg = <0x53fe4000 0x4000>; |
| 566 | interrupts = <107 108>; |
| 567 | gpio-controller; |
| 568 | #gpio-cells = <2>; |
| 569 | interrupt-controller; |
Shawn Guo | 88cde8b | 2012-07-06 20:03:37 +0800 | [diff] [blame] | 570 | #interrupt-cells = <2>; |
Shawn Guo | 73d2b4c | 2011-10-17 08:42:16 +0800 | [diff] [blame] | 571 | }; |
| 572 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 573 | i2c3: i2c@53fec000 { |
Shawn Guo | 73d2b4c | 2011-10-17 08:42:16 +0800 | [diff] [blame] | 574 | #address-cells = <1>; |
| 575 | #size-cells = <0>; |
Shawn Guo | 5bdfba2 | 2012-09-14 15:19:00 +0800 | [diff] [blame] | 576 | compatible = "fsl,imx53-i2c", "fsl,imx21-i2c"; |
Shawn Guo | 73d2b4c | 2011-10-17 08:42:16 +0800 | [diff] [blame] | 577 | reg = <0x53fec000 0x4000>; |
| 578 | interrupts = <64>; |
Lucas Stach | 564695d | 2013-11-14 11:18:58 +0100 | [diff] [blame] | 579 | clocks = <&clks IMX5_CLK_I2C3_GATE>; |
Shawn Guo | 73d2b4c | 2011-10-17 08:42:16 +0800 | [diff] [blame] | 580 | status = "disabled"; |
| 581 | }; |
| 582 | |
Shawn Guo | 0c456cf | 2012-04-02 14:39:26 +0800 | [diff] [blame] | 583 | uart4: serial@53ff0000 { |
Shawn Guo | 73d2b4c | 2011-10-17 08:42:16 +0800 | [diff] [blame] | 584 | compatible = "fsl,imx53-uart", "fsl,imx21-uart"; |
| 585 | reg = <0x53ff0000 0x4000>; |
| 586 | interrupts = <13>; |
Lucas Stach | 564695d | 2013-11-14 11:18:58 +0100 | [diff] [blame] | 587 | clocks = <&clks IMX5_CLK_UART4_IPG_GATE>, |
| 588 | <&clks IMX5_CLK_UART4_PER_GATE>; |
Fabio Estevam | f40f38d | 2012-11-21 13:43:05 -0200 | [diff] [blame] | 589 | clock-names = "ipg", "per"; |
Shawn Guo | 73d2b4c | 2011-10-17 08:42:16 +0800 | [diff] [blame] | 590 | status = "disabled"; |
| 591 | }; |
| 592 | }; |
| 593 | |
| 594 | aips@60000000 { /* AIPS2 */ |
| 595 | compatible = "fsl,aips-bus", "simple-bus"; |
| 596 | #address-cells = <1>; |
| 597 | #size-cells = <1>; |
| 598 | reg = <0x60000000 0x10000000>; |
| 599 | ranges; |
| 600 | |
Steffen Trumtrar | ac08281 | 2014-06-25 13:01:30 +0200 | [diff] [blame] | 601 | aipstz2: bridge@63f00000 { |
| 602 | compatible = "fsl,imx53-aipstz"; |
| 603 | reg = <0x63f00000 0x60>; |
| 604 | }; |
| 605 | |
Sascha Hauer | 4f3b2a4 | 2013-06-25 15:51:52 +0200 | [diff] [blame] | 606 | iim: iim@63f98000 { |
| 607 | compatible = "fsl,imx53-iim", "fsl,imx27-iim"; |
| 608 | reg = <0x63f98000 0x4000>; |
| 609 | interrupts = <69>; |
Lucas Stach | 564695d | 2013-11-14 11:18:58 +0100 | [diff] [blame] | 610 | clocks = <&clks IMX5_CLK_IIM_GATE>; |
Sascha Hauer | 4f3b2a4 | 2013-06-25 15:51:52 +0200 | [diff] [blame] | 611 | }; |
| 612 | |
Shawn Guo | 0c456cf | 2012-04-02 14:39:26 +0800 | [diff] [blame] | 613 | uart5: serial@63f90000 { |
Shawn Guo | 73d2b4c | 2011-10-17 08:42:16 +0800 | [diff] [blame] | 614 | compatible = "fsl,imx53-uart", "fsl,imx21-uart"; |
| 615 | reg = <0x63f90000 0x4000>; |
| 616 | interrupts = <86>; |
Lucas Stach | 564695d | 2013-11-14 11:18:58 +0100 | [diff] [blame] | 617 | clocks = <&clks IMX5_CLK_UART5_IPG_GATE>, |
| 618 | <&clks IMX5_CLK_UART5_PER_GATE>; |
Fabio Estevam | f40f38d | 2012-11-21 13:43:05 -0200 | [diff] [blame] | 619 | clock-names = "ipg", "per"; |
Shawn Guo | 73d2b4c | 2011-10-17 08:42:16 +0800 | [diff] [blame] | 620 | status = "disabled"; |
| 621 | }; |
| 622 | |
Martin Fuzzey | a82b7b9 | 2013-01-29 16:46:19 +0100 | [diff] [blame] | 623 | owire: owire@63fa4000 { |
| 624 | compatible = "fsl,imx53-owire", "fsl,imx21-owire"; |
| 625 | reg = <0x63fa4000 0x4000>; |
Lucas Stach | 564695d | 2013-11-14 11:18:58 +0100 | [diff] [blame] | 626 | clocks = <&clks IMX5_CLK_OWIRE_GATE>; |
Martin Fuzzey | a82b7b9 | 2013-01-29 16:46:19 +0100 | [diff] [blame] | 627 | status = "disabled"; |
| 628 | }; |
| 629 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 630 | ecspi2: ecspi@63fac000 { |
Shawn Guo | 73d2b4c | 2011-10-17 08:42:16 +0800 | [diff] [blame] | 631 | #address-cells = <1>; |
| 632 | #size-cells = <0>; |
| 633 | compatible = "fsl,imx53-ecspi", "fsl,imx51-ecspi"; |
| 634 | reg = <0x63fac000 0x4000>; |
| 635 | interrupts = <37>; |
Lucas Stach | 564695d | 2013-11-14 11:18:58 +0100 | [diff] [blame] | 636 | clocks = <&clks IMX5_CLK_ECSPI2_IPG_GATE>, |
| 637 | <&clks IMX5_CLK_ECSPI2_PER_GATE>; |
Fabio Estevam | f40f38d | 2012-11-21 13:43:05 -0200 | [diff] [blame] | 638 | clock-names = "ipg", "per"; |
Shawn Guo | 73d2b4c | 2011-10-17 08:42:16 +0800 | [diff] [blame] | 639 | status = "disabled"; |
| 640 | }; |
| 641 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 642 | sdma: sdma@63fb0000 { |
Shawn Guo | 73d2b4c | 2011-10-17 08:42:16 +0800 | [diff] [blame] | 643 | compatible = "fsl,imx53-sdma", "fsl,imx35-sdma"; |
| 644 | reg = <0x63fb0000 0x4000>; |
| 645 | interrupts = <6>; |
Lucas Stach | 564695d | 2013-11-14 11:18:58 +0100 | [diff] [blame] | 646 | clocks = <&clks IMX5_CLK_SDMA_GATE>, |
| 647 | <&clks IMX5_CLK_SDMA_GATE>; |
Fabio Estevam | f40f38d | 2012-11-21 13:43:05 -0200 | [diff] [blame] | 648 | clock-names = "ipg", "ahb"; |
Huang Shijie | fb72bb2 | 2013-07-02 10:15:29 +0800 | [diff] [blame] | 649 | #dma-cells = <3>; |
Fabio Estevam | 7e4f036 | 2012-08-08 11:28:07 -0300 | [diff] [blame] | 650 | fsl,sdma-ram-script-name = "imx/sdma/sdma-imx53.bin"; |
Shawn Guo | 73d2b4c | 2011-10-17 08:42:16 +0800 | [diff] [blame] | 651 | }; |
| 652 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 653 | cspi: cspi@63fc0000 { |
Shawn Guo | 73d2b4c | 2011-10-17 08:42:16 +0800 | [diff] [blame] | 654 | #address-cells = <1>; |
| 655 | #size-cells = <0>; |
| 656 | compatible = "fsl,imx53-cspi", "fsl,imx35-cspi"; |
| 657 | reg = <0x63fc0000 0x4000>; |
| 658 | interrupts = <38>; |
Lucas Stach | 564695d | 2013-11-14 11:18:58 +0100 | [diff] [blame] | 659 | clocks = <&clks IMX5_CLK_CSPI_IPG_GATE>, |
| 660 | <&clks IMX5_CLK_CSPI_IPG_GATE>; |
Fabio Estevam | f40f38d | 2012-11-21 13:43:05 -0200 | [diff] [blame] | 661 | clock-names = "ipg", "per"; |
Shawn Guo | 73d2b4c | 2011-10-17 08:42:16 +0800 | [diff] [blame] | 662 | status = "disabled"; |
| 663 | }; |
| 664 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 665 | i2c2: i2c@63fc4000 { |
Shawn Guo | 73d2b4c | 2011-10-17 08:42:16 +0800 | [diff] [blame] | 666 | #address-cells = <1>; |
| 667 | #size-cells = <0>; |
Shawn Guo | 5bdfba2 | 2012-09-14 15:19:00 +0800 | [diff] [blame] | 668 | compatible = "fsl,imx53-i2c", "fsl,imx21-i2c"; |
Shawn Guo | 73d2b4c | 2011-10-17 08:42:16 +0800 | [diff] [blame] | 669 | reg = <0x63fc4000 0x4000>; |
| 670 | interrupts = <63>; |
Lucas Stach | 564695d | 2013-11-14 11:18:58 +0100 | [diff] [blame] | 671 | clocks = <&clks IMX5_CLK_I2C2_GATE>; |
Shawn Guo | 73d2b4c | 2011-10-17 08:42:16 +0800 | [diff] [blame] | 672 | status = "disabled"; |
| 673 | }; |
| 674 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 675 | i2c1: i2c@63fc8000 { |
Shawn Guo | 73d2b4c | 2011-10-17 08:42:16 +0800 | [diff] [blame] | 676 | #address-cells = <1>; |
| 677 | #size-cells = <0>; |
Shawn Guo | 5bdfba2 | 2012-09-14 15:19:00 +0800 | [diff] [blame] | 678 | compatible = "fsl,imx53-i2c", "fsl,imx21-i2c"; |
Shawn Guo | 73d2b4c | 2011-10-17 08:42:16 +0800 | [diff] [blame] | 679 | reg = <0x63fc8000 0x4000>; |
| 680 | interrupts = <62>; |
Lucas Stach | 564695d | 2013-11-14 11:18:58 +0100 | [diff] [blame] | 681 | clocks = <&clks IMX5_CLK_I2C1_GATE>; |
Shawn Guo | 73d2b4c | 2011-10-17 08:42:16 +0800 | [diff] [blame] | 682 | status = "disabled"; |
| 683 | }; |
| 684 | |
Shawn Guo | ffc505c | 2012-05-11 13:12:01 +0800 | [diff] [blame] | 685 | ssi1: ssi@63fcc000 { |
Alexander Shiyan | 6ff7f51 | 2014-08-19 20:00:09 +0400 | [diff] [blame] | 686 | #sound-dai-cells = <0>; |
Markus Pargmann | 28f93d0 | 2014-01-17 10:07:42 +0100 | [diff] [blame] | 687 | compatible = "fsl,imx53-ssi", "fsl,imx51-ssi", |
| 688 | "fsl,imx21-ssi"; |
Shawn Guo | ffc505c | 2012-05-11 13:12:01 +0800 | [diff] [blame] | 689 | reg = <0x63fcc000 0x4000>; |
| 690 | interrupts = <29>; |
Fabio Estevam | 685570a | 2014-09-18 20:23:48 -0300 | [diff] [blame] | 691 | clocks = <&clks IMX5_CLK_SSI1_IPG_GATE>, |
| 692 | <&clks IMX5_CLK_SSI1_ROOT_GATE>; |
| 693 | clock-names = "ipg", "baud"; |
Shawn Guo | 5da826a | 2013-07-17 13:50:54 +0800 | [diff] [blame] | 694 | dmas = <&sdma 28 0 0>, |
| 695 | <&sdma 29 0 0>; |
| 696 | dma-names = "rx", "tx"; |
Shawn Guo | ffc505c | 2012-05-11 13:12:01 +0800 | [diff] [blame] | 697 | fsl,fifo-depth = <15>; |
Shawn Guo | ffc505c | 2012-05-11 13:12:01 +0800 | [diff] [blame] | 698 | status = "disabled"; |
| 699 | }; |
| 700 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 701 | audmux: audmux@63fd0000 { |
Shawn Guo | ffc505c | 2012-05-11 13:12:01 +0800 | [diff] [blame] | 702 | compatible = "fsl,imx53-audmux", "fsl,imx31-audmux"; |
| 703 | reg = <0x63fd0000 0x4000>; |
| 704 | status = "disabled"; |
| 705 | }; |
| 706 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 707 | nfc: nand@63fdb000 { |
Sascha Hauer | 75453a0 | 2012-06-06 12:33:16 +0200 | [diff] [blame] | 708 | compatible = "fsl,imx53-nand"; |
| 709 | reg = <0x63fdb000 0x1000 0xf7ff0000 0x10000>; |
| 710 | interrupts = <8>; |
Lucas Stach | 564695d | 2013-11-14 11:18:58 +0100 | [diff] [blame] | 711 | clocks = <&clks IMX5_CLK_NFC_GATE>; |
Sascha Hauer | 75453a0 | 2012-06-06 12:33:16 +0200 | [diff] [blame] | 712 | status = "disabled"; |
| 713 | }; |
| 714 | |
Shawn Guo | ffc505c | 2012-05-11 13:12:01 +0800 | [diff] [blame] | 715 | ssi3: ssi@63fe8000 { |
Alexander Shiyan | 6ff7f51 | 2014-08-19 20:00:09 +0400 | [diff] [blame] | 716 | #sound-dai-cells = <0>; |
Markus Pargmann | 28f93d0 | 2014-01-17 10:07:42 +0100 | [diff] [blame] | 717 | compatible = "fsl,imx53-ssi", "fsl,imx51-ssi", |
| 718 | "fsl,imx21-ssi"; |
Shawn Guo | ffc505c | 2012-05-11 13:12:01 +0800 | [diff] [blame] | 719 | reg = <0x63fe8000 0x4000>; |
| 720 | interrupts = <96>; |
Fabio Estevam | 685570a | 2014-09-18 20:23:48 -0300 | [diff] [blame] | 721 | clocks = <&clks IMX5_CLK_SSI3_IPG_GATE>, |
| 722 | <&clks IMX5_CLK_SSI3_ROOT_GATE>; |
| 723 | clock-names = "ipg", "baud"; |
Shawn Guo | 5da826a | 2013-07-17 13:50:54 +0800 | [diff] [blame] | 724 | dmas = <&sdma 46 0 0>, |
| 725 | <&sdma 47 0 0>; |
| 726 | dma-names = "rx", "tx"; |
Shawn Guo | ffc505c | 2012-05-11 13:12:01 +0800 | [diff] [blame] | 727 | fsl,fifo-depth = <15>; |
Shawn Guo | ffc505c | 2012-05-11 13:12:01 +0800 | [diff] [blame] | 728 | status = "disabled"; |
| 729 | }; |
| 730 | |
Sascha Hauer | 7b7d672 | 2012-11-15 09:31:52 +0100 | [diff] [blame] | 731 | fec: ethernet@63fec000 { |
Shawn Guo | 73d2b4c | 2011-10-17 08:42:16 +0800 | [diff] [blame] | 732 | compatible = "fsl,imx53-fec", "fsl,imx25-fec"; |
| 733 | reg = <0x63fec000 0x4000>; |
| 734 | interrupts = <87>; |
Lucas Stach | 564695d | 2013-11-14 11:18:58 +0100 | [diff] [blame] | 735 | clocks = <&clks IMX5_CLK_FEC_GATE>, |
| 736 | <&clks IMX5_CLK_FEC_GATE>, |
| 737 | <&clks IMX5_CLK_FEC_GATE>; |
Fabio Estevam | f40f38d | 2012-11-21 13:43:05 -0200 | [diff] [blame] | 738 | clock-names = "ipg", "ahb", "ptp"; |
Shawn Guo | 73d2b4c | 2011-10-17 08:42:16 +0800 | [diff] [blame] | 739 | status = "disabled"; |
| 740 | }; |
Philipp Zabel | 19194c2 | 2013-06-04 12:12:22 +0200 | [diff] [blame] | 741 | |
| 742 | tve: tve@63ff0000 { |
| 743 | compatible = "fsl,imx53-tve"; |
| 744 | reg = <0x63ff0000 0x1000>; |
| 745 | interrupts = <92>; |
Lucas Stach | 564695d | 2013-11-14 11:18:58 +0100 | [diff] [blame] | 746 | clocks = <&clks IMX5_CLK_TVE_GATE>, |
| 747 | <&clks IMX5_CLK_IPU_DI1_SEL>; |
Philipp Zabel | 19194c2 | 2013-06-04 12:12:22 +0200 | [diff] [blame] | 748 | clock-names = "tve", "di_sel"; |
Philipp Zabel | 19194c2 | 2013-06-04 12:12:22 +0200 | [diff] [blame] | 749 | status = "disabled"; |
Philipp Zabel | e05c8c9 | 2014-03-05 10:21:00 +0100 | [diff] [blame] | 750 | |
| 751 | port { |
| 752 | tve_in: endpoint { |
| 753 | remote-endpoint = <&ipu_di1_tve>; |
| 754 | }; |
| 755 | }; |
Philipp Zabel | 19194c2 | 2013-06-04 12:12:22 +0200 | [diff] [blame] | 756 | }; |
Fabio Estevam | fbf970f | 2013-06-28 19:49:18 -0300 | [diff] [blame] | 757 | |
| 758 | vpu: vpu@63ff4000 { |
| 759 | compatible = "fsl,imx53-vpu"; |
| 760 | reg = <0x63ff4000 0x1000>; |
| 761 | interrupts = <9>; |
Lothar Waßmann | fa97d2f | 2014-08-13 15:47:47 +0200 | [diff] [blame] | 762 | clocks = <&clks IMX5_CLK_VPU_REFERENCE_GATE>, |
Lucas Stach | 564695d | 2013-11-14 11:18:58 +0100 | [diff] [blame] | 763 | <&clks IMX5_CLK_VPU_GATE>; |
Fabio Estevam | fbf970f | 2013-06-28 19:49:18 -0300 | [diff] [blame] | 764 | clock-names = "per", "ahb"; |
Philipp Zabel | b1e2e54 | 2014-03-19 15:49:24 +0100 | [diff] [blame] | 765 | resets = <&src 1>; |
Fabio Estevam | fbf970f | 2013-06-28 19:49:18 -0300 | [diff] [blame] | 766 | iram = <&ocram>; |
Fabio Estevam | fbf970f | 2013-06-28 19:49:18 -0300 | [diff] [blame] | 767 | }; |
Shawn Guo | 73d2b4c | 2011-10-17 08:42:16 +0800 | [diff] [blame] | 768 | }; |
Philipp Zabel | 481fbe1 | 2013-07-01 11:06:09 +0200 | [diff] [blame] | 769 | |
| 770 | ocram: sram@f8000000 { |
| 771 | compatible = "mmio-sram"; |
| 772 | reg = <0xf8000000 0x20000>; |
Lucas Stach | 564695d | 2013-11-14 11:18:58 +0100 | [diff] [blame] | 773 | clocks = <&clks IMX5_CLK_OCRAM>; |
Philipp Zabel | 481fbe1 | 2013-07-01 11:06:09 +0200 | [diff] [blame] | 774 | }; |
Steffen Trumtrar | 49bdf58 | 2014-08-22 14:02:27 +0200 | [diff] [blame] | 775 | |
| 776 | pmu { |
| 777 | compatible = "arm,cortex-a8-pmu"; |
| 778 | interrupts = <77>; |
| 779 | }; |
Shawn Guo | 73d2b4c | 2011-10-17 08:42:16 +0800 | [diff] [blame] | 780 | }; |
| 781 | }; |