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Thierry Reding731fb452012-09-20 17:06:08 +02001/dts-v1/;
2
Stephen Warren1bd0bd42012-10-17 16:38:21 -06003#include "tegra20-tamonten.dtsi"
Thierry Reding731fb452012-09-20 17:06:08 +02004
5/ {
6 model = "Avionic Design Medcom-Wide board";
7 compatible = "ad,medcom-wide", "ad,tamonten", "nvidia,tegra20";
8
Stephen Warren58ecb232013-11-25 17:53:16 -07009 pwm@7000a000 {
Andrew Chewb69cd982013-03-12 16:40:51 -070010 status = "okay";
11 };
12
Alban Bedelf6826152014-06-19 15:25:50 +020013 host1x@50000000 {
14 dc@54200000 {
15 rgb {
16 status = "okay";
17 nvidia,panel = <&panel>;
18 };
19 };
20 };
21
Thierry Reding731fb452012-09-20 17:06:08 +020022 i2c@7000c000 {
23 wm8903: wm8903@1a {
24 compatible = "wlf,wm8903";
25 reg = <0x1a>;
26 interrupt-parent = <&gpio>;
Stephen Warren6cecf912013-02-13 12:51:51 -070027 interrupts = <TEGRA_GPIO(X, 3) IRQ_TYPE_LEVEL_HIGH>;
Thierry Reding731fb452012-09-20 17:06:08 +020028
29 gpio-controller;
30 #gpio-cells = <2>;
31
32 micdet-cfg = <0>;
33 micdet-delay = <100>;
34 gpio-cfg = <0xffffffff
35 0xffffffff
36 0
37 0xffffffff
38 0xffffffff>;
39 };
40 };
41
Alban Bedelf6826152014-06-19 15:25:50 +020042 backlight: backlight {
Thierry Reding731fb452012-09-20 17:06:08 +020043 compatible = "pwm-backlight";
44 pwms = <&pwm 0 5000000>;
45
46 brightness-levels = <0 4 8 16 32 64 128 255>;
47 default-brightness-level = <6>;
48 };
49
Alban Bedelf6826152014-06-19 15:25:50 +020050 panel: panel {
51 compatible = "innolux,n156bge-l21", "simple-panel";
52
53 power-supply = <&vdd_1v8_reg>, <&vdd_3v3_reg>;
54 enable-gpios = <&gpio TEGRA_GPIO(B, 2) GPIO_ACTIVE_HIGH>;
55
56 backlight = <&backlight>;
57 };
58
Thierry Reding731fb452012-09-20 17:06:08 +020059 sound {
60 compatible = "ad,tegra-audio-wm8903-medcom-wide",
61 "nvidia,tegra-audio-wm8903";
62 nvidia,model = "Avionic Design Medcom-Wide";
63
64 nvidia,audio-routing =
65 "Headphone Jack", "HPOUTR",
66 "Headphone Jack", "HPOUTL",
67 "Int Spk", "ROP",
68 "Int Spk", "RON",
69 "Int Spk", "LOP",
70 "Int Spk", "LON",
71 "Mic Jack", "MICBIAS",
72 "IN1L", "Mic Jack";
73
74 nvidia,i2s-controller = <&tegra_i2s1>;
75 nvidia,audio-codec = <&wm8903>;
76
Stephen Warren3325f1b2013-02-12 17:25:15 -070077 nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>;
78 nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_HIGH>;
Stephen Warrenf9cd2b32013-03-26 16:45:52 -060079
Hiroshi Doyu885a8cf2013-05-22 19:45:32 +030080 clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
81 <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,
82 <&tegra_car TEGRA20_CLK_CDEV1>;
Stephen Warrenf9cd2b32013-03-26 16:45:52 -060083 clock-names = "pll_a", "pll_a_out0", "mclk";
Thierry Reding731fb452012-09-20 17:06:08 +020084 };
Alban Bedel23e63342014-06-19 15:25:49 +020085
86 regulators {
87 vcc_24v_reg: regulator@100 {
88 compatible = "regulator-fixed";
89 reg = <100>;
90 regulator-name = "vcc_24v";
91 regulator-min-microvolt = <24000000>;
92 regulator-max-microvolt = <24000000>;
93 regulator-always-on;
94 };
95
96 vdd_5v0_reg: regulator@101 {
97 compatible = "regulator-fixed";
98 reg = <101>;
99 regulator-name = "vdd_5v0";
100 vin-supply = <&vcc_24v_reg>;
101 regulator-min-microvolt = <5000000>;
102 regulator-max-microvolt = <5000000>;
103 regulator-always-on;
104 };
105
106 vdd_3v3_reg: regulator@102 {
107 compatible = "regulator-fixed";
108 reg = <102>;
109 regulator-name = "vdd_3v3";
110 vin-supply = <&vcc_24v_reg>;
111 regulator-min-microvolt = <3300000>;
112 regulator-max-microvolt = <3300000>;
113 regulator-always-on;
114 };
115
116 vdd_1v8_reg: regulator@103 {
117 compatible = "regulator-fixed";
118 reg = <103>;
119 regulator-name = "vdd_1v8";
120 vin-supply = <&vdd_3v3_reg>;
121 regulator-min-microvolt = <1800000>;
122 regulator-max-microvolt = <1800000>;
123 regulator-always-on;
124 };
125 };
Thierry Reding731fb452012-09-20 17:06:08 +0200126};