John Linn | b85a3ef | 2011-06-20 11:47:27 -0600 | [diff] [blame] | 1 | /* |
Soren Brinkmann | f7b1e9b | 2014-05-05 10:16:08 -0700 | [diff] [blame] | 2 | * Copyright (C) 2011 - 2014 Xilinx |
John Linn | b85a3ef | 2011-06-20 11:47:27 -0600 | [diff] [blame] | 3 | * |
| 4 | * This software is licensed under the terms of the GNU General Public |
| 5 | * License version 2, as published by the Free Software Foundation, and |
| 6 | * may be copied, distributed, and modified under those terms. |
| 7 | * |
| 8 | * This program is distributed in the hope that it will be useful, |
| 9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 11 | * GNU General Public License for more details. |
| 12 | */ |
Josh Cartwright | e06f1a9 | 2012-10-31 12:24:48 -0600 | [diff] [blame] | 13 | /include/ "skeleton.dtsi" |
John Linn | b85a3ef | 2011-06-20 11:47:27 -0600 | [diff] [blame] | 14 | |
John Linn | b85a3ef | 2011-06-20 11:47:27 -0600 | [diff] [blame] | 15 | / { |
Josh Cartwright | e06f1a9 | 2012-10-31 12:24:48 -0600 | [diff] [blame] | 16 | compatible = "xlnx,zynq-7000"; |
John Linn | b85a3ef | 2011-06-20 11:47:27 -0600 | [diff] [blame] | 17 | |
Soren Brinkmann | 41e4cdb | 2013-11-26 17:04:49 -0800 | [diff] [blame] | 18 | cpus { |
| 19 | #address-cells = <1>; |
| 20 | #size-cells = <0>; |
| 21 | |
| 22 | cpu@0 { |
| 23 | compatible = "arm,cortex-a9"; |
| 24 | device_type = "cpu"; |
| 25 | reg = <0>; |
| 26 | clocks = <&clkc 3>; |
Soren Brinkmann | b2bf5d4 | 2014-04-04 16:14:12 -0700 | [diff] [blame] | 27 | clock-latency = <1000>; |
Soren Brinkmann | e1e22df | 2014-05-02 14:07:32 -0700 | [diff] [blame] | 28 | cpu0-supply = <®ulator_vccpint>; |
Soren Brinkmann | cd32529 | 2014-02-19 15:14:44 -0800 | [diff] [blame] | 29 | operating-points = < |
| 30 | /* kHz uV */ |
| 31 | 666667 1000000 |
| 32 | 333334 1000000 |
Soren Brinkmann | cd32529 | 2014-02-19 15:14:44 -0800 | [diff] [blame] | 33 | >; |
Soren Brinkmann | 41e4cdb | 2013-11-26 17:04:49 -0800 | [diff] [blame] | 34 | }; |
| 35 | |
| 36 | cpu@1 { |
| 37 | compatible = "arm,cortex-a9"; |
| 38 | device_type = "cpu"; |
| 39 | reg = <1>; |
| 40 | clocks = <&clkc 3>; |
| 41 | }; |
| 42 | }; |
| 43 | |
Michal Simek | 268a820 | 2013-03-20 13:37:01 +0100 | [diff] [blame] | 44 | pmu { |
| 45 | compatible = "arm,cortex-a9-pmu"; |
| 46 | interrupts = <0 5 4>, <0 6 4>; |
| 47 | interrupt-parent = <&intc>; |
| 48 | reg = < 0xf8891000 0x1000 0xf8893000 0x1000 >; |
| 49 | }; |
| 50 | |
Soren Brinkmann | e1e22df | 2014-05-02 14:07:32 -0700 | [diff] [blame] | 51 | regulator_vccpint: fixedregulator@0 { |
| 52 | compatible = "regulator-fixed"; |
| 53 | regulator-name = "VCCPINT"; |
| 54 | regulator-min-microvolt = <1000000>; |
| 55 | regulator-max-microvolt = <1000000>; |
| 56 | regulator-boot-on; |
| 57 | regulator-always-on; |
| 58 | }; |
| 59 | |
John Linn | b85a3ef | 2011-06-20 11:47:27 -0600 | [diff] [blame] | 60 | amba { |
| 61 | compatible = "simple-bus"; |
| 62 | #address-cells = <1>; |
| 63 | #size-cells = <1>; |
Josh Cartwright | e06f1a9 | 2012-10-31 12:24:48 -0600 | [diff] [blame] | 64 | interrupt-parent = <&intc>; |
John Linn | b85a3ef | 2011-06-20 11:47:27 -0600 | [diff] [blame] | 65 | ranges; |
| 66 | |
Michal Simek | 70472c4 | 2014-09-24 15:28:59 +0200 | [diff] [blame] | 67 | adc: adc@f8007100 { |
Soren Brinkmann | 2155560 | 2014-06-05 09:05:23 -0700 | [diff] [blame] | 68 | compatible = "xlnx,zynq-xadc-1.00.a"; |
| 69 | reg = <0xf8007100 0x20>; |
| 70 | interrupts = <0 7 4>; |
| 71 | interrupt-parent = <&intc>; |
| 72 | clocks = <&clkc 12>; |
Michal Simek | fdf2618 | 2014-07-23 15:03:03 +0200 | [diff] [blame] | 73 | }; |
| 74 | |
| 75 | can0: can@e0008000 { |
| 76 | compatible = "xlnx,zynq-can-1.0"; |
| 77 | status = "disabled"; |
| 78 | clocks = <&clkc 19>, <&clkc 36>; |
| 79 | clock-names = "can_clk", "pclk"; |
| 80 | reg = <0xe0008000 0x1000>; |
| 81 | interrupts = <0 28 4>; |
| 82 | interrupt-parent = <&intc>; |
| 83 | tx-fifo-depth = <0x40>; |
| 84 | rx-fifo-depth = <0x40>; |
| 85 | }; |
| 86 | |
| 87 | can1: can@e0009000 { |
| 88 | compatible = "xlnx,zynq-can-1.0"; |
| 89 | status = "disabled"; |
| 90 | clocks = <&clkc 20>, <&clkc 37>; |
| 91 | clock-names = "can_clk", "pclk"; |
| 92 | reg = <0xe0009000 0x1000>; |
| 93 | interrupts = <0 51 4>; |
| 94 | interrupt-parent = <&intc>; |
| 95 | tx-fifo-depth = <0x40>; |
| 96 | rx-fifo-depth = <0x40>; |
| 97 | }; |
Soren Brinkmann | e0a5c55 | 2014-07-10 11:53:38 -0700 | [diff] [blame] | 98 | |
| 99 | gpio0: gpio@e000a000 { |
| 100 | compatible = "xlnx,zynq-gpio-1.0"; |
| 101 | #gpio-cells = <2>; |
| 102 | clocks = <&clkc 42>; |
| 103 | gpio-controller; |
| 104 | interrupt-parent = <&intc>; |
| 105 | interrupts = <0 20 4>; |
| 106 | reg = <0xe000a000 0x1000>; |
Soren Brinkmann | 2155560 | 2014-06-05 09:05:23 -0700 | [diff] [blame] | 107 | }; |
| 108 | |
Soren Brinkmann | f7b1e9b | 2014-05-05 10:16:08 -0700 | [diff] [blame] | 109 | i2c0: i2c@e0004000 { |
Soren Brinkmann | 0f6faa3 | 2014-04-04 14:27:56 -0700 | [diff] [blame] | 110 | compatible = "cdns,i2c-r1p10"; |
| 111 | status = "disabled"; |
| 112 | clocks = <&clkc 38>; |
| 113 | interrupt-parent = <&intc>; |
| 114 | interrupts = <0 25 4>; |
| 115 | reg = <0xe0004000 0x1000>; |
| 116 | #address-cells = <1>; |
| 117 | #size-cells = <0>; |
| 118 | }; |
| 119 | |
Soren Brinkmann | f7b1e9b | 2014-05-05 10:16:08 -0700 | [diff] [blame] | 120 | i2c1: i2c@e0005000 { |
Soren Brinkmann | 0f6faa3 | 2014-04-04 14:27:56 -0700 | [diff] [blame] | 121 | compatible = "cdns,i2c-r1p10"; |
| 122 | status = "disabled"; |
| 123 | clocks = <&clkc 39>; |
| 124 | interrupt-parent = <&intc>; |
| 125 | interrupts = <0 48 4>; |
| 126 | reg = <0xe0005000 0x1000>; |
| 127 | #address-cells = <1>; |
| 128 | #size-cells = <0>; |
| 129 | }; |
| 130 | |
John Linn | b85a3ef | 2011-06-20 11:47:27 -0600 | [diff] [blame] | 131 | intc: interrupt-controller@f8f01000 { |
Josh Cartwright | f447ed2 | 2012-10-17 19:46:49 -0500 | [diff] [blame] | 132 | compatible = "arm,cortex-a9-gic"; |
| 133 | #interrupt-cells = <3>; |
John Linn | b85a3ef | 2011-06-20 11:47:27 -0600 | [diff] [blame] | 134 | interrupt-controller; |
Josh Cartwright | f447ed2 | 2012-10-17 19:46:49 -0500 | [diff] [blame] | 135 | reg = <0xF8F01000 0x1000>, |
| 136 | <0xF8F00100 0x100>; |
John Linn | b85a3ef | 2011-06-20 11:47:27 -0600 | [diff] [blame] | 137 | }; |
| 138 | |
Michal Simek | 8abef06 | 2014-09-24 15:16:01 +0200 | [diff] [blame] | 139 | L2: cache-controller@f8f02000 { |
Josh Cartwright | 0fcfdbc | 2012-10-23 17:34:22 -0500 | [diff] [blame] | 140 | compatible = "arm,pl310-cache"; |
| 141 | reg = <0xF8F02000 0x1000>; |
Soren Brinkmann | 39c41df9 | 2013-07-31 16:24:59 -0700 | [diff] [blame] | 142 | arm,data-latency = <3 2 2>; |
| 143 | arm,tag-latency = <2 2 2>; |
Josh Cartwright | 0fcfdbc | 2012-10-23 17:34:22 -0500 | [diff] [blame] | 144 | cache-unified; |
| 145 | cache-level = <2>; |
| 146 | }; |
| 147 | |
Michal Simek | 6c7ba41 | 2014-09-24 15:53:39 +0200 | [diff] [blame] | 148 | mc: memory-controller@f8006000 { |
Soren Brinkmann | 36ad5ae | 2014-09-02 14:19:08 -0700 | [diff] [blame] | 149 | compatible = "xlnx,zynq-ddrc-a05"; |
| 150 | reg = <0xf8006000 0x1000>; |
Michal Simek | 2329efb | 2014-10-20 15:15:47 +0200 | [diff] [blame] | 151 | }; |
Soren Brinkmann | 36ad5ae | 2014-09-02 14:19:08 -0700 | [diff] [blame] | 152 | |
Soren Brinkmann | f7b1e9b | 2014-05-05 10:16:08 -0700 | [diff] [blame] | 153 | uart0: serial@e0000000 { |
Soren Brinkmann | 8fe9346 | 2014-04-04 17:23:45 -0700 | [diff] [blame] | 154 | compatible = "xlnx,xuartps", "cdns,uart-r1p8"; |
Soren Brinkmann | ec11ebc | 2013-06-13 09:37:16 -0700 | [diff] [blame] | 155 | status = "disabled"; |
Soren Brinkmann | 30e1e28 | 2013-05-13 10:46:38 -0700 | [diff] [blame] | 156 | clocks = <&clkc 23>, <&clkc 40>; |
Soren Brinkmann | 8fe9346 | 2014-04-04 17:23:45 -0700 | [diff] [blame] | 157 | clock-names = "uart_clk", "pclk"; |
John Linn | b85a3ef | 2011-06-20 11:47:27 -0600 | [diff] [blame] | 158 | reg = <0xE0000000 0x1000>; |
Josh Cartwright | f447ed2 | 2012-10-17 19:46:49 -0500 | [diff] [blame] | 159 | interrupts = <0 27 4>; |
John Linn | b85a3ef | 2011-06-20 11:47:27 -0600 | [diff] [blame] | 160 | }; |
Josh Cartwright | 78d6785 | 2012-10-31 13:45:17 -0600 | [diff] [blame] | 161 | |
Soren Brinkmann | f7b1e9b | 2014-05-05 10:16:08 -0700 | [diff] [blame] | 162 | uart1: serial@e0001000 { |
Soren Brinkmann | 8fe9346 | 2014-04-04 17:23:45 -0700 | [diff] [blame] | 163 | compatible = "xlnx,xuartps", "cdns,uart-r1p8"; |
Soren Brinkmann | ec11ebc | 2013-06-13 09:37:16 -0700 | [diff] [blame] | 164 | status = "disabled"; |
Soren Brinkmann | 30e1e28 | 2013-05-13 10:46:38 -0700 | [diff] [blame] | 165 | clocks = <&clkc 24>, <&clkc 41>; |
Soren Brinkmann | 8fe9346 | 2014-04-04 17:23:45 -0700 | [diff] [blame] | 166 | clock-names = "uart_clk", "pclk"; |
Josh Cartwright | 78d6785 | 2012-10-31 13:45:17 -0600 | [diff] [blame] | 167 | reg = <0xE0001000 0x1000>; |
| 168 | interrupts = <0 50 4>; |
Josh Cartwright | 78d6785 | 2012-10-31 13:45:17 -0600 | [diff] [blame] | 169 | }; |
Josh Cartwright | 0f586fb | 2012-11-08 12:04:26 -0600 | [diff] [blame] | 170 | |
Andreas Färber | f07ab7a | 2014-07-25 13:12:31 +0200 | [diff] [blame] | 171 | spi0: spi@e0006000 { |
| 172 | compatible = "xlnx,zynq-spi-r1p6"; |
| 173 | reg = <0xe0006000 0x1000>; |
| 174 | status = "disabled"; |
| 175 | interrupt-parent = <&intc>; |
| 176 | interrupts = <0 26 4>; |
| 177 | clocks = <&clkc 25>, <&clkc 34>; |
| 178 | clock-names = "ref_clk", "pclk"; |
| 179 | #address-cells = <1>; |
| 180 | #size-cells = <0>; |
| 181 | }; |
| 182 | |
| 183 | spi1: spi@e0007000 { |
| 184 | compatible = "xlnx,zynq-spi-r1p6"; |
| 185 | reg = <0xe0007000 0x1000>; |
| 186 | status = "disabled"; |
| 187 | interrupt-parent = <&intc>; |
| 188 | interrupts = <0 49 4>; |
| 189 | clocks = <&clkc 26>, <&clkc 35>; |
| 190 | clock-names = "ref_clk", "pclk"; |
| 191 | #address-cells = <1>; |
| 192 | #size-cells = <0>; |
| 193 | }; |
| 194 | |
Steffen Trumtrar | 982264c | 2013-12-11 09:29:49 -0800 | [diff] [blame] | 195 | gem0: ethernet@e000b000 { |
| 196 | compatible = "cdns,gem"; |
Soren Brinkmann | b5241fb | 2014-09-16 08:08:38 -0700 | [diff] [blame] | 197 | reg = <0xe000b000 0x1000>; |
Steffen Trumtrar | 982264c | 2013-12-11 09:29:49 -0800 | [diff] [blame] | 198 | status = "disabled"; |
| 199 | interrupts = <0 22 4>; |
| 200 | clocks = <&clkc 30>, <&clkc 30>, <&clkc 13>; |
| 201 | clock-names = "pclk", "hclk", "tx_clk"; |
Soren Brinkmann | edbd35e | 2014-08-20 08:56:58 -0700 | [diff] [blame] | 202 | #address-cells = <1>; |
| 203 | #size-cells = <0>; |
Steffen Trumtrar | 982264c | 2013-12-11 09:29:49 -0800 | [diff] [blame] | 204 | }; |
| 205 | |
| 206 | gem1: ethernet@e000c000 { |
| 207 | compatible = "cdns,gem"; |
Soren Brinkmann | b5241fb | 2014-09-16 08:08:38 -0700 | [diff] [blame] | 208 | reg = <0xe000c000 0x1000>; |
Steffen Trumtrar | 982264c | 2013-12-11 09:29:49 -0800 | [diff] [blame] | 209 | status = "disabled"; |
| 210 | interrupts = <0 45 4>; |
| 211 | clocks = <&clkc 31>, <&clkc 31>, <&clkc 14>; |
| 212 | clock-names = "pclk", "hclk", "tx_clk"; |
Soren Brinkmann | edbd35e | 2014-08-20 08:56:58 -0700 | [diff] [blame] | 213 | #address-cells = <1>; |
| 214 | #size-cells = <0>; |
Steffen Trumtrar | 982264c | 2013-12-11 09:29:49 -0800 | [diff] [blame] | 215 | }; |
| 216 | |
Soren Brinkmann | f7b1e9b | 2014-05-05 10:16:08 -0700 | [diff] [blame] | 217 | sdhci0: sdhci@e0100000 { |
Soren Brinkmann | 3f7c730 | 2013-12-02 10:02:37 -0800 | [diff] [blame] | 218 | compatible = "arasan,sdhci-8.9a"; |
| 219 | status = "disabled"; |
| 220 | clock-names = "clk_xin", "clk_ahb"; |
| 221 | clocks = <&clkc 21>, <&clkc 32>; |
| 222 | interrupt-parent = <&intc>; |
| 223 | interrupts = <0 24 4>; |
| 224 | reg = <0xe0100000 0x1000>; |
Michal Simek | e65b158 | 2014-08-21 12:45:05 +0200 | [diff] [blame] | 225 | }; |
Soren Brinkmann | 3f7c730 | 2013-12-02 10:02:37 -0800 | [diff] [blame] | 226 | |
Soren Brinkmann | f7b1e9b | 2014-05-05 10:16:08 -0700 | [diff] [blame] | 227 | sdhci1: sdhci@e0101000 { |
Soren Brinkmann | 3f7c730 | 2013-12-02 10:02:37 -0800 | [diff] [blame] | 228 | compatible = "arasan,sdhci-8.9a"; |
| 229 | status = "disabled"; |
| 230 | clock-names = "clk_xin", "clk_ahb"; |
| 231 | clocks = <&clkc 22>, <&clkc 33>; |
| 232 | interrupt-parent = <&intc>; |
| 233 | interrupts = <0 47 4>; |
| 234 | reg = <0xe0101000 0x1000>; |
Michal Simek | e65b158 | 2014-08-21 12:45:05 +0200 | [diff] [blame] | 235 | }; |
Soren Brinkmann | 3f7c730 | 2013-12-02 10:02:37 -0800 | [diff] [blame] | 236 | |
Josh Cartwright | 0f586fb | 2012-11-08 12:04:26 -0600 | [diff] [blame] | 237 | slcr: slcr@f8000000 { |
Michal Simek | b0504e3 | 2013-11-18 16:48:19 +0100 | [diff] [blame] | 238 | #address-cells = <1>; |
| 239 | #size-cells = <1>; |
Michal Simek | 016f4dc | 2013-11-26 15:41:31 +0100 | [diff] [blame] | 240 | compatible = "xlnx,zynq-slcr", "syscon"; |
Josh Cartwright | 0f586fb | 2012-11-08 12:04:26 -0600 | [diff] [blame] | 241 | reg = <0xF8000000 0x1000>; |
Michal Simek | b0504e3 | 2013-11-18 16:48:19 +0100 | [diff] [blame] | 242 | ranges; |
| 243 | clkc: clkc@100 { |
| 244 | #clock-cells = <1>; |
| 245 | compatible = "xlnx,ps7-clkc"; |
| 246 | ps-clk-frequency = <33333333>; |
| 247 | fclk-enable = <0>; |
| 248 | clock-output-names = "armpll", "ddrpll", "iopll", "cpu_6or4x", |
| 249 | "cpu_3or2x", "cpu_2x", "cpu_1x", "ddr2x", "ddr3x", |
| 250 | "dci", "lqspi", "smc", "pcap", "gem0", "gem1", |
| 251 | "fclk0", "fclk1", "fclk2", "fclk3", "can0", "can1", |
| 252 | "sdio0", "sdio1", "uart0", "uart1", "spi0", "spi1", |
| 253 | "dma", "usb0_aper", "usb1_aper", "gem0_aper", |
| 254 | "gem1_aper", "sdio0_aper", "sdio1_aper", |
| 255 | "spi0_aper", "spi1_aper", "can0_aper", "can1_aper", |
| 256 | "i2c0_aper", "i2c1_aper", "uart0_aper", "uart1_aper", |
| 257 | "gpio_aper", "lqspi_aper", "smc_aper", "swdt", |
| 258 | "dbg_trc", "dbg_apb"; |
| 259 | reg = <0x100 0x100>; |
Josh Cartwright | 0f586fb | 2012-11-08 12:04:26 -0600 | [diff] [blame] | 260 | }; |
| 261 | }; |
Josh Cartwright | 91dc985 | 2012-10-31 13:56:14 -0600 | [diff] [blame] | 262 | |
Andreas Färber | fbb4add | 2014-07-25 01:00:15 +0200 | [diff] [blame] | 263 | dmac_s: dmac@f8003000 { |
| 264 | compatible = "arm,pl330", "arm,primecell"; |
| 265 | reg = <0xf8003000 0x1000>; |
| 266 | interrupt-parent = <&intc>; |
Michal Simek | 4168358 | 2014-08-21 11:27:05 +0200 | [diff] [blame] | 267 | interrupt-names = "abort", "dma0", "dma1", "dma2", "dma3", |
| 268 | "dma4", "dma5", "dma6", "dma7"; |
Andreas Färber | fbb4add | 2014-07-25 01:00:15 +0200 | [diff] [blame] | 269 | interrupts = <0 13 4>, |
| 270 | <0 14 4>, <0 15 4>, |
| 271 | <0 16 4>, <0 17 4>, |
| 272 | <0 40 4>, <0 41 4>, |
| 273 | <0 42 4>, <0 43 4>; |
| 274 | #dma-cells = <1>; |
| 275 | #dma-channels = <8>; |
| 276 | #dma-requests = <4>; |
| 277 | clocks = <&clkc 27>; |
| 278 | clock-names = "apb_pclk"; |
| 279 | }; |
| 280 | |
Michal Simek | 00f7dc6 | 2013-07-31 09:19:59 +0200 | [diff] [blame] | 281 | devcfg: devcfg@f8007000 { |
| 282 | compatible = "xlnx,zynq-devcfg-1.0"; |
| 283 | reg = <0xf8007000 0x100>; |
Michal Simek | e65b158 | 2014-08-21 12:45:05 +0200 | [diff] [blame] | 284 | }; |
Michal Simek | 00f7dc6 | 2013-07-31 09:19:59 +0200 | [diff] [blame] | 285 | |
Soren Brinkmann | fa94bd5 | 2013-09-18 11:48:38 -0700 | [diff] [blame] | 286 | global_timer: timer@f8f00200 { |
| 287 | compatible = "arm,cortex-a9-global-timer"; |
| 288 | reg = <0xf8f00200 0x20>; |
| 289 | interrupts = <1 11 0x301>; |
| 290 | interrupt-parent = <&intc>; |
| 291 | clocks = <&clkc 4>; |
| 292 | }; |
| 293 | |
Soren Brinkmann | f7b1e9b | 2014-05-05 10:16:08 -0700 | [diff] [blame] | 294 | ttc0: timer@f8001000 { |
Michal Simek | e932900 | 2013-03-20 10:15:28 +0100 | [diff] [blame] | 295 | interrupt-parent = <&intc>; |
Soren Brinkmann | f7b1e9b | 2014-05-05 10:16:08 -0700 | [diff] [blame] | 296 | interrupts = <0 10 4>, <0 11 4>, <0 12 4>; |
Michal Simek | e932900 | 2013-03-20 10:15:28 +0100 | [diff] [blame] | 297 | compatible = "cdns,ttc"; |
Soren Brinkmann | 30e1e28 | 2013-05-13 10:46:38 -0700 | [diff] [blame] | 298 | clocks = <&clkc 6>; |
Josh Cartwright | 91dc985 | 2012-10-31 13:56:14 -0600 | [diff] [blame] | 299 | reg = <0xF8001000 0x1000>; |
Josh Cartwright | 91dc985 | 2012-10-31 13:56:14 -0600 | [diff] [blame] | 300 | }; |
| 301 | |
Soren Brinkmann | f7b1e9b | 2014-05-05 10:16:08 -0700 | [diff] [blame] | 302 | ttc1: timer@f8002000 { |
Michal Simek | e932900 | 2013-03-20 10:15:28 +0100 | [diff] [blame] | 303 | interrupt-parent = <&intc>; |
Soren Brinkmann | f7b1e9b | 2014-05-05 10:16:08 -0700 | [diff] [blame] | 304 | interrupts = <0 37 4>, <0 38 4>, <0 39 4>; |
Michal Simek | e932900 | 2013-03-20 10:15:28 +0100 | [diff] [blame] | 305 | compatible = "cdns,ttc"; |
Soren Brinkmann | 30e1e28 | 2013-05-13 10:46:38 -0700 | [diff] [blame] | 306 | clocks = <&clkc 6>; |
Josh Cartwright | 91dc985 | 2012-10-31 13:56:14 -0600 | [diff] [blame] | 307 | reg = <0xF8002000 0x1000>; |
Josh Cartwright | 91dc985 | 2012-10-31 13:56:14 -0600 | [diff] [blame] | 308 | }; |
Soren Brinkmann | f7b1e9b | 2014-05-05 10:16:08 -0700 | [diff] [blame] | 309 | |
| 310 | scutimer: timer@f8f00600 { |
Michal Simek | 2f34e0a | 2013-03-27 13:36:39 +0100 | [diff] [blame] | 311 | interrupt-parent = <&intc>; |
Soren Brinkmann | f7b1e9b | 2014-05-05 10:16:08 -0700 | [diff] [blame] | 312 | interrupts = <1 13 0x301>; |
Michal Simek | 2f34e0a | 2013-03-27 13:36:39 +0100 | [diff] [blame] | 313 | compatible = "arm,cortex-a9-twd-timer"; |
Soren Brinkmann | f7b1e9b | 2014-05-05 10:16:08 -0700 | [diff] [blame] | 314 | reg = <0xf8f00600 0x20>; |
Soren Brinkmann | 30e1e28 | 2013-05-13 10:46:38 -0700 | [diff] [blame] | 315 | clocks = <&clkc 4>; |
Michal Simek | e65b158 | 2014-08-21 12:45:05 +0200 | [diff] [blame] | 316 | }; |
Michal Simek | 6714297 | 2014-10-02 15:09:15 +0200 | [diff] [blame] | 317 | |
| 318 | watchdog0: watchdog@f8005000 { |
| 319 | clocks = <&clkc 45>; |
| 320 | compatible = "xlnx,zynq-wdt-r1p2"; |
| 321 | device_type = "watchdog"; |
| 322 | interrupt-parent = <&intc>; |
| 323 | interrupts = <0 9 1>; |
| 324 | reg = <0xf8005000 0x1000>; |
| 325 | reset = <0>; |
| 326 | timeout-sec = <10>; |
| 327 | }; |
John Linn | b85a3ef | 2011-06-20 11:47:27 -0600 | [diff] [blame] | 328 | }; |
| 329 | }; |