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Renaud CERRATOe6bb42e2008-06-23 17:05:49 +02001/*
2 * Watchdog driver for Atmel AT91SAM9x processors.
3 *
4 * Copyright (C) 2008 Renaud CERRATO r.cerrato@til-technologies.fr
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12/*
13 * The Watchdog Timer Mode Register can be only written to once. If the
14 * timeout need to be set from Linux, be sure that the bootstrap or the
15 * bootloader doesn't write to this register.
16 */
17
Joe Perches27c766a2012-02-15 15:06:19 -080018#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
19
Renaud CERRATOe6bb42e2008-06-23 17:05:49 +020020#include <linux/errno.h>
Renaud CERRATOe6bb42e2008-06-23 17:05:49 +020021#include <linux/init.h>
Andrew Victor2af29b72009-02-11 21:23:10 +010022#include <linux/io.h>
Renaud CERRATOe6bb42e2008-06-23 17:05:49 +020023#include <linux/kernel.h>
Renaud CERRATOe6bb42e2008-06-23 17:05:49 +020024#include <linux/module.h>
25#include <linux/moduleparam.h>
26#include <linux/platform_device.h>
27#include <linux/types.h>
28#include <linux/watchdog.h>
29#include <linux/jiffies.h>
30#include <linux/timer.h>
31#include <linux/bitops.h>
32#include <linux/uaccess.h>
Fabio Porceddabe49bba2012-11-12 09:37:25 +010033#include <linux/of.h>
Renaud CERRATOe6bb42e2008-06-23 17:05:49 +020034
Jean-Christophe Plagniol-Villarde7b39142011-07-15 01:52:05 +020035#include "at91sam9_wdt.h"
Renaud CERRATOe6bb42e2008-06-23 17:05:49 +020036
37#define DRV_NAME "AT91SAM9 Watchdog"
38
Jean-Christophe PLAGNIOL-VILLARDc1c30a22011-11-02 01:43:31 +080039#define wdt_read(field) \
40 __raw_readl(at91wdt_private.base + field)
41#define wdt_write(field, val) \
42 __raw_writel((val), at91wdt_private.base + field)
43
Renaud CERRATOe6bb42e2008-06-23 17:05:49 +020044/* AT91SAM9 watchdog runs a 12bit counter @ 256Hz,
45 * use this to convert a watchdog
46 * value from/to milliseconds.
47 */
48#define ms_to_ticks(t) (((t << 8) / 1000) - 1)
49#define ticks_to_ms(t) (((t + 1) * 1000) >> 8)
50
51/* Hardware timeout in seconds */
52#define WDT_HW_TIMEOUT 2
53
54/* Timer heartbeat (500ms) */
55#define WDT_TIMEOUT (HZ/2)
56
57/* User land timeout */
58#define WDT_HEARTBEAT 15
Fabio Porceddac1fd5f62013-02-14 09:14:25 +010059static int heartbeat;
Renaud CERRATOe6bb42e2008-06-23 17:05:49 +020060module_param(heartbeat, int, 0);
61MODULE_PARM_DESC(heartbeat, "Watchdog heartbeats in seconds. "
62 "(default = " __MODULE_STRING(WDT_HEARTBEAT) ")");
63
Wim Van Sebroeck86a1e182012-03-05 16:51:11 +010064static bool nowayout = WATCHDOG_NOWAYOUT;
65module_param(nowayout, bool, 0);
Renaud CERRATOe6bb42e2008-06-23 17:05:49 +020066MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started "
67 "(default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
68
Wenyou Yang490ac7af2013-02-01 15:06:21 +080069static struct watchdog_device at91_wdt_dev;
Renaud CERRATOe6bb42e2008-06-23 17:05:49 +020070static void at91_ping(unsigned long data);
71
72static struct {
Jean-Christophe PLAGNIOL-VILLARDc1c30a22011-11-02 01:43:31 +080073 void __iomem *base;
Renaud CERRATOe6bb42e2008-06-23 17:05:49 +020074 unsigned long next_heartbeat; /* the next_heartbeat for the timer */
Renaud CERRATOe6bb42e2008-06-23 17:05:49 +020075 struct timer_list timer; /* The timer that pings the watchdog */
76} at91wdt_private;
77
78/* ......................................................................... */
79
Renaud CERRATOe6bb42e2008-06-23 17:05:49 +020080/*
81 * Reload the watchdog timer. (ie, pat the watchdog)
82 */
83static inline void at91_wdt_reset(void)
84{
Jean-Christophe PLAGNIOL-VILLARDc1c30a22011-11-02 01:43:31 +080085 wdt_write(AT91_WDT_CR, AT91_WDT_KEY | AT91_WDT_WDRSTT);
Renaud CERRATOe6bb42e2008-06-23 17:05:49 +020086}
87
88/*
89 * Timer tick
90 */
91static void at91_ping(unsigned long data)
92{
93 if (time_before(jiffies, at91wdt_private.next_heartbeat) ||
Wenyou Yang490ac7af2013-02-01 15:06:21 +080094 (!watchdog_active(&at91_wdt_dev))) {
Renaud CERRATOe6bb42e2008-06-23 17:05:49 +020095 at91_wdt_reset();
96 mod_timer(&at91wdt_private.timer, jiffies + WDT_TIMEOUT);
97 } else
Joe Perches27c766a2012-02-15 15:06:19 -080098 pr_crit("I will reset your machine !\n");
Renaud CERRATOe6bb42e2008-06-23 17:05:49 +020099}
100
Wenyou Yang490ac7af2013-02-01 15:06:21 +0800101static int at91_wdt_ping(struct watchdog_device *wdd)
Renaud CERRATOe6bb42e2008-06-23 17:05:49 +0200102{
Wenyou Yang490ac7af2013-02-01 15:06:21 +0800103 /* calculate when the next userspace timeout will be */
104 at91wdt_private.next_heartbeat = jiffies + wdd->timeout * HZ;
105 return 0;
Renaud CERRATOe6bb42e2008-06-23 17:05:49 +0200106}
107
Wenyou Yang490ac7af2013-02-01 15:06:21 +0800108static int at91_wdt_start(struct watchdog_device *wdd)
Renaud CERRATOe6bb42e2008-06-23 17:05:49 +0200109{
Wenyou Yang490ac7af2013-02-01 15:06:21 +0800110 /* calculate the next userspace timeout and modify the timer */
111 at91_wdt_ping(wdd);
112 mod_timer(&at91wdt_private.timer, jiffies + WDT_TIMEOUT);
113 return 0;
114}
Renaud CERRATOe6bb42e2008-06-23 17:05:49 +0200115
Wenyou Yang490ac7af2013-02-01 15:06:21 +0800116static int at91_wdt_stop(struct watchdog_device *wdd)
117{
118 /* The watchdog timer hardware can not be stopped... */
119 return 0;
120}
Renaud CERRATOe6bb42e2008-06-23 17:05:49 +0200121
Wenyou Yang490ac7af2013-02-01 15:06:21 +0800122static int at91_wdt_set_timeout(struct watchdog_device *wdd, unsigned int new_timeout)
123{
124 wdd->timeout = new_timeout;
Renaud CERRATOe6bb42e2008-06-23 17:05:49 +0200125 return 0;
126}
127
128/*
129 * Set the watchdog time interval in 1/256Hz (write-once)
130 * Counter is 12 bit.
131 */
132static int at91_wdt_settimeout(unsigned int timeout)
133{
134 unsigned int reg;
135 unsigned int mr;
136
137 /* Check if disabled */
Jean-Christophe PLAGNIOL-VILLARDc1c30a22011-11-02 01:43:31 +0800138 mr = wdt_read(AT91_WDT_MR);
Renaud CERRATOe6bb42e2008-06-23 17:05:49 +0200139 if (mr & AT91_WDT_WDDIS) {
Joe Perches27c766a2012-02-15 15:06:19 -0800140 pr_err("sorry, watchdog is disabled\n");
Renaud CERRATOe6bb42e2008-06-23 17:05:49 +0200141 return -EIO;
142 }
143
144 /*
145 * All counting occurs at SLOW_CLOCK / 128 = 256 Hz
146 *
147 * Since WDV is a 12-bit counter, the maximum period is
148 * 4096 / 256 = 16 seconds.
149 */
150 reg = AT91_WDT_WDRSTEN /* causes watchdog reset */
151 /* | AT91_WDT_WDRPROC causes processor reset only */
152 | AT91_WDT_WDDBGHLT /* disabled in debug mode */
153 | AT91_WDT_WDD /* restart at any time */
154 | (timeout & AT91_WDT_WDV); /* timer value */
Jean-Christophe PLAGNIOL-VILLARDc1c30a22011-11-02 01:43:31 +0800155 wdt_write(AT91_WDT_MR, reg);
Renaud CERRATOe6bb42e2008-06-23 17:05:49 +0200156
157 return 0;
158}
159
Wenyou Yang490ac7af2013-02-01 15:06:21 +0800160/* ......................................................................... */
161
Renaud CERRATOe6bb42e2008-06-23 17:05:49 +0200162static const struct watchdog_info at91_wdt_info = {
163 .identity = DRV_NAME,
Wim Van Sebroecke73a7802009-05-11 18:33:00 +0000164 .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING |
165 WDIOF_MAGICCLOSE,
Renaud CERRATOe6bb42e2008-06-23 17:05:49 +0200166};
167
Wenyou Yang490ac7af2013-02-01 15:06:21 +0800168static const struct watchdog_ops at91_wdt_ops = {
169 .owner = THIS_MODULE,
170 .start = at91_wdt_start,
171 .stop = at91_wdt_stop,
172 .ping = at91_wdt_ping,
173 .set_timeout = at91_wdt_set_timeout,
Renaud CERRATOe6bb42e2008-06-23 17:05:49 +0200174};
175
Wenyou Yang490ac7af2013-02-01 15:06:21 +0800176static struct watchdog_device at91_wdt_dev = {
177 .info = &at91_wdt_info,
178 .ops = &at91_wdt_ops,
Fabio Porceddac1fd5f62013-02-14 09:14:25 +0100179 .timeout = WDT_HEARTBEAT,
Wenyou Yang490ac7af2013-02-01 15:06:21 +0800180 .min_timeout = 1,
181 .max_timeout = 0xFFFF,
Renaud CERRATOe6bb42e2008-06-23 17:05:49 +0200182};
183
184static int __init at91wdt_probe(struct platform_device *pdev)
185{
Jean-Christophe PLAGNIOL-VILLARDc1c30a22011-11-02 01:43:31 +0800186 struct resource *r;
Renaud CERRATOe6bb42e2008-06-23 17:05:49 +0200187 int res;
188
Jean-Christophe PLAGNIOL-VILLARDc1c30a22011-11-02 01:43:31 +0800189 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
190 if (!r)
191 return -ENODEV;
192 at91wdt_private.base = ioremap(r->start, resource_size(r));
193 if (!at91wdt_private.base) {
194 dev_err(&pdev->dev, "failed to map registers, aborting.\n");
195 return -ENOMEM;
196 }
197
Wenyou Yang490ac7af2013-02-01 15:06:21 +0800198 at91_wdt_dev.parent = &pdev->dev;
Fabio Porceddac1fd5f62013-02-14 09:14:25 +0100199 watchdog_init_timeout(&at91_wdt_dev, heartbeat, &pdev->dev);
Wenyou Yang490ac7af2013-02-01 15:06:21 +0800200 watchdog_set_nowayout(&at91_wdt_dev, nowayout);
201
Renaud CERRATOe6bb42e2008-06-23 17:05:49 +0200202 /* Set watchdog */
203 res = at91_wdt_settimeout(ms_to_ticks(WDT_HW_TIMEOUT * 1000));
204 if (res)
205 return res;
206
Wenyou Yang490ac7af2013-02-01 15:06:21 +0800207 res = watchdog_register_device(&at91_wdt_dev);
Renaud CERRATOe6bb42e2008-06-23 17:05:49 +0200208 if (res)
209 return res;
210
Wenyou Yang490ac7af2013-02-01 15:06:21 +0800211 at91wdt_private.next_heartbeat = jiffies + at91_wdt_dev.timeout * HZ;
Renaud CERRATOe6bb42e2008-06-23 17:05:49 +0200212 setup_timer(&at91wdt_private.timer, at91_ping, 0);
213 mod_timer(&at91wdt_private.timer, jiffies + WDT_TIMEOUT);
214
Joe Perches27c766a2012-02-15 15:06:19 -0800215 pr_info("enabled (heartbeat=%d sec, nowayout=%d)\n",
Fabio Porceddac1fd5f62013-02-14 09:14:25 +0100216 at91_wdt_dev.timeout, nowayout);
Renaud CERRATOe6bb42e2008-06-23 17:05:49 +0200217
218 return 0;
219}
220
221static int __exit at91wdt_remove(struct platform_device *pdev)
222{
Wenyou Yang490ac7af2013-02-01 15:06:21 +0800223 watchdog_unregister_device(&at91_wdt_dev);
Renaud CERRATOe6bb42e2008-06-23 17:05:49 +0200224
Wenyou Yang490ac7af2013-02-01 15:06:21 +0800225 pr_warn("I quit now, hardware will probably reboot!\n");
226 del_timer(&at91wdt_private.timer);
Renaud CERRATOe6bb42e2008-06-23 17:05:49 +0200227
Wenyou Yang490ac7af2013-02-01 15:06:21 +0800228 return 0;
Renaud CERRATOe6bb42e2008-06-23 17:05:49 +0200229}
230
Fabio Porceddabe49bba2012-11-12 09:37:25 +0100231#if defined(CONFIG_OF)
Arnd Bergmann6c41e472013-01-25 14:14:27 +0000232static const struct of_device_id at91_wdt_dt_ids[] = {
Fabio Porceddabe49bba2012-11-12 09:37:25 +0100233 { .compatible = "atmel,at91sam9260-wdt" },
234 { /* sentinel */ }
235};
236
237MODULE_DEVICE_TABLE(of, at91_wdt_dt_ids);
238#endif
239
Renaud CERRATOe6bb42e2008-06-23 17:05:49 +0200240static struct platform_driver at91wdt_driver = {
241 .remove = __exit_p(at91wdt_remove),
Renaud CERRATOe6bb42e2008-06-23 17:05:49 +0200242 .driver = {
243 .name = "at91_wdt",
244 .owner = THIS_MODULE,
Fabio Porceddabe49bba2012-11-12 09:37:25 +0100245 .of_match_table = of_match_ptr(at91_wdt_dt_ids),
Renaud CERRATOe6bb42e2008-06-23 17:05:49 +0200246 },
247};
248
Fabio Porcedda1cb92042013-01-09 12:15:27 +0100249module_platform_driver_probe(at91wdt_driver, at91wdt_probe);
Renaud CERRATOe6bb42e2008-06-23 17:05:49 +0200250
251MODULE_AUTHOR("Renaud CERRATO <r.cerrato@til-technologies.fr>");
252MODULE_DESCRIPTION("Watchdog driver for Atmel AT91SAM9x processors");
253MODULE_LICENSE("GPL");