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JeongHyeon Kim699efdd2011-07-21 16:19:19 +09001/* linux/arch/arm/mach-exynos4/mach-origen.c
2 *
3 * Copyright (c) 2011 Insignal Co., Ltd.
4 * http://www.insignal.co.kr/
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9*/
10
11#include <linux/serial_core.h>
12#include <linux/gpio.h>
13#include <linux/mmc/host.h>
14#include <linux/platform_device.h>
15#include <linux/io.h>
16#include <linux/input.h>
Giridhar Maruthy9edff0f2011-08-31 15:58:52 +090017#include <linux/pwm_backlight.h>
Sachin Kamatc86cfdd2011-09-16 21:41:25 +090018#include <linux/gpio_keys.h>
Inderpal Singh6e012802011-10-03 08:51:20 +090019#include <linux/i2c.h>
20#include <linux/regulator/machine.h>
21#include <linux/mfd/max8997.h>
Tushar Behera9421a762011-10-03 09:12:56 +090022#include <linux/lcd.h>
JeongHyeon Kim699efdd2011-07-21 16:19:19 +090023
24#include <asm/mach/arch.h>
25#include <asm/mach-types.h>
26
Tushar Behera9421a762011-10-03 09:12:56 +090027#include <video/platform_lcd.h>
28
JeongHyeon Kim699efdd2011-07-21 16:19:19 +090029#include <plat/regs-serial.h>
Tushar Behera9421a762011-10-03 09:12:56 +090030#include <plat/regs-fb-v4.h>
JeongHyeon Kim699efdd2011-07-21 16:19:19 +090031#include <plat/exynos4.h>
32#include <plat/cpu.h>
33#include <plat/devs.h>
34#include <plat/sdhci.h>
35#include <plat/iic.h>
Sachin Kamat24f9e1f2011-08-31 15:47:16 +090036#include <plat/ehci.h>
37#include <plat/clock.h>
Giridhar Maruthy9edff0f2011-08-31 15:58:52 +090038#include <plat/gpio-cfg.h>
39#include <plat/backlight.h>
Tushar Behera9421a762011-10-03 09:12:56 +090040#include <plat/pd.h>
41#include <plat/fb.h>
JeongHyeon Kim699efdd2011-07-21 16:19:19 +090042
43#include <mach/map.h>
44
45/* Following are default values for UCON, ULCON and UFCON UART registers */
46#define ORIGEN_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
47 S3C2410_UCON_RXILEVEL | \
48 S3C2410_UCON_TXIRQMODE | \
49 S3C2410_UCON_RXIRQMODE | \
50 S3C2410_UCON_RXFIFO_TOI | \
51 S3C2443_UCON_RXERR_IRQEN)
52
53#define ORIGEN_ULCON_DEFAULT S3C2410_LCON_CS8
54
55#define ORIGEN_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
56 S5PV210_UFCON_TXTRIG4 | \
57 S5PV210_UFCON_RXTRIG4)
58
59static struct s3c2410_uartcfg origen_uartcfgs[] __initdata = {
60 [0] = {
61 .hwport = 0,
62 .flags = 0,
63 .ucon = ORIGEN_UCON_DEFAULT,
64 .ulcon = ORIGEN_ULCON_DEFAULT,
65 .ufcon = ORIGEN_UFCON_DEFAULT,
66 },
67 [1] = {
68 .hwport = 1,
69 .flags = 0,
70 .ucon = ORIGEN_UCON_DEFAULT,
71 .ulcon = ORIGEN_ULCON_DEFAULT,
72 .ufcon = ORIGEN_UFCON_DEFAULT,
73 },
74 [2] = {
75 .hwport = 2,
76 .flags = 0,
77 .ucon = ORIGEN_UCON_DEFAULT,
78 .ulcon = ORIGEN_ULCON_DEFAULT,
79 .ufcon = ORIGEN_UFCON_DEFAULT,
80 },
81 [3] = {
82 .hwport = 3,
83 .flags = 0,
84 .ucon = ORIGEN_UCON_DEFAULT,
85 .ulcon = ORIGEN_ULCON_DEFAULT,
86 .ufcon = ORIGEN_UFCON_DEFAULT,
87 },
88};
89
Inderpal Singh6e012802011-10-03 08:51:20 +090090static struct regulator_consumer_supply __initdata ldo3_consumer[] = {
91 REGULATOR_SUPPLY("vdd11", "s5p-mipi-csis.0"), /* MIPI */
Sachin Kamat5dfb1aa2011-10-10 19:54:53 +090092 REGULATOR_SUPPLY("vdd", "exynos4-hdmi"), /* HDMI */
93 REGULATOR_SUPPLY("vdd_pll", "exynos4-hdmi"), /* HDMI */
Inderpal Singh6e012802011-10-03 08:51:20 +090094};
95static struct regulator_consumer_supply __initdata ldo6_consumer[] = {
96 REGULATOR_SUPPLY("vdd18", "s5p-mipi-csis.0"), /* MIPI */
97};
98static struct regulator_consumer_supply __initdata ldo7_consumer[] = {
99 REGULATOR_SUPPLY("avdd", "alc5625"), /* Realtek ALC5625 */
100};
101static struct regulator_consumer_supply __initdata ldo8_consumer[] = {
102 REGULATOR_SUPPLY("vdd", "s5p-adc"), /* ADC */
Sachin Kamat5dfb1aa2011-10-10 19:54:53 +0900103 REGULATOR_SUPPLY("vdd_osc", "exynos4-hdmi"), /* HDMI */
Inderpal Singh6e012802011-10-03 08:51:20 +0900104};
105static struct regulator_consumer_supply __initdata ldo9_consumer[] = {
106 REGULATOR_SUPPLY("dvdd", "swb-a31"), /* AR6003 WLAN & CSR 8810 BT */
107};
108static struct regulator_consumer_supply __initdata ldo11_consumer[] = {
109 REGULATOR_SUPPLY("dvdd", "alc5625"), /* Realtek ALC5625 */
110};
111static struct regulator_consumer_supply __initdata ldo14_consumer[] = {
112 REGULATOR_SUPPLY("avdd18", "swb-a31"), /* AR6003 WLAN & CSR 8810 BT */
113};
114static struct regulator_consumer_supply __initdata ldo17_consumer[] = {
115 REGULATOR_SUPPLY("vdd33", "swb-a31"), /* AR6003 WLAN & CSR 8810 BT */
116};
117static struct regulator_consumer_supply __initdata buck1_consumer[] = {
118 REGULATOR_SUPPLY("vdd_arm", NULL), /* CPUFREQ */
119};
120static struct regulator_consumer_supply __initdata buck2_consumer[] = {
121 REGULATOR_SUPPLY("vdd_int", NULL), /* CPUFREQ */
122};
123static struct regulator_consumer_supply __initdata buck3_consumer[] = {
124 REGULATOR_SUPPLY("vdd_g3d", "mali_drm"), /* G3D */
125};
126static struct regulator_consumer_supply __initdata buck7_consumer[] = {
127 REGULATOR_SUPPLY("vcc", "platform-lcd"), /* LCD */
128};
129
130static struct regulator_init_data __initdata max8997_ldo1_data = {
131 .constraints = {
132 .name = "VDD_ABB_3.3V",
133 .min_uV = 3300000,
134 .max_uV = 3300000,
135 .apply_uV = 1,
136 .state_mem = {
137 .disabled = 1,
138 },
139 },
140};
141
142static struct regulator_init_data __initdata max8997_ldo2_data = {
143 .constraints = {
144 .name = "VDD_ALIVE_1.1V",
145 .min_uV = 1100000,
146 .max_uV = 1100000,
147 .apply_uV = 1,
148 .always_on = 1,
149 .state_mem = {
150 .enabled = 1,
151 },
152 },
153};
154
155static struct regulator_init_data __initdata max8997_ldo3_data = {
156 .constraints = {
157 .name = "VMIPI_1.1V",
158 .min_uV = 1100000,
159 .max_uV = 1100000,
160 .apply_uV = 1,
161 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
162 .state_mem = {
163 .disabled = 1,
164 },
165 },
166 .num_consumer_supplies = ARRAY_SIZE(ldo3_consumer),
167 .consumer_supplies = ldo3_consumer,
168};
169
170static struct regulator_init_data __initdata max8997_ldo4_data = {
171 .constraints = {
172 .name = "VDD_RTC_1.8V",
173 .min_uV = 1800000,
174 .max_uV = 1800000,
175 .apply_uV = 1,
176 .always_on = 1,
177 .state_mem = {
178 .disabled = 1,
179 },
180 },
181};
182
183static struct regulator_init_data __initdata max8997_ldo6_data = {
184 .constraints = {
185 .name = "VMIPI_1.8V",
186 .min_uV = 1800000,
187 .max_uV = 1800000,
188 .apply_uV = 1,
189 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
190 .state_mem = {
191 .disabled = 1,
192 },
193 },
194 .num_consumer_supplies = ARRAY_SIZE(ldo6_consumer),
195 .consumer_supplies = ldo6_consumer,
196};
197
198static struct regulator_init_data __initdata max8997_ldo7_data = {
199 .constraints = {
200 .name = "VDD_AUD_1.8V",
201 .min_uV = 1800000,
202 .max_uV = 1800000,
203 .apply_uV = 1,
204 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
205 .state_mem = {
206 .disabled = 1,
207 },
208 },
209 .num_consumer_supplies = ARRAY_SIZE(ldo7_consumer),
210 .consumer_supplies = ldo7_consumer,
211};
212
213static struct regulator_init_data __initdata max8997_ldo8_data = {
214 .constraints = {
215 .name = "VADC_3.3V",
216 .min_uV = 3300000,
217 .max_uV = 3300000,
218 .apply_uV = 1,
219 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
220 .state_mem = {
221 .disabled = 1,
222 },
223 },
224 .num_consumer_supplies = ARRAY_SIZE(ldo8_consumer),
225 .consumer_supplies = ldo8_consumer,
226};
227
228static struct regulator_init_data __initdata max8997_ldo9_data = {
229 .constraints = {
230 .name = "DVDD_SWB_2.8V",
231 .min_uV = 2800000,
232 .max_uV = 2800000,
233 .apply_uV = 1,
234 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
235 .state_mem = {
236 .disabled = 1,
237 },
238 },
239 .num_consumer_supplies = ARRAY_SIZE(ldo9_consumer),
240 .consumer_supplies = ldo9_consumer,
241};
242
243static struct regulator_init_data __initdata max8997_ldo10_data = {
244 .constraints = {
245 .name = "VDD_PLL_1.1V",
246 .min_uV = 1100000,
247 .max_uV = 1100000,
248 .apply_uV = 1,
249 .always_on = 1,
250 .state_mem = {
251 .disabled = 1,
252 },
253 },
254};
255
256static struct regulator_init_data __initdata max8997_ldo11_data = {
257 .constraints = {
258 .name = "VDD_AUD_3V",
259 .min_uV = 3000000,
260 .max_uV = 3000000,
261 .apply_uV = 1,
262 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
263 .state_mem = {
264 .disabled = 1,
265 },
266 },
267 .num_consumer_supplies = ARRAY_SIZE(ldo11_consumer),
268 .consumer_supplies = ldo11_consumer,
269};
270
271static struct regulator_init_data __initdata max8997_ldo14_data = {
272 .constraints = {
273 .name = "AVDD18_SWB_1.8V",
274 .min_uV = 1800000,
275 .max_uV = 1800000,
276 .apply_uV = 1,
277 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
278 .state_mem = {
279 .disabled = 1,
280 },
281 },
282 .num_consumer_supplies = ARRAY_SIZE(ldo14_consumer),
283 .consumer_supplies = ldo14_consumer,
284};
285
286static struct regulator_init_data __initdata max8997_ldo17_data = {
287 .constraints = {
288 .name = "VDD_SWB_3.3V",
289 .min_uV = 3300000,
290 .max_uV = 3300000,
291 .apply_uV = 1,
292 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
293 .state_mem = {
294 .disabled = 1,
295 },
296 },
297 .num_consumer_supplies = ARRAY_SIZE(ldo17_consumer),
298 .consumer_supplies = ldo17_consumer,
299};
300
301static struct regulator_init_data __initdata max8997_ldo21_data = {
302 .constraints = {
303 .name = "VDD_MIF_1.2V",
304 .min_uV = 1200000,
305 .max_uV = 1200000,
306 .apply_uV = 1,
307 .always_on = 1,
308 .state_mem = {
309 .disabled = 1,
310 },
311 },
312};
313
314static struct regulator_init_data __initdata max8997_buck1_data = {
315 .constraints = {
316 .name = "VDD_ARM_1.2V",
317 .min_uV = 950000,
318 .max_uV = 1350000,
319 .always_on = 1,
320 .boot_on = 1,
321 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
322 .state_mem = {
323 .disabled = 1,
324 },
325 },
326 .num_consumer_supplies = ARRAY_SIZE(buck1_consumer),
327 .consumer_supplies = buck1_consumer,
328};
329
330static struct regulator_init_data __initdata max8997_buck2_data = {
331 .constraints = {
332 .name = "VDD_INT_1.1V",
333 .min_uV = 900000,
334 .max_uV = 1100000,
335 .always_on = 1,
336 .boot_on = 1,
337 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
338 .state_mem = {
339 .disabled = 1,
340 },
341 },
342 .num_consumer_supplies = ARRAY_SIZE(buck2_consumer),
343 .consumer_supplies = buck2_consumer,
344};
345
346static struct regulator_init_data __initdata max8997_buck3_data = {
347 .constraints = {
348 .name = "VDD_G3D_1.1V",
349 .min_uV = 900000,
350 .max_uV = 1100000,
351 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
352 REGULATOR_CHANGE_STATUS,
353 .state_mem = {
354 .disabled = 1,
355 },
356 },
357 .num_consumer_supplies = ARRAY_SIZE(buck3_consumer),
358 .consumer_supplies = buck3_consumer,
359};
360
361static struct regulator_init_data __initdata max8997_buck5_data = {
362 .constraints = {
363 .name = "VDDQ_M1M2_1.2V",
364 .min_uV = 1200000,
365 .max_uV = 1200000,
366 .apply_uV = 1,
367 .always_on = 1,
368 .state_mem = {
369 .disabled = 1,
370 },
371 },
372};
373
374static struct regulator_init_data __initdata max8997_buck7_data = {
375 .constraints = {
376 .name = "VDD_LCD_3.3V",
377 .min_uV = 3300000,
378 .max_uV = 3300000,
379 .boot_on = 1,
380 .apply_uV = 1,
381 .valid_ops_mask = REGULATOR_CHANGE_STATUS,
382 .state_mem = {
383 .disabled = 1
384 },
385 },
386 .num_consumer_supplies = ARRAY_SIZE(buck7_consumer),
387 .consumer_supplies = buck7_consumer,
388};
389
390static struct max8997_regulator_data __initdata origen_max8997_regulators[] = {
391 { MAX8997_LDO1, &max8997_ldo1_data },
392 { MAX8997_LDO2, &max8997_ldo2_data },
393 { MAX8997_LDO3, &max8997_ldo3_data },
394 { MAX8997_LDO4, &max8997_ldo4_data },
395 { MAX8997_LDO6, &max8997_ldo6_data },
396 { MAX8997_LDO7, &max8997_ldo7_data },
397 { MAX8997_LDO8, &max8997_ldo8_data },
398 { MAX8997_LDO9, &max8997_ldo9_data },
399 { MAX8997_LDO10, &max8997_ldo10_data },
400 { MAX8997_LDO11, &max8997_ldo11_data },
401 { MAX8997_LDO14, &max8997_ldo14_data },
402 { MAX8997_LDO17, &max8997_ldo17_data },
403 { MAX8997_LDO21, &max8997_ldo21_data },
404 { MAX8997_BUCK1, &max8997_buck1_data },
405 { MAX8997_BUCK2, &max8997_buck2_data },
406 { MAX8997_BUCK3, &max8997_buck3_data },
407 { MAX8997_BUCK5, &max8997_buck5_data },
408 { MAX8997_BUCK7, &max8997_buck7_data },
409};
410
411struct max8997_platform_data __initdata origen_max8997_pdata = {
412 .num_regulators = ARRAY_SIZE(origen_max8997_regulators),
413 .regulators = origen_max8997_regulators,
414
415 .wakeup = true,
416 .buck1_gpiodvs = false,
417 .buck2_gpiodvs = false,
418 .buck5_gpiodvs = false,
419 .irq_base = IRQ_GPIO_END + 1,
420
421 .ignore_gpiodvs_side_effect = true,
422 .buck125_default_idx = 0x0,
423
424 .buck125_gpios[0] = EXYNOS4_GPX0(0),
425 .buck125_gpios[1] = EXYNOS4_GPX0(1),
426 .buck125_gpios[2] = EXYNOS4_GPX0(2),
427
428 .buck1_voltage[0] = 1350000,
429 .buck1_voltage[1] = 1300000,
430 .buck1_voltage[2] = 1250000,
431 .buck1_voltage[3] = 1200000,
432 .buck1_voltage[4] = 1150000,
433 .buck1_voltage[5] = 1100000,
434 .buck1_voltage[6] = 1000000,
435 .buck1_voltage[7] = 950000,
436
437 .buck2_voltage[0] = 1100000,
438 .buck2_voltage[1] = 1100000,
439 .buck2_voltage[2] = 1100000,
440 .buck2_voltage[3] = 1100000,
441 .buck2_voltage[4] = 1000000,
442 .buck2_voltage[5] = 1000000,
443 .buck2_voltage[6] = 1000000,
444 .buck2_voltage[7] = 1000000,
445
446 .buck5_voltage[0] = 1200000,
447 .buck5_voltage[1] = 1200000,
448 .buck5_voltage[2] = 1200000,
449 .buck5_voltage[3] = 1200000,
450 .buck5_voltage[4] = 1200000,
451 .buck5_voltage[5] = 1200000,
452 .buck5_voltage[6] = 1200000,
453 .buck5_voltage[7] = 1200000,
454};
455
456/* I2C0 */
457static struct i2c_board_info i2c0_devs[] __initdata = {
458 {
459 I2C_BOARD_INFO("max8997", (0xCC >> 1)),
460 .platform_data = &origen_max8997_pdata,
461 .irq = IRQ_EINT(4),
462 },
463};
464
Tushar Beheracf1dad92011-08-31 16:57:37 +0900465static struct s3c_sdhci_platdata origen_hsmmc0_pdata __initdata = {
466 .cd_type = S3C_SDHCI_CD_INTERNAL,
467 .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
468};
469
JeongHyeon Kim699efdd2011-07-21 16:19:19 +0900470static struct s3c_sdhci_platdata origen_hsmmc2_pdata __initdata = {
Tushar Behera92e41ef2011-08-31 16:01:15 +0900471 .cd_type = S3C_SDHCI_CD_INTERNAL,
JeongHyeon Kim699efdd2011-07-21 16:19:19 +0900472 .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
473};
474
Sachin Kamat24f9e1f2011-08-31 15:47:16 +0900475/* USB EHCI */
476static struct s5p_ehci_platdata origen_ehci_pdata;
477
478static void __init origen_ehci_init(void)
479{
480 struct s5p_ehci_platdata *pdata = &origen_ehci_pdata;
481
482 s5p_ehci_set_platdata(pdata);
483}
484
Sachin Kamatc86cfdd2011-09-16 21:41:25 +0900485static struct gpio_keys_button origen_gpio_keys_table[] = {
486 {
487 .code = KEY_MENU,
488 .gpio = EXYNOS4_GPX1(5),
489 .desc = "gpio-keys: KEY_MENU",
490 .type = EV_KEY,
491 .active_low = 1,
492 .wakeup = 1,
493 .debounce_interval = 1,
494 }, {
495 .code = KEY_HOME,
496 .gpio = EXYNOS4_GPX1(6),
497 .desc = "gpio-keys: KEY_HOME",
498 .type = EV_KEY,
499 .active_low = 1,
500 .wakeup = 1,
501 .debounce_interval = 1,
502 }, {
503 .code = KEY_BACK,
504 .gpio = EXYNOS4_GPX1(7),
505 .desc = "gpio-keys: KEY_BACK",
506 .type = EV_KEY,
507 .active_low = 1,
508 .wakeup = 1,
509 .debounce_interval = 1,
510 }, {
511 .code = KEY_UP,
512 .gpio = EXYNOS4_GPX2(0),
513 .desc = "gpio-keys: KEY_UP",
514 .type = EV_KEY,
515 .active_low = 1,
516 .wakeup = 1,
517 .debounce_interval = 1,
518 }, {
519 .code = KEY_DOWN,
520 .gpio = EXYNOS4_GPX2(1),
521 .desc = "gpio-keys: KEY_DOWN",
522 .type = EV_KEY,
523 .active_low = 1,
524 .wakeup = 1,
525 .debounce_interval = 1,
526 },
527};
528
529static struct gpio_keys_platform_data origen_gpio_keys_data = {
530 .buttons = origen_gpio_keys_table,
531 .nbuttons = ARRAY_SIZE(origen_gpio_keys_table),
532};
533
534static struct platform_device origen_device_gpiokeys = {
535 .name = "gpio-keys",
536 .dev = {
537 .platform_data = &origen_gpio_keys_data,
538 },
539};
540
Tushar Behera9421a762011-10-03 09:12:56 +0900541static void lcd_hv070wsa_set_power(struct plat_lcd_data *pd, unsigned int power)
542{
543 int ret;
544
545 if (power)
546 ret = gpio_request_one(EXYNOS4_GPE3(4),
547 GPIOF_OUT_INIT_HIGH, "GPE3_4");
548 else
549 ret = gpio_request_one(EXYNOS4_GPE3(4),
550 GPIOF_OUT_INIT_LOW, "GPE3_4");
551
552 gpio_free(EXYNOS4_GPE3(4));
553
554 if (ret)
555 pr_err("failed to request gpio for LCD power: %d\n", ret);
556}
557
558static struct plat_lcd_data origen_lcd_hv070wsa_data = {
559 .set_power = lcd_hv070wsa_set_power,
560};
561
562static struct platform_device origen_lcd_hv070wsa = {
563 .name = "platform-lcd",
564 .dev.parent = &s5p_device_fimd0.dev,
565 .dev.platform_data = &origen_lcd_hv070wsa_data,
566};
567
568static struct s3c_fb_pd_win origen_fb_win0 = {
569 .win_mode = {
570 .left_margin = 64,
571 .right_margin = 16,
572 .upper_margin = 64,
573 .lower_margin = 16,
574 .hsync_len = 48,
575 .vsync_len = 3,
576 .xres = 1024,
577 .yres = 600,
578 },
579 .max_bpp = 32,
580 .default_bpp = 24,
581};
582
583static struct s3c_fb_platdata origen_lcd_pdata __initdata = {
584 .win[0] = &origen_fb_win0,
585 .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
586 .vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
587 .setup_gpio = exynos4_fimd0_gpio_setup_24bpp,
588};
589
JeongHyeon Kim699efdd2011-07-21 16:19:19 +0900590static struct platform_device *origen_devices[] __initdata = {
591 &s3c_device_hsmmc2,
Tushar Beheracf1dad92011-08-31 16:57:37 +0900592 &s3c_device_hsmmc0,
Tushar Behera9421a762011-10-03 09:12:56 +0900593 &s3c_device_i2c0,
JeongHyeon Kim699efdd2011-07-21 16:19:19 +0900594 &s3c_device_rtc,
595 &s3c_device_wdt,
Sachin Kamat24f9e1f2011-08-31 15:47:16 +0900596 &s5p_device_ehci,
Sachin Kamat6f8eb322011-08-31 15:52:27 +0900597 &s5p_device_fimc0,
598 &s5p_device_fimc1,
599 &s5p_device_fimc2,
600 &s5p_device_fimc3,
Tushar Behera9421a762011-10-03 09:12:56 +0900601 &s5p_device_fimd0,
Sachin Kamat6ca3f8b2011-09-17 11:42:43 +0900602 &s5p_device_hdmi,
603 &s5p_device_i2c_hdmiphy,
604 &s5p_device_mixer,
Tushar Behera9421a762011-10-03 09:12:56 +0900605 &exynos4_device_pd[PD_LCD0],
Sachin Kamat3c766692011-10-03 09:16:53 +0900606 &exynos4_device_pd[PD_TV],
Sachin Kamatf0e38e32011-10-10 19:54:59 +0900607 &exynos4_device_pd[PD_G3D],
608 &exynos4_device_pd[PD_LCD1],
609 &exynos4_device_pd[PD_CAM],
610 &exynos4_device_pd[PD_GPS],
Sachin Kamatc86cfdd2011-09-16 21:41:25 +0900611 &origen_device_gpiokeys,
Tushar Behera9421a762011-10-03 09:12:56 +0900612 &origen_lcd_hv070wsa,
JeongHyeon Kim699efdd2011-07-21 16:19:19 +0900613};
614
Giridhar Maruthy9edff0f2011-08-31 15:58:52 +0900615/* LCD Backlight data */
616static struct samsung_bl_gpio_info origen_bl_gpio_info = {
Inderpal Singh6e012802011-10-03 08:51:20 +0900617 .no = EXYNOS4_GPD0(0),
618 .func = S3C_GPIO_SFN(2),
Giridhar Maruthy9edff0f2011-08-31 15:58:52 +0900619};
620
621static struct platform_pwm_backlight_data origen_bl_data = {
Inderpal Singh6e012802011-10-03 08:51:20 +0900622 .pwm_id = 0,
623 .pwm_period_ns = 1000,
Giridhar Maruthy9edff0f2011-08-31 15:58:52 +0900624};
625
Sachin Kamat3c766692011-10-03 09:16:53 +0900626static void s5p_tv_setup(void)
627{
628 /* Direct HPD to HDMI chip */
629 gpio_request_one(EXYNOS4_GPX3(7), GPIOF_IN, "hpd-plug");
630 s3c_gpio_cfgpin(EXYNOS4_GPX3(7), S3C_GPIO_SFN(0x3));
631 s3c_gpio_setpull(EXYNOS4_GPX3(7), S3C_GPIO_PULL_NONE);
632}
633
JeongHyeon Kim699efdd2011-07-21 16:19:19 +0900634static void __init origen_map_io(void)
635{
636 s5p_init_io(NULL, 0, S5P_VA_CHIPID);
637 s3c24xx_init_clocks(24000000);
638 s3c24xx_init_uarts(origen_uartcfgs, ARRAY_SIZE(origen_uartcfgs));
639}
640
Inderpal Singh6e012802011-10-03 08:51:20 +0900641static void __init origen_power_init(void)
642{
643 gpio_request(EXYNOS4_GPX0(4), "PMIC_IRQ");
644 s3c_gpio_cfgpin(EXYNOS4_GPX0(4), S3C_GPIO_SFN(0xf));
645 s3c_gpio_setpull(EXYNOS4_GPX0(4), S3C_GPIO_PULL_NONE);
646}
647
JeongHyeon Kim699efdd2011-07-21 16:19:19 +0900648static void __init origen_machine_init(void)
649{
Inderpal Singh6e012802011-10-03 08:51:20 +0900650 origen_power_init();
651
652 s3c_i2c0_set_platdata(NULL);
653 i2c_register_board_info(0, i2c0_devs, ARRAY_SIZE(i2c0_devs));
654
Tushar Beheracf1dad92011-08-31 16:57:37 +0900655 /*
656 * Since sdhci instance 2 can contain a bootable media,
657 * sdhci instance 0 is registered after instance 2.
658 */
JeongHyeon Kim699efdd2011-07-21 16:19:19 +0900659 s3c_sdhci2_set_platdata(&origen_hsmmc2_pdata);
Tushar Beheracf1dad92011-08-31 16:57:37 +0900660 s3c_sdhci0_set_platdata(&origen_hsmmc0_pdata);
Sachin Kamat24f9e1f2011-08-31 15:47:16 +0900661
662 origen_ehci_init();
663 clk_xusbxti.rate = 24000000;
664
Sachin Kamat3c766692011-10-03 09:16:53 +0900665 s5p_tv_setup();
Sachin Kamat6ca3f8b2011-09-17 11:42:43 +0900666 s5p_i2c_hdmiphy_set_platdata(NULL);
667
Tushar Behera9421a762011-10-03 09:12:56 +0900668 s5p_fimd0_set_platdata(&origen_lcd_pdata);
669
JeongHyeon Kim699efdd2011-07-21 16:19:19 +0900670 platform_add_devices(origen_devices, ARRAY_SIZE(origen_devices));
Tushar Behera9421a762011-10-03 09:12:56 +0900671 s5p_device_fimd0.dev.parent = &exynos4_device_pd[PD_LCD0].dev;
Giridhar Maruthy9edff0f2011-08-31 15:58:52 +0900672
Sachin Kamat3c766692011-10-03 09:16:53 +0900673 s5p_device_hdmi.dev.parent = &exynos4_device_pd[PD_TV].dev;
674 s5p_device_mixer.dev.parent = &exynos4_device_pd[PD_TV].dev;
675
Giridhar Maruthy9edff0f2011-08-31 15:58:52 +0900676 samsung_bl_set(&origen_bl_gpio_info, &origen_bl_data);
JeongHyeon Kim699efdd2011-07-21 16:19:19 +0900677}
678
679MACHINE_START(ORIGEN, "ORIGEN")
680 /* Maintainer: JeongHyeon Kim <jhkim@insignal.co.kr> */
Tushar Behera1abd3282011-09-19 20:09:01 +0900681 .atag_offset = 0x100,
JeongHyeon Kim699efdd2011-07-21 16:19:19 +0900682 .init_irq = exynos4_init_irq,
683 .map_io = origen_map_io,
684 .init_machine = origen_machine_init,
685 .timer = &exynos4_timer,
686MACHINE_END