Lukasz Majewski | 8b9bc46 | 2012-05-04 14:17:11 +0200 | [diff] [blame] | 1 | /** |
Anton Tikhomirov | dfbc6fa | 2011-04-21 17:06:43 +0900 | [diff] [blame] | 2 | * Copyright (c) 2011 Samsung Electronics Co., Ltd. |
| 3 | * http://www.samsung.com |
| 4 | * |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 5 | * Copyright 2008 Openmoko, Inc. |
| 6 | * Copyright 2008 Simtec Electronics |
| 7 | * Ben Dooks <ben@simtec.co.uk> |
| 8 | * http://armlinux.simtec.co.uk/ |
| 9 | * |
| 10 | * S3C USB2.0 High-speed / OtG driver |
| 11 | * |
| 12 | * This program is free software; you can redistribute it and/or modify |
| 13 | * it under the terms of the GNU General Public License version 2 as |
| 14 | * published by the Free Software Foundation. |
Lukasz Majewski | 8b9bc46 | 2012-05-04 14:17:11 +0200 | [diff] [blame] | 15 | */ |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 16 | |
| 17 | #include <linux/kernel.h> |
| 18 | #include <linux/module.h> |
| 19 | #include <linux/spinlock.h> |
| 20 | #include <linux/interrupt.h> |
| 21 | #include <linux/platform_device.h> |
| 22 | #include <linux/dma-mapping.h> |
Marek Szyprowski | 7ad8096 | 2014-11-21 15:14:48 +0100 | [diff] [blame] | 23 | #include <linux/mutex.h> |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 24 | #include <linux/seq_file.h> |
| 25 | #include <linux/delay.h> |
| 26 | #include <linux/io.h> |
Tejun Heo | 5a0e3ad | 2010-03-24 17:04:11 +0900 | [diff] [blame] | 27 | #include <linux/slab.h> |
Tomasz Figa | c50f056c | 2013-06-25 17:38:23 +0200 | [diff] [blame] | 28 | #include <linux/of_platform.h> |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 29 | |
| 30 | #include <linux/usb/ch9.h> |
| 31 | #include <linux/usb/gadget.h> |
Praveen Paneri | b2e587d | 2012-11-14 15:57:16 +0530 | [diff] [blame] | 32 | #include <linux/usb/phy.h> |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 33 | |
Dinh Nguyen | f7c0b14 | 2014-04-14 14:13:35 -0700 | [diff] [blame] | 34 | #include "core.h" |
Dinh Nguyen | 941fcce | 2014-11-11 11:13:33 -0600 | [diff] [blame] | 35 | #include "hw.h" |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 36 | |
| 37 | /* conversion functions */ |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 38 | static inline struct dwc2_hsotg_req *our_req(struct usb_request *req) |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 39 | { |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 40 | return container_of(req, struct dwc2_hsotg_req, req); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 41 | } |
| 42 | |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 43 | static inline struct dwc2_hsotg_ep *our_ep(struct usb_ep *ep) |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 44 | { |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 45 | return container_of(ep, struct dwc2_hsotg_ep, ep); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 46 | } |
| 47 | |
Dinh Nguyen | 941fcce | 2014-11-11 11:13:33 -0600 | [diff] [blame] | 48 | static inline struct dwc2_hsotg *to_hsotg(struct usb_gadget *gadget) |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 49 | { |
Dinh Nguyen | 941fcce | 2014-11-11 11:13:33 -0600 | [diff] [blame] | 50 | return container_of(gadget, struct dwc2_hsotg, gadget); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 51 | } |
| 52 | |
| 53 | static inline void __orr32(void __iomem *ptr, u32 val) |
| 54 | { |
Antti Seppälä | 95c8bc3 | 2015-08-20 21:41:07 +0300 | [diff] [blame] | 55 | dwc2_writel(dwc2_readl(ptr) | val, ptr); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 56 | } |
| 57 | |
| 58 | static inline void __bic32(void __iomem *ptr, u32 val) |
| 59 | { |
Antti Seppälä | 95c8bc3 | 2015-08-20 21:41:07 +0300 | [diff] [blame] | 60 | dwc2_writel(dwc2_readl(ptr) & ~val, ptr); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 61 | } |
| 62 | |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 63 | static inline struct dwc2_hsotg_ep *index_to_ep(struct dwc2_hsotg *hsotg, |
Mian Yousaf Kaukab | c6f5c05 | 2015-01-09 13:38:50 +0100 | [diff] [blame] | 64 | u32 ep_index, u32 dir_in) |
| 65 | { |
| 66 | if (dir_in) |
| 67 | return hsotg->eps_in[ep_index]; |
| 68 | else |
| 69 | return hsotg->eps_out[ep_index]; |
| 70 | } |
| 71 | |
Mickael Maison | 997f4f8 | 2014-12-23 17:39:45 +0100 | [diff] [blame] | 72 | /* forward declaration of functions */ |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 73 | static void dwc2_hsotg_dump(struct dwc2_hsotg *hsotg); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 74 | |
| 75 | /** |
| 76 | * using_dma - return the DMA status of the driver. |
| 77 | * @hsotg: The driver state. |
| 78 | * |
| 79 | * Return true if we're using DMA. |
| 80 | * |
| 81 | * Currently, we have the DMA support code worked into everywhere |
| 82 | * that needs it, but the AMBA DMA implementation in the hardware can |
| 83 | * only DMA from 32bit aligned addresses. This means that gadgets such |
| 84 | * as the CDC Ethernet cannot work as they often pass packets which are |
| 85 | * not 32bit aligned. |
| 86 | * |
| 87 | * Unfortunately the choice to use DMA or not is global to the controller |
| 88 | * and seems to be only settable when the controller is being put through |
| 89 | * a core reset. This means we either need to fix the gadgets to take |
| 90 | * account of DMA alignment, or add bounce buffers (yuerk). |
| 91 | * |
Gregory Herrero | edd74be | 2015-01-09 13:38:48 +0100 | [diff] [blame] | 92 | * g_using_dma is set depending on dts flag. |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 93 | */ |
Dinh Nguyen | 941fcce | 2014-11-11 11:13:33 -0600 | [diff] [blame] | 94 | static inline bool using_dma(struct dwc2_hsotg *hsotg) |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 95 | { |
Gregory Herrero | edd74be | 2015-01-09 13:38:48 +0100 | [diff] [blame] | 96 | return hsotg->g_using_dma; |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 97 | } |
| 98 | |
| 99 | /** |
Vardan Mikayelyan | 92d1635 | 2016-05-25 18:07:05 -0700 | [diff] [blame] | 100 | * dwc2_gadget_incr_frame_num - Increments the targeted frame number. |
| 101 | * @hs_ep: The endpoint |
| 102 | * @increment: The value to increment by |
| 103 | * |
| 104 | * This function will also check if the frame number overruns DSTS_SOFFN_LIMIT. |
| 105 | * If an overrun occurs it will wrap the value and set the frame_overrun flag. |
| 106 | */ |
| 107 | static inline void dwc2_gadget_incr_frame_num(struct dwc2_hsotg_ep *hs_ep) |
| 108 | { |
| 109 | hs_ep->target_frame += hs_ep->interval; |
| 110 | if (hs_ep->target_frame > DSTS_SOFFN_LIMIT) { |
| 111 | hs_ep->frame_overrun = 1; |
| 112 | hs_ep->target_frame &= DSTS_SOFFN_LIMIT; |
| 113 | } else { |
| 114 | hs_ep->frame_overrun = 0; |
| 115 | } |
| 116 | } |
| 117 | |
| 118 | /** |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 119 | * dwc2_hsotg_en_gsint - enable one or more of the general interrupt |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 120 | * @hsotg: The device state |
| 121 | * @ints: A bitmask of the interrupts to enable |
| 122 | */ |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 123 | static void dwc2_hsotg_en_gsint(struct dwc2_hsotg *hsotg, u32 ints) |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 124 | { |
Antti Seppälä | 95c8bc3 | 2015-08-20 21:41:07 +0300 | [diff] [blame] | 125 | u32 gsintmsk = dwc2_readl(hsotg->regs + GINTMSK); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 126 | u32 new_gsintmsk; |
| 127 | |
| 128 | new_gsintmsk = gsintmsk | ints; |
| 129 | |
| 130 | if (new_gsintmsk != gsintmsk) { |
| 131 | dev_dbg(hsotg->dev, "gsintmsk now 0x%08x\n", new_gsintmsk); |
Antti Seppälä | 95c8bc3 | 2015-08-20 21:41:07 +0300 | [diff] [blame] | 132 | dwc2_writel(new_gsintmsk, hsotg->regs + GINTMSK); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 133 | } |
| 134 | } |
| 135 | |
| 136 | /** |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 137 | * dwc2_hsotg_disable_gsint - disable one or more of the general interrupt |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 138 | * @hsotg: The device state |
| 139 | * @ints: A bitmask of the interrupts to enable |
| 140 | */ |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 141 | static void dwc2_hsotg_disable_gsint(struct dwc2_hsotg *hsotg, u32 ints) |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 142 | { |
Antti Seppälä | 95c8bc3 | 2015-08-20 21:41:07 +0300 | [diff] [blame] | 143 | u32 gsintmsk = dwc2_readl(hsotg->regs + GINTMSK); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 144 | u32 new_gsintmsk; |
| 145 | |
| 146 | new_gsintmsk = gsintmsk & ~ints; |
| 147 | |
| 148 | if (new_gsintmsk != gsintmsk) |
Antti Seppälä | 95c8bc3 | 2015-08-20 21:41:07 +0300 | [diff] [blame] | 149 | dwc2_writel(new_gsintmsk, hsotg->regs + GINTMSK); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 150 | } |
| 151 | |
| 152 | /** |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 153 | * dwc2_hsotg_ctrl_epint - enable/disable an endpoint irq |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 154 | * @hsotg: The device state |
| 155 | * @ep: The endpoint index |
| 156 | * @dir_in: True if direction is in. |
| 157 | * @en: The enable value, true to enable |
| 158 | * |
| 159 | * Set or clear the mask for an individual endpoint's interrupt |
| 160 | * request. |
| 161 | */ |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 162 | static void dwc2_hsotg_ctrl_epint(struct dwc2_hsotg *hsotg, |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 163 | unsigned int ep, unsigned int dir_in, |
| 164 | unsigned int en) |
| 165 | { |
| 166 | unsigned long flags; |
| 167 | u32 bit = 1 << ep; |
| 168 | u32 daint; |
| 169 | |
| 170 | if (!dir_in) |
| 171 | bit <<= 16; |
| 172 | |
| 173 | local_irq_save(flags); |
Antti Seppälä | 95c8bc3 | 2015-08-20 21:41:07 +0300 | [diff] [blame] | 174 | daint = dwc2_readl(hsotg->regs + DAINTMSK); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 175 | if (en) |
| 176 | daint |= bit; |
| 177 | else |
| 178 | daint &= ~bit; |
Antti Seppälä | 95c8bc3 | 2015-08-20 21:41:07 +0300 | [diff] [blame] | 179 | dwc2_writel(daint, hsotg->regs + DAINTMSK); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 180 | local_irq_restore(flags); |
| 181 | } |
| 182 | |
| 183 | /** |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 184 | * dwc2_hsotg_init_fifo - initialise non-periodic FIFOs |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 185 | * @hsotg: The device instance. |
| 186 | */ |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 187 | static void dwc2_hsotg_init_fifo(struct dwc2_hsotg *hsotg) |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 188 | { |
John Youn | 2317eac | 2016-10-17 17:36:23 -0700 | [diff] [blame] | 189 | unsigned int ep; |
Ben Dooks | 0f002d2 | 2010-05-25 05:36:50 +0100 | [diff] [blame] | 190 | unsigned int addr; |
Ben Dooks | 1703a6d | 2010-05-25 05:36:52 +0100 | [diff] [blame] | 191 | int timeout; |
Ben Dooks | 0f002d2 | 2010-05-25 05:36:50 +0100 | [diff] [blame] | 192 | u32 val; |
| 193 | |
Gregory Herrero | 7fcbc95 | 2015-01-09 13:39:06 +0100 | [diff] [blame] | 194 | /* Reset fifo map if not correctly cleared during previous session */ |
| 195 | WARN_ON(hsotg->fifo_map); |
| 196 | hsotg->fifo_map = 0; |
| 197 | |
Gregory Herrero | 0a17627 | 2015-01-09 13:38:52 +0100 | [diff] [blame] | 198 | /* set RX/NPTX FIFO sizes */ |
Antti Seppälä | 95c8bc3 | 2015-08-20 21:41:07 +0300 | [diff] [blame] | 199 | dwc2_writel(hsotg->g_rx_fifo_sz, hsotg->regs + GRXFSIZ); |
| 200 | dwc2_writel((hsotg->g_rx_fifo_sz << FIFOSIZE_STARTADDR_SHIFT) | |
Gregory Herrero | 0a17627 | 2015-01-09 13:38:52 +0100 | [diff] [blame] | 201 | (hsotg->g_np_g_tx_fifo_sz << FIFOSIZE_DEPTH_SHIFT), |
| 202 | hsotg->regs + GNPTXFSIZ); |
Ben Dooks | 0f002d2 | 2010-05-25 05:36:50 +0100 | [diff] [blame] | 203 | |
Lukasz Majewski | 8b9bc46 | 2012-05-04 14:17:11 +0200 | [diff] [blame] | 204 | /* |
| 205 | * arange all the rest of the TX FIFOs, as some versions of this |
Ben Dooks | 0f002d2 | 2010-05-25 05:36:50 +0100 | [diff] [blame] | 206 | * block have overlapping default addresses. This also ensures |
| 207 | * that if the settings have been changed, then they are set to |
Lukasz Majewski | 8b9bc46 | 2012-05-04 14:17:11 +0200 | [diff] [blame] | 208 | * known values. |
| 209 | */ |
Ben Dooks | 0f002d2 | 2010-05-25 05:36:50 +0100 | [diff] [blame] | 210 | |
| 211 | /* start at the end of the GNPTXFSIZ, rounded up */ |
Gregory Herrero | 0a17627 | 2015-01-09 13:38:52 +0100 | [diff] [blame] | 212 | addr = hsotg->g_rx_fifo_sz + hsotg->g_np_g_tx_fifo_sz; |
Ben Dooks | 0f002d2 | 2010-05-25 05:36:50 +0100 | [diff] [blame] | 213 | |
Lukasz Majewski | 8b9bc46 | 2012-05-04 14:17:11 +0200 | [diff] [blame] | 214 | /* |
Gregory Herrero | 0a17627 | 2015-01-09 13:38:52 +0100 | [diff] [blame] | 215 | * Configure fifos sizes from provided configuration and assign |
Robert Baldyga | b203d0a | 2014-09-09 10:44:56 +0200 | [diff] [blame] | 216 | * them to endpoints dynamically according to maxpacket size value of |
| 217 | * given endpoint. |
Lukasz Majewski | 8b9bc46 | 2012-05-04 14:17:11 +0200 | [diff] [blame] | 218 | */ |
John Youn | 2317eac | 2016-10-17 17:36:23 -0700 | [diff] [blame] | 219 | for (ep = 1; ep < MAX_EPS_CHANNELS; ep++) { |
John Youn | 3fa9538 | 2016-10-17 17:36:25 -0700 | [diff] [blame] | 220 | if (!hsotg->g_tx_fifo_sz[ep]) |
| 221 | continue; |
| 222 | val = addr; |
| 223 | val |= hsotg->g_tx_fifo_sz[ep] << FIFOSIZE_DEPTH_SHIFT; |
| 224 | WARN_ONCE(addr + hsotg->g_tx_fifo_sz[ep] > hsotg->fifo_mem, |
| 225 | "insufficient fifo memory"); |
| 226 | addr += hsotg->g_tx_fifo_sz[ep]; |
Ben Dooks | 0f002d2 | 2010-05-25 05:36:50 +0100 | [diff] [blame] | 227 | |
John Youn | 2317eac | 2016-10-17 17:36:23 -0700 | [diff] [blame] | 228 | dwc2_writel(val, hsotg->regs + DPTXFSIZN(ep)); |
Ben Dooks | 0f002d2 | 2010-05-25 05:36:50 +0100 | [diff] [blame] | 229 | } |
Ben Dooks | 1703a6d | 2010-05-25 05:36:52 +0100 | [diff] [blame] | 230 | |
Lukasz Majewski | 8b9bc46 | 2012-05-04 14:17:11 +0200 | [diff] [blame] | 231 | /* |
| 232 | * according to p428 of the design guide, we need to ensure that |
| 233 | * all fifos are flushed before continuing |
| 234 | */ |
Ben Dooks | 1703a6d | 2010-05-25 05:36:52 +0100 | [diff] [blame] | 235 | |
Antti Seppälä | 95c8bc3 | 2015-08-20 21:41:07 +0300 | [diff] [blame] | 236 | dwc2_writel(GRSTCTL_TXFNUM(0x10) | GRSTCTL_TXFFLSH | |
Dinh Nguyen | 47a1685 | 2014-04-14 14:13:34 -0700 | [diff] [blame] | 237 | GRSTCTL_RXFFLSH, hsotg->regs + GRSTCTL); |
Ben Dooks | 1703a6d | 2010-05-25 05:36:52 +0100 | [diff] [blame] | 238 | |
| 239 | /* wait until the fifos are both flushed */ |
| 240 | timeout = 100; |
| 241 | while (1) { |
Antti Seppälä | 95c8bc3 | 2015-08-20 21:41:07 +0300 | [diff] [blame] | 242 | val = dwc2_readl(hsotg->regs + GRSTCTL); |
Ben Dooks | 1703a6d | 2010-05-25 05:36:52 +0100 | [diff] [blame] | 243 | |
Dinh Nguyen | 47a1685 | 2014-04-14 14:13:34 -0700 | [diff] [blame] | 244 | if ((val & (GRSTCTL_TXFFLSH | GRSTCTL_RXFFLSH)) == 0) |
Ben Dooks | 1703a6d | 2010-05-25 05:36:52 +0100 | [diff] [blame] | 245 | break; |
| 246 | |
| 247 | if (--timeout == 0) { |
| 248 | dev_err(hsotg->dev, |
| 249 | "%s: timeout flushing fifos (GRSTCTL=%08x)\n", |
| 250 | __func__, val); |
Gregory Herrero | 48b20bc | 2015-01-09 13:39:01 +0100 | [diff] [blame] | 251 | break; |
Ben Dooks | 1703a6d | 2010-05-25 05:36:52 +0100 | [diff] [blame] | 252 | } |
| 253 | |
| 254 | udelay(1); |
| 255 | } |
| 256 | |
| 257 | dev_dbg(hsotg->dev, "FIFOs reset, timeout at %d\n", timeout); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 258 | } |
| 259 | |
| 260 | /** |
| 261 | * @ep: USB endpoint to allocate request for. |
| 262 | * @flags: Allocation flags |
| 263 | * |
| 264 | * Allocate a new USB request structure appropriate for the specified endpoint |
| 265 | */ |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 266 | static struct usb_request *dwc2_hsotg_ep_alloc_request(struct usb_ep *ep, |
Mark Brown | 0978f8c | 2010-01-18 13:18:35 +0000 | [diff] [blame] | 267 | gfp_t flags) |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 268 | { |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 269 | struct dwc2_hsotg_req *req; |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 270 | |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 271 | req = kzalloc(sizeof(struct dwc2_hsotg_req), flags); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 272 | if (!req) |
| 273 | return NULL; |
| 274 | |
| 275 | INIT_LIST_HEAD(&req->queue); |
| 276 | |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 277 | return &req->req; |
| 278 | } |
| 279 | |
| 280 | /** |
| 281 | * is_ep_periodic - return true if the endpoint is in periodic mode. |
| 282 | * @hs_ep: The endpoint to query. |
| 283 | * |
| 284 | * Returns true if the endpoint is in periodic mode, meaning it is being |
| 285 | * used for an Interrupt or ISO transfer. |
| 286 | */ |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 287 | static inline int is_ep_periodic(struct dwc2_hsotg_ep *hs_ep) |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 288 | { |
| 289 | return hs_ep->periodic; |
| 290 | } |
| 291 | |
| 292 | /** |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 293 | * dwc2_hsotg_unmap_dma - unmap the DMA memory being used for the request |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 294 | * @hsotg: The device state. |
| 295 | * @hs_ep: The endpoint for the request |
| 296 | * @hs_req: The request being processed. |
| 297 | * |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 298 | * This is the reverse of dwc2_hsotg_map_dma(), called for the completion |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 299 | * of a request to ensure the buffer is ready for access by the caller. |
Lukasz Majewski | 8b9bc46 | 2012-05-04 14:17:11 +0200 | [diff] [blame] | 300 | */ |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 301 | static void dwc2_hsotg_unmap_dma(struct dwc2_hsotg *hsotg, |
| 302 | struct dwc2_hsotg_ep *hs_ep, |
| 303 | struct dwc2_hsotg_req *hs_req) |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 304 | { |
| 305 | struct usb_request *req = &hs_req->req; |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 306 | |
| 307 | /* ignore this if we're not moving any data */ |
| 308 | if (hs_req->req.length == 0) |
| 309 | return; |
| 310 | |
Jingoo Han | 17d966a | 2013-05-11 21:14:00 +0900 | [diff] [blame] | 311 | usb_gadget_unmap_request(&hsotg->gadget, req, hs_ep->dir_in); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 312 | } |
| 313 | |
| 314 | /** |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 315 | * dwc2_hsotg_write_fifo - write packet Data to the TxFIFO |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 316 | * @hsotg: The controller state. |
| 317 | * @hs_ep: The endpoint we're going to write for. |
| 318 | * @hs_req: The request to write data for. |
| 319 | * |
| 320 | * This is called when the TxFIFO has some space in it to hold a new |
| 321 | * transmission and we have something to give it. The actual setup of |
| 322 | * the data size is done elsewhere, so all we have to do is to actually |
| 323 | * write the data. |
| 324 | * |
| 325 | * The return value is zero if there is more space (or nothing was done) |
| 326 | * otherwise -ENOSPC is returned if the FIFO space was used up. |
| 327 | * |
| 328 | * This routine is only needed for PIO |
Lukasz Majewski | 8b9bc46 | 2012-05-04 14:17:11 +0200 | [diff] [blame] | 329 | */ |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 330 | static int dwc2_hsotg_write_fifo(struct dwc2_hsotg *hsotg, |
| 331 | struct dwc2_hsotg_ep *hs_ep, |
| 332 | struct dwc2_hsotg_req *hs_req) |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 333 | { |
| 334 | bool periodic = is_ep_periodic(hs_ep); |
Antti Seppälä | 95c8bc3 | 2015-08-20 21:41:07 +0300 | [diff] [blame] | 335 | u32 gnptxsts = dwc2_readl(hsotg->regs + GNPTXSTS); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 336 | int buf_pos = hs_req->req.actual; |
| 337 | int to_write = hs_ep->size_loaded; |
| 338 | void *data; |
| 339 | int can_write; |
| 340 | int pkt_round; |
Robert Baldyga | 4fca54a | 2013-10-09 09:00:02 +0200 | [diff] [blame] | 341 | int max_transfer; |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 342 | |
| 343 | to_write -= (buf_pos - hs_ep->last_load); |
| 344 | |
| 345 | /* if there's nothing to write, get out early */ |
| 346 | if (to_write == 0) |
| 347 | return 0; |
| 348 | |
Ben Dooks | 10aebc7 | 2010-07-19 09:40:44 +0100 | [diff] [blame] | 349 | if (periodic && !hsotg->dedicated_fifos) { |
Antti Seppälä | 95c8bc3 | 2015-08-20 21:41:07 +0300 | [diff] [blame] | 350 | u32 epsize = dwc2_readl(hsotg->regs + DIEPTSIZ(hs_ep->index)); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 351 | int size_left; |
| 352 | int size_done; |
| 353 | |
Lukasz Majewski | 8b9bc46 | 2012-05-04 14:17:11 +0200 | [diff] [blame] | 354 | /* |
| 355 | * work out how much data was loaded so we can calculate |
| 356 | * how much data is left in the fifo. |
| 357 | */ |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 358 | |
Dinh Nguyen | 47a1685 | 2014-04-14 14:13:34 -0700 | [diff] [blame] | 359 | size_left = DXEPTSIZ_XFERSIZE_GET(epsize); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 360 | |
Lukasz Majewski | 8b9bc46 | 2012-05-04 14:17:11 +0200 | [diff] [blame] | 361 | /* |
| 362 | * if shared fifo, we cannot write anything until the |
Ben Dooks | e7a9ff5 | 2010-07-19 09:40:42 +0100 | [diff] [blame] | 363 | * previous data has been completely sent. |
| 364 | */ |
| 365 | if (hs_ep->fifo_load != 0) { |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 366 | dwc2_hsotg_en_gsint(hsotg, GINTSTS_PTXFEMP); |
Ben Dooks | e7a9ff5 | 2010-07-19 09:40:42 +0100 | [diff] [blame] | 367 | return -ENOSPC; |
| 368 | } |
| 369 | |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 370 | dev_dbg(hsotg->dev, "%s: left=%d, load=%d, fifo=%d, size %d\n", |
| 371 | __func__, size_left, |
| 372 | hs_ep->size_loaded, hs_ep->fifo_load, hs_ep->fifo_size); |
| 373 | |
| 374 | /* how much of the data has moved */ |
| 375 | size_done = hs_ep->size_loaded - size_left; |
| 376 | |
| 377 | /* how much data is left in the fifo */ |
| 378 | can_write = hs_ep->fifo_load - size_done; |
| 379 | dev_dbg(hsotg->dev, "%s: => can_write1=%d\n", |
| 380 | __func__, can_write); |
| 381 | |
| 382 | can_write = hs_ep->fifo_size - can_write; |
| 383 | dev_dbg(hsotg->dev, "%s: => can_write2=%d\n", |
| 384 | __func__, can_write); |
| 385 | |
| 386 | if (can_write <= 0) { |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 387 | dwc2_hsotg_en_gsint(hsotg, GINTSTS_PTXFEMP); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 388 | return -ENOSPC; |
| 389 | } |
Ben Dooks | 10aebc7 | 2010-07-19 09:40:44 +0100 | [diff] [blame] | 390 | } else if (hsotg->dedicated_fifos && hs_ep->index != 0) { |
Robert Baldyga | ad674a1 | 2016-08-29 13:38:50 -0700 | [diff] [blame] | 391 | can_write = dwc2_readl(hsotg->regs + |
| 392 | DTXFSTS(hs_ep->fifo_index)); |
Ben Dooks | 10aebc7 | 2010-07-19 09:40:44 +0100 | [diff] [blame] | 393 | |
| 394 | can_write &= 0xffff; |
| 395 | can_write *= 4; |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 396 | } else { |
Dinh Nguyen | 47a1685 | 2014-04-14 14:13:34 -0700 | [diff] [blame] | 397 | if (GNPTXSTS_NP_TXQ_SPC_AVAIL_GET(gnptxsts) == 0) { |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 398 | dev_dbg(hsotg->dev, |
| 399 | "%s: no queue slots available (0x%08x)\n", |
| 400 | __func__, gnptxsts); |
| 401 | |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 402 | dwc2_hsotg_en_gsint(hsotg, GINTSTS_NPTXFEMP); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 403 | return -ENOSPC; |
| 404 | } |
| 405 | |
Dinh Nguyen | 47a1685 | 2014-04-14 14:13:34 -0700 | [diff] [blame] | 406 | can_write = GNPTXSTS_NP_TXF_SPC_AVAIL_GET(gnptxsts); |
Ben Dooks | 679f9b7 | 2010-07-19 09:40:41 +0100 | [diff] [blame] | 407 | can_write *= 4; /* fifo size is in 32bit quantities. */ |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 408 | } |
| 409 | |
Robert Baldyga | 4fca54a | 2013-10-09 09:00:02 +0200 | [diff] [blame] | 410 | max_transfer = hs_ep->ep.maxpacket * hs_ep->mc; |
| 411 | |
| 412 | dev_dbg(hsotg->dev, "%s: GNPTXSTS=%08x, can=%d, to=%d, max_transfer %d\n", |
| 413 | __func__, gnptxsts, can_write, to_write, max_transfer); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 414 | |
Lukasz Majewski | 8b9bc46 | 2012-05-04 14:17:11 +0200 | [diff] [blame] | 415 | /* |
| 416 | * limit to 512 bytes of data, it seems at least on the non-periodic |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 417 | * FIFO, requests of >512 cause the endpoint to get stuck with a |
| 418 | * fragment of the end of the transfer in it. |
| 419 | */ |
Robert Baldyga | 811f330 | 2013-09-24 11:24:28 +0200 | [diff] [blame] | 420 | if (can_write > 512 && !periodic) |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 421 | can_write = 512; |
| 422 | |
Lukasz Majewski | 8b9bc46 | 2012-05-04 14:17:11 +0200 | [diff] [blame] | 423 | /* |
| 424 | * limit the write to one max-packet size worth of data, but allow |
Ben Dooks | 03e10e5 | 2010-07-19 09:40:45 +0100 | [diff] [blame] | 425 | * the transfer to return that it did not run out of fifo space |
Lukasz Majewski | 8b9bc46 | 2012-05-04 14:17:11 +0200 | [diff] [blame] | 426 | * doing it. |
| 427 | */ |
Robert Baldyga | 4fca54a | 2013-10-09 09:00:02 +0200 | [diff] [blame] | 428 | if (to_write > max_transfer) { |
| 429 | to_write = max_transfer; |
Ben Dooks | 03e10e5 | 2010-07-19 09:40:45 +0100 | [diff] [blame] | 430 | |
Robert Baldyga | 5cb2ff0 | 2013-09-19 11:50:18 +0200 | [diff] [blame] | 431 | /* it's needed only when we do not use dedicated fifos */ |
| 432 | if (!hsotg->dedicated_fifos) |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 433 | dwc2_hsotg_en_gsint(hsotg, |
Dinh Nguyen | 47a1685 | 2014-04-14 14:13:34 -0700 | [diff] [blame] | 434 | periodic ? GINTSTS_PTXFEMP : |
| 435 | GINTSTS_NPTXFEMP); |
Ben Dooks | 03e10e5 | 2010-07-19 09:40:45 +0100 | [diff] [blame] | 436 | } |
| 437 | |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 438 | /* see if we can write data */ |
| 439 | |
| 440 | if (to_write > can_write) { |
| 441 | to_write = can_write; |
Robert Baldyga | 4fca54a | 2013-10-09 09:00:02 +0200 | [diff] [blame] | 442 | pkt_round = to_write % max_transfer; |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 443 | |
Lukasz Majewski | 8b9bc46 | 2012-05-04 14:17:11 +0200 | [diff] [blame] | 444 | /* |
| 445 | * Round the write down to an |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 446 | * exact number of packets. |
| 447 | * |
| 448 | * Note, we do not currently check to see if we can ever |
| 449 | * write a full packet or not to the FIFO. |
| 450 | */ |
| 451 | |
| 452 | if (pkt_round) |
| 453 | to_write -= pkt_round; |
| 454 | |
Lukasz Majewski | 8b9bc46 | 2012-05-04 14:17:11 +0200 | [diff] [blame] | 455 | /* |
| 456 | * enable correct FIFO interrupt to alert us when there |
| 457 | * is more room left. |
| 458 | */ |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 459 | |
Robert Baldyga | 5cb2ff0 | 2013-09-19 11:50:18 +0200 | [diff] [blame] | 460 | /* it's needed only when we do not use dedicated fifos */ |
| 461 | if (!hsotg->dedicated_fifos) |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 462 | dwc2_hsotg_en_gsint(hsotg, |
Dinh Nguyen | 47a1685 | 2014-04-14 14:13:34 -0700 | [diff] [blame] | 463 | periodic ? GINTSTS_PTXFEMP : |
| 464 | GINTSTS_NPTXFEMP); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 465 | } |
| 466 | |
| 467 | dev_dbg(hsotg->dev, "write %d/%d, can_write %d, done %d\n", |
| 468 | to_write, hs_req->req.length, can_write, buf_pos); |
| 469 | |
| 470 | if (to_write <= 0) |
| 471 | return -ENOSPC; |
| 472 | |
| 473 | hs_req->req.actual = buf_pos + to_write; |
| 474 | hs_ep->total_data += to_write; |
| 475 | |
| 476 | if (periodic) |
| 477 | hs_ep->fifo_load += to_write; |
| 478 | |
| 479 | to_write = DIV_ROUND_UP(to_write, 4); |
| 480 | data = hs_req->req.buf + buf_pos; |
| 481 | |
Matt Porter | 1a7ed5b | 2014-02-03 10:29:09 -0500 | [diff] [blame] | 482 | iowrite32_rep(hsotg->regs + EPFIFO(hs_ep->index), data, to_write); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 483 | |
| 484 | return (to_write >= can_write) ? -ENOSPC : 0; |
| 485 | } |
| 486 | |
| 487 | /** |
| 488 | * get_ep_limit - get the maximum data legnth for this endpoint |
| 489 | * @hs_ep: The endpoint |
| 490 | * |
| 491 | * Return the maximum data that can be queued in one go on a given endpoint |
| 492 | * so that transfers that are too long can be split. |
| 493 | */ |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 494 | static unsigned get_ep_limit(struct dwc2_hsotg_ep *hs_ep) |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 495 | { |
| 496 | int index = hs_ep->index; |
| 497 | unsigned maxsize; |
| 498 | unsigned maxpkt; |
| 499 | |
| 500 | if (index != 0) { |
Dinh Nguyen | 47a1685 | 2014-04-14 14:13:34 -0700 | [diff] [blame] | 501 | maxsize = DXEPTSIZ_XFERSIZE_LIMIT + 1; |
| 502 | maxpkt = DXEPTSIZ_PKTCNT_LIMIT + 1; |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 503 | } else { |
Ben Dooks | b05ca58 | 2010-07-19 09:40:48 +0100 | [diff] [blame] | 504 | maxsize = 64+64; |
Jingoo Han | 66e5c64 | 2011-05-13 21:26:15 +0900 | [diff] [blame] | 505 | if (hs_ep->dir_in) |
Dinh Nguyen | 47a1685 | 2014-04-14 14:13:34 -0700 | [diff] [blame] | 506 | maxpkt = DIEPTSIZ0_PKTCNT_LIMIT + 1; |
Jingoo Han | 66e5c64 | 2011-05-13 21:26:15 +0900 | [diff] [blame] | 507 | else |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 508 | maxpkt = 2; |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 509 | } |
| 510 | |
| 511 | /* we made the constant loading easier above by using +1 */ |
| 512 | maxpkt--; |
| 513 | maxsize--; |
| 514 | |
Lukasz Majewski | 8b9bc46 | 2012-05-04 14:17:11 +0200 | [diff] [blame] | 515 | /* |
| 516 | * constrain by packet count if maxpkts*pktsize is greater |
| 517 | * than the length register size. |
| 518 | */ |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 519 | |
| 520 | if ((maxpkt * hs_ep->ep.maxpacket) < maxsize) |
| 521 | maxsize = maxpkt * hs_ep->ep.maxpacket; |
| 522 | |
| 523 | return maxsize; |
| 524 | } |
| 525 | |
| 526 | /** |
Vardan Mikayelyan | 381fc8f | 2016-05-25 18:07:17 -0700 | [diff] [blame] | 527 | * dwc2_hsotg_read_frameno - read current frame number |
| 528 | * @hsotg: The device instance |
| 529 | * |
| 530 | * Return the current frame number |
| 531 | */ |
| 532 | static u32 dwc2_hsotg_read_frameno(struct dwc2_hsotg *hsotg) |
| 533 | { |
| 534 | u32 dsts; |
| 535 | |
| 536 | dsts = dwc2_readl(hsotg->regs + DSTS); |
| 537 | dsts &= DSTS_SOFFN_MASK; |
| 538 | dsts >>= DSTS_SOFFN_SHIFT; |
| 539 | |
| 540 | return dsts; |
| 541 | } |
| 542 | |
| 543 | /** |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 544 | * dwc2_hsotg_start_req - start a USB request from an endpoint's queue |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 545 | * @hsotg: The controller state. |
| 546 | * @hs_ep: The endpoint to process a request for |
| 547 | * @hs_req: The request to start. |
| 548 | * @continuing: True if we are doing more for the current request. |
| 549 | * |
| 550 | * Start the given request running by setting the endpoint registers |
| 551 | * appropriately, and writing any data to the FIFOs. |
| 552 | */ |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 553 | static void dwc2_hsotg_start_req(struct dwc2_hsotg *hsotg, |
| 554 | struct dwc2_hsotg_ep *hs_ep, |
| 555 | struct dwc2_hsotg_req *hs_req, |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 556 | bool continuing) |
| 557 | { |
| 558 | struct usb_request *ureq = &hs_req->req; |
| 559 | int index = hs_ep->index; |
| 560 | int dir_in = hs_ep->dir_in; |
| 561 | u32 epctrl_reg; |
| 562 | u32 epsize_reg; |
| 563 | u32 epsize; |
| 564 | u32 ctrl; |
| 565 | unsigned length; |
| 566 | unsigned packets; |
| 567 | unsigned maxreq; |
| 568 | |
| 569 | if (index != 0) { |
| 570 | if (hs_ep->req && !continuing) { |
| 571 | dev_err(hsotg->dev, "%s: active request\n", __func__); |
| 572 | WARN_ON(1); |
| 573 | return; |
| 574 | } else if (hs_ep->req != hs_req && continuing) { |
| 575 | dev_err(hsotg->dev, |
| 576 | "%s: continue different req\n", __func__); |
| 577 | WARN_ON(1); |
| 578 | return; |
| 579 | } |
| 580 | } |
| 581 | |
Lukasz Majewski | 94cb8fd | 2012-05-04 14:17:14 +0200 | [diff] [blame] | 582 | epctrl_reg = dir_in ? DIEPCTL(index) : DOEPCTL(index); |
| 583 | epsize_reg = dir_in ? DIEPTSIZ(index) : DOEPTSIZ(index); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 584 | |
| 585 | dev_dbg(hsotg->dev, "%s: DxEPCTL=0x%08x, ep %d, dir %s\n", |
Antti Seppälä | 95c8bc3 | 2015-08-20 21:41:07 +0300 | [diff] [blame] | 586 | __func__, dwc2_readl(hsotg->regs + epctrl_reg), index, |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 587 | hs_ep->dir_in ? "in" : "out"); |
| 588 | |
Anton Tikhomirov | 9c39ddc | 2011-04-21 17:06:41 +0900 | [diff] [blame] | 589 | /* If endpoint is stalled, we will restart request later */ |
Antti Seppälä | 95c8bc3 | 2015-08-20 21:41:07 +0300 | [diff] [blame] | 590 | ctrl = dwc2_readl(hsotg->regs + epctrl_reg); |
Anton Tikhomirov | 9c39ddc | 2011-04-21 17:06:41 +0900 | [diff] [blame] | 591 | |
Mian Yousaf Kaukab | b2d4c54 | 2015-09-29 12:08:22 +0200 | [diff] [blame] | 592 | if (index && ctrl & DXEPCTL_STALL) { |
Anton Tikhomirov | 9c39ddc | 2011-04-21 17:06:41 +0900 | [diff] [blame] | 593 | dev_warn(hsotg->dev, "%s: ep%d is stalled\n", __func__, index); |
| 594 | return; |
| 595 | } |
| 596 | |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 597 | length = ureq->length - ureq->actual; |
Lukasz Majewski | 71225be | 2012-05-04 14:17:03 +0200 | [diff] [blame] | 598 | dev_dbg(hsotg->dev, "ureq->length:%d ureq->actual:%d\n", |
| 599 | ureq->length, ureq->actual); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 600 | |
| 601 | maxreq = get_ep_limit(hs_ep); |
| 602 | if (length > maxreq) { |
| 603 | int round = maxreq % hs_ep->ep.maxpacket; |
| 604 | |
| 605 | dev_dbg(hsotg->dev, "%s: length %d, max-req %d, r %d\n", |
| 606 | __func__, length, maxreq, round); |
| 607 | |
| 608 | /* round down to multiple of packets */ |
| 609 | if (round) |
| 610 | maxreq -= round; |
| 611 | |
| 612 | length = maxreq; |
| 613 | } |
| 614 | |
| 615 | if (length) |
| 616 | packets = DIV_ROUND_UP(length, hs_ep->ep.maxpacket); |
| 617 | else |
| 618 | packets = 1; /* send one packet if length is zero. */ |
| 619 | |
Robert Baldyga | 4fca54a | 2013-10-09 09:00:02 +0200 | [diff] [blame] | 620 | if (hs_ep->isochronous && length > (hs_ep->mc * hs_ep->ep.maxpacket)) { |
| 621 | dev_err(hsotg->dev, "req length > maxpacket*mc\n"); |
| 622 | return; |
| 623 | } |
| 624 | |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 625 | if (dir_in && index != 0) |
Robert Baldyga | 4fca54a | 2013-10-09 09:00:02 +0200 | [diff] [blame] | 626 | if (hs_ep->isochronous) |
Dinh Nguyen | 47a1685 | 2014-04-14 14:13:34 -0700 | [diff] [blame] | 627 | epsize = DXEPTSIZ_MC(packets); |
Robert Baldyga | 4fca54a | 2013-10-09 09:00:02 +0200 | [diff] [blame] | 628 | else |
Dinh Nguyen | 47a1685 | 2014-04-14 14:13:34 -0700 | [diff] [blame] | 629 | epsize = DXEPTSIZ_MC(1); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 630 | else |
| 631 | epsize = 0; |
| 632 | |
Mian Yousaf Kaukab | f71b5e2 | 2015-01-09 13:38:59 +0100 | [diff] [blame] | 633 | /* |
| 634 | * zero length packet should be programmed on its own and should not |
| 635 | * be counted in DIEPTSIZ.PktCnt with other packets. |
| 636 | */ |
| 637 | if (dir_in && ureq->zero && !continuing) { |
| 638 | /* Test if zlp is actually required. */ |
| 639 | if ((ureq->length >= hs_ep->ep.maxpacket) && |
| 640 | !(ureq->length % hs_ep->ep.maxpacket)) |
Mian Yousaf Kaukab | 8a20fa4 | 2015-01-09 13:39:03 +0100 | [diff] [blame] | 641 | hs_ep->send_zlp = 1; |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 642 | } |
| 643 | |
Dinh Nguyen | 47a1685 | 2014-04-14 14:13:34 -0700 | [diff] [blame] | 644 | epsize |= DXEPTSIZ_PKTCNT(packets); |
| 645 | epsize |= DXEPTSIZ_XFERSIZE(length); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 646 | |
| 647 | dev_dbg(hsotg->dev, "%s: %d@%d/%d, 0x%08x => 0x%08x\n", |
| 648 | __func__, packets, length, ureq->length, epsize, epsize_reg); |
| 649 | |
| 650 | /* store the request as the current one we're doing */ |
| 651 | hs_ep->req = hs_req; |
| 652 | |
| 653 | /* write size / packets */ |
Antti Seppälä | 95c8bc3 | 2015-08-20 21:41:07 +0300 | [diff] [blame] | 654 | dwc2_writel(epsize, hsotg->regs + epsize_reg); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 655 | |
Anton Tikhomirov | db1d8ba | 2012-03-06 14:09:19 +0900 | [diff] [blame] | 656 | if (using_dma(hsotg) && !continuing) { |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 657 | unsigned int dma_reg; |
| 658 | |
Lukasz Majewski | 8b9bc46 | 2012-05-04 14:17:11 +0200 | [diff] [blame] | 659 | /* |
| 660 | * write DMA address to control register, buffer already |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 661 | * synced by dwc2_hsotg_ep_queue(). |
Lukasz Majewski | 8b9bc46 | 2012-05-04 14:17:11 +0200 | [diff] [blame] | 662 | */ |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 663 | |
Lukasz Majewski | 94cb8fd | 2012-05-04 14:17:14 +0200 | [diff] [blame] | 664 | dma_reg = dir_in ? DIEPDMA(index) : DOEPDMA(index); |
Antti Seppälä | 95c8bc3 | 2015-08-20 21:41:07 +0300 | [diff] [blame] | 665 | dwc2_writel(ureq->dma, hsotg->regs + dma_reg); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 666 | |
Fabio Estevam | 0cc4cf6 | 2014-04-29 00:49:42 -0300 | [diff] [blame] | 667 | dev_dbg(hsotg->dev, "%s: %pad => 0x%08x\n", |
Jingoo Han | 8b3bc14 | 2014-02-04 14:25:29 +0900 | [diff] [blame] | 668 | __func__, &ureq->dma, dma_reg); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 669 | } |
| 670 | |
Vardan Mikayelyan | 837e9f0 | 2016-05-25 18:07:22 -0700 | [diff] [blame] | 671 | if (hs_ep->isochronous && hs_ep->interval == 1) { |
| 672 | hs_ep->target_frame = dwc2_hsotg_read_frameno(hsotg); |
| 673 | dwc2_gadget_incr_frame_num(hs_ep); |
| 674 | |
| 675 | if (hs_ep->target_frame & 0x1) |
| 676 | ctrl |= DXEPCTL_SETODDFR; |
| 677 | else |
| 678 | ctrl |= DXEPCTL_SETEVENFR; |
| 679 | } |
| 680 | |
Dinh Nguyen | 47a1685 | 2014-04-14 14:13:34 -0700 | [diff] [blame] | 681 | ctrl |= DXEPCTL_EPENA; /* ensure ep enabled */ |
Lukasz Majewski | 71225be | 2012-05-04 14:17:03 +0200 | [diff] [blame] | 682 | |
Mian Yousaf Kaukab | fe0b94a | 2015-01-09 13:38:58 +0100 | [diff] [blame] | 683 | dev_dbg(hsotg->dev, "ep0 state:%d\n", hsotg->ep0_state); |
Lukasz Majewski | 71225be | 2012-05-04 14:17:03 +0200 | [diff] [blame] | 684 | |
| 685 | /* For Setup request do not clear NAK */ |
Mian Yousaf Kaukab | fe0b94a | 2015-01-09 13:38:58 +0100 | [diff] [blame] | 686 | if (!(index == 0 && hsotg->ep0_state == DWC2_EP0_SETUP)) |
Dinh Nguyen | 47a1685 | 2014-04-14 14:13:34 -0700 | [diff] [blame] | 687 | ctrl |= DXEPCTL_CNAK; /* clear NAK set by core */ |
Lukasz Majewski | 71225be | 2012-05-04 14:17:03 +0200 | [diff] [blame] | 688 | |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 689 | dev_dbg(hsotg->dev, "%s: DxEPCTL=0x%08x\n", __func__, ctrl); |
Antti Seppälä | 95c8bc3 | 2015-08-20 21:41:07 +0300 | [diff] [blame] | 690 | dwc2_writel(ctrl, hsotg->regs + epctrl_reg); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 691 | |
Lukasz Majewski | 8b9bc46 | 2012-05-04 14:17:11 +0200 | [diff] [blame] | 692 | /* |
| 693 | * set these, it seems that DMA support increments past the end |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 694 | * of the packet buffer so we need to calculate the length from |
Lukasz Majewski | 8b9bc46 | 2012-05-04 14:17:11 +0200 | [diff] [blame] | 695 | * this information. |
| 696 | */ |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 697 | hs_ep->size_loaded = length; |
| 698 | hs_ep->last_load = ureq->actual; |
| 699 | |
| 700 | if (dir_in && !using_dma(hsotg)) { |
| 701 | /* set these anyway, we may need them for non-periodic in */ |
| 702 | hs_ep->fifo_load = 0; |
| 703 | |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 704 | dwc2_hsotg_write_fifo(hsotg, hs_ep, hs_req); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 705 | } |
| 706 | |
Lukasz Majewski | 8b9bc46 | 2012-05-04 14:17:11 +0200 | [diff] [blame] | 707 | /* |
Lukasz Majewski | 8b9bc46 | 2012-05-04 14:17:11 +0200 | [diff] [blame] | 708 | * Note, trying to clear the NAK here causes problems with transmit |
| 709 | * on the S3C6400 ending up with the TXFIFO becoming full. |
| 710 | */ |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 711 | |
| 712 | /* check ep is enabled */ |
Antti Seppälä | 95c8bc3 | 2015-08-20 21:41:07 +0300 | [diff] [blame] | 713 | if (!(dwc2_readl(hsotg->regs + epctrl_reg) & DXEPCTL_EPENA)) |
Mian Yousaf Kaukab | 1a0ed86 | 2015-01-09 13:39:00 +0100 | [diff] [blame] | 714 | dev_dbg(hsotg->dev, |
Dinh Nguyen | 47a1685 | 2014-04-14 14:13:34 -0700 | [diff] [blame] | 715 | "ep%d: failed to become enabled (DXEPCTL=0x%08x)?\n", |
Antti Seppälä | 95c8bc3 | 2015-08-20 21:41:07 +0300 | [diff] [blame] | 716 | index, dwc2_readl(hsotg->regs + epctrl_reg)); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 717 | |
Dinh Nguyen | 47a1685 | 2014-04-14 14:13:34 -0700 | [diff] [blame] | 718 | dev_dbg(hsotg->dev, "%s: DXEPCTL=0x%08x\n", |
Antti Seppälä | 95c8bc3 | 2015-08-20 21:41:07 +0300 | [diff] [blame] | 719 | __func__, dwc2_readl(hsotg->regs + epctrl_reg)); |
Robert Baldyga | afcf416 | 2013-09-19 11:50:19 +0200 | [diff] [blame] | 720 | |
| 721 | /* enable ep interrupts */ |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 722 | dwc2_hsotg_ctrl_epint(hsotg, hs_ep->index, hs_ep->dir_in, 1); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 723 | } |
| 724 | |
| 725 | /** |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 726 | * dwc2_hsotg_map_dma - map the DMA memory being used for the request |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 727 | * @hsotg: The device state. |
| 728 | * @hs_ep: The endpoint the request is on. |
| 729 | * @req: The request being processed. |
| 730 | * |
| 731 | * We've been asked to queue a request, so ensure that the memory buffer |
| 732 | * is correctly setup for DMA. If we've been passed an extant DMA address |
| 733 | * then ensure the buffer has been synced to memory. If our buffer has no |
| 734 | * DMA memory, then we map the memory and mark our request to allow us to |
| 735 | * cleanup on completion. |
Lukasz Majewski | 8b9bc46 | 2012-05-04 14:17:11 +0200 | [diff] [blame] | 736 | */ |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 737 | static int dwc2_hsotg_map_dma(struct dwc2_hsotg *hsotg, |
| 738 | struct dwc2_hsotg_ep *hs_ep, |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 739 | struct usb_request *req) |
| 740 | { |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 741 | struct dwc2_hsotg_req *hs_req = our_req(req); |
Felipe Balbi | e58ebcd | 2013-01-28 14:48:36 +0200 | [diff] [blame] | 742 | int ret; |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 743 | |
| 744 | /* if the length is zero, ignore the DMA data */ |
| 745 | if (hs_req->req.length == 0) |
| 746 | return 0; |
| 747 | |
Felipe Balbi | e58ebcd | 2013-01-28 14:48:36 +0200 | [diff] [blame] | 748 | ret = usb_gadget_map_request(&hsotg->gadget, req, hs_ep->dir_in); |
| 749 | if (ret) |
| 750 | goto dma_error; |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 751 | |
| 752 | return 0; |
| 753 | |
| 754 | dma_error: |
| 755 | dev_err(hsotg->dev, "%s: failed to map buffer %p, %d bytes\n", |
| 756 | __func__, req->buf, req->length); |
| 757 | |
| 758 | return -EIO; |
| 759 | } |
| 760 | |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 761 | static int dwc2_hsotg_handle_unaligned_buf_start(struct dwc2_hsotg *hsotg, |
| 762 | struct dwc2_hsotg_ep *hs_ep, struct dwc2_hsotg_req *hs_req) |
Mian Yousaf Kaukab | 7d24c1b | 2015-01-30 09:09:31 +0100 | [diff] [blame] | 763 | { |
| 764 | void *req_buf = hs_req->req.buf; |
| 765 | |
| 766 | /* If dma is not being used or buffer is aligned */ |
| 767 | if (!using_dma(hsotg) || !((long)req_buf & 3)) |
| 768 | return 0; |
| 769 | |
| 770 | WARN_ON(hs_req->saved_req_buf); |
| 771 | |
| 772 | dev_dbg(hsotg->dev, "%s: %s: buf=%p length=%d\n", __func__, |
| 773 | hs_ep->ep.name, req_buf, hs_req->req.length); |
| 774 | |
| 775 | hs_req->req.buf = kmalloc(hs_req->req.length, GFP_ATOMIC); |
| 776 | if (!hs_req->req.buf) { |
| 777 | hs_req->req.buf = req_buf; |
| 778 | dev_err(hsotg->dev, |
| 779 | "%s: unable to allocate memory for bounce buffer\n", |
| 780 | __func__); |
| 781 | return -ENOMEM; |
| 782 | } |
| 783 | |
| 784 | /* Save actual buffer */ |
| 785 | hs_req->saved_req_buf = req_buf; |
| 786 | |
| 787 | if (hs_ep->dir_in) |
| 788 | memcpy(hs_req->req.buf, req_buf, hs_req->req.length); |
| 789 | return 0; |
| 790 | } |
| 791 | |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 792 | static void dwc2_hsotg_handle_unaligned_buf_complete(struct dwc2_hsotg *hsotg, |
| 793 | struct dwc2_hsotg_ep *hs_ep, struct dwc2_hsotg_req *hs_req) |
Mian Yousaf Kaukab | 7d24c1b | 2015-01-30 09:09:31 +0100 | [diff] [blame] | 794 | { |
| 795 | /* If dma is not being used or buffer was aligned */ |
| 796 | if (!using_dma(hsotg) || !hs_req->saved_req_buf) |
| 797 | return; |
| 798 | |
| 799 | dev_dbg(hsotg->dev, "%s: %s: status=%d actual-length=%d\n", __func__, |
| 800 | hs_ep->ep.name, hs_req->req.status, hs_req->req.actual); |
| 801 | |
| 802 | /* Copy data from bounce buffer on successful out transfer */ |
| 803 | if (!hs_ep->dir_in && !hs_req->req.status) |
| 804 | memcpy(hs_req->saved_req_buf, hs_req->req.buf, |
| 805 | hs_req->req.actual); |
| 806 | |
| 807 | /* Free bounce buffer */ |
| 808 | kfree(hs_req->req.buf); |
| 809 | |
| 810 | hs_req->req.buf = hs_req->saved_req_buf; |
| 811 | hs_req->saved_req_buf = NULL; |
| 812 | } |
| 813 | |
Vardan Mikayelyan | 381fc8f | 2016-05-25 18:07:17 -0700 | [diff] [blame] | 814 | /** |
| 815 | * dwc2_gadget_target_frame_elapsed - Checks target frame |
| 816 | * @hs_ep: The driver endpoint to check |
| 817 | * |
| 818 | * Returns 1 if targeted frame elapsed. If returned 1 then we need to drop |
| 819 | * corresponding transfer. |
| 820 | */ |
| 821 | static bool dwc2_gadget_target_frame_elapsed(struct dwc2_hsotg_ep *hs_ep) |
| 822 | { |
| 823 | struct dwc2_hsotg *hsotg = hs_ep->parent; |
| 824 | u32 target_frame = hs_ep->target_frame; |
| 825 | u32 current_frame = dwc2_hsotg_read_frameno(hsotg); |
| 826 | bool frame_overrun = hs_ep->frame_overrun; |
| 827 | |
| 828 | if (!frame_overrun && current_frame >= target_frame) |
| 829 | return true; |
| 830 | |
| 831 | if (frame_overrun && current_frame >= target_frame && |
| 832 | ((current_frame - target_frame) < DSTS_SOFFN_LIMIT / 2)) |
| 833 | return true; |
| 834 | |
| 835 | return false; |
| 836 | } |
| 837 | |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 838 | static int dwc2_hsotg_ep_queue(struct usb_ep *ep, struct usb_request *req, |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 839 | gfp_t gfp_flags) |
| 840 | { |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 841 | struct dwc2_hsotg_req *hs_req = our_req(req); |
| 842 | struct dwc2_hsotg_ep *hs_ep = our_ep(ep); |
Dinh Nguyen | 941fcce | 2014-11-11 11:13:33 -0600 | [diff] [blame] | 843 | struct dwc2_hsotg *hs = hs_ep->parent; |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 844 | bool first; |
Mian Yousaf Kaukab | 7d24c1b | 2015-01-30 09:09:31 +0100 | [diff] [blame] | 845 | int ret; |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 846 | |
| 847 | dev_dbg(hs->dev, "%s: req %p: %d@%p, noi=%d, zero=%d, snok=%d\n", |
| 848 | ep->name, req, req->length, req->buf, req->no_interrupt, |
| 849 | req->zero, req->short_not_ok); |
| 850 | |
Gregory Herrero | 7ababa9 | 2015-04-29 22:09:08 +0200 | [diff] [blame] | 851 | /* Prevent new request submission when controller is suspended */ |
| 852 | if (hs->lx_state == DWC2_L2) { |
| 853 | dev_dbg(hs->dev, "%s: don't submit request while suspended\n", |
| 854 | __func__); |
| 855 | return -EAGAIN; |
| 856 | } |
| 857 | |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 858 | /* initialise status of the request */ |
| 859 | INIT_LIST_HEAD(&hs_req->queue); |
| 860 | req->actual = 0; |
| 861 | req->status = -EINPROGRESS; |
| 862 | |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 863 | ret = dwc2_hsotg_handle_unaligned_buf_start(hs, hs_ep, hs_req); |
Mian Yousaf Kaukab | 7d24c1b | 2015-01-30 09:09:31 +0100 | [diff] [blame] | 864 | if (ret) |
| 865 | return ret; |
| 866 | |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 867 | /* if we're using DMA, sync the buffers as necessary */ |
| 868 | if (using_dma(hs)) { |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 869 | ret = dwc2_hsotg_map_dma(hs, hs_ep, req); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 870 | if (ret) |
| 871 | return ret; |
| 872 | } |
| 873 | |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 874 | first = list_empty(&hs_ep->queue); |
| 875 | list_add_tail(&hs_req->queue, &hs_ep->queue); |
| 876 | |
Vardan Mikayelyan | 837e9f0 | 2016-05-25 18:07:22 -0700 | [diff] [blame] | 877 | if (first) { |
| 878 | if (!hs_ep->isochronous) { |
| 879 | dwc2_hsotg_start_req(hs, hs_ep, hs_req, false); |
| 880 | return 0; |
| 881 | } |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 882 | |
Vardan Mikayelyan | 837e9f0 | 2016-05-25 18:07:22 -0700 | [diff] [blame] | 883 | while (dwc2_gadget_target_frame_elapsed(hs_ep)) |
| 884 | dwc2_gadget_incr_frame_num(hs_ep); |
| 885 | |
| 886 | if (hs_ep->target_frame != TARGET_FRAME_INITIAL) |
| 887 | dwc2_hsotg_start_req(hs, hs_ep, hs_req, false); |
| 888 | } |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 889 | return 0; |
| 890 | } |
| 891 | |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 892 | static int dwc2_hsotg_ep_queue_lock(struct usb_ep *ep, struct usb_request *req, |
Lukasz Majewski | 5ad1d31 | 2012-06-14 10:02:26 +0200 | [diff] [blame] | 893 | gfp_t gfp_flags) |
| 894 | { |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 895 | struct dwc2_hsotg_ep *hs_ep = our_ep(ep); |
Dinh Nguyen | 941fcce | 2014-11-11 11:13:33 -0600 | [diff] [blame] | 896 | struct dwc2_hsotg *hs = hs_ep->parent; |
Lukasz Majewski | 5ad1d31 | 2012-06-14 10:02:26 +0200 | [diff] [blame] | 897 | unsigned long flags = 0; |
| 898 | int ret = 0; |
| 899 | |
| 900 | spin_lock_irqsave(&hs->lock, flags); |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 901 | ret = dwc2_hsotg_ep_queue(ep, req, gfp_flags); |
Lukasz Majewski | 5ad1d31 | 2012-06-14 10:02:26 +0200 | [diff] [blame] | 902 | spin_unlock_irqrestore(&hs->lock, flags); |
| 903 | |
| 904 | return ret; |
| 905 | } |
| 906 | |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 907 | static void dwc2_hsotg_ep_free_request(struct usb_ep *ep, |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 908 | struct usb_request *req) |
| 909 | { |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 910 | struct dwc2_hsotg_req *hs_req = our_req(req); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 911 | |
| 912 | kfree(hs_req); |
| 913 | } |
| 914 | |
| 915 | /** |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 916 | * dwc2_hsotg_complete_oursetup - setup completion callback |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 917 | * @ep: The endpoint the request was on. |
| 918 | * @req: The request completed. |
| 919 | * |
| 920 | * Called on completion of any requests the driver itself |
| 921 | * submitted that need cleaning up. |
| 922 | */ |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 923 | static void dwc2_hsotg_complete_oursetup(struct usb_ep *ep, |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 924 | struct usb_request *req) |
| 925 | { |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 926 | struct dwc2_hsotg_ep *hs_ep = our_ep(ep); |
Dinh Nguyen | 941fcce | 2014-11-11 11:13:33 -0600 | [diff] [blame] | 927 | struct dwc2_hsotg *hsotg = hs_ep->parent; |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 928 | |
| 929 | dev_dbg(hsotg->dev, "%s: ep %p, req %p\n", __func__, ep, req); |
| 930 | |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 931 | dwc2_hsotg_ep_free_request(ep, req); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 932 | } |
| 933 | |
| 934 | /** |
| 935 | * ep_from_windex - convert control wIndex value to endpoint |
| 936 | * @hsotg: The driver state. |
| 937 | * @windex: The control request wIndex field (in host order). |
| 938 | * |
| 939 | * Convert the given wIndex into a pointer to an driver endpoint |
| 940 | * structure, or return NULL if it is not a valid endpoint. |
Lukasz Majewski | 8b9bc46 | 2012-05-04 14:17:11 +0200 | [diff] [blame] | 941 | */ |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 942 | static struct dwc2_hsotg_ep *ep_from_windex(struct dwc2_hsotg *hsotg, |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 943 | u32 windex) |
| 944 | { |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 945 | struct dwc2_hsotg_ep *ep; |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 946 | int dir = (windex & USB_DIR_IN) ? 1 : 0; |
| 947 | int idx = windex & 0x7F; |
| 948 | |
| 949 | if (windex >= 0x100) |
| 950 | return NULL; |
| 951 | |
Lukasz Majewski | b3f489b | 2012-05-04 14:17:09 +0200 | [diff] [blame] | 952 | if (idx > hsotg->num_of_eps) |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 953 | return NULL; |
| 954 | |
Mian Yousaf Kaukab | c6f5c05 | 2015-01-09 13:38:50 +0100 | [diff] [blame] | 955 | ep = index_to_ep(hsotg, idx, dir); |
| 956 | |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 957 | if (idx && ep->dir_in != dir) |
| 958 | return NULL; |
| 959 | |
| 960 | return ep; |
| 961 | } |
| 962 | |
| 963 | /** |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 964 | * dwc2_hsotg_set_test_mode - Enable usb Test Modes |
Gregory Herrero | 9e14d0a | 2015-01-30 09:09:28 +0100 | [diff] [blame] | 965 | * @hsotg: The driver state. |
| 966 | * @testmode: requested usb test mode |
| 967 | * Enable usb Test Mode requested by the Host. |
| 968 | */ |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 969 | int dwc2_hsotg_set_test_mode(struct dwc2_hsotg *hsotg, int testmode) |
Gregory Herrero | 9e14d0a | 2015-01-30 09:09:28 +0100 | [diff] [blame] | 970 | { |
Antti Seppälä | 95c8bc3 | 2015-08-20 21:41:07 +0300 | [diff] [blame] | 971 | int dctl = dwc2_readl(hsotg->regs + DCTL); |
Gregory Herrero | 9e14d0a | 2015-01-30 09:09:28 +0100 | [diff] [blame] | 972 | |
| 973 | dctl &= ~DCTL_TSTCTL_MASK; |
| 974 | switch (testmode) { |
| 975 | case TEST_J: |
| 976 | case TEST_K: |
| 977 | case TEST_SE0_NAK: |
| 978 | case TEST_PACKET: |
| 979 | case TEST_FORCE_EN: |
| 980 | dctl |= testmode << DCTL_TSTCTL_SHIFT; |
| 981 | break; |
| 982 | default: |
| 983 | return -EINVAL; |
| 984 | } |
Antti Seppälä | 95c8bc3 | 2015-08-20 21:41:07 +0300 | [diff] [blame] | 985 | dwc2_writel(dctl, hsotg->regs + DCTL); |
Gregory Herrero | 9e14d0a | 2015-01-30 09:09:28 +0100 | [diff] [blame] | 986 | return 0; |
| 987 | } |
| 988 | |
| 989 | /** |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 990 | * dwc2_hsotg_send_reply - send reply to control request |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 991 | * @hsotg: The device state |
| 992 | * @ep: Endpoint 0 |
| 993 | * @buff: Buffer for request |
| 994 | * @length: Length of reply. |
| 995 | * |
| 996 | * Create a request and queue it on the given endpoint. This is useful as |
| 997 | * an internal method of sending replies to certain control requests, etc. |
| 998 | */ |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 999 | static int dwc2_hsotg_send_reply(struct dwc2_hsotg *hsotg, |
| 1000 | struct dwc2_hsotg_ep *ep, |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1001 | void *buff, |
| 1002 | int length) |
| 1003 | { |
| 1004 | struct usb_request *req; |
| 1005 | int ret; |
| 1006 | |
| 1007 | dev_dbg(hsotg->dev, "%s: buff %p, len %d\n", __func__, buff, length); |
| 1008 | |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 1009 | req = dwc2_hsotg_ep_alloc_request(&ep->ep, GFP_ATOMIC); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1010 | hsotg->ep0_reply = req; |
| 1011 | if (!req) { |
| 1012 | dev_warn(hsotg->dev, "%s: cannot alloc req\n", __func__); |
| 1013 | return -ENOMEM; |
| 1014 | } |
| 1015 | |
| 1016 | req->buf = hsotg->ep0_buff; |
| 1017 | req->length = length; |
Mian Yousaf Kaukab | f71b5e2 | 2015-01-09 13:38:59 +0100 | [diff] [blame] | 1018 | /* |
| 1019 | * zero flag is for sending zlp in DATA IN stage. It has no impact on |
| 1020 | * STATUS stage. |
| 1021 | */ |
| 1022 | req->zero = 0; |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 1023 | req->complete = dwc2_hsotg_complete_oursetup; |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1024 | |
| 1025 | if (length) |
| 1026 | memcpy(req->buf, buff, length); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1027 | |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 1028 | ret = dwc2_hsotg_ep_queue(&ep->ep, req, GFP_ATOMIC); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1029 | if (ret) { |
| 1030 | dev_warn(hsotg->dev, "%s: cannot queue req\n", __func__); |
| 1031 | return ret; |
| 1032 | } |
| 1033 | |
| 1034 | return 0; |
| 1035 | } |
| 1036 | |
| 1037 | /** |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 1038 | * dwc2_hsotg_process_req_status - process request GET_STATUS |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1039 | * @hsotg: The device state |
| 1040 | * @ctrl: USB control request |
| 1041 | */ |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 1042 | static int dwc2_hsotg_process_req_status(struct dwc2_hsotg *hsotg, |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1043 | struct usb_ctrlrequest *ctrl) |
| 1044 | { |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 1045 | struct dwc2_hsotg_ep *ep0 = hsotg->eps_out[0]; |
| 1046 | struct dwc2_hsotg_ep *ep; |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1047 | __le16 reply; |
| 1048 | int ret; |
| 1049 | |
| 1050 | dev_dbg(hsotg->dev, "%s: USB_REQ_GET_STATUS\n", __func__); |
| 1051 | |
| 1052 | if (!ep0->dir_in) { |
| 1053 | dev_warn(hsotg->dev, "%s: direction out?\n", __func__); |
| 1054 | return -EINVAL; |
| 1055 | } |
| 1056 | |
| 1057 | switch (ctrl->bRequestType & USB_RECIP_MASK) { |
| 1058 | case USB_RECIP_DEVICE: |
| 1059 | reply = cpu_to_le16(0); /* bit 0 => self powered, |
| 1060 | * bit 1 => remote wakeup */ |
| 1061 | break; |
| 1062 | |
| 1063 | case USB_RECIP_INTERFACE: |
| 1064 | /* currently, the data result should be zero */ |
| 1065 | reply = cpu_to_le16(0); |
| 1066 | break; |
| 1067 | |
| 1068 | case USB_RECIP_ENDPOINT: |
| 1069 | ep = ep_from_windex(hsotg, le16_to_cpu(ctrl->wIndex)); |
| 1070 | if (!ep) |
| 1071 | return -ENOENT; |
| 1072 | |
| 1073 | reply = cpu_to_le16(ep->halted ? 1 : 0); |
| 1074 | break; |
| 1075 | |
| 1076 | default: |
| 1077 | return 0; |
| 1078 | } |
| 1079 | |
| 1080 | if (le16_to_cpu(ctrl->wLength) != 2) |
| 1081 | return -EINVAL; |
| 1082 | |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 1083 | ret = dwc2_hsotg_send_reply(hsotg, ep0, &reply, 2); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1084 | if (ret) { |
| 1085 | dev_err(hsotg->dev, "%s: failed to send reply\n", __func__); |
| 1086 | return ret; |
| 1087 | } |
| 1088 | |
| 1089 | return 1; |
| 1090 | } |
| 1091 | |
Vahram Aharonyan | 51da43b | 2016-05-23 22:41:57 -0700 | [diff] [blame] | 1092 | static int dwc2_hsotg_ep_sethalt(struct usb_ep *ep, int value, bool now); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1093 | |
| 1094 | /** |
Anton Tikhomirov | 9c39ddc | 2011-04-21 17:06:41 +0900 | [diff] [blame] | 1095 | * get_ep_head - return the first request on the endpoint |
| 1096 | * @hs_ep: The controller endpoint to get |
| 1097 | * |
| 1098 | * Get the first request on the endpoint. |
| 1099 | */ |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 1100 | static struct dwc2_hsotg_req *get_ep_head(struct dwc2_hsotg_ep *hs_ep) |
Anton Tikhomirov | 9c39ddc | 2011-04-21 17:06:41 +0900 | [diff] [blame] | 1101 | { |
| 1102 | if (list_empty(&hs_ep->queue)) |
| 1103 | return NULL; |
| 1104 | |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 1105 | return list_first_entry(&hs_ep->queue, struct dwc2_hsotg_req, queue); |
Anton Tikhomirov | 9c39ddc | 2011-04-21 17:06:41 +0900 | [diff] [blame] | 1106 | } |
| 1107 | |
| 1108 | /** |
Vardan Mikayelyan | 41cc4cd | 2016-05-25 18:07:12 -0700 | [diff] [blame] | 1109 | * dwc2_gadget_start_next_request - Starts next request from ep queue |
| 1110 | * @hs_ep: Endpoint structure |
| 1111 | * |
| 1112 | * If queue is empty and EP is ISOC-OUT - unmasks OUTTKNEPDIS which is masked |
| 1113 | * in its handler. Hence we need to unmask it here to be able to do |
| 1114 | * resynchronization. |
| 1115 | */ |
| 1116 | static void dwc2_gadget_start_next_request(struct dwc2_hsotg_ep *hs_ep) |
| 1117 | { |
| 1118 | u32 mask; |
| 1119 | struct dwc2_hsotg *hsotg = hs_ep->parent; |
| 1120 | int dir_in = hs_ep->dir_in; |
| 1121 | struct dwc2_hsotg_req *hs_req; |
| 1122 | u32 epmsk_reg = dir_in ? DIEPMSK : DOEPMSK; |
| 1123 | |
| 1124 | if (!list_empty(&hs_ep->queue)) { |
| 1125 | hs_req = get_ep_head(hs_ep); |
| 1126 | dwc2_hsotg_start_req(hsotg, hs_ep, hs_req, false); |
| 1127 | return; |
| 1128 | } |
| 1129 | if (!hs_ep->isochronous) |
| 1130 | return; |
| 1131 | |
| 1132 | if (dir_in) { |
| 1133 | dev_dbg(hsotg->dev, "%s: No more ISOC-IN requests\n", |
| 1134 | __func__); |
| 1135 | } else { |
| 1136 | dev_dbg(hsotg->dev, "%s: No more ISOC-OUT requests\n", |
| 1137 | __func__); |
| 1138 | mask = dwc2_readl(hsotg->regs + epmsk_reg); |
| 1139 | mask |= DOEPMSK_OUTTKNEPDISMSK; |
| 1140 | dwc2_writel(mask, hsotg->regs + epmsk_reg); |
| 1141 | } |
| 1142 | } |
| 1143 | |
| 1144 | /** |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 1145 | * dwc2_hsotg_process_req_feature - process request {SET,CLEAR}_FEATURE |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1146 | * @hsotg: The device state |
| 1147 | * @ctrl: USB control request |
| 1148 | */ |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 1149 | static int dwc2_hsotg_process_req_feature(struct dwc2_hsotg *hsotg, |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1150 | struct usb_ctrlrequest *ctrl) |
| 1151 | { |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 1152 | struct dwc2_hsotg_ep *ep0 = hsotg->eps_out[0]; |
| 1153 | struct dwc2_hsotg_req *hs_req; |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1154 | bool set = (ctrl->bRequest == USB_REQ_SET_FEATURE); |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 1155 | struct dwc2_hsotg_ep *ep; |
Anton Tikhomirov | 26ab3d0 | 2011-04-21 17:06:40 +0900 | [diff] [blame] | 1156 | int ret; |
Robert Baldyga | bd9ef7b | 2013-09-19 11:50:22 +0200 | [diff] [blame] | 1157 | bool halted; |
Gregory Herrero | 9e14d0a | 2015-01-30 09:09:28 +0100 | [diff] [blame] | 1158 | u32 recip; |
| 1159 | u32 wValue; |
| 1160 | u32 wIndex; |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1161 | |
| 1162 | dev_dbg(hsotg->dev, "%s: %s_FEATURE\n", |
| 1163 | __func__, set ? "SET" : "CLEAR"); |
| 1164 | |
Gregory Herrero | 9e14d0a | 2015-01-30 09:09:28 +0100 | [diff] [blame] | 1165 | wValue = le16_to_cpu(ctrl->wValue); |
| 1166 | wIndex = le16_to_cpu(ctrl->wIndex); |
| 1167 | recip = ctrl->bRequestType & USB_RECIP_MASK; |
| 1168 | |
| 1169 | switch (recip) { |
| 1170 | case USB_RECIP_DEVICE: |
| 1171 | switch (wValue) { |
| 1172 | case USB_DEVICE_TEST_MODE: |
| 1173 | if ((wIndex & 0xff) != 0) |
| 1174 | return -EINVAL; |
| 1175 | if (!set) |
| 1176 | return -EINVAL; |
| 1177 | |
| 1178 | hsotg->test_mode = wIndex >> 8; |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 1179 | ret = dwc2_hsotg_send_reply(hsotg, ep0, NULL, 0); |
Gregory Herrero | 9e14d0a | 2015-01-30 09:09:28 +0100 | [diff] [blame] | 1180 | if (ret) { |
| 1181 | dev_err(hsotg->dev, |
| 1182 | "%s: failed to send reply\n", __func__); |
| 1183 | return ret; |
| 1184 | } |
| 1185 | break; |
| 1186 | default: |
| 1187 | return -ENOENT; |
| 1188 | } |
| 1189 | break; |
| 1190 | |
| 1191 | case USB_RECIP_ENDPOINT: |
| 1192 | ep = ep_from_windex(hsotg, wIndex); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1193 | if (!ep) { |
| 1194 | dev_dbg(hsotg->dev, "%s: no endpoint for 0x%04x\n", |
Gregory Herrero | 9e14d0a | 2015-01-30 09:09:28 +0100 | [diff] [blame] | 1195 | __func__, wIndex); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1196 | return -ENOENT; |
| 1197 | } |
| 1198 | |
Gregory Herrero | 9e14d0a | 2015-01-30 09:09:28 +0100 | [diff] [blame] | 1199 | switch (wValue) { |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1200 | case USB_ENDPOINT_HALT: |
Robert Baldyga | bd9ef7b | 2013-09-19 11:50:22 +0200 | [diff] [blame] | 1201 | halted = ep->halted; |
| 1202 | |
Vahram Aharonyan | 51da43b | 2016-05-23 22:41:57 -0700 | [diff] [blame] | 1203 | dwc2_hsotg_ep_sethalt(&ep->ep, set, true); |
Anton Tikhomirov | 26ab3d0 | 2011-04-21 17:06:40 +0900 | [diff] [blame] | 1204 | |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 1205 | ret = dwc2_hsotg_send_reply(hsotg, ep0, NULL, 0); |
Anton Tikhomirov | 26ab3d0 | 2011-04-21 17:06:40 +0900 | [diff] [blame] | 1206 | if (ret) { |
| 1207 | dev_err(hsotg->dev, |
| 1208 | "%s: failed to send reply\n", __func__); |
| 1209 | return ret; |
| 1210 | } |
Anton Tikhomirov | 9c39ddc | 2011-04-21 17:06:41 +0900 | [diff] [blame] | 1211 | |
Robert Baldyga | bd9ef7b | 2013-09-19 11:50:22 +0200 | [diff] [blame] | 1212 | /* |
| 1213 | * we have to complete all requests for ep if it was |
| 1214 | * halted, and the halt was cleared by CLEAR_FEATURE |
| 1215 | */ |
| 1216 | |
| 1217 | if (!set && halted) { |
Anton Tikhomirov | 9c39ddc | 2011-04-21 17:06:41 +0900 | [diff] [blame] | 1218 | /* |
| 1219 | * If we have request in progress, |
| 1220 | * then complete it |
| 1221 | */ |
| 1222 | if (ep->req) { |
| 1223 | hs_req = ep->req; |
| 1224 | ep->req = NULL; |
| 1225 | list_del_init(&hs_req->queue); |
Gregory Herrero | c00dd4a | 2015-01-30 09:09:27 +0100 | [diff] [blame] | 1226 | if (hs_req->req.complete) { |
| 1227 | spin_unlock(&hsotg->lock); |
| 1228 | usb_gadget_giveback_request( |
| 1229 | &ep->ep, &hs_req->req); |
| 1230 | spin_lock(&hsotg->lock); |
| 1231 | } |
Anton Tikhomirov | 9c39ddc | 2011-04-21 17:06:41 +0900 | [diff] [blame] | 1232 | } |
| 1233 | |
| 1234 | /* If we have pending request, then start it */ |
Gregory Herrero | c00dd4a | 2015-01-30 09:09:27 +0100 | [diff] [blame] | 1235 | if (!ep->req) { |
Vardan Mikayelyan | 41cc4cd | 2016-05-25 18:07:12 -0700 | [diff] [blame] | 1236 | dwc2_gadget_start_next_request(ep); |
Anton Tikhomirov | 9c39ddc | 2011-04-21 17:06:41 +0900 | [diff] [blame] | 1237 | } |
| 1238 | } |
| 1239 | |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1240 | break; |
| 1241 | |
| 1242 | default: |
| 1243 | return -ENOENT; |
| 1244 | } |
Gregory Herrero | 9e14d0a | 2015-01-30 09:09:28 +0100 | [diff] [blame] | 1245 | break; |
| 1246 | default: |
| 1247 | return -ENOENT; |
| 1248 | } |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1249 | return 1; |
| 1250 | } |
| 1251 | |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 1252 | static void dwc2_hsotg_enqueue_setup(struct dwc2_hsotg *hsotg); |
Robert Baldyga | ab93e01 | 2013-09-19 11:50:17 +0200 | [diff] [blame] | 1253 | |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1254 | /** |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 1255 | * dwc2_hsotg_stall_ep0 - stall ep0 |
Robert Baldyga | c9f721b | 2014-01-14 08:36:00 +0100 | [diff] [blame] | 1256 | * @hsotg: The device state |
| 1257 | * |
| 1258 | * Set stall for ep0 as response for setup request. |
| 1259 | */ |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 1260 | static void dwc2_hsotg_stall_ep0(struct dwc2_hsotg *hsotg) |
Jingoo Han | e9ebe7c | 2014-06-03 22:14:56 +0900 | [diff] [blame] | 1261 | { |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 1262 | struct dwc2_hsotg_ep *ep0 = hsotg->eps_out[0]; |
Robert Baldyga | c9f721b | 2014-01-14 08:36:00 +0100 | [diff] [blame] | 1263 | u32 reg; |
| 1264 | u32 ctrl; |
| 1265 | |
| 1266 | dev_dbg(hsotg->dev, "ep0 stall (dir=%d)\n", ep0->dir_in); |
| 1267 | reg = (ep0->dir_in) ? DIEPCTL0 : DOEPCTL0; |
| 1268 | |
| 1269 | /* |
| 1270 | * DxEPCTL_Stall will be cleared by EP once it has |
| 1271 | * taken effect, so no need to clear later. |
| 1272 | */ |
| 1273 | |
Antti Seppälä | 95c8bc3 | 2015-08-20 21:41:07 +0300 | [diff] [blame] | 1274 | ctrl = dwc2_readl(hsotg->regs + reg); |
Dinh Nguyen | 47a1685 | 2014-04-14 14:13:34 -0700 | [diff] [blame] | 1275 | ctrl |= DXEPCTL_STALL; |
| 1276 | ctrl |= DXEPCTL_CNAK; |
Antti Seppälä | 95c8bc3 | 2015-08-20 21:41:07 +0300 | [diff] [blame] | 1277 | dwc2_writel(ctrl, hsotg->regs + reg); |
Robert Baldyga | c9f721b | 2014-01-14 08:36:00 +0100 | [diff] [blame] | 1278 | |
| 1279 | dev_dbg(hsotg->dev, |
Dinh Nguyen | 47a1685 | 2014-04-14 14:13:34 -0700 | [diff] [blame] | 1280 | "written DXEPCTL=0x%08x to %08x (DXEPCTL=0x%08x)\n", |
Antti Seppälä | 95c8bc3 | 2015-08-20 21:41:07 +0300 | [diff] [blame] | 1281 | ctrl, reg, dwc2_readl(hsotg->regs + reg)); |
Robert Baldyga | c9f721b | 2014-01-14 08:36:00 +0100 | [diff] [blame] | 1282 | |
| 1283 | /* |
| 1284 | * complete won't be called, so we enqueue |
| 1285 | * setup request here |
| 1286 | */ |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 1287 | dwc2_hsotg_enqueue_setup(hsotg); |
Robert Baldyga | c9f721b | 2014-01-14 08:36:00 +0100 | [diff] [blame] | 1288 | } |
| 1289 | |
| 1290 | /** |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 1291 | * dwc2_hsotg_process_control - process a control request |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1292 | * @hsotg: The device state |
| 1293 | * @ctrl: The control request received |
| 1294 | * |
| 1295 | * The controller has received the SETUP phase of a control request, and |
| 1296 | * needs to work out what to do next (and whether to pass it on to the |
| 1297 | * gadget driver). |
| 1298 | */ |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 1299 | static void dwc2_hsotg_process_control(struct dwc2_hsotg *hsotg, |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1300 | struct usb_ctrlrequest *ctrl) |
| 1301 | { |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 1302 | struct dwc2_hsotg_ep *ep0 = hsotg->eps_out[0]; |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1303 | int ret = 0; |
| 1304 | u32 dcfg; |
| 1305 | |
Mian Yousaf Kaukab | e525e74 | 2015-09-29 12:08:23 +0200 | [diff] [blame] | 1306 | dev_dbg(hsotg->dev, |
| 1307 | "ctrl Type=%02x, Req=%02x, V=%04x, I=%04x, L=%04x\n", |
| 1308 | ctrl->bRequestType, ctrl->bRequest, ctrl->wValue, |
| 1309 | ctrl->wIndex, ctrl->wLength); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1310 | |
Mian Yousaf Kaukab | fe0b94a | 2015-01-09 13:38:58 +0100 | [diff] [blame] | 1311 | if (ctrl->wLength == 0) { |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1312 | ep0->dir_in = 1; |
Mian Yousaf Kaukab | fe0b94a | 2015-01-09 13:38:58 +0100 | [diff] [blame] | 1313 | hsotg->ep0_state = DWC2_EP0_STATUS_IN; |
| 1314 | } else if (ctrl->bRequestType & USB_DIR_IN) { |
| 1315 | ep0->dir_in = 1; |
| 1316 | hsotg->ep0_state = DWC2_EP0_DATA_IN; |
| 1317 | } else { |
| 1318 | ep0->dir_in = 0; |
| 1319 | hsotg->ep0_state = DWC2_EP0_DATA_OUT; |
| 1320 | } |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1321 | |
| 1322 | if ((ctrl->bRequestType & USB_TYPE_MASK) == USB_TYPE_STANDARD) { |
| 1323 | switch (ctrl->bRequest) { |
| 1324 | case USB_REQ_SET_ADDRESS: |
Mian Yousaf Kaukab | 6d713c1 | 2015-01-09 13:39:10 +0100 | [diff] [blame] | 1325 | hsotg->connected = 1; |
Antti Seppälä | 95c8bc3 | 2015-08-20 21:41:07 +0300 | [diff] [blame] | 1326 | dcfg = dwc2_readl(hsotg->regs + DCFG); |
Dinh Nguyen | 47a1685 | 2014-04-14 14:13:34 -0700 | [diff] [blame] | 1327 | dcfg &= ~DCFG_DEVADDR_MASK; |
Paul Zimmerman | d5dbd3f | 2014-04-25 14:18:13 -0700 | [diff] [blame] | 1328 | dcfg |= (le16_to_cpu(ctrl->wValue) << |
| 1329 | DCFG_DEVADDR_SHIFT) & DCFG_DEVADDR_MASK; |
Antti Seppälä | 95c8bc3 | 2015-08-20 21:41:07 +0300 | [diff] [blame] | 1330 | dwc2_writel(dcfg, hsotg->regs + DCFG); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1331 | |
| 1332 | dev_info(hsotg->dev, "new address %d\n", ctrl->wValue); |
| 1333 | |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 1334 | ret = dwc2_hsotg_send_reply(hsotg, ep0, NULL, 0); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1335 | return; |
| 1336 | |
| 1337 | case USB_REQ_GET_STATUS: |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 1338 | ret = dwc2_hsotg_process_req_status(hsotg, ctrl); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1339 | break; |
| 1340 | |
| 1341 | case USB_REQ_CLEAR_FEATURE: |
| 1342 | case USB_REQ_SET_FEATURE: |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 1343 | ret = dwc2_hsotg_process_req_feature(hsotg, ctrl); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1344 | break; |
| 1345 | } |
| 1346 | } |
| 1347 | |
| 1348 | /* as a fallback, try delivering it to the driver to deal with */ |
| 1349 | |
| 1350 | if (ret == 0 && hsotg->driver) { |
Robert Baldyga | 93f599f | 2013-11-21 13:49:17 +0100 | [diff] [blame] | 1351 | spin_unlock(&hsotg->lock); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1352 | ret = hsotg->driver->setup(&hsotg->gadget, ctrl); |
Robert Baldyga | 93f599f | 2013-11-21 13:49:17 +0100 | [diff] [blame] | 1353 | spin_lock(&hsotg->lock); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1354 | if (ret < 0) |
| 1355 | dev_dbg(hsotg->dev, "driver->setup() ret %d\n", ret); |
| 1356 | } |
| 1357 | |
Lukasz Majewski | 8b9bc46 | 2012-05-04 14:17:11 +0200 | [diff] [blame] | 1358 | /* |
| 1359 | * the request is either unhandlable, or is not formatted correctly |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1360 | * so respond with a STALL for the status stage to indicate failure. |
| 1361 | */ |
| 1362 | |
Robert Baldyga | c9f721b | 2014-01-14 08:36:00 +0100 | [diff] [blame] | 1363 | if (ret < 0) |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 1364 | dwc2_hsotg_stall_ep0(hsotg); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1365 | } |
| 1366 | |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1367 | /** |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 1368 | * dwc2_hsotg_complete_setup - completion of a setup transfer |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1369 | * @ep: The endpoint the request was on. |
| 1370 | * @req: The request completed. |
| 1371 | * |
| 1372 | * Called on completion of any requests the driver itself submitted for |
| 1373 | * EP0 setup packets |
| 1374 | */ |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 1375 | static void dwc2_hsotg_complete_setup(struct usb_ep *ep, |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1376 | struct usb_request *req) |
| 1377 | { |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 1378 | struct dwc2_hsotg_ep *hs_ep = our_ep(ep); |
Dinh Nguyen | 941fcce | 2014-11-11 11:13:33 -0600 | [diff] [blame] | 1379 | struct dwc2_hsotg *hsotg = hs_ep->parent; |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1380 | |
| 1381 | if (req->status < 0) { |
| 1382 | dev_dbg(hsotg->dev, "%s: failed %d\n", __func__, req->status); |
| 1383 | return; |
| 1384 | } |
| 1385 | |
Robert Baldyga | 93f599f | 2013-11-21 13:49:17 +0100 | [diff] [blame] | 1386 | spin_lock(&hsotg->lock); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1387 | if (req->actual == 0) |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 1388 | dwc2_hsotg_enqueue_setup(hsotg); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1389 | else |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 1390 | dwc2_hsotg_process_control(hsotg, req->buf); |
Robert Baldyga | 93f599f | 2013-11-21 13:49:17 +0100 | [diff] [blame] | 1391 | spin_unlock(&hsotg->lock); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1392 | } |
| 1393 | |
| 1394 | /** |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 1395 | * dwc2_hsotg_enqueue_setup - start a request for EP0 packets |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1396 | * @hsotg: The device state. |
| 1397 | * |
| 1398 | * Enqueue a request on EP0 if necessary to received any SETUP packets |
| 1399 | * received from the host. |
| 1400 | */ |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 1401 | static void dwc2_hsotg_enqueue_setup(struct dwc2_hsotg *hsotg) |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1402 | { |
| 1403 | struct usb_request *req = hsotg->ctrl_req; |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 1404 | struct dwc2_hsotg_req *hs_req = our_req(req); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1405 | int ret; |
| 1406 | |
| 1407 | dev_dbg(hsotg->dev, "%s: queueing setup request\n", __func__); |
| 1408 | |
| 1409 | req->zero = 0; |
| 1410 | req->length = 8; |
| 1411 | req->buf = hsotg->ctrl_buff; |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 1412 | req->complete = dwc2_hsotg_complete_setup; |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1413 | |
| 1414 | if (!list_empty(&hs_req->queue)) { |
| 1415 | dev_dbg(hsotg->dev, "%s already queued???\n", __func__); |
| 1416 | return; |
| 1417 | } |
| 1418 | |
Mian Yousaf Kaukab | c6f5c05 | 2015-01-09 13:38:50 +0100 | [diff] [blame] | 1419 | hsotg->eps_out[0]->dir_in = 0; |
Mian Yousaf Kaukab | 8a20fa4 | 2015-01-09 13:39:03 +0100 | [diff] [blame] | 1420 | hsotg->eps_out[0]->send_zlp = 0; |
Mian Yousaf Kaukab | fe0b94a | 2015-01-09 13:38:58 +0100 | [diff] [blame] | 1421 | hsotg->ep0_state = DWC2_EP0_SETUP; |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1422 | |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 1423 | ret = dwc2_hsotg_ep_queue(&hsotg->eps_out[0]->ep, req, GFP_ATOMIC); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1424 | if (ret < 0) { |
| 1425 | dev_err(hsotg->dev, "%s: failed queue (%d)\n", __func__, ret); |
Lukasz Majewski | 8b9bc46 | 2012-05-04 14:17:11 +0200 | [diff] [blame] | 1426 | /* |
| 1427 | * Don't think there's much we can do other than watch the |
| 1428 | * driver fail. |
| 1429 | */ |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1430 | } |
| 1431 | } |
| 1432 | |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 1433 | static void dwc2_hsotg_program_zlp(struct dwc2_hsotg *hsotg, |
| 1434 | struct dwc2_hsotg_ep *hs_ep) |
Mian Yousaf Kaukab | fe0b94a | 2015-01-09 13:38:58 +0100 | [diff] [blame] | 1435 | { |
| 1436 | u32 ctrl; |
| 1437 | u8 index = hs_ep->index; |
| 1438 | u32 epctl_reg = hs_ep->dir_in ? DIEPCTL(index) : DOEPCTL(index); |
| 1439 | u32 epsiz_reg = hs_ep->dir_in ? DIEPTSIZ(index) : DOEPTSIZ(index); |
| 1440 | |
Mian Yousaf Kaukab | ccb34a9 | 2015-01-30 09:09:34 +0100 | [diff] [blame] | 1441 | if (hs_ep->dir_in) |
| 1442 | dev_dbg(hsotg->dev, "Sending zero-length packet on ep%d\n", |
| 1443 | index); |
| 1444 | else |
| 1445 | dev_dbg(hsotg->dev, "Receiving zero-length packet on ep%d\n", |
| 1446 | index); |
Mian Yousaf Kaukab | fe0b94a | 2015-01-09 13:38:58 +0100 | [diff] [blame] | 1447 | |
Antti Seppälä | 95c8bc3 | 2015-08-20 21:41:07 +0300 | [diff] [blame] | 1448 | dwc2_writel(DXEPTSIZ_MC(1) | DXEPTSIZ_PKTCNT(1) | |
| 1449 | DXEPTSIZ_XFERSIZE(0), hsotg->regs + |
| 1450 | epsiz_reg); |
Mian Yousaf Kaukab | fe0b94a | 2015-01-09 13:38:58 +0100 | [diff] [blame] | 1451 | |
Antti Seppälä | 95c8bc3 | 2015-08-20 21:41:07 +0300 | [diff] [blame] | 1452 | ctrl = dwc2_readl(hsotg->regs + epctl_reg); |
Mian Yousaf Kaukab | fe0b94a | 2015-01-09 13:38:58 +0100 | [diff] [blame] | 1453 | ctrl |= DXEPCTL_CNAK; /* clear NAK set by core */ |
| 1454 | ctrl |= DXEPCTL_EPENA; /* ensure ep enabled */ |
| 1455 | ctrl |= DXEPCTL_USBACTEP; |
Antti Seppälä | 95c8bc3 | 2015-08-20 21:41:07 +0300 | [diff] [blame] | 1456 | dwc2_writel(ctrl, hsotg->regs + epctl_reg); |
Mian Yousaf Kaukab | fe0b94a | 2015-01-09 13:38:58 +0100 | [diff] [blame] | 1457 | } |
| 1458 | |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1459 | /** |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 1460 | * dwc2_hsotg_complete_request - complete a request given to us |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1461 | * @hsotg: The device state. |
| 1462 | * @hs_ep: The endpoint the request was on. |
| 1463 | * @hs_req: The request to complete. |
| 1464 | * @result: The result code (0 => Ok, otherwise errno) |
| 1465 | * |
| 1466 | * The given request has finished, so call the necessary completion |
| 1467 | * if it has one and then look to see if we can start a new request |
| 1468 | * on the endpoint. |
| 1469 | * |
| 1470 | * Note, expects the ep to already be locked as appropriate. |
Lukasz Majewski | 8b9bc46 | 2012-05-04 14:17:11 +0200 | [diff] [blame] | 1471 | */ |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 1472 | static void dwc2_hsotg_complete_request(struct dwc2_hsotg *hsotg, |
| 1473 | struct dwc2_hsotg_ep *hs_ep, |
| 1474 | struct dwc2_hsotg_req *hs_req, |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1475 | int result) |
| 1476 | { |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1477 | |
| 1478 | if (!hs_req) { |
| 1479 | dev_dbg(hsotg->dev, "%s: nothing to complete?\n", __func__); |
| 1480 | return; |
| 1481 | } |
| 1482 | |
| 1483 | dev_dbg(hsotg->dev, "complete: ep %p %s, req %p, %d => %p\n", |
| 1484 | hs_ep, hs_ep->ep.name, hs_req, result, hs_req->req.complete); |
| 1485 | |
Lukasz Majewski | 8b9bc46 | 2012-05-04 14:17:11 +0200 | [diff] [blame] | 1486 | /* |
| 1487 | * only replace the status if we've not already set an error |
| 1488 | * from a previous transaction |
| 1489 | */ |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1490 | |
| 1491 | if (hs_req->req.status == -EINPROGRESS) |
| 1492 | hs_req->req.status = result; |
| 1493 | |
Yunzhi Li | 44583fe | 2015-09-29 12:25:01 +0200 | [diff] [blame] | 1494 | if (using_dma(hsotg)) |
| 1495 | dwc2_hsotg_unmap_dma(hsotg, hs_ep, hs_req); |
| 1496 | |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 1497 | dwc2_hsotg_handle_unaligned_buf_complete(hsotg, hs_ep, hs_req); |
Mian Yousaf Kaukab | 7d24c1b | 2015-01-30 09:09:31 +0100 | [diff] [blame] | 1498 | |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1499 | hs_ep->req = NULL; |
| 1500 | list_del_init(&hs_req->queue); |
| 1501 | |
Lukasz Majewski | 8b9bc46 | 2012-05-04 14:17:11 +0200 | [diff] [blame] | 1502 | /* |
| 1503 | * call the complete request with the locks off, just in case the |
| 1504 | * request tries to queue more work for this endpoint. |
| 1505 | */ |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1506 | |
| 1507 | if (hs_req->req.complete) { |
Lukasz Majewski | 22258f4 | 2012-06-14 10:02:24 +0200 | [diff] [blame] | 1508 | spin_unlock(&hsotg->lock); |
Michal Sojka | 304f7e5 | 2014-09-24 22:43:19 +0200 | [diff] [blame] | 1509 | usb_gadget_giveback_request(&hs_ep->ep, &hs_req->req); |
Lukasz Majewski | 22258f4 | 2012-06-14 10:02:24 +0200 | [diff] [blame] | 1510 | spin_lock(&hsotg->lock); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1511 | } |
| 1512 | |
Lukasz Majewski | 8b9bc46 | 2012-05-04 14:17:11 +0200 | [diff] [blame] | 1513 | /* |
| 1514 | * Look to see if there is anything else to do. Note, the completion |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1515 | * of the previous request may have caused a new request to be started |
Lukasz Majewski | 8b9bc46 | 2012-05-04 14:17:11 +0200 | [diff] [blame] | 1516 | * so be careful when doing this. |
| 1517 | */ |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1518 | |
| 1519 | if (!hs_ep->req && result >= 0) { |
Vardan Mikayelyan | 41cc4cd | 2016-05-25 18:07:12 -0700 | [diff] [blame] | 1520 | dwc2_gadget_start_next_request(hs_ep); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1521 | } |
| 1522 | } |
| 1523 | |
| 1524 | /** |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 1525 | * dwc2_hsotg_rx_data - receive data from the FIFO for an endpoint |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1526 | * @hsotg: The device state. |
| 1527 | * @ep_idx: The endpoint index for the data |
| 1528 | * @size: The size of data in the fifo, in bytes |
| 1529 | * |
| 1530 | * The FIFO status shows there is data to read from the FIFO for a given |
| 1531 | * endpoint, so sort out whether we need to read the data into a request |
| 1532 | * that has been made for that endpoint. |
| 1533 | */ |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 1534 | static void dwc2_hsotg_rx_data(struct dwc2_hsotg *hsotg, int ep_idx, int size) |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1535 | { |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 1536 | struct dwc2_hsotg_ep *hs_ep = hsotg->eps_out[ep_idx]; |
| 1537 | struct dwc2_hsotg_req *hs_req = hs_ep->req; |
Lukasz Majewski | 94cb8fd | 2012-05-04 14:17:14 +0200 | [diff] [blame] | 1538 | void __iomem *fifo = hsotg->regs + EPFIFO(ep_idx); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1539 | int to_read; |
| 1540 | int max_req; |
| 1541 | int read_ptr; |
| 1542 | |
Lukasz Majewski | 22258f4 | 2012-06-14 10:02:24 +0200 | [diff] [blame] | 1543 | |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1544 | if (!hs_req) { |
Antti Seppälä | 95c8bc3 | 2015-08-20 21:41:07 +0300 | [diff] [blame] | 1545 | u32 epctl = dwc2_readl(hsotg->regs + DOEPCTL(ep_idx)); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1546 | int ptr; |
| 1547 | |
Robert Baldyga | 6b448af | 2014-12-16 11:51:44 +0100 | [diff] [blame] | 1548 | dev_dbg(hsotg->dev, |
Dinh Nguyen | 47a1685 | 2014-04-14 14:13:34 -0700 | [diff] [blame] | 1549 | "%s: FIFO %d bytes on ep%d but no req (DXEPCTl=0x%08x)\n", |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1550 | __func__, size, ep_idx, epctl); |
| 1551 | |
| 1552 | /* dump the data from the FIFO, we've nothing we can do */ |
| 1553 | for (ptr = 0; ptr < size; ptr += 4) |
Antti Seppälä | 95c8bc3 | 2015-08-20 21:41:07 +0300 | [diff] [blame] | 1554 | (void)dwc2_readl(fifo); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1555 | |
| 1556 | return; |
| 1557 | } |
| 1558 | |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1559 | to_read = size; |
| 1560 | read_ptr = hs_req->req.actual; |
| 1561 | max_req = hs_req->req.length - read_ptr; |
| 1562 | |
Ben Dooks | a33e713 | 2010-07-19 09:40:49 +0100 | [diff] [blame] | 1563 | dev_dbg(hsotg->dev, "%s: read %d/%d, done %d/%d\n", |
| 1564 | __func__, to_read, max_req, read_ptr, hs_req->req.length); |
| 1565 | |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1566 | if (to_read > max_req) { |
Lukasz Majewski | 8b9bc46 | 2012-05-04 14:17:11 +0200 | [diff] [blame] | 1567 | /* |
| 1568 | * more data appeared than we where willing |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1569 | * to deal with in this request. |
| 1570 | */ |
| 1571 | |
| 1572 | /* currently we don't deal this */ |
| 1573 | WARN_ON_ONCE(1); |
| 1574 | } |
| 1575 | |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1576 | hs_ep->total_data += to_read; |
| 1577 | hs_req->req.actual += to_read; |
| 1578 | to_read = DIV_ROUND_UP(to_read, 4); |
| 1579 | |
Lukasz Majewski | 8b9bc46 | 2012-05-04 14:17:11 +0200 | [diff] [blame] | 1580 | /* |
| 1581 | * note, we might over-write the buffer end by 3 bytes depending on |
| 1582 | * alignment of the data. |
| 1583 | */ |
Matt Porter | 1a7ed5b | 2014-02-03 10:29:09 -0500 | [diff] [blame] | 1584 | ioread32_rep(fifo, hs_req->req.buf + read_ptr, to_read); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1585 | } |
| 1586 | |
| 1587 | /** |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 1588 | * dwc2_hsotg_ep0_zlp - send/receive zero-length packet on control endpoint |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1589 | * @hsotg: The device instance |
Mian Yousaf Kaukab | fe0b94a | 2015-01-09 13:38:58 +0100 | [diff] [blame] | 1590 | * @dir_in: If IN zlp |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1591 | * |
| 1592 | * Generate a zero-length IN packet request for terminating a SETUP |
| 1593 | * transaction. |
| 1594 | * |
| 1595 | * Note, since we don't write any data to the TxFIFO, then it is |
Lucas De Marchi | 25985ed | 2011-03-30 22:57:33 -0300 | [diff] [blame] | 1596 | * currently believed that we do not need to wait for any space in |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1597 | * the TxFIFO. |
| 1598 | */ |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 1599 | static void dwc2_hsotg_ep0_zlp(struct dwc2_hsotg *hsotg, bool dir_in) |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1600 | { |
Mian Yousaf Kaukab | c6f5c05 | 2015-01-09 13:38:50 +0100 | [diff] [blame] | 1601 | /* eps_out[0] is used in both directions */ |
Mian Yousaf Kaukab | fe0b94a | 2015-01-09 13:38:58 +0100 | [diff] [blame] | 1602 | hsotg->eps_out[0]->dir_in = dir_in; |
| 1603 | hsotg->ep0_state = dir_in ? DWC2_EP0_STATUS_IN : DWC2_EP0_STATUS_OUT; |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1604 | |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 1605 | dwc2_hsotg_program_zlp(hsotg, hsotg->eps_out[0]); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1606 | } |
| 1607 | |
Roman Bacik | ec1f9d9 | 2015-09-10 18:13:43 -0700 | [diff] [blame] | 1608 | static void dwc2_hsotg_change_ep_iso_parity(struct dwc2_hsotg *hsotg, |
| 1609 | u32 epctl_reg) |
| 1610 | { |
| 1611 | u32 ctrl; |
| 1612 | |
| 1613 | ctrl = dwc2_readl(hsotg->regs + epctl_reg); |
| 1614 | if (ctrl & DXEPCTL_EOFRNUM) |
| 1615 | ctrl |= DXEPCTL_SETEVENFR; |
| 1616 | else |
| 1617 | ctrl |= DXEPCTL_SETODDFR; |
| 1618 | dwc2_writel(ctrl, hsotg->regs + epctl_reg); |
| 1619 | } |
| 1620 | |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1621 | /** |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 1622 | * dwc2_hsotg_handle_outdone - handle receiving OutDone/SetupDone from RXFIFO |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1623 | * @hsotg: The device instance |
| 1624 | * @epnum: The endpoint received from |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1625 | * |
| 1626 | * The RXFIFO has delivered an OutDone event, which means that the data |
| 1627 | * transfer for an OUT endpoint has been completed, either by a short |
| 1628 | * packet or by the finish of a transfer. |
Lukasz Majewski | 8b9bc46 | 2012-05-04 14:17:11 +0200 | [diff] [blame] | 1629 | */ |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 1630 | static void dwc2_hsotg_handle_outdone(struct dwc2_hsotg *hsotg, int epnum) |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1631 | { |
Antti Seppälä | 95c8bc3 | 2015-08-20 21:41:07 +0300 | [diff] [blame] | 1632 | u32 epsize = dwc2_readl(hsotg->regs + DOEPTSIZ(epnum)); |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 1633 | struct dwc2_hsotg_ep *hs_ep = hsotg->eps_out[epnum]; |
| 1634 | struct dwc2_hsotg_req *hs_req = hs_ep->req; |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1635 | struct usb_request *req = &hs_req->req; |
Dinh Nguyen | 47a1685 | 2014-04-14 14:13:34 -0700 | [diff] [blame] | 1636 | unsigned size_left = DXEPTSIZ_XFERSIZE_GET(epsize); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1637 | int result = 0; |
| 1638 | |
| 1639 | if (!hs_req) { |
| 1640 | dev_dbg(hsotg->dev, "%s: no request active\n", __func__); |
| 1641 | return; |
| 1642 | } |
| 1643 | |
Mian Yousaf Kaukab | fe0b94a | 2015-01-09 13:38:58 +0100 | [diff] [blame] | 1644 | if (epnum == 0 && hsotg->ep0_state == DWC2_EP0_STATUS_OUT) { |
| 1645 | dev_dbg(hsotg->dev, "zlp packet received\n"); |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 1646 | dwc2_hsotg_complete_request(hsotg, hs_ep, hs_req, 0); |
| 1647 | dwc2_hsotg_enqueue_setup(hsotg); |
Mian Yousaf Kaukab | fe0b94a | 2015-01-09 13:38:58 +0100 | [diff] [blame] | 1648 | return; |
| 1649 | } |
| 1650 | |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1651 | if (using_dma(hsotg)) { |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1652 | unsigned size_done; |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1653 | |
Lukasz Majewski | 8b9bc46 | 2012-05-04 14:17:11 +0200 | [diff] [blame] | 1654 | /* |
| 1655 | * Calculate the size of the transfer by checking how much |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1656 | * is left in the endpoint size register and then working it |
| 1657 | * out from the amount we loaded for the transfer. |
| 1658 | * |
| 1659 | * We need to do this as DMA pointers are always 32bit aligned |
| 1660 | * so may overshoot/undershoot the transfer. |
| 1661 | */ |
| 1662 | |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1663 | size_done = hs_ep->size_loaded - size_left; |
| 1664 | size_done += hs_ep->last_load; |
| 1665 | |
| 1666 | req->actual = size_done; |
| 1667 | } |
| 1668 | |
Ben Dooks | a33e713 | 2010-07-19 09:40:49 +0100 | [diff] [blame] | 1669 | /* if there is more request to do, schedule new transfer */ |
| 1670 | if (req->actual < req->length && size_left == 0) { |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 1671 | dwc2_hsotg_start_req(hsotg, hs_ep, hs_req, true); |
Ben Dooks | a33e713 | 2010-07-19 09:40:49 +0100 | [diff] [blame] | 1672 | return; |
| 1673 | } |
| 1674 | |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1675 | if (req->actual < req->length && req->short_not_ok) { |
| 1676 | dev_dbg(hsotg->dev, "%s: got %d/%d (short not ok) => error\n", |
| 1677 | __func__, req->actual, req->length); |
| 1678 | |
Lukasz Majewski | 8b9bc46 | 2012-05-04 14:17:11 +0200 | [diff] [blame] | 1679 | /* |
| 1680 | * todo - what should we return here? there's no one else |
| 1681 | * even bothering to check the status. |
| 1682 | */ |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1683 | } |
| 1684 | |
Mian Yousaf Kaukab | fe0b94a | 2015-01-09 13:38:58 +0100 | [diff] [blame] | 1685 | if (epnum == 0 && hsotg->ep0_state == DWC2_EP0_DATA_OUT) { |
| 1686 | /* Move to STATUS IN */ |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 1687 | dwc2_hsotg_ep0_zlp(hsotg, true); |
Mian Yousaf Kaukab | fe0b94a | 2015-01-09 13:38:58 +0100 | [diff] [blame] | 1688 | return; |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1689 | } |
| 1690 | |
Roman Bacik | ec1f9d9 | 2015-09-10 18:13:43 -0700 | [diff] [blame] | 1691 | /* |
| 1692 | * Slave mode OUT transfers do not go through XferComplete so |
| 1693 | * adjust the ISOC parity here. |
| 1694 | */ |
| 1695 | if (!using_dma(hsotg)) { |
Roman Bacik | ec1f9d9 | 2015-09-10 18:13:43 -0700 | [diff] [blame] | 1696 | if (hs_ep->isochronous && hs_ep->interval == 1) |
| 1697 | dwc2_hsotg_change_ep_iso_parity(hsotg, DOEPCTL(epnum)); |
Vardan Mikayelyan | 837e9f0 | 2016-05-25 18:07:22 -0700 | [diff] [blame] | 1698 | else if (hs_ep->isochronous && hs_ep->interval > 1) |
| 1699 | dwc2_gadget_incr_frame_num(hs_ep); |
Roman Bacik | ec1f9d9 | 2015-09-10 18:13:43 -0700 | [diff] [blame] | 1700 | } |
| 1701 | |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 1702 | dwc2_hsotg_complete_request(hsotg, hs_ep, hs_req, result); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1703 | } |
| 1704 | |
| 1705 | /** |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 1706 | * dwc2_hsotg_handle_rx - RX FIFO has data |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1707 | * @hsotg: The device instance |
| 1708 | * |
| 1709 | * The IRQ handler has detected that the RX FIFO has some data in it |
| 1710 | * that requires processing, so find out what is in there and do the |
| 1711 | * appropriate read. |
| 1712 | * |
Lucas De Marchi | 25985ed | 2011-03-30 22:57:33 -0300 | [diff] [blame] | 1713 | * The RXFIFO is a true FIFO, the packets coming out are still in packet |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1714 | * chunks, so if you have x packets received on an endpoint you'll get x |
| 1715 | * FIFO events delivered, each with a packet's worth of data in it. |
| 1716 | * |
| 1717 | * When using DMA, we should not be processing events from the RXFIFO |
| 1718 | * as the actual data should be sent to the memory directly and we turn |
| 1719 | * on the completion interrupts to get notifications of transfer completion. |
| 1720 | */ |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 1721 | static void dwc2_hsotg_handle_rx(struct dwc2_hsotg *hsotg) |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1722 | { |
Antti Seppälä | 95c8bc3 | 2015-08-20 21:41:07 +0300 | [diff] [blame] | 1723 | u32 grxstsr = dwc2_readl(hsotg->regs + GRXSTSP); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1724 | u32 epnum, status, size; |
| 1725 | |
| 1726 | WARN_ON(using_dma(hsotg)); |
| 1727 | |
Dinh Nguyen | 47a1685 | 2014-04-14 14:13:34 -0700 | [diff] [blame] | 1728 | epnum = grxstsr & GRXSTS_EPNUM_MASK; |
| 1729 | status = grxstsr & GRXSTS_PKTSTS_MASK; |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1730 | |
Dinh Nguyen | 47a1685 | 2014-04-14 14:13:34 -0700 | [diff] [blame] | 1731 | size = grxstsr & GRXSTS_BYTECNT_MASK; |
| 1732 | size >>= GRXSTS_BYTECNT_SHIFT; |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1733 | |
Mian Yousaf Kaukab | d7c747c | 2015-01-30 09:09:30 +0100 | [diff] [blame] | 1734 | dev_dbg(hsotg->dev, "%s: GRXSTSP=0x%08x (%d@%d)\n", |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1735 | __func__, grxstsr, size, epnum); |
| 1736 | |
Dinh Nguyen | 47a1685 | 2014-04-14 14:13:34 -0700 | [diff] [blame] | 1737 | switch ((status & GRXSTS_PKTSTS_MASK) >> GRXSTS_PKTSTS_SHIFT) { |
| 1738 | case GRXSTS_PKTSTS_GLOBALOUTNAK: |
| 1739 | dev_dbg(hsotg->dev, "GLOBALOUTNAK\n"); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1740 | break; |
| 1741 | |
Dinh Nguyen | 47a1685 | 2014-04-14 14:13:34 -0700 | [diff] [blame] | 1742 | case GRXSTS_PKTSTS_OUTDONE: |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1743 | dev_dbg(hsotg->dev, "OutDone (Frame=0x%08x)\n", |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 1744 | dwc2_hsotg_read_frameno(hsotg)); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1745 | |
| 1746 | if (!using_dma(hsotg)) |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 1747 | dwc2_hsotg_handle_outdone(hsotg, epnum); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1748 | break; |
| 1749 | |
Dinh Nguyen | 47a1685 | 2014-04-14 14:13:34 -0700 | [diff] [blame] | 1750 | case GRXSTS_PKTSTS_SETUPDONE: |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1751 | dev_dbg(hsotg->dev, |
| 1752 | "SetupDone (Frame=0x%08x, DOPEPCTL=0x%08x)\n", |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 1753 | dwc2_hsotg_read_frameno(hsotg), |
Antti Seppälä | 95c8bc3 | 2015-08-20 21:41:07 +0300 | [diff] [blame] | 1754 | dwc2_readl(hsotg->regs + DOEPCTL(0))); |
Mian Yousaf Kaukab | fe0b94a | 2015-01-09 13:38:58 +0100 | [diff] [blame] | 1755 | /* |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 1756 | * Call dwc2_hsotg_handle_outdone here if it was not called from |
Mian Yousaf Kaukab | fe0b94a | 2015-01-09 13:38:58 +0100 | [diff] [blame] | 1757 | * GRXSTS_PKTSTS_OUTDONE. That is, if the core didn't |
| 1758 | * generate GRXSTS_PKTSTS_OUTDONE for setup packet. |
| 1759 | */ |
| 1760 | if (hsotg->ep0_state == DWC2_EP0_SETUP) |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 1761 | dwc2_hsotg_handle_outdone(hsotg, epnum); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1762 | break; |
| 1763 | |
Dinh Nguyen | 47a1685 | 2014-04-14 14:13:34 -0700 | [diff] [blame] | 1764 | case GRXSTS_PKTSTS_OUTRX: |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 1765 | dwc2_hsotg_rx_data(hsotg, epnum, size); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1766 | break; |
| 1767 | |
Dinh Nguyen | 47a1685 | 2014-04-14 14:13:34 -0700 | [diff] [blame] | 1768 | case GRXSTS_PKTSTS_SETUPRX: |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1769 | dev_dbg(hsotg->dev, |
| 1770 | "SetupRX (Frame=0x%08x, DOPEPCTL=0x%08x)\n", |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 1771 | dwc2_hsotg_read_frameno(hsotg), |
Antti Seppälä | 95c8bc3 | 2015-08-20 21:41:07 +0300 | [diff] [blame] | 1772 | dwc2_readl(hsotg->regs + DOEPCTL(0))); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1773 | |
Mian Yousaf Kaukab | fe0b94a | 2015-01-09 13:38:58 +0100 | [diff] [blame] | 1774 | WARN_ON(hsotg->ep0_state != DWC2_EP0_SETUP); |
| 1775 | |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 1776 | dwc2_hsotg_rx_data(hsotg, epnum, size); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1777 | break; |
| 1778 | |
| 1779 | default: |
| 1780 | dev_warn(hsotg->dev, "%s: unknown status %08x\n", |
| 1781 | __func__, grxstsr); |
| 1782 | |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 1783 | dwc2_hsotg_dump(hsotg); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1784 | break; |
| 1785 | } |
| 1786 | } |
| 1787 | |
| 1788 | /** |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 1789 | * dwc2_hsotg_ep0_mps - turn max packet size into register setting |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1790 | * @mps: The maximum packet size in bytes. |
Lukasz Majewski | 8b9bc46 | 2012-05-04 14:17:11 +0200 | [diff] [blame] | 1791 | */ |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 1792 | static u32 dwc2_hsotg_ep0_mps(unsigned int mps) |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1793 | { |
| 1794 | switch (mps) { |
| 1795 | case 64: |
Lukasz Majewski | 94cb8fd | 2012-05-04 14:17:14 +0200 | [diff] [blame] | 1796 | return D0EPCTL_MPS_64; |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1797 | case 32: |
Lukasz Majewski | 94cb8fd | 2012-05-04 14:17:14 +0200 | [diff] [blame] | 1798 | return D0EPCTL_MPS_32; |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1799 | case 16: |
Lukasz Majewski | 94cb8fd | 2012-05-04 14:17:14 +0200 | [diff] [blame] | 1800 | return D0EPCTL_MPS_16; |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1801 | case 8: |
Lukasz Majewski | 94cb8fd | 2012-05-04 14:17:14 +0200 | [diff] [blame] | 1802 | return D0EPCTL_MPS_8; |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1803 | } |
| 1804 | |
| 1805 | /* bad max packet size, warn and return invalid result */ |
| 1806 | WARN_ON(1); |
| 1807 | return (u32)-1; |
| 1808 | } |
| 1809 | |
| 1810 | /** |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 1811 | * dwc2_hsotg_set_ep_maxpacket - set endpoint's max-packet field |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1812 | * @hsotg: The driver state. |
| 1813 | * @ep: The index number of the endpoint |
| 1814 | * @mps: The maximum packet size in bytes |
| 1815 | * |
| 1816 | * Configure the maximum packet size for the given endpoint, updating |
| 1817 | * the hardware control registers to reflect this. |
| 1818 | */ |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 1819 | static void dwc2_hsotg_set_ep_maxpacket(struct dwc2_hsotg *hsotg, |
Mian Yousaf Kaukab | c6f5c05 | 2015-01-09 13:38:50 +0100 | [diff] [blame] | 1820 | unsigned int ep, unsigned int mps, unsigned int dir_in) |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1821 | { |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 1822 | struct dwc2_hsotg_ep *hs_ep; |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1823 | void __iomem *regs = hsotg->regs; |
| 1824 | u32 mpsval; |
Robert Baldyga | 4fca54a | 2013-10-09 09:00:02 +0200 | [diff] [blame] | 1825 | u32 mcval; |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1826 | u32 reg; |
| 1827 | |
Mian Yousaf Kaukab | c6f5c05 | 2015-01-09 13:38:50 +0100 | [diff] [blame] | 1828 | hs_ep = index_to_ep(hsotg, ep, dir_in); |
| 1829 | if (!hs_ep) |
| 1830 | return; |
| 1831 | |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1832 | if (ep == 0) { |
| 1833 | /* EP0 is a special case */ |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 1834 | mpsval = dwc2_hsotg_ep0_mps(mps); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1835 | if (mpsval > 3) |
| 1836 | goto bad_mps; |
Robert Baldyga | e9edd199 | 2013-10-09 08:20:02 +0200 | [diff] [blame] | 1837 | hs_ep->ep.maxpacket = mps; |
Robert Baldyga | 4fca54a | 2013-10-09 09:00:02 +0200 | [diff] [blame] | 1838 | hs_ep->mc = 1; |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1839 | } else { |
Dinh Nguyen | 47a1685 | 2014-04-14 14:13:34 -0700 | [diff] [blame] | 1840 | mpsval = mps & DXEPCTL_MPS_MASK; |
Robert Baldyga | e9edd199 | 2013-10-09 08:20:02 +0200 | [diff] [blame] | 1841 | if (mpsval > 1024) |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1842 | goto bad_mps; |
Robert Baldyga | 4fca54a | 2013-10-09 09:00:02 +0200 | [diff] [blame] | 1843 | mcval = ((mps >> 11) & 0x3) + 1; |
| 1844 | hs_ep->mc = mcval; |
| 1845 | if (mcval > 3) |
| 1846 | goto bad_mps; |
Robert Baldyga | e9edd199 | 2013-10-09 08:20:02 +0200 | [diff] [blame] | 1847 | hs_ep->ep.maxpacket = mpsval; |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1848 | } |
| 1849 | |
Mian Yousaf Kaukab | c6f5c05 | 2015-01-09 13:38:50 +0100 | [diff] [blame] | 1850 | if (dir_in) { |
Antti Seppälä | 95c8bc3 | 2015-08-20 21:41:07 +0300 | [diff] [blame] | 1851 | reg = dwc2_readl(regs + DIEPCTL(ep)); |
Mian Yousaf Kaukab | c6f5c05 | 2015-01-09 13:38:50 +0100 | [diff] [blame] | 1852 | reg &= ~DXEPCTL_MPS_MASK; |
| 1853 | reg |= mpsval; |
Antti Seppälä | 95c8bc3 | 2015-08-20 21:41:07 +0300 | [diff] [blame] | 1854 | dwc2_writel(reg, regs + DIEPCTL(ep)); |
Mian Yousaf Kaukab | c6f5c05 | 2015-01-09 13:38:50 +0100 | [diff] [blame] | 1855 | } else { |
Antti Seppälä | 95c8bc3 | 2015-08-20 21:41:07 +0300 | [diff] [blame] | 1856 | reg = dwc2_readl(regs + DOEPCTL(ep)); |
Dinh Nguyen | 47a1685 | 2014-04-14 14:13:34 -0700 | [diff] [blame] | 1857 | reg &= ~DXEPCTL_MPS_MASK; |
Anton Tikhomirov | 659ad60 | 2012-03-06 14:07:29 +0900 | [diff] [blame] | 1858 | reg |= mpsval; |
Antti Seppälä | 95c8bc3 | 2015-08-20 21:41:07 +0300 | [diff] [blame] | 1859 | dwc2_writel(reg, regs + DOEPCTL(ep)); |
Anton Tikhomirov | 659ad60 | 2012-03-06 14:07:29 +0900 | [diff] [blame] | 1860 | } |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1861 | |
| 1862 | return; |
| 1863 | |
| 1864 | bad_mps: |
| 1865 | dev_err(hsotg->dev, "ep%d: bad mps of %d\n", ep, mps); |
| 1866 | } |
| 1867 | |
Anton Tikhomirov | 9c39ddc | 2011-04-21 17:06:41 +0900 | [diff] [blame] | 1868 | /** |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 1869 | * dwc2_hsotg_txfifo_flush - flush Tx FIFO |
Anton Tikhomirov | 9c39ddc | 2011-04-21 17:06:41 +0900 | [diff] [blame] | 1870 | * @hsotg: The driver state |
| 1871 | * @idx: The index for the endpoint (0..15) |
| 1872 | */ |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 1873 | static void dwc2_hsotg_txfifo_flush(struct dwc2_hsotg *hsotg, unsigned int idx) |
Anton Tikhomirov | 9c39ddc | 2011-04-21 17:06:41 +0900 | [diff] [blame] | 1874 | { |
| 1875 | int timeout; |
| 1876 | int val; |
| 1877 | |
Antti Seppälä | 95c8bc3 | 2015-08-20 21:41:07 +0300 | [diff] [blame] | 1878 | dwc2_writel(GRSTCTL_TXFNUM(idx) | GRSTCTL_TXFFLSH, |
| 1879 | hsotg->regs + GRSTCTL); |
Anton Tikhomirov | 9c39ddc | 2011-04-21 17:06:41 +0900 | [diff] [blame] | 1880 | |
| 1881 | /* wait until the fifo is flushed */ |
| 1882 | timeout = 100; |
| 1883 | |
| 1884 | while (1) { |
Antti Seppälä | 95c8bc3 | 2015-08-20 21:41:07 +0300 | [diff] [blame] | 1885 | val = dwc2_readl(hsotg->regs + GRSTCTL); |
Anton Tikhomirov | 9c39ddc | 2011-04-21 17:06:41 +0900 | [diff] [blame] | 1886 | |
Dinh Nguyen | 47a1685 | 2014-04-14 14:13:34 -0700 | [diff] [blame] | 1887 | if ((val & (GRSTCTL_TXFFLSH)) == 0) |
Anton Tikhomirov | 9c39ddc | 2011-04-21 17:06:41 +0900 | [diff] [blame] | 1888 | break; |
| 1889 | |
| 1890 | if (--timeout == 0) { |
| 1891 | dev_err(hsotg->dev, |
| 1892 | "%s: timeout flushing fifo (GRSTCTL=%08x)\n", |
| 1893 | __func__, val); |
Marek Szyprowski | e0cbe59 | 2014-09-09 10:44:10 +0200 | [diff] [blame] | 1894 | break; |
Anton Tikhomirov | 9c39ddc | 2011-04-21 17:06:41 +0900 | [diff] [blame] | 1895 | } |
| 1896 | |
| 1897 | udelay(1); |
| 1898 | } |
| 1899 | } |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1900 | |
| 1901 | /** |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 1902 | * dwc2_hsotg_trytx - check to see if anything needs transmitting |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1903 | * @hsotg: The driver state |
| 1904 | * @hs_ep: The driver endpoint to check. |
| 1905 | * |
| 1906 | * Check to see if there is a request that has data to send, and if so |
| 1907 | * make an attempt to write data into the FIFO. |
| 1908 | */ |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 1909 | static int dwc2_hsotg_trytx(struct dwc2_hsotg *hsotg, |
| 1910 | struct dwc2_hsotg_ep *hs_ep) |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1911 | { |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 1912 | struct dwc2_hsotg_req *hs_req = hs_ep->req; |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1913 | |
Robert Baldyga | afcf416 | 2013-09-19 11:50:19 +0200 | [diff] [blame] | 1914 | if (!hs_ep->dir_in || !hs_req) { |
| 1915 | /** |
| 1916 | * if request is not enqueued, we disable interrupts |
| 1917 | * for endpoints, excepting ep0 |
| 1918 | */ |
| 1919 | if (hs_ep->index != 0) |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 1920 | dwc2_hsotg_ctrl_epint(hsotg, hs_ep->index, |
Robert Baldyga | afcf416 | 2013-09-19 11:50:19 +0200 | [diff] [blame] | 1921 | hs_ep->dir_in, 0); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1922 | return 0; |
Robert Baldyga | afcf416 | 2013-09-19 11:50:19 +0200 | [diff] [blame] | 1923 | } |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1924 | |
| 1925 | if (hs_req->req.actual < hs_req->req.length) { |
| 1926 | dev_dbg(hsotg->dev, "trying to write more for ep%d\n", |
| 1927 | hs_ep->index); |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 1928 | return dwc2_hsotg_write_fifo(hsotg, hs_ep, hs_req); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1929 | } |
| 1930 | |
| 1931 | return 0; |
| 1932 | } |
| 1933 | |
| 1934 | /** |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 1935 | * dwc2_hsotg_complete_in - complete IN transfer |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1936 | * @hsotg: The device state. |
| 1937 | * @hs_ep: The endpoint that has just completed. |
| 1938 | * |
| 1939 | * An IN transfer has been completed, update the transfer's state and then |
| 1940 | * call the relevant completion routines. |
| 1941 | */ |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 1942 | static void dwc2_hsotg_complete_in(struct dwc2_hsotg *hsotg, |
| 1943 | struct dwc2_hsotg_ep *hs_ep) |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1944 | { |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 1945 | struct dwc2_hsotg_req *hs_req = hs_ep->req; |
Antti Seppälä | 95c8bc3 | 2015-08-20 21:41:07 +0300 | [diff] [blame] | 1946 | u32 epsize = dwc2_readl(hsotg->regs + DIEPTSIZ(hs_ep->index)); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1947 | int size_left, size_done; |
| 1948 | |
| 1949 | if (!hs_req) { |
| 1950 | dev_dbg(hsotg->dev, "XferCompl but no req\n"); |
| 1951 | return; |
| 1952 | } |
| 1953 | |
Lukasz Majewski | d3ca025 | 2012-05-04 14:17:04 +0200 | [diff] [blame] | 1954 | /* Finish ZLP handling for IN EP0 transactions */ |
Mian Yousaf Kaukab | fe0b94a | 2015-01-09 13:38:58 +0100 | [diff] [blame] | 1955 | if (hs_ep->index == 0 && hsotg->ep0_state == DWC2_EP0_STATUS_IN) { |
| 1956 | dev_dbg(hsotg->dev, "zlp packet sent\n"); |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 1957 | dwc2_hsotg_complete_request(hsotg, hs_ep, hs_req, 0); |
Gregory Herrero | 9e14d0a | 2015-01-30 09:09:28 +0100 | [diff] [blame] | 1958 | if (hsotg->test_mode) { |
| 1959 | int ret; |
| 1960 | |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 1961 | ret = dwc2_hsotg_set_test_mode(hsotg, hsotg->test_mode); |
Gregory Herrero | 9e14d0a | 2015-01-30 09:09:28 +0100 | [diff] [blame] | 1962 | if (ret < 0) { |
| 1963 | dev_dbg(hsotg->dev, "Invalid Test #%d\n", |
| 1964 | hsotg->test_mode); |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 1965 | dwc2_hsotg_stall_ep0(hsotg); |
Gregory Herrero | 9e14d0a | 2015-01-30 09:09:28 +0100 | [diff] [blame] | 1966 | return; |
| 1967 | } |
| 1968 | } |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 1969 | dwc2_hsotg_enqueue_setup(hsotg); |
Lukasz Majewski | d3ca025 | 2012-05-04 14:17:04 +0200 | [diff] [blame] | 1970 | return; |
| 1971 | } |
| 1972 | |
Lukasz Majewski | 8b9bc46 | 2012-05-04 14:17:11 +0200 | [diff] [blame] | 1973 | /* |
| 1974 | * Calculate the size of the transfer by checking how much is left |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1975 | * in the endpoint size register and then working it out from |
| 1976 | * the amount we loaded for the transfer. |
| 1977 | * |
| 1978 | * We do this even for DMA, as the transfer may have incremented |
| 1979 | * past the end of the buffer (DMA transfers are always 32bit |
| 1980 | * aligned). |
| 1981 | */ |
| 1982 | |
Dinh Nguyen | 47a1685 | 2014-04-14 14:13:34 -0700 | [diff] [blame] | 1983 | size_left = DXEPTSIZ_XFERSIZE_GET(epsize); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1984 | |
| 1985 | size_done = hs_ep->size_loaded - size_left; |
| 1986 | size_done += hs_ep->last_load; |
| 1987 | |
| 1988 | if (hs_req->req.actual != size_done) |
| 1989 | dev_dbg(hsotg->dev, "%s: adjusting size done %d => %d\n", |
| 1990 | __func__, hs_req->req.actual, size_done); |
| 1991 | |
| 1992 | hs_req->req.actual = size_done; |
Lukasz Majewski | d3ca025 | 2012-05-04 14:17:04 +0200 | [diff] [blame] | 1993 | dev_dbg(hsotg->dev, "req->length:%d req->actual:%d req->zero:%d\n", |
| 1994 | hs_req->req.length, hs_req->req.actual, hs_req->req.zero); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1995 | |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 1996 | if (!size_left && hs_req->req.actual < hs_req->req.length) { |
| 1997 | dev_dbg(hsotg->dev, "%s trying more for req...\n", __func__); |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 1998 | dwc2_hsotg_start_req(hsotg, hs_ep, hs_req, true); |
Mian Yousaf Kaukab | fe0b94a | 2015-01-09 13:38:58 +0100 | [diff] [blame] | 1999 | return; |
| 2000 | } |
| 2001 | |
Mian Yousaf Kaukab | f71b5e2 | 2015-01-09 13:38:59 +0100 | [diff] [blame] | 2002 | /* Zlp for all endpoints, for ep0 only in DATA IN stage */ |
Mian Yousaf Kaukab | 8a20fa4 | 2015-01-09 13:39:03 +0100 | [diff] [blame] | 2003 | if (hs_ep->send_zlp) { |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 2004 | dwc2_hsotg_program_zlp(hsotg, hs_ep); |
Mian Yousaf Kaukab | 8a20fa4 | 2015-01-09 13:39:03 +0100 | [diff] [blame] | 2005 | hs_ep->send_zlp = 0; |
Mian Yousaf Kaukab | f71b5e2 | 2015-01-09 13:38:59 +0100 | [diff] [blame] | 2006 | /* transfer will be completed on next complete interrupt */ |
| 2007 | return; |
| 2008 | } |
| 2009 | |
Mian Yousaf Kaukab | fe0b94a | 2015-01-09 13:38:58 +0100 | [diff] [blame] | 2010 | if (hs_ep->index == 0 && hsotg->ep0_state == DWC2_EP0_DATA_IN) { |
| 2011 | /* Move to STATUS OUT */ |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 2012 | dwc2_hsotg_ep0_zlp(hsotg, false); |
Mian Yousaf Kaukab | fe0b94a | 2015-01-09 13:38:58 +0100 | [diff] [blame] | 2013 | return; |
| 2014 | } |
| 2015 | |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 2016 | dwc2_hsotg_complete_request(hsotg, hs_ep, hs_req, 0); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2017 | } |
| 2018 | |
| 2019 | /** |
Vardan Mikayelyan | 3260158 | 2016-05-25 18:07:10 -0700 | [diff] [blame] | 2020 | * dwc2_gadget_read_ep_interrupts - reads interrupts for given ep |
| 2021 | * @hsotg: The device state. |
| 2022 | * @idx: Index of ep. |
| 2023 | * @dir_in: Endpoint direction 1-in 0-out. |
| 2024 | * |
| 2025 | * Reads for endpoint with given index and direction, by masking |
| 2026 | * epint_reg with coresponding mask. |
| 2027 | */ |
| 2028 | static u32 dwc2_gadget_read_ep_interrupts(struct dwc2_hsotg *hsotg, |
| 2029 | unsigned int idx, int dir_in) |
| 2030 | { |
| 2031 | u32 epmsk_reg = dir_in ? DIEPMSK : DOEPMSK; |
| 2032 | u32 epint_reg = dir_in ? DIEPINT(idx) : DOEPINT(idx); |
| 2033 | u32 ints; |
| 2034 | u32 mask; |
| 2035 | u32 diepempmsk; |
| 2036 | |
| 2037 | mask = dwc2_readl(hsotg->regs + epmsk_reg); |
| 2038 | diepempmsk = dwc2_readl(hsotg->regs + DIEPEMPMSK); |
| 2039 | mask |= ((diepempmsk >> idx) & 0x1) ? DIEPMSK_TXFIFOEMPTY : 0; |
| 2040 | mask |= DXEPINT_SETUP_RCVD; |
| 2041 | |
| 2042 | ints = dwc2_readl(hsotg->regs + epint_reg); |
| 2043 | ints &= mask; |
| 2044 | return ints; |
| 2045 | } |
| 2046 | |
| 2047 | /** |
Vardan Mikayelyan | bd9971f | 2016-05-25 18:07:19 -0700 | [diff] [blame] | 2048 | * dwc2_gadget_handle_ep_disabled - handle DXEPINT_EPDISBLD |
| 2049 | * @hs_ep: The endpoint on which interrupt is asserted. |
| 2050 | * |
| 2051 | * This interrupt indicates that the endpoint has been disabled per the |
| 2052 | * application's request. |
| 2053 | * |
| 2054 | * For IN endpoints flushes txfifo, in case of BULK clears DCTL_CGNPINNAK, |
| 2055 | * in case of ISOC completes current request. |
| 2056 | * |
| 2057 | * For ISOC-OUT endpoints completes expired requests. If there is remaining |
| 2058 | * request starts it. |
| 2059 | */ |
| 2060 | static void dwc2_gadget_handle_ep_disabled(struct dwc2_hsotg_ep *hs_ep) |
| 2061 | { |
| 2062 | struct dwc2_hsotg *hsotg = hs_ep->parent; |
| 2063 | struct dwc2_hsotg_req *hs_req; |
| 2064 | unsigned char idx = hs_ep->index; |
| 2065 | int dir_in = hs_ep->dir_in; |
| 2066 | u32 epctl_reg = dir_in ? DIEPCTL(idx) : DOEPCTL(idx); |
| 2067 | int dctl = dwc2_readl(hsotg->regs + DCTL); |
| 2068 | |
| 2069 | dev_dbg(hsotg->dev, "%s: EPDisbld\n", __func__); |
| 2070 | |
| 2071 | if (dir_in) { |
| 2072 | int epctl = dwc2_readl(hsotg->regs + epctl_reg); |
| 2073 | |
| 2074 | dwc2_hsotg_txfifo_flush(hsotg, hs_ep->fifo_index); |
| 2075 | |
| 2076 | if (hs_ep->isochronous) { |
| 2077 | dwc2_hsotg_complete_in(hsotg, hs_ep); |
| 2078 | return; |
| 2079 | } |
| 2080 | |
| 2081 | if ((epctl & DXEPCTL_STALL) && (epctl & DXEPCTL_EPTYPE_BULK)) { |
| 2082 | int dctl = dwc2_readl(hsotg->regs + DCTL); |
| 2083 | |
| 2084 | dctl |= DCTL_CGNPINNAK; |
| 2085 | dwc2_writel(dctl, hsotg->regs + DCTL); |
| 2086 | } |
| 2087 | return; |
| 2088 | } |
| 2089 | |
| 2090 | if (dctl & DCTL_GOUTNAKSTS) { |
| 2091 | dctl |= DCTL_CGOUTNAK; |
| 2092 | dwc2_writel(dctl, hsotg->regs + DCTL); |
| 2093 | } |
| 2094 | |
| 2095 | if (!hs_ep->isochronous) |
| 2096 | return; |
| 2097 | |
| 2098 | if (list_empty(&hs_ep->queue)) { |
| 2099 | dev_dbg(hsotg->dev, "%s: complete_ep 0x%p, ep->queue empty!\n", |
| 2100 | __func__, hs_ep); |
| 2101 | return; |
| 2102 | } |
| 2103 | |
| 2104 | do { |
| 2105 | hs_req = get_ep_head(hs_ep); |
| 2106 | if (hs_req) |
| 2107 | dwc2_hsotg_complete_request(hsotg, hs_ep, hs_req, |
| 2108 | -ENODATA); |
| 2109 | dwc2_gadget_incr_frame_num(hs_ep); |
| 2110 | } while (dwc2_gadget_target_frame_elapsed(hs_ep)); |
| 2111 | |
| 2112 | dwc2_gadget_start_next_request(hs_ep); |
| 2113 | } |
| 2114 | |
| 2115 | /** |
Vardan Mikayelyan | 5321922 | 2016-05-25 18:07:14 -0700 | [diff] [blame] | 2116 | * dwc2_gadget_handle_out_token_ep_disabled - handle DXEPINT_OUTTKNEPDIS |
| 2117 | * @hs_ep: The endpoint on which interrupt is asserted. |
| 2118 | * |
| 2119 | * This is starting point for ISOC-OUT transfer, synchronization done with |
| 2120 | * first out token received from host while corresponding EP is disabled. |
| 2121 | * |
| 2122 | * Device does not know initial frame in which out token will come. For this |
| 2123 | * HW generates OUTTKNEPDIS - out token is received while EP is disabled. Upon |
| 2124 | * getting this interrupt SW starts calculation for next transfer frame. |
| 2125 | */ |
| 2126 | static void dwc2_gadget_handle_out_token_ep_disabled(struct dwc2_hsotg_ep *ep) |
| 2127 | { |
| 2128 | struct dwc2_hsotg *hsotg = ep->parent; |
| 2129 | int dir_in = ep->dir_in; |
| 2130 | u32 doepmsk; |
| 2131 | |
| 2132 | if (dir_in || !ep->isochronous) |
| 2133 | return; |
| 2134 | |
| 2135 | dwc2_hsotg_complete_request(hsotg, ep, get_ep_head(ep), -ENODATA); |
| 2136 | |
| 2137 | if (ep->interval > 1 && |
| 2138 | ep->target_frame == TARGET_FRAME_INITIAL) { |
| 2139 | u32 dsts; |
| 2140 | u32 ctrl; |
| 2141 | |
| 2142 | dsts = dwc2_readl(hsotg->regs + DSTS); |
| 2143 | ep->target_frame = dwc2_hsotg_read_frameno(hsotg); |
| 2144 | dwc2_gadget_incr_frame_num(ep); |
| 2145 | |
| 2146 | ctrl = dwc2_readl(hsotg->regs + DOEPCTL(ep->index)); |
| 2147 | if (ep->target_frame & 0x1) |
| 2148 | ctrl |= DXEPCTL_SETODDFR; |
| 2149 | else |
| 2150 | ctrl |= DXEPCTL_SETEVENFR; |
| 2151 | |
| 2152 | dwc2_writel(ctrl, hsotg->regs + DOEPCTL(ep->index)); |
| 2153 | } |
| 2154 | |
| 2155 | dwc2_gadget_start_next_request(ep); |
| 2156 | doepmsk = dwc2_readl(hsotg->regs + DOEPMSK); |
| 2157 | doepmsk &= ~DOEPMSK_OUTTKNEPDISMSK; |
| 2158 | dwc2_writel(doepmsk, hsotg->regs + DOEPMSK); |
| 2159 | } |
| 2160 | |
| 2161 | /** |
| 2162 | * dwc2_gadget_handle_nak - handle NAK interrupt |
| 2163 | * @hs_ep: The endpoint on which interrupt is asserted. |
| 2164 | * |
| 2165 | * This is starting point for ISOC-IN transfer, synchronization done with |
| 2166 | * first IN token received from host while corresponding EP is disabled. |
| 2167 | * |
| 2168 | * Device does not know when first one token will arrive from host. On first |
| 2169 | * token arrival HW generates 2 interrupts: 'in token received while FIFO empty' |
| 2170 | * and 'NAK'. NAK interrupt for ISOC-IN means that token has arrived and ZLP was |
| 2171 | * sent in response to that as there was no data in FIFO. SW is basing on this |
| 2172 | * interrupt to obtain frame in which token has come and then based on the |
| 2173 | * interval calculates next frame for transfer. |
| 2174 | */ |
| 2175 | static void dwc2_gadget_handle_nak(struct dwc2_hsotg_ep *hs_ep) |
| 2176 | { |
| 2177 | struct dwc2_hsotg *hsotg = hs_ep->parent; |
| 2178 | int dir_in = hs_ep->dir_in; |
| 2179 | |
| 2180 | if (!dir_in || !hs_ep->isochronous) |
| 2181 | return; |
| 2182 | |
| 2183 | if (hs_ep->target_frame == TARGET_FRAME_INITIAL) { |
| 2184 | hs_ep->target_frame = dwc2_hsotg_read_frameno(hsotg); |
| 2185 | if (hs_ep->interval > 1) { |
| 2186 | u32 ctrl = dwc2_readl(hsotg->regs + |
| 2187 | DIEPCTL(hs_ep->index)); |
| 2188 | if (hs_ep->target_frame & 0x1) |
| 2189 | ctrl |= DXEPCTL_SETODDFR; |
| 2190 | else |
| 2191 | ctrl |= DXEPCTL_SETEVENFR; |
| 2192 | |
| 2193 | dwc2_writel(ctrl, hsotg->regs + DIEPCTL(hs_ep->index)); |
| 2194 | } |
| 2195 | |
| 2196 | dwc2_hsotg_complete_request(hsotg, hs_ep, |
| 2197 | get_ep_head(hs_ep), 0); |
| 2198 | } |
| 2199 | |
| 2200 | dwc2_gadget_incr_frame_num(hs_ep); |
| 2201 | } |
| 2202 | |
| 2203 | /** |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 2204 | * dwc2_hsotg_epint - handle an in/out endpoint interrupt |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2205 | * @hsotg: The driver state |
| 2206 | * @idx: The index for the endpoint (0..15) |
| 2207 | * @dir_in: Set if this is an IN endpoint |
| 2208 | * |
| 2209 | * Process and clear any interrupt pending for an individual endpoint |
Lukasz Majewski | 8b9bc46 | 2012-05-04 14:17:11 +0200 | [diff] [blame] | 2210 | */ |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 2211 | static void dwc2_hsotg_epint(struct dwc2_hsotg *hsotg, unsigned int idx, |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2212 | int dir_in) |
| 2213 | { |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 2214 | struct dwc2_hsotg_ep *hs_ep = index_to_ep(hsotg, idx, dir_in); |
Lukasz Majewski | 94cb8fd | 2012-05-04 14:17:14 +0200 | [diff] [blame] | 2215 | u32 epint_reg = dir_in ? DIEPINT(idx) : DOEPINT(idx); |
| 2216 | u32 epctl_reg = dir_in ? DIEPCTL(idx) : DOEPCTL(idx); |
| 2217 | u32 epsiz_reg = dir_in ? DIEPTSIZ(idx) : DOEPTSIZ(idx); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2218 | u32 ints; |
Robert Baldyga | 1479e84 | 2013-10-09 08:41:57 +0200 | [diff] [blame] | 2219 | u32 ctrl; |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2220 | |
Vardan Mikayelyan | 3260158 | 2016-05-25 18:07:10 -0700 | [diff] [blame] | 2221 | ints = dwc2_gadget_read_ep_interrupts(hsotg, idx, dir_in); |
Antti Seppälä | 95c8bc3 | 2015-08-20 21:41:07 +0300 | [diff] [blame] | 2222 | ctrl = dwc2_readl(hsotg->regs + epctl_reg); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2223 | |
Anton Tikhomirov | a3395f0 | 2011-04-21 17:06:39 +0900 | [diff] [blame] | 2224 | /* Clear endpoint interrupts */ |
Antti Seppälä | 95c8bc3 | 2015-08-20 21:41:07 +0300 | [diff] [blame] | 2225 | dwc2_writel(ints, hsotg->regs + epint_reg); |
Anton Tikhomirov | a3395f0 | 2011-04-21 17:06:39 +0900 | [diff] [blame] | 2226 | |
Mian Yousaf Kaukab | c6f5c05 | 2015-01-09 13:38:50 +0100 | [diff] [blame] | 2227 | if (!hs_ep) { |
| 2228 | dev_err(hsotg->dev, "%s:Interrupt for unconfigured ep%d(%s)\n", |
| 2229 | __func__, idx, dir_in ? "in" : "out"); |
| 2230 | return; |
| 2231 | } |
| 2232 | |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2233 | dev_dbg(hsotg->dev, "%s: ep%d(%s) DxEPINT=0x%08x\n", |
| 2234 | __func__, idx, dir_in ? "in" : "out", ints); |
| 2235 | |
Mian Yousaf Kaukab | b787d75 | 2015-01-09 13:38:43 +0100 | [diff] [blame] | 2236 | /* Don't process XferCompl interrupt if it is a setup packet */ |
| 2237 | if (idx == 0 && (ints & (DXEPINT_SETUP | DXEPINT_SETUP_RCVD))) |
| 2238 | ints &= ~DXEPINT_XFERCOMPL; |
| 2239 | |
Vardan Mikayelyan | 837e9f0 | 2016-05-25 18:07:22 -0700 | [diff] [blame] | 2240 | if (ints & DXEPINT_STSPHSERCVD) |
| 2241 | dev_dbg(hsotg->dev, "%s: StsPhseRcvd asserted\n", __func__); |
Robert Baldyga | 1479e84 | 2013-10-09 08:41:57 +0200 | [diff] [blame] | 2242 | |
Vardan Mikayelyan | 837e9f0 | 2016-05-25 18:07:22 -0700 | [diff] [blame] | 2243 | if (ints & DXEPINT_XFERCOMPL) { |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2244 | dev_dbg(hsotg->dev, |
Dinh Nguyen | 47a1685 | 2014-04-14 14:13:34 -0700 | [diff] [blame] | 2245 | "%s: XferCompl: DxEPCTL=0x%08x, DXEPTSIZ=%08x\n", |
Antti Seppälä | 95c8bc3 | 2015-08-20 21:41:07 +0300 | [diff] [blame] | 2246 | __func__, dwc2_readl(hsotg->regs + epctl_reg), |
| 2247 | dwc2_readl(hsotg->regs + epsiz_reg)); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2248 | |
Lukasz Majewski | 8b9bc46 | 2012-05-04 14:17:11 +0200 | [diff] [blame] | 2249 | /* |
| 2250 | * we get OutDone from the FIFO, so we only need to look |
| 2251 | * at completing IN requests here |
| 2252 | */ |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2253 | if (dir_in) { |
Vardan Mikayelyan | 837e9f0 | 2016-05-25 18:07:22 -0700 | [diff] [blame] | 2254 | if (hs_ep->isochronous && hs_ep->interval > 1) |
| 2255 | dwc2_gadget_incr_frame_num(hs_ep); |
| 2256 | |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 2257 | dwc2_hsotg_complete_in(hsotg, hs_ep); |
Vardan Mikayelyan | 837e9f0 | 2016-05-25 18:07:22 -0700 | [diff] [blame] | 2258 | if (ints & DXEPINT_NAKINTRPT) |
| 2259 | ints &= ~DXEPINT_NAKINTRPT; |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2260 | |
Ben Dooks | c9a64ea | 2010-07-19 09:40:46 +0100 | [diff] [blame] | 2261 | if (idx == 0 && !hs_ep->req) |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 2262 | dwc2_hsotg_enqueue_setup(hsotg); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2263 | } else if (using_dma(hsotg)) { |
Lukasz Majewski | 8b9bc46 | 2012-05-04 14:17:11 +0200 | [diff] [blame] | 2264 | /* |
| 2265 | * We're using DMA, we need to fire an OutDone here |
| 2266 | * as we ignore the RXFIFO. |
| 2267 | */ |
Vardan Mikayelyan | 837e9f0 | 2016-05-25 18:07:22 -0700 | [diff] [blame] | 2268 | if (hs_ep->isochronous && hs_ep->interval > 1) |
| 2269 | dwc2_gadget_incr_frame_num(hs_ep); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2270 | |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 2271 | dwc2_hsotg_handle_outdone(hsotg, idx); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2272 | } |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2273 | } |
| 2274 | |
Vardan Mikayelyan | bd9971f | 2016-05-25 18:07:19 -0700 | [diff] [blame] | 2275 | if (ints & DXEPINT_EPDISBLD) |
| 2276 | dwc2_gadget_handle_ep_disabled(hs_ep); |
Anton Tikhomirov | 9c39ddc | 2011-04-21 17:06:41 +0900 | [diff] [blame] | 2277 | |
Vardan Mikayelyan | 5321922 | 2016-05-25 18:07:14 -0700 | [diff] [blame] | 2278 | if (ints & DXEPINT_OUTTKNEPDIS) |
| 2279 | dwc2_gadget_handle_out_token_ep_disabled(hs_ep); |
| 2280 | |
| 2281 | if (ints & DXEPINT_NAKINTRPT) |
| 2282 | dwc2_gadget_handle_nak(hs_ep); |
| 2283 | |
Dinh Nguyen | 47a1685 | 2014-04-14 14:13:34 -0700 | [diff] [blame] | 2284 | if (ints & DXEPINT_AHBERR) |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2285 | dev_dbg(hsotg->dev, "%s: AHBErr\n", __func__); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2286 | |
Dinh Nguyen | 47a1685 | 2014-04-14 14:13:34 -0700 | [diff] [blame] | 2287 | if (ints & DXEPINT_SETUP) { /* Setup or Timeout */ |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2288 | dev_dbg(hsotg->dev, "%s: Setup/Timeout\n", __func__); |
| 2289 | |
| 2290 | if (using_dma(hsotg) && idx == 0) { |
Lukasz Majewski | 8b9bc46 | 2012-05-04 14:17:11 +0200 | [diff] [blame] | 2291 | /* |
| 2292 | * this is the notification we've received a |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2293 | * setup packet. In non-DMA mode we'd get this |
| 2294 | * from the RXFIFO, instead we need to process |
Lukasz Majewski | 8b9bc46 | 2012-05-04 14:17:11 +0200 | [diff] [blame] | 2295 | * the setup here. |
| 2296 | */ |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2297 | |
| 2298 | if (dir_in) |
| 2299 | WARN_ON_ONCE(1); |
| 2300 | else |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 2301 | dwc2_hsotg_handle_outdone(hsotg, 0); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2302 | } |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2303 | } |
| 2304 | |
Dinh Nguyen | 47a1685 | 2014-04-14 14:13:34 -0700 | [diff] [blame] | 2305 | if (ints & DXEPINT_BACK2BACKSETUP) |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2306 | dev_dbg(hsotg->dev, "%s: B2BSetup/INEPNakEff\n", __func__); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2307 | |
Robert Baldyga | 1479e84 | 2013-10-09 08:41:57 +0200 | [diff] [blame] | 2308 | if (dir_in && !hs_ep->isochronous) { |
Lukasz Majewski | 8b9bc46 | 2012-05-04 14:17:11 +0200 | [diff] [blame] | 2309 | /* not sure if this is important, but we'll clear it anyway */ |
Vardan Mikayelyan | 26ddef5 | 2016-05-25 18:07:00 -0700 | [diff] [blame] | 2310 | if (ints & DXEPINT_INTKNTXFEMP) { |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2311 | dev_dbg(hsotg->dev, "%s: ep%d: INTknTXFEmpMsk\n", |
| 2312 | __func__, idx); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2313 | } |
| 2314 | |
| 2315 | /* this probably means something bad is happening */ |
Vardan Mikayelyan | 26ddef5 | 2016-05-25 18:07:00 -0700 | [diff] [blame] | 2316 | if (ints & DXEPINT_INTKNEPMIS) { |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2317 | dev_warn(hsotg->dev, "%s: ep%d: INTknEP\n", |
| 2318 | __func__, idx); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2319 | } |
Ben Dooks | 10aebc7 | 2010-07-19 09:40:44 +0100 | [diff] [blame] | 2320 | |
| 2321 | /* FIFO has space or is empty (see GAHBCFG) */ |
| 2322 | if (hsotg->dedicated_fifos && |
Vardan Mikayelyan | 26ddef5 | 2016-05-25 18:07:00 -0700 | [diff] [blame] | 2323 | ints & DXEPINT_TXFEMP) { |
Ben Dooks | 10aebc7 | 2010-07-19 09:40:44 +0100 | [diff] [blame] | 2324 | dev_dbg(hsotg->dev, "%s: ep%d: TxFIFOEmpty\n", |
| 2325 | __func__, idx); |
Anton Tikhomirov | 70fa030 | 2012-03-06 14:08:29 +0900 | [diff] [blame] | 2326 | if (!using_dma(hsotg)) |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 2327 | dwc2_hsotg_trytx(hsotg, hs_ep); |
Ben Dooks | 10aebc7 | 2010-07-19 09:40:44 +0100 | [diff] [blame] | 2328 | } |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2329 | } |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2330 | } |
| 2331 | |
| 2332 | /** |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 2333 | * dwc2_hsotg_irq_enumdone - Handle EnumDone interrupt (enumeration done) |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2334 | * @hsotg: The device state. |
| 2335 | * |
| 2336 | * Handle updating the device settings after the enumeration phase has |
| 2337 | * been completed. |
Lukasz Majewski | 8b9bc46 | 2012-05-04 14:17:11 +0200 | [diff] [blame] | 2338 | */ |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 2339 | static void dwc2_hsotg_irq_enumdone(struct dwc2_hsotg *hsotg) |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2340 | { |
Antti Seppälä | 95c8bc3 | 2015-08-20 21:41:07 +0300 | [diff] [blame] | 2341 | u32 dsts = dwc2_readl(hsotg->regs + DSTS); |
Jingoo Han | 9b2667f | 2014-08-20 12:04:09 +0900 | [diff] [blame] | 2342 | int ep0_mps = 0, ep_mps = 8; |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2343 | |
Lukasz Majewski | 8b9bc46 | 2012-05-04 14:17:11 +0200 | [diff] [blame] | 2344 | /* |
| 2345 | * This should signal the finish of the enumeration phase |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2346 | * of the USB handshaking, so we should now know what rate |
Lukasz Majewski | 8b9bc46 | 2012-05-04 14:17:11 +0200 | [diff] [blame] | 2347 | * we connected at. |
| 2348 | */ |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2349 | |
| 2350 | dev_dbg(hsotg->dev, "EnumDone (DSTS=0x%08x)\n", dsts); |
| 2351 | |
Lukasz Majewski | 8b9bc46 | 2012-05-04 14:17:11 +0200 | [diff] [blame] | 2352 | /* |
| 2353 | * note, since we're limited by the size of transfer on EP0, and |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2354 | * it seems IN transfers must be a even number of packets we do |
Lukasz Majewski | 8b9bc46 | 2012-05-04 14:17:11 +0200 | [diff] [blame] | 2355 | * not advertise a 64byte MPS on EP0. |
| 2356 | */ |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2357 | |
| 2358 | /* catch both EnumSpd_FS and EnumSpd_FS48 */ |
Marek Vasut | 6d76c92 | 2015-12-18 03:26:17 +0100 | [diff] [blame] | 2359 | switch ((dsts & DSTS_ENUMSPD_MASK) >> DSTS_ENUMSPD_SHIFT) { |
Dinh Nguyen | 47a1685 | 2014-04-14 14:13:34 -0700 | [diff] [blame] | 2360 | case DSTS_ENUMSPD_FS: |
| 2361 | case DSTS_ENUMSPD_FS48: |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2362 | hsotg->gadget.speed = USB_SPEED_FULL; |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2363 | ep0_mps = EP0_MPS_LIMIT; |
Robert Baldyga | 295538f | 2013-12-06 13:03:44 +0100 | [diff] [blame] | 2364 | ep_mps = 1023; |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2365 | break; |
| 2366 | |
Dinh Nguyen | 47a1685 | 2014-04-14 14:13:34 -0700 | [diff] [blame] | 2367 | case DSTS_ENUMSPD_HS: |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2368 | hsotg->gadget.speed = USB_SPEED_HIGH; |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2369 | ep0_mps = EP0_MPS_LIMIT; |
Robert Baldyga | 295538f | 2013-12-06 13:03:44 +0100 | [diff] [blame] | 2370 | ep_mps = 1024; |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2371 | break; |
| 2372 | |
Dinh Nguyen | 47a1685 | 2014-04-14 14:13:34 -0700 | [diff] [blame] | 2373 | case DSTS_ENUMSPD_LS: |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2374 | hsotg->gadget.speed = USB_SPEED_LOW; |
Lukasz Majewski | 8b9bc46 | 2012-05-04 14:17:11 +0200 | [diff] [blame] | 2375 | /* |
| 2376 | * note, we don't actually support LS in this driver at the |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2377 | * moment, and the documentation seems to imply that it isn't |
| 2378 | * supported by the PHYs on some of the devices. |
| 2379 | */ |
| 2380 | break; |
| 2381 | } |
Michal Nazarewicz | e538dfd | 2011-08-30 17:11:19 +0200 | [diff] [blame] | 2382 | dev_info(hsotg->dev, "new device is %s\n", |
| 2383 | usb_speed_string(hsotg->gadget.speed)); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2384 | |
Lukasz Majewski | 8b9bc46 | 2012-05-04 14:17:11 +0200 | [diff] [blame] | 2385 | /* |
| 2386 | * we should now know the maximum packet size for an |
| 2387 | * endpoint, so set the endpoints to a default value. |
| 2388 | */ |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2389 | |
| 2390 | if (ep0_mps) { |
| 2391 | int i; |
Mian Yousaf Kaukab | c6f5c05 | 2015-01-09 13:38:50 +0100 | [diff] [blame] | 2392 | /* Initialize ep0 for both in and out directions */ |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 2393 | dwc2_hsotg_set_ep_maxpacket(hsotg, 0, ep0_mps, 1); |
| 2394 | dwc2_hsotg_set_ep_maxpacket(hsotg, 0, ep0_mps, 0); |
Mian Yousaf Kaukab | c6f5c05 | 2015-01-09 13:38:50 +0100 | [diff] [blame] | 2395 | for (i = 1; i < hsotg->num_of_eps; i++) { |
| 2396 | if (hsotg->eps_in[i]) |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 2397 | dwc2_hsotg_set_ep_maxpacket(hsotg, i, ep_mps, 1); |
Mian Yousaf Kaukab | c6f5c05 | 2015-01-09 13:38:50 +0100 | [diff] [blame] | 2398 | if (hsotg->eps_out[i]) |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 2399 | dwc2_hsotg_set_ep_maxpacket(hsotg, i, ep_mps, 0); |
Mian Yousaf Kaukab | c6f5c05 | 2015-01-09 13:38:50 +0100 | [diff] [blame] | 2400 | } |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2401 | } |
| 2402 | |
| 2403 | /* ensure after enumeration our EP0 is active */ |
| 2404 | |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 2405 | dwc2_hsotg_enqueue_setup(hsotg); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2406 | |
| 2407 | dev_dbg(hsotg->dev, "EP0: DIEPCTL0=0x%08x, DOEPCTL0=0x%08x\n", |
Antti Seppälä | 95c8bc3 | 2015-08-20 21:41:07 +0300 | [diff] [blame] | 2408 | dwc2_readl(hsotg->regs + DIEPCTL0), |
| 2409 | dwc2_readl(hsotg->regs + DOEPCTL0)); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2410 | } |
| 2411 | |
| 2412 | /** |
| 2413 | * kill_all_requests - remove all requests from the endpoint's queue |
| 2414 | * @hsotg: The device state. |
| 2415 | * @ep: The endpoint the requests may be on. |
| 2416 | * @result: The result code to use. |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2417 | * |
| 2418 | * Go through the requests on the given endpoint and mark them |
| 2419 | * completed with the given result code. |
| 2420 | */ |
Dinh Nguyen | 941fcce | 2014-11-11 11:13:33 -0600 | [diff] [blame] | 2421 | static void kill_all_requests(struct dwc2_hsotg *hsotg, |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 2422 | struct dwc2_hsotg_ep *ep, |
Robert Baldyga | 6b448af | 2014-12-16 11:51:44 +0100 | [diff] [blame] | 2423 | int result) |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2424 | { |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 2425 | struct dwc2_hsotg_req *req, *treq; |
Robert Baldyga | b203d0a | 2014-09-09 10:44:56 +0200 | [diff] [blame] | 2426 | unsigned size; |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2427 | |
Robert Baldyga | 6b448af | 2014-12-16 11:51:44 +0100 | [diff] [blame] | 2428 | ep->req = NULL; |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2429 | |
Robert Baldyga | 6b448af | 2014-12-16 11:51:44 +0100 | [diff] [blame] | 2430 | list_for_each_entry_safe(req, treq, &ep->queue, queue) |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 2431 | dwc2_hsotg_complete_request(hsotg, ep, req, |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2432 | result); |
Robert Baldyga | 6b448af | 2014-12-16 11:51:44 +0100 | [diff] [blame] | 2433 | |
Robert Baldyga | b203d0a | 2014-09-09 10:44:56 +0200 | [diff] [blame] | 2434 | if (!hsotg->dedicated_fifos) |
| 2435 | return; |
Robert Baldyga | ad674a1 | 2016-08-29 13:38:50 -0700 | [diff] [blame] | 2436 | size = (dwc2_readl(hsotg->regs + DTXFSTS(ep->fifo_index)) & 0xffff) * 4; |
Robert Baldyga | b203d0a | 2014-09-09 10:44:56 +0200 | [diff] [blame] | 2437 | if (size < ep->fifo_size) |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 2438 | dwc2_hsotg_txfifo_flush(hsotg, ep->fifo_index); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2439 | } |
| 2440 | |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2441 | /** |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 2442 | * dwc2_hsotg_disconnect - disconnect service |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2443 | * @hsotg: The device state. |
| 2444 | * |
Lukasz Majewski | 5e89134 | 2012-05-04 14:17:07 +0200 | [diff] [blame] | 2445 | * The device has been disconnected. Remove all current |
| 2446 | * transactions and signal the gadget driver that this |
| 2447 | * has happened. |
Lukasz Majewski | 8b9bc46 | 2012-05-04 14:17:11 +0200 | [diff] [blame] | 2448 | */ |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 2449 | void dwc2_hsotg_disconnect(struct dwc2_hsotg *hsotg) |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2450 | { |
| 2451 | unsigned ep; |
| 2452 | |
Marek Szyprowski | 4ace06e | 2014-11-21 15:14:47 +0100 | [diff] [blame] | 2453 | if (!hsotg->connected) |
| 2454 | return; |
| 2455 | |
| 2456 | hsotg->connected = 0; |
Gregory Herrero | 9e14d0a | 2015-01-30 09:09:28 +0100 | [diff] [blame] | 2457 | hsotg->test_mode = 0; |
Mian Yousaf Kaukab | c6f5c05 | 2015-01-09 13:38:50 +0100 | [diff] [blame] | 2458 | |
| 2459 | for (ep = 0; ep < hsotg->num_of_eps; ep++) { |
| 2460 | if (hsotg->eps_in[ep]) |
| 2461 | kill_all_requests(hsotg, hsotg->eps_in[ep], |
| 2462 | -ESHUTDOWN); |
| 2463 | if (hsotg->eps_out[ep]) |
| 2464 | kill_all_requests(hsotg, hsotg->eps_out[ep], |
| 2465 | -ESHUTDOWN); |
| 2466 | } |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2467 | |
| 2468 | call_gadget(hsotg, disconnect); |
Gregory Herrero | 065d393 | 2015-09-22 15:16:54 +0200 | [diff] [blame] | 2469 | hsotg->lx_state = DWC2_L3; |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2470 | } |
| 2471 | |
| 2472 | /** |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 2473 | * dwc2_hsotg_irq_fifoempty - TX FIFO empty interrupt handler |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2474 | * @hsotg: The device state: |
| 2475 | * @periodic: True if this is a periodic FIFO interrupt |
| 2476 | */ |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 2477 | static void dwc2_hsotg_irq_fifoempty(struct dwc2_hsotg *hsotg, bool periodic) |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2478 | { |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 2479 | struct dwc2_hsotg_ep *ep; |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2480 | int epno, ret; |
| 2481 | |
| 2482 | /* look through for any more data to transmit */ |
Lukasz Majewski | b3f489b | 2012-05-04 14:17:09 +0200 | [diff] [blame] | 2483 | for (epno = 0; epno < hsotg->num_of_eps; epno++) { |
Mian Yousaf Kaukab | c6f5c05 | 2015-01-09 13:38:50 +0100 | [diff] [blame] | 2484 | ep = index_to_ep(hsotg, epno, 1); |
| 2485 | |
| 2486 | if (!ep) |
| 2487 | continue; |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2488 | |
| 2489 | if (!ep->dir_in) |
| 2490 | continue; |
| 2491 | |
| 2492 | if ((periodic && !ep->periodic) || |
| 2493 | (!periodic && ep->periodic)) |
| 2494 | continue; |
| 2495 | |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 2496 | ret = dwc2_hsotg_trytx(hsotg, ep); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2497 | if (ret < 0) |
| 2498 | break; |
| 2499 | } |
| 2500 | } |
| 2501 | |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2502 | /* IRQ flags which will trigger a retry around the IRQ loop */ |
Dinh Nguyen | 47a1685 | 2014-04-14 14:13:34 -0700 | [diff] [blame] | 2503 | #define IRQ_RETRY_MASK (GINTSTS_NPTXFEMP | \ |
| 2504 | GINTSTS_PTXFEMP | \ |
| 2505 | GINTSTS_RXFLVL) |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2506 | |
| 2507 | /** |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 2508 | * dwc2_hsotg_core_init - issue softreset to the core |
Lukasz Majewski | 8b9bc46 | 2012-05-04 14:17:11 +0200 | [diff] [blame] | 2509 | * @hsotg: The device state |
| 2510 | * |
| 2511 | * Issue a soft reset to the core, and await the core finishing it. |
| 2512 | */ |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 2513 | void dwc2_hsotg_core_init_disconnected(struct dwc2_hsotg *hsotg, |
Gregory Herrero | 643cc4d | 2015-01-30 09:09:32 +0100 | [diff] [blame] | 2514 | bool is_usb_reset) |
Lukasz Majewski | 308d734 | 2012-05-04 14:17:05 +0200 | [diff] [blame] | 2515 | { |
Gregory Herrero | 1ee6903 | 2015-09-29 12:08:27 +0200 | [diff] [blame] | 2516 | u32 intmsk; |
Gregory Herrero | 643cc4d | 2015-01-30 09:09:32 +0100 | [diff] [blame] | 2517 | u32 val; |
Przemek Rudy | ecd9a7a | 2016-03-16 23:10:26 +0100 | [diff] [blame] | 2518 | u32 usbcfg; |
Gregory Herrero | 643cc4d | 2015-01-30 09:09:32 +0100 | [diff] [blame] | 2519 | |
Mian Yousaf Kaukab | 5390d43 | 2015-09-29 12:08:25 +0200 | [diff] [blame] | 2520 | /* Kill any ep0 requests as controller will be reinitialized */ |
| 2521 | kill_all_requests(hsotg, hsotg->eps_out[0], -ECONNRESET); |
| 2522 | |
Gregory Herrero | 643cc4d | 2015-01-30 09:09:32 +0100 | [diff] [blame] | 2523 | if (!is_usb_reset) |
John Youn | 241729b | 2015-12-17 11:17:59 -0800 | [diff] [blame] | 2524 | if (dwc2_core_reset(hsotg)) |
Gregory Herrero | 86de489 | 2015-09-29 12:08:21 +0200 | [diff] [blame] | 2525 | return; |
Lukasz Majewski | 308d734 | 2012-05-04 14:17:05 +0200 | [diff] [blame] | 2526 | |
| 2527 | /* |
| 2528 | * we must now enable ep0 ready for host detection and then |
| 2529 | * set configuration. |
| 2530 | */ |
| 2531 | |
Przemek Rudy | ecd9a7a | 2016-03-16 23:10:26 +0100 | [diff] [blame] | 2532 | /* keep other bits untouched (so e.g. forced modes are not lost) */ |
| 2533 | usbcfg = dwc2_readl(hsotg->regs + GUSBCFG); |
| 2534 | usbcfg &= ~(GUSBCFG_TOUTCAL_MASK | GUSBCFG_PHYIF16 | GUSBCFG_SRPCAP | |
Amelie Delaunay | 5f54c4e | 2017-01-12 16:09:44 +0100 | [diff] [blame] | 2535 | GUSBCFG_HNPCAP | GUSBCFG_USBTRDTIM_MASK); |
Przemek Rudy | ecd9a7a | 2016-03-16 23:10:26 +0100 | [diff] [blame] | 2536 | |
Lukasz Majewski | 308d734 | 2012-05-04 14:17:05 +0200 | [diff] [blame] | 2537 | /* set the PLL on, remove the HNP/SRP and set the PHY */ |
Mian Yousaf Kaukab | fa4a8d7 | 2015-01-30 09:09:35 +0100 | [diff] [blame] | 2538 | val = (hsotg->phyif == GUSBCFG_PHYIF8) ? 9 : 5; |
Przemek Rudy | ecd9a7a | 2016-03-16 23:10:26 +0100 | [diff] [blame] | 2539 | usbcfg |= hsotg->phyif | GUSBCFG_TOUTCAL(7) | |
| 2540 | (val << GUSBCFG_USBTRDTIM_SHIFT); |
| 2541 | dwc2_writel(usbcfg, hsotg->regs + GUSBCFG); |
Lukasz Majewski | 308d734 | 2012-05-04 14:17:05 +0200 | [diff] [blame] | 2542 | |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 2543 | dwc2_hsotg_init_fifo(hsotg); |
Lukasz Majewski | 308d734 | 2012-05-04 14:17:05 +0200 | [diff] [blame] | 2544 | |
Gregory Herrero | 643cc4d | 2015-01-30 09:09:32 +0100 | [diff] [blame] | 2545 | if (!is_usb_reset) |
| 2546 | __orr32(hsotg->regs + DCTL, DCTL_SFTDISCON); |
Lukasz Majewski | 308d734 | 2012-05-04 14:17:05 +0200 | [diff] [blame] | 2547 | |
Antti Seppälä | 95c8bc3 | 2015-08-20 21:41:07 +0300 | [diff] [blame] | 2548 | dwc2_writel(DCFG_EPMISCNT(1) | DCFG_DEVSPD_HS, hsotg->regs + DCFG); |
Lukasz Majewski | 308d734 | 2012-05-04 14:17:05 +0200 | [diff] [blame] | 2549 | |
| 2550 | /* Clear any pending OTG interrupts */ |
Antti Seppälä | 95c8bc3 | 2015-08-20 21:41:07 +0300 | [diff] [blame] | 2551 | dwc2_writel(0xffffffff, hsotg->regs + GOTGINT); |
Lukasz Majewski | 308d734 | 2012-05-04 14:17:05 +0200 | [diff] [blame] | 2552 | |
| 2553 | /* Clear any pending interrupts */ |
Antti Seppälä | 95c8bc3 | 2015-08-20 21:41:07 +0300 | [diff] [blame] | 2554 | dwc2_writel(0xffffffff, hsotg->regs + GINTSTS); |
Gregory Herrero | 1ee6903 | 2015-09-29 12:08:27 +0200 | [diff] [blame] | 2555 | intmsk = GINTSTS_ERLYSUSP | GINTSTS_SESSREQINT | |
Dinh Nguyen | 47a1685 | 2014-04-14 14:13:34 -0700 | [diff] [blame] | 2556 | GINTSTS_GOUTNAKEFF | GINTSTS_GINNAKEFF | |
Gregory Herrero | 1ee6903 | 2015-09-29 12:08:27 +0200 | [diff] [blame] | 2557 | GINTSTS_USBRST | GINTSTS_RESETDET | |
| 2558 | GINTSTS_ENUMDONE | GINTSTS_OTGINT | |
Roman Bacik | ec1f9d9 | 2015-09-10 18:13:43 -0700 | [diff] [blame] | 2559 | GINTSTS_USBSUSP | GINTSTS_WKUPINT | |
| 2560 | GINTSTS_INCOMPL_SOIN | GINTSTS_INCOMPL_SOOUT; |
Gregory Herrero | 1ee6903 | 2015-09-29 12:08:27 +0200 | [diff] [blame] | 2561 | |
| 2562 | if (hsotg->core_params->external_id_pin_ctl <= 0) |
| 2563 | intmsk |= GINTSTS_CONIDSTSCHNG; |
| 2564 | |
| 2565 | dwc2_writel(intmsk, hsotg->regs + GINTMSK); |
Lukasz Majewski | 308d734 | 2012-05-04 14:17:05 +0200 | [diff] [blame] | 2566 | |
| 2567 | if (using_dma(hsotg)) |
Antti Seppälä | 95c8bc3 | 2015-08-20 21:41:07 +0300 | [diff] [blame] | 2568 | dwc2_writel(GAHBCFG_GLBL_INTR_EN | GAHBCFG_DMA_EN | |
| 2569 | (GAHBCFG_HBSTLEN_INCR4 << GAHBCFG_HBSTLEN_SHIFT), |
| 2570 | hsotg->regs + GAHBCFG); |
Lukasz Majewski | 308d734 | 2012-05-04 14:17:05 +0200 | [diff] [blame] | 2571 | else |
Antti Seppälä | 95c8bc3 | 2015-08-20 21:41:07 +0300 | [diff] [blame] | 2572 | dwc2_writel(((hsotg->dedicated_fifos) ? |
| 2573 | (GAHBCFG_NP_TXF_EMP_LVL | |
| 2574 | GAHBCFG_P_TXF_EMP_LVL) : 0) | |
| 2575 | GAHBCFG_GLBL_INTR_EN, hsotg->regs + GAHBCFG); |
Lukasz Majewski | 308d734 | 2012-05-04 14:17:05 +0200 | [diff] [blame] | 2576 | |
| 2577 | /* |
Robert Baldyga | 8acc829 | 2013-09-19 11:50:23 +0200 | [diff] [blame] | 2578 | * If INTknTXFEmpMsk is enabled, it's important to disable ep interrupts |
| 2579 | * when we have no data to transfer. Otherwise we get being flooded by |
| 2580 | * interrupts. |
Lukasz Majewski | 308d734 | 2012-05-04 14:17:05 +0200 | [diff] [blame] | 2581 | */ |
| 2582 | |
Antti Seppälä | 95c8bc3 | 2015-08-20 21:41:07 +0300 | [diff] [blame] | 2583 | dwc2_writel(((hsotg->dedicated_fifos && !using_dma(hsotg)) ? |
Mian Yousaf Kaukab | 6ff2e83 | 2015-01-09 13:38:42 +0100 | [diff] [blame] | 2584 | DIEPMSK_TXFIFOEMPTY | DIEPMSK_INTKNTXFEMPMSK : 0) | |
Dinh Nguyen | 47a1685 | 2014-04-14 14:13:34 -0700 | [diff] [blame] | 2585 | DIEPMSK_EPDISBLDMSK | DIEPMSK_XFERCOMPLMSK | |
Vardan Mikayelyan | 837e9f0 | 2016-05-25 18:07:22 -0700 | [diff] [blame] | 2586 | DIEPMSK_TIMEOUTMSK | DIEPMSK_AHBERRMSK, |
Dinh Nguyen | 47a1685 | 2014-04-14 14:13:34 -0700 | [diff] [blame] | 2587 | hsotg->regs + DIEPMSK); |
Lukasz Majewski | 308d734 | 2012-05-04 14:17:05 +0200 | [diff] [blame] | 2588 | |
| 2589 | /* |
| 2590 | * don't need XferCompl, we get that from RXFIFO in slave mode. In |
| 2591 | * DMA mode we may need this. |
| 2592 | */ |
Vardan Mikayelyan | 837e9f0 | 2016-05-25 18:07:22 -0700 | [diff] [blame] | 2593 | dwc2_writel((using_dma(hsotg) ? (DIEPMSK_XFERCOMPLMSK) : 0) | |
Dinh Nguyen | 47a1685 | 2014-04-14 14:13:34 -0700 | [diff] [blame] | 2594 | DOEPMSK_EPDISBLDMSK | DOEPMSK_AHBERRMSK | |
Vardan Mikayelyan | 837e9f0 | 2016-05-25 18:07:22 -0700 | [diff] [blame] | 2595 | DOEPMSK_SETUPMSK | DOEPMSK_STSPHSERCVDMSK, |
Dinh Nguyen | 47a1685 | 2014-04-14 14:13:34 -0700 | [diff] [blame] | 2596 | hsotg->regs + DOEPMSK); |
Lukasz Majewski | 308d734 | 2012-05-04 14:17:05 +0200 | [diff] [blame] | 2597 | |
Antti Seppälä | 95c8bc3 | 2015-08-20 21:41:07 +0300 | [diff] [blame] | 2598 | dwc2_writel(0, hsotg->regs + DAINTMSK); |
Lukasz Majewski | 308d734 | 2012-05-04 14:17:05 +0200 | [diff] [blame] | 2599 | |
| 2600 | dev_dbg(hsotg->dev, "EP0: DIEPCTL0=0x%08x, DOEPCTL0=0x%08x\n", |
Antti Seppälä | 95c8bc3 | 2015-08-20 21:41:07 +0300 | [diff] [blame] | 2601 | dwc2_readl(hsotg->regs + DIEPCTL0), |
| 2602 | dwc2_readl(hsotg->regs + DOEPCTL0)); |
Lukasz Majewski | 308d734 | 2012-05-04 14:17:05 +0200 | [diff] [blame] | 2603 | |
| 2604 | /* enable in and out endpoint interrupts */ |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 2605 | dwc2_hsotg_en_gsint(hsotg, GINTSTS_OEPINT | GINTSTS_IEPINT); |
Lukasz Majewski | 308d734 | 2012-05-04 14:17:05 +0200 | [diff] [blame] | 2606 | |
| 2607 | /* |
| 2608 | * Enable the RXFIFO when in slave mode, as this is how we collect |
| 2609 | * the data. In DMA mode, we get events from the FIFO but also |
| 2610 | * things we cannot process, so do not use it. |
| 2611 | */ |
| 2612 | if (!using_dma(hsotg)) |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 2613 | dwc2_hsotg_en_gsint(hsotg, GINTSTS_RXFLVL); |
Lukasz Majewski | 308d734 | 2012-05-04 14:17:05 +0200 | [diff] [blame] | 2614 | |
| 2615 | /* Enable interrupts for EP0 in and out */ |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 2616 | dwc2_hsotg_ctrl_epint(hsotg, 0, 0, 1); |
| 2617 | dwc2_hsotg_ctrl_epint(hsotg, 0, 1, 1); |
Lukasz Majewski | 308d734 | 2012-05-04 14:17:05 +0200 | [diff] [blame] | 2618 | |
Gregory Herrero | 643cc4d | 2015-01-30 09:09:32 +0100 | [diff] [blame] | 2619 | if (!is_usb_reset) { |
| 2620 | __orr32(hsotg->regs + DCTL, DCTL_PWRONPRGDONE); |
| 2621 | udelay(10); /* see openiboot */ |
| 2622 | __bic32(hsotg->regs + DCTL, DCTL_PWRONPRGDONE); |
| 2623 | } |
Lukasz Majewski | 308d734 | 2012-05-04 14:17:05 +0200 | [diff] [blame] | 2624 | |
Antti Seppälä | 95c8bc3 | 2015-08-20 21:41:07 +0300 | [diff] [blame] | 2625 | dev_dbg(hsotg->dev, "DCTL=0x%08x\n", dwc2_readl(hsotg->regs + DCTL)); |
Lukasz Majewski | 308d734 | 2012-05-04 14:17:05 +0200 | [diff] [blame] | 2626 | |
| 2627 | /* |
Lukasz Majewski | 94cb8fd | 2012-05-04 14:17:14 +0200 | [diff] [blame] | 2628 | * DxEPCTL_USBActEp says RO in manual, but seems to be set by |
Lukasz Majewski | 308d734 | 2012-05-04 14:17:05 +0200 | [diff] [blame] | 2629 | * writing to the EPCTL register.. |
| 2630 | */ |
| 2631 | |
| 2632 | /* set to read 1 8byte packet */ |
Antti Seppälä | 95c8bc3 | 2015-08-20 21:41:07 +0300 | [diff] [blame] | 2633 | dwc2_writel(DXEPTSIZ_MC(1) | DXEPTSIZ_PKTCNT(1) | |
Dinh Nguyen | 47a1685 | 2014-04-14 14:13:34 -0700 | [diff] [blame] | 2634 | DXEPTSIZ_XFERSIZE(8), hsotg->regs + DOEPTSIZ0); |
Lukasz Majewski | 308d734 | 2012-05-04 14:17:05 +0200 | [diff] [blame] | 2635 | |
Antti Seppälä | 95c8bc3 | 2015-08-20 21:41:07 +0300 | [diff] [blame] | 2636 | dwc2_writel(dwc2_hsotg_ep0_mps(hsotg->eps_out[0]->ep.maxpacket) | |
Dinh Nguyen | 47a1685 | 2014-04-14 14:13:34 -0700 | [diff] [blame] | 2637 | DXEPCTL_CNAK | DXEPCTL_EPENA | |
| 2638 | DXEPCTL_USBACTEP, |
Lukasz Majewski | 94cb8fd | 2012-05-04 14:17:14 +0200 | [diff] [blame] | 2639 | hsotg->regs + DOEPCTL0); |
Lukasz Majewski | 308d734 | 2012-05-04 14:17:05 +0200 | [diff] [blame] | 2640 | |
| 2641 | /* enable, but don't activate EP0in */ |
Antti Seppälä | 95c8bc3 | 2015-08-20 21:41:07 +0300 | [diff] [blame] | 2642 | dwc2_writel(dwc2_hsotg_ep0_mps(hsotg->eps_out[0]->ep.maxpacket) | |
Dinh Nguyen | 47a1685 | 2014-04-14 14:13:34 -0700 | [diff] [blame] | 2643 | DXEPCTL_USBACTEP, hsotg->regs + DIEPCTL0); |
Lukasz Majewski | 308d734 | 2012-05-04 14:17:05 +0200 | [diff] [blame] | 2644 | |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 2645 | dwc2_hsotg_enqueue_setup(hsotg); |
Lukasz Majewski | 308d734 | 2012-05-04 14:17:05 +0200 | [diff] [blame] | 2646 | |
| 2647 | dev_dbg(hsotg->dev, "EP0: DIEPCTL0=0x%08x, DOEPCTL0=0x%08x\n", |
Antti Seppälä | 95c8bc3 | 2015-08-20 21:41:07 +0300 | [diff] [blame] | 2648 | dwc2_readl(hsotg->regs + DIEPCTL0), |
| 2649 | dwc2_readl(hsotg->regs + DOEPCTL0)); |
Lukasz Majewski | 308d734 | 2012-05-04 14:17:05 +0200 | [diff] [blame] | 2650 | |
| 2651 | /* clear global NAKs */ |
Gregory Herrero | 643cc4d | 2015-01-30 09:09:32 +0100 | [diff] [blame] | 2652 | val = DCTL_CGOUTNAK | DCTL_CGNPINNAK; |
| 2653 | if (!is_usb_reset) |
| 2654 | val |= DCTL_SFTDISCON; |
| 2655 | __orr32(hsotg->regs + DCTL, val); |
Lukasz Majewski | 308d734 | 2012-05-04 14:17:05 +0200 | [diff] [blame] | 2656 | |
| 2657 | /* must be at-least 3ms to allow bus to see disconnect */ |
| 2658 | mdelay(3); |
| 2659 | |
Gregory Herrero | 065d393 | 2015-09-22 15:16:54 +0200 | [diff] [blame] | 2660 | hsotg->lx_state = DWC2_L0; |
Marek Szyprowski | ad38dc5 | 2014-10-20 12:45:36 +0200 | [diff] [blame] | 2661 | } |
Marek Szyprowski | ac3c81f | 2014-10-20 12:45:35 +0200 | [diff] [blame] | 2662 | |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 2663 | static void dwc2_hsotg_core_disconnect(struct dwc2_hsotg *hsotg) |
Marek Szyprowski | ad38dc5 | 2014-10-20 12:45:36 +0200 | [diff] [blame] | 2664 | { |
| 2665 | /* set the soft-disconnect bit */ |
| 2666 | __orr32(hsotg->regs + DCTL, DCTL_SFTDISCON); |
| 2667 | } |
| 2668 | |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 2669 | void dwc2_hsotg_core_connect(struct dwc2_hsotg *hsotg) |
Marek Szyprowski | ad38dc5 | 2014-10-20 12:45:36 +0200 | [diff] [blame] | 2670 | { |
Lukasz Majewski | 308d734 | 2012-05-04 14:17:05 +0200 | [diff] [blame] | 2671 | /* remove the soft-disconnect and let's go */ |
Dinh Nguyen | 47a1685 | 2014-04-14 14:13:34 -0700 | [diff] [blame] | 2672 | __bic32(hsotg->regs + DCTL, DCTL_SFTDISCON); |
Lukasz Majewski | 308d734 | 2012-05-04 14:17:05 +0200 | [diff] [blame] | 2673 | } |
| 2674 | |
| 2675 | /** |
Vardan Mikayelyan | 381fc8f | 2016-05-25 18:07:17 -0700 | [diff] [blame] | 2676 | * dwc2_gadget_handle_incomplete_isoc_in - handle incomplete ISO IN Interrupt. |
| 2677 | * @hsotg: The device state: |
| 2678 | * |
| 2679 | * This interrupt indicates one of the following conditions occurred while |
| 2680 | * transmitting an ISOC transaction. |
| 2681 | * - Corrupted IN Token for ISOC EP. |
| 2682 | * - Packet not complete in FIFO. |
| 2683 | * |
| 2684 | * The following actions will be taken: |
| 2685 | * - Determine the EP |
| 2686 | * - Disable EP; when 'Endpoint Disabled' interrupt is received Flush FIFO |
| 2687 | */ |
| 2688 | static void dwc2_gadget_handle_incomplete_isoc_in(struct dwc2_hsotg *hsotg) |
| 2689 | { |
| 2690 | struct dwc2_hsotg_ep *hs_ep; |
| 2691 | u32 epctrl; |
| 2692 | u32 idx; |
| 2693 | |
| 2694 | dev_dbg(hsotg->dev, "Incomplete isoc in interrupt received:\n"); |
| 2695 | |
| 2696 | for (idx = 1; idx <= hsotg->num_of_eps; idx++) { |
| 2697 | hs_ep = hsotg->eps_in[idx]; |
| 2698 | epctrl = dwc2_readl(hsotg->regs + DIEPCTL(idx)); |
| 2699 | if ((epctrl & DXEPCTL_EPENA) && hs_ep->isochronous && |
| 2700 | dwc2_gadget_target_frame_elapsed(hs_ep)) { |
| 2701 | epctrl |= DXEPCTL_SNAK; |
| 2702 | epctrl |= DXEPCTL_EPDIS; |
| 2703 | dwc2_writel(epctrl, hsotg->regs + DIEPCTL(idx)); |
| 2704 | } |
| 2705 | } |
| 2706 | |
| 2707 | /* Clear interrupt */ |
| 2708 | dwc2_writel(GINTSTS_INCOMPL_SOIN, hsotg->regs + GINTSTS); |
| 2709 | } |
| 2710 | |
| 2711 | /** |
| 2712 | * dwc2_gadget_handle_incomplete_isoc_out - handle incomplete ISO OUT Interrupt |
| 2713 | * @hsotg: The device state: |
| 2714 | * |
| 2715 | * This interrupt indicates one of the following conditions occurred while |
| 2716 | * transmitting an ISOC transaction. |
| 2717 | * - Corrupted OUT Token for ISOC EP. |
| 2718 | * - Packet not complete in FIFO. |
| 2719 | * |
| 2720 | * The following actions will be taken: |
| 2721 | * - Determine the EP |
| 2722 | * - Set DCTL_SGOUTNAK and unmask GOUTNAKEFF if target frame elapsed. |
| 2723 | */ |
| 2724 | static void dwc2_gadget_handle_incomplete_isoc_out(struct dwc2_hsotg *hsotg) |
| 2725 | { |
| 2726 | u32 gintsts; |
| 2727 | u32 gintmsk; |
| 2728 | u32 epctrl; |
| 2729 | struct dwc2_hsotg_ep *hs_ep; |
| 2730 | int idx; |
| 2731 | |
| 2732 | dev_dbg(hsotg->dev, "%s: GINTSTS_INCOMPL_SOOUT\n", __func__); |
| 2733 | |
| 2734 | for (idx = 1; idx <= hsotg->num_of_eps; idx++) { |
| 2735 | hs_ep = hsotg->eps_out[idx]; |
| 2736 | epctrl = dwc2_readl(hsotg->regs + DOEPCTL(idx)); |
| 2737 | if ((epctrl & DXEPCTL_EPENA) && hs_ep->isochronous && |
| 2738 | dwc2_gadget_target_frame_elapsed(hs_ep)) { |
| 2739 | /* Unmask GOUTNAKEFF interrupt */ |
| 2740 | gintmsk = dwc2_readl(hsotg->regs + GINTMSK); |
| 2741 | gintmsk |= GINTSTS_GOUTNAKEFF; |
| 2742 | dwc2_writel(gintmsk, hsotg->regs + GINTMSK); |
| 2743 | |
| 2744 | gintsts = dwc2_readl(hsotg->regs + GINTSTS); |
| 2745 | if (!(gintsts & GINTSTS_GOUTNAKEFF)) |
| 2746 | __orr32(hsotg->regs + DCTL, DCTL_SGOUTNAK); |
| 2747 | } |
| 2748 | } |
| 2749 | |
| 2750 | /* Clear interrupt */ |
| 2751 | dwc2_writel(GINTSTS_INCOMPL_SOOUT, hsotg->regs + GINTSTS); |
| 2752 | } |
| 2753 | |
| 2754 | /** |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 2755 | * dwc2_hsotg_irq - handle device interrupt |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2756 | * @irq: The IRQ number triggered |
| 2757 | * @pw: The pw value when registered the handler. |
| 2758 | */ |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 2759 | static irqreturn_t dwc2_hsotg_irq(int irq, void *pw) |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2760 | { |
Dinh Nguyen | 941fcce | 2014-11-11 11:13:33 -0600 | [diff] [blame] | 2761 | struct dwc2_hsotg *hsotg = pw; |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2762 | int retry_count = 8; |
| 2763 | u32 gintsts; |
| 2764 | u32 gintmsk; |
| 2765 | |
Vardan Mikayelyan | ee3de8d | 2016-04-27 20:20:48 -0700 | [diff] [blame] | 2766 | if (!dwc2_is_device_mode(hsotg)) |
| 2767 | return IRQ_NONE; |
| 2768 | |
Lukasz Majewski | 5ad1d31 | 2012-06-14 10:02:26 +0200 | [diff] [blame] | 2769 | spin_lock(&hsotg->lock); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2770 | irq_retry: |
Antti Seppälä | 95c8bc3 | 2015-08-20 21:41:07 +0300 | [diff] [blame] | 2771 | gintsts = dwc2_readl(hsotg->regs + GINTSTS); |
| 2772 | gintmsk = dwc2_readl(hsotg->regs + GINTMSK); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2773 | |
| 2774 | dev_dbg(hsotg->dev, "%s: %08x %08x (%08x) retry %d\n", |
| 2775 | __func__, gintsts, gintsts & gintmsk, gintmsk, retry_count); |
| 2776 | |
| 2777 | gintsts &= gintmsk; |
| 2778 | |
Mian Yousaf Kaukab | 8fc37b8 | 2015-09-29 12:08:29 +0200 | [diff] [blame] | 2779 | if (gintsts & GINTSTS_RESETDET) { |
| 2780 | dev_dbg(hsotg->dev, "%s: USBRstDet\n", __func__); |
| 2781 | |
| 2782 | dwc2_writel(GINTSTS_RESETDET, hsotg->regs + GINTSTS); |
| 2783 | |
| 2784 | /* This event must be used only if controller is suspended */ |
| 2785 | if (hsotg->lx_state == DWC2_L2) { |
| 2786 | dwc2_exit_hibernation(hsotg, true); |
| 2787 | hsotg->lx_state = DWC2_L0; |
| 2788 | } |
| 2789 | } |
| 2790 | |
| 2791 | if (gintsts & (GINTSTS_USBRST | GINTSTS_RESETDET)) { |
| 2792 | |
| 2793 | u32 usb_status = dwc2_readl(hsotg->regs + GOTGCTL); |
| 2794 | u32 connected = hsotg->connected; |
| 2795 | |
| 2796 | dev_dbg(hsotg->dev, "%s: USBRst\n", __func__); |
| 2797 | dev_dbg(hsotg->dev, "GNPTXSTS=%08x\n", |
| 2798 | dwc2_readl(hsotg->regs + GNPTXSTS)); |
| 2799 | |
| 2800 | dwc2_writel(GINTSTS_USBRST, hsotg->regs + GINTSTS); |
| 2801 | |
| 2802 | /* Report disconnection if it is not already done. */ |
| 2803 | dwc2_hsotg_disconnect(hsotg); |
| 2804 | |
| 2805 | if (usb_status & GOTGCTL_BSESVLD && connected) |
| 2806 | dwc2_hsotg_core_init_disconnected(hsotg, true); |
| 2807 | } |
| 2808 | |
Dinh Nguyen | 47a1685 | 2014-04-14 14:13:34 -0700 | [diff] [blame] | 2809 | if (gintsts & GINTSTS_ENUMDONE) { |
Antti Seppälä | 95c8bc3 | 2015-08-20 21:41:07 +0300 | [diff] [blame] | 2810 | dwc2_writel(GINTSTS_ENUMDONE, hsotg->regs + GINTSTS); |
Anton Tikhomirov | a3395f0 | 2011-04-21 17:06:39 +0900 | [diff] [blame] | 2811 | |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 2812 | dwc2_hsotg_irq_enumdone(hsotg); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2813 | } |
| 2814 | |
Dinh Nguyen | 47a1685 | 2014-04-14 14:13:34 -0700 | [diff] [blame] | 2815 | if (gintsts & (GINTSTS_OEPINT | GINTSTS_IEPINT)) { |
Antti Seppälä | 95c8bc3 | 2015-08-20 21:41:07 +0300 | [diff] [blame] | 2816 | u32 daint = dwc2_readl(hsotg->regs + DAINT); |
| 2817 | u32 daintmsk = dwc2_readl(hsotg->regs + DAINTMSK); |
Robert Baldyga | 7e80465 | 2013-09-19 11:50:20 +0200 | [diff] [blame] | 2818 | u32 daint_out, daint_in; |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2819 | int ep; |
| 2820 | |
Robert Baldyga | 7e80465 | 2013-09-19 11:50:20 +0200 | [diff] [blame] | 2821 | daint &= daintmsk; |
Dinh Nguyen | 47a1685 | 2014-04-14 14:13:34 -0700 | [diff] [blame] | 2822 | daint_out = daint >> DAINT_OUTEP_SHIFT; |
| 2823 | daint_in = daint & ~(daint_out << DAINT_OUTEP_SHIFT); |
Robert Baldyga | 7e80465 | 2013-09-19 11:50:20 +0200 | [diff] [blame] | 2824 | |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2825 | dev_dbg(hsotg->dev, "%s: daint=%08x\n", __func__, daint); |
| 2826 | |
Mian Yousaf Kaukab | cec87f1 | 2015-01-09 13:38:51 +0100 | [diff] [blame] | 2827 | for (ep = 0; ep < hsotg->num_of_eps && daint_out; |
| 2828 | ep++, daint_out >>= 1) { |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2829 | if (daint_out & 1) |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 2830 | dwc2_hsotg_epint(hsotg, ep, 0); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2831 | } |
| 2832 | |
Mian Yousaf Kaukab | cec87f1 | 2015-01-09 13:38:51 +0100 | [diff] [blame] | 2833 | for (ep = 0; ep < hsotg->num_of_eps && daint_in; |
| 2834 | ep++, daint_in >>= 1) { |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2835 | if (daint_in & 1) |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 2836 | dwc2_hsotg_epint(hsotg, ep, 1); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2837 | } |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2838 | } |
| 2839 | |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2840 | /* check both FIFOs */ |
| 2841 | |
Dinh Nguyen | 47a1685 | 2014-04-14 14:13:34 -0700 | [diff] [blame] | 2842 | if (gintsts & GINTSTS_NPTXFEMP) { |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2843 | dev_dbg(hsotg->dev, "NPTxFEmp\n"); |
| 2844 | |
Lukasz Majewski | 8b9bc46 | 2012-05-04 14:17:11 +0200 | [diff] [blame] | 2845 | /* |
| 2846 | * Disable the interrupt to stop it happening again |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2847 | * unless one of these endpoint routines decides that |
Lukasz Majewski | 8b9bc46 | 2012-05-04 14:17:11 +0200 | [diff] [blame] | 2848 | * it needs re-enabling |
| 2849 | */ |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2850 | |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 2851 | dwc2_hsotg_disable_gsint(hsotg, GINTSTS_NPTXFEMP); |
| 2852 | dwc2_hsotg_irq_fifoempty(hsotg, false); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2853 | } |
| 2854 | |
Dinh Nguyen | 47a1685 | 2014-04-14 14:13:34 -0700 | [diff] [blame] | 2855 | if (gintsts & GINTSTS_PTXFEMP) { |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2856 | dev_dbg(hsotg->dev, "PTxFEmp\n"); |
| 2857 | |
Lukasz Majewski | 94cb8fd | 2012-05-04 14:17:14 +0200 | [diff] [blame] | 2858 | /* See note in GINTSTS_NPTxFEmp */ |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2859 | |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 2860 | dwc2_hsotg_disable_gsint(hsotg, GINTSTS_PTXFEMP); |
| 2861 | dwc2_hsotg_irq_fifoempty(hsotg, true); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2862 | } |
| 2863 | |
Dinh Nguyen | 47a1685 | 2014-04-14 14:13:34 -0700 | [diff] [blame] | 2864 | if (gintsts & GINTSTS_RXFLVL) { |
Lukasz Majewski | 8b9bc46 | 2012-05-04 14:17:11 +0200 | [diff] [blame] | 2865 | /* |
| 2866 | * note, since GINTSTS_RxFLvl doubles as FIFO-not-empty, |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 2867 | * we need to retry dwc2_hsotg_handle_rx if this is still |
Lukasz Majewski | 8b9bc46 | 2012-05-04 14:17:11 +0200 | [diff] [blame] | 2868 | * set. |
| 2869 | */ |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2870 | |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 2871 | dwc2_hsotg_handle_rx(hsotg); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2872 | } |
| 2873 | |
Dinh Nguyen | 47a1685 | 2014-04-14 14:13:34 -0700 | [diff] [blame] | 2874 | if (gintsts & GINTSTS_ERLYSUSP) { |
Lukasz Majewski | 94cb8fd | 2012-05-04 14:17:14 +0200 | [diff] [blame] | 2875 | dev_dbg(hsotg->dev, "GINTSTS_ErlySusp\n"); |
Antti Seppälä | 95c8bc3 | 2015-08-20 21:41:07 +0300 | [diff] [blame] | 2876 | dwc2_writel(GINTSTS_ERLYSUSP, hsotg->regs + GINTSTS); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2877 | } |
| 2878 | |
Lukasz Majewski | 8b9bc46 | 2012-05-04 14:17:11 +0200 | [diff] [blame] | 2879 | /* |
| 2880 | * these next two seem to crop-up occasionally causing the core |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2881 | * to shutdown the USB transfer, so try clearing them and logging |
Lukasz Majewski | 8b9bc46 | 2012-05-04 14:17:11 +0200 | [diff] [blame] | 2882 | * the occurrence. |
| 2883 | */ |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2884 | |
Dinh Nguyen | 47a1685 | 2014-04-14 14:13:34 -0700 | [diff] [blame] | 2885 | if (gintsts & GINTSTS_GOUTNAKEFF) { |
Vardan Mikayelyan | 837e9f0 | 2016-05-25 18:07:22 -0700 | [diff] [blame] | 2886 | u8 idx; |
| 2887 | u32 epctrl; |
| 2888 | u32 gintmsk; |
| 2889 | struct dwc2_hsotg_ep *hs_ep; |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2890 | |
Vardan Mikayelyan | 837e9f0 | 2016-05-25 18:07:22 -0700 | [diff] [blame] | 2891 | /* Mask this interrupt */ |
| 2892 | gintmsk = dwc2_readl(hsotg->regs + GINTMSK); |
| 2893 | gintmsk &= ~GINTSTS_GOUTNAKEFF; |
| 2894 | dwc2_writel(gintmsk, hsotg->regs + GINTMSK); |
Anton Tikhomirov | a3395f0 | 2011-04-21 17:06:39 +0900 | [diff] [blame] | 2895 | |
Vardan Mikayelyan | 837e9f0 | 2016-05-25 18:07:22 -0700 | [diff] [blame] | 2896 | dev_dbg(hsotg->dev, "GOUTNakEff triggered\n"); |
| 2897 | for (idx = 1; idx <= hsotg->num_of_eps; idx++) { |
| 2898 | hs_ep = hsotg->eps_out[idx]; |
| 2899 | epctrl = dwc2_readl(hsotg->regs + DOEPCTL(idx)); |
| 2900 | |
| 2901 | if ((epctrl & DXEPCTL_EPENA) && hs_ep->isochronous) { |
| 2902 | epctrl |= DXEPCTL_SNAK; |
| 2903 | epctrl |= DXEPCTL_EPDIS; |
| 2904 | dwc2_writel(epctrl, hsotg->regs + DOEPCTL(idx)); |
| 2905 | } |
| 2906 | } |
| 2907 | |
| 2908 | /* This interrupt bit is cleared in DXEPINT_EPDISBLD handler */ |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2909 | } |
| 2910 | |
Dinh Nguyen | 47a1685 | 2014-04-14 14:13:34 -0700 | [diff] [blame] | 2911 | if (gintsts & GINTSTS_GINNAKEFF) { |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2912 | dev_info(hsotg->dev, "GINNakEff triggered\n"); |
| 2913 | |
Gregory Herrero | 3be99cd | 2015-12-07 12:07:31 +0100 | [diff] [blame] | 2914 | __orr32(hsotg->regs + DCTL, DCTL_CGNPINNAK); |
Anton Tikhomirov | a3395f0 | 2011-04-21 17:06:39 +0900 | [diff] [blame] | 2915 | |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 2916 | dwc2_hsotg_dump(hsotg); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2917 | } |
| 2918 | |
Vardan Mikayelyan | 381fc8f | 2016-05-25 18:07:17 -0700 | [diff] [blame] | 2919 | if (gintsts & GINTSTS_INCOMPL_SOIN) |
| 2920 | dwc2_gadget_handle_incomplete_isoc_in(hsotg); |
Roman Bacik | ec1f9d9 | 2015-09-10 18:13:43 -0700 | [diff] [blame] | 2921 | |
Vardan Mikayelyan | 381fc8f | 2016-05-25 18:07:17 -0700 | [diff] [blame] | 2922 | if (gintsts & GINTSTS_INCOMPL_SOOUT) |
| 2923 | dwc2_gadget_handle_incomplete_isoc_out(hsotg); |
Roman Bacik | ec1f9d9 | 2015-09-10 18:13:43 -0700 | [diff] [blame] | 2924 | |
Lukasz Majewski | 8b9bc46 | 2012-05-04 14:17:11 +0200 | [diff] [blame] | 2925 | /* |
| 2926 | * if we've had fifo events, we should try and go around the |
| 2927 | * loop again to see if there's any point in returning yet. |
| 2928 | */ |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2929 | |
| 2930 | if (gintsts & IRQ_RETRY_MASK && --retry_count > 0) |
| 2931 | goto irq_retry; |
| 2932 | |
Lukasz Majewski | 5ad1d31 | 2012-06-14 10:02:26 +0200 | [diff] [blame] | 2933 | spin_unlock(&hsotg->lock); |
| 2934 | |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2935 | return IRQ_HANDLED; |
| 2936 | } |
| 2937 | |
| 2938 | /** |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 2939 | * dwc2_hsotg_ep_enable - enable the given endpoint |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2940 | * @ep: The USB endpint to configure |
| 2941 | * @desc: The USB endpoint descriptor to configure with. |
| 2942 | * |
| 2943 | * This is called from the USB gadget code's usb_ep_enable(). |
Lukasz Majewski | 8b9bc46 | 2012-05-04 14:17:11 +0200 | [diff] [blame] | 2944 | */ |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 2945 | static int dwc2_hsotg_ep_enable(struct usb_ep *ep, |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2946 | const struct usb_endpoint_descriptor *desc) |
| 2947 | { |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 2948 | struct dwc2_hsotg_ep *hs_ep = our_ep(ep); |
Dinh Nguyen | 941fcce | 2014-11-11 11:13:33 -0600 | [diff] [blame] | 2949 | struct dwc2_hsotg *hsotg = hs_ep->parent; |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2950 | unsigned long flags; |
Mian Yousaf Kaukab | ca4c55a | 2015-01-09 13:39:04 +0100 | [diff] [blame] | 2951 | unsigned int index = hs_ep->index; |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2952 | u32 epctrl_reg; |
| 2953 | u32 epctrl; |
| 2954 | u32 mps; |
Vardan Mikayelyan | 837e9f0 | 2016-05-25 18:07:22 -0700 | [diff] [blame] | 2955 | u32 mask; |
Mian Yousaf Kaukab | ca4c55a | 2015-01-09 13:39:04 +0100 | [diff] [blame] | 2956 | unsigned int dir_in; |
| 2957 | unsigned int i, val, size; |
Julia Lawall | 19c190f | 2010-03-29 17:36:44 +0200 | [diff] [blame] | 2958 | int ret = 0; |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2959 | |
| 2960 | dev_dbg(hsotg->dev, |
| 2961 | "%s: ep %s: a 0x%02x, attr 0x%02x, mps 0x%04x, intr %d\n", |
| 2962 | __func__, ep->name, desc->bEndpointAddress, desc->bmAttributes, |
| 2963 | desc->wMaxPacketSize, desc->bInterval); |
| 2964 | |
| 2965 | /* not to be called for EP0 */ |
Vahram Aharonyan | 8c3d609 | 2016-04-27 20:20:46 -0700 | [diff] [blame] | 2966 | if (index == 0) { |
| 2967 | dev_err(hsotg->dev, "%s: called for EP 0\n", __func__); |
| 2968 | return -EINVAL; |
| 2969 | } |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2970 | |
| 2971 | dir_in = (desc->bEndpointAddress & USB_ENDPOINT_DIR_MASK) ? 1 : 0; |
| 2972 | if (dir_in != hs_ep->dir_in) { |
| 2973 | dev_err(hsotg->dev, "%s: direction mismatch!\n", __func__); |
| 2974 | return -EINVAL; |
| 2975 | } |
| 2976 | |
Kuninori Morimoto | 29cc889 | 2011-08-23 03:12:03 -0700 | [diff] [blame] | 2977 | mps = usb_endpoint_maxp(desc); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2978 | |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 2979 | /* note, we handle this here instead of dwc2_hsotg_set_ep_maxpacket */ |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2980 | |
Lukasz Majewski | 94cb8fd | 2012-05-04 14:17:14 +0200 | [diff] [blame] | 2981 | epctrl_reg = dir_in ? DIEPCTL(index) : DOEPCTL(index); |
Antti Seppälä | 95c8bc3 | 2015-08-20 21:41:07 +0300 | [diff] [blame] | 2982 | epctrl = dwc2_readl(hsotg->regs + epctrl_reg); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2983 | |
| 2984 | dev_dbg(hsotg->dev, "%s: read DxEPCTL=0x%08x from 0x%08x\n", |
| 2985 | __func__, epctrl, epctrl_reg); |
| 2986 | |
Lukasz Majewski | 22258f4 | 2012-06-14 10:02:24 +0200 | [diff] [blame] | 2987 | spin_lock_irqsave(&hsotg->lock, flags); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2988 | |
Dinh Nguyen | 47a1685 | 2014-04-14 14:13:34 -0700 | [diff] [blame] | 2989 | epctrl &= ~(DXEPCTL_EPTYPE_MASK | DXEPCTL_MPS_MASK); |
| 2990 | epctrl |= DXEPCTL_MPS(mps); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2991 | |
Lukasz Majewski | 8b9bc46 | 2012-05-04 14:17:11 +0200 | [diff] [blame] | 2992 | /* |
| 2993 | * mark the endpoint as active, otherwise the core may ignore |
| 2994 | * transactions entirely for this endpoint |
| 2995 | */ |
Dinh Nguyen | 47a1685 | 2014-04-14 14:13:34 -0700 | [diff] [blame] | 2996 | epctrl |= DXEPCTL_USBACTEP; |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2997 | |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 2998 | /* update the endpoint state */ |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 2999 | dwc2_hsotg_set_ep_maxpacket(hsotg, hs_ep->index, mps, dir_in); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3000 | |
| 3001 | /* default, set to non-periodic */ |
Robert Baldyga | 1479e84 | 2013-10-09 08:41:57 +0200 | [diff] [blame] | 3002 | hs_ep->isochronous = 0; |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3003 | hs_ep->periodic = 0; |
Robert Baldyga | a18ed7b | 2013-09-19 11:50:21 +0200 | [diff] [blame] | 3004 | hs_ep->halted = 0; |
Robert Baldyga | 1479e84 | 2013-10-09 08:41:57 +0200 | [diff] [blame] | 3005 | hs_ep->interval = desc->bInterval; |
Robert Baldyga | 4fca54a | 2013-10-09 09:00:02 +0200 | [diff] [blame] | 3006 | |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3007 | switch (desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK) { |
| 3008 | case USB_ENDPOINT_XFER_ISOC: |
Dinh Nguyen | 47a1685 | 2014-04-14 14:13:34 -0700 | [diff] [blame] | 3009 | epctrl |= DXEPCTL_EPTYPE_ISO; |
| 3010 | epctrl |= DXEPCTL_SETEVENFR; |
Robert Baldyga | 1479e84 | 2013-10-09 08:41:57 +0200 | [diff] [blame] | 3011 | hs_ep->isochronous = 1; |
Vardan Mikayelyan | 142bd33 | 2016-05-25 18:07:07 -0700 | [diff] [blame] | 3012 | hs_ep->interval = 1 << (desc->bInterval - 1); |
Vardan Mikayelyan | 837e9f0 | 2016-05-25 18:07:22 -0700 | [diff] [blame] | 3013 | hs_ep->target_frame = TARGET_FRAME_INITIAL; |
| 3014 | if (dir_in) { |
Robert Baldyga | 1479e84 | 2013-10-09 08:41:57 +0200 | [diff] [blame] | 3015 | hs_ep->periodic = 1; |
Vardan Mikayelyan | 837e9f0 | 2016-05-25 18:07:22 -0700 | [diff] [blame] | 3016 | mask = dwc2_readl(hsotg->regs + DIEPMSK); |
| 3017 | mask |= DIEPMSK_NAKMSK; |
| 3018 | dwc2_writel(mask, hsotg->regs + DIEPMSK); |
| 3019 | } else { |
| 3020 | mask = dwc2_readl(hsotg->regs + DOEPMSK); |
| 3021 | mask |= DOEPMSK_OUTTKNEPDISMSK; |
| 3022 | dwc2_writel(mask, hsotg->regs + DOEPMSK); |
| 3023 | } |
Robert Baldyga | 1479e84 | 2013-10-09 08:41:57 +0200 | [diff] [blame] | 3024 | break; |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3025 | |
| 3026 | case USB_ENDPOINT_XFER_BULK: |
Dinh Nguyen | 47a1685 | 2014-04-14 14:13:34 -0700 | [diff] [blame] | 3027 | epctrl |= DXEPCTL_EPTYPE_BULK; |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3028 | break; |
| 3029 | |
| 3030 | case USB_ENDPOINT_XFER_INT: |
Robert Baldyga | b203d0a | 2014-09-09 10:44:56 +0200 | [diff] [blame] | 3031 | if (dir_in) |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3032 | hs_ep->periodic = 1; |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3033 | |
Vardan Mikayelyan | 142bd33 | 2016-05-25 18:07:07 -0700 | [diff] [blame] | 3034 | if (hsotg->gadget.speed == USB_SPEED_HIGH) |
| 3035 | hs_ep->interval = 1 << (desc->bInterval - 1); |
| 3036 | |
Dinh Nguyen | 47a1685 | 2014-04-14 14:13:34 -0700 | [diff] [blame] | 3037 | epctrl |= DXEPCTL_EPTYPE_INTERRUPT; |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3038 | break; |
| 3039 | |
| 3040 | case USB_ENDPOINT_XFER_CONTROL: |
Dinh Nguyen | 47a1685 | 2014-04-14 14:13:34 -0700 | [diff] [blame] | 3041 | epctrl |= DXEPCTL_EPTYPE_CONTROL; |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3042 | break; |
| 3043 | } |
| 3044 | |
Lukasz Majewski | 8b9bc46 | 2012-05-04 14:17:11 +0200 | [diff] [blame] | 3045 | /* |
| 3046 | * if the hardware has dedicated fifos, we must give each IN EP |
Ben Dooks | 10aebc7 | 2010-07-19 09:40:44 +0100 | [diff] [blame] | 3047 | * a unique tx-fifo even if it is non-periodic. |
| 3048 | */ |
Robert Baldyga | 21f3bb5 | 2016-08-29 13:38:57 -0700 | [diff] [blame] | 3049 | if (dir_in && hsotg->dedicated_fifos) { |
Mian Yousaf Kaukab | ca4c55a | 2015-01-09 13:39:04 +0100 | [diff] [blame] | 3050 | u32 fifo_index = 0; |
| 3051 | u32 fifo_size = UINT_MAX; |
Robert Baldyga | b203d0a | 2014-09-09 10:44:56 +0200 | [diff] [blame] | 3052 | size = hs_ep->ep.maxpacket*hs_ep->mc; |
Mian Yousaf Kaukab | 5f2196b | 2015-01-09 13:38:56 +0100 | [diff] [blame] | 3053 | for (i = 1; i < hsotg->num_of_eps; ++i) { |
Robert Baldyga | b203d0a | 2014-09-09 10:44:56 +0200 | [diff] [blame] | 3054 | if (hsotg->fifo_map & (1<<i)) |
| 3055 | continue; |
Antti Seppälä | 95c8bc3 | 2015-08-20 21:41:07 +0300 | [diff] [blame] | 3056 | val = dwc2_readl(hsotg->regs + DPTXFSIZN(i)); |
Robert Baldyga | b203d0a | 2014-09-09 10:44:56 +0200 | [diff] [blame] | 3057 | val = (val >> FIFOSIZE_DEPTH_SHIFT)*4; |
| 3058 | if (val < size) |
| 3059 | continue; |
Mian Yousaf Kaukab | ca4c55a | 2015-01-09 13:39:04 +0100 | [diff] [blame] | 3060 | /* Search for smallest acceptable fifo */ |
| 3061 | if (val < fifo_size) { |
| 3062 | fifo_size = val; |
| 3063 | fifo_index = i; |
| 3064 | } |
Robert Baldyga | b203d0a | 2014-09-09 10:44:56 +0200 | [diff] [blame] | 3065 | } |
Mian Yousaf Kaukab | ca4c55a | 2015-01-09 13:39:04 +0100 | [diff] [blame] | 3066 | if (!fifo_index) { |
Mian Yousaf Kaukab | 5f2196b | 2015-01-09 13:38:56 +0100 | [diff] [blame] | 3067 | dev_err(hsotg->dev, |
| 3068 | "%s: No suitable fifo found\n", __func__); |
Sudip Mukherjee | b585a48 | 2014-10-17 10:14:02 +0530 | [diff] [blame] | 3069 | ret = -ENOMEM; |
| 3070 | goto error; |
| 3071 | } |
Mian Yousaf Kaukab | ca4c55a | 2015-01-09 13:39:04 +0100 | [diff] [blame] | 3072 | hsotg->fifo_map |= 1 << fifo_index; |
| 3073 | epctrl |= DXEPCTL_TXFNUM(fifo_index); |
| 3074 | hs_ep->fifo_index = fifo_index; |
| 3075 | hs_ep->fifo_size = fifo_size; |
Robert Baldyga | b203d0a | 2014-09-09 10:44:56 +0200 | [diff] [blame] | 3076 | } |
Ben Dooks | 10aebc7 | 2010-07-19 09:40:44 +0100 | [diff] [blame] | 3077 | |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3078 | /* for non control endpoints, set PID to D0 */ |
Vardan Mikayelyan | 837e9f0 | 2016-05-25 18:07:22 -0700 | [diff] [blame] | 3079 | if (index && !hs_ep->isochronous) |
Dinh Nguyen | 47a1685 | 2014-04-14 14:13:34 -0700 | [diff] [blame] | 3080 | epctrl |= DXEPCTL_SETD0PID; |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3081 | |
| 3082 | dev_dbg(hsotg->dev, "%s: write DxEPCTL=0x%08x\n", |
| 3083 | __func__, epctrl); |
| 3084 | |
Antti Seppälä | 95c8bc3 | 2015-08-20 21:41:07 +0300 | [diff] [blame] | 3085 | dwc2_writel(epctrl, hsotg->regs + epctrl_reg); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3086 | dev_dbg(hsotg->dev, "%s: read DxEPCTL=0x%08x\n", |
Antti Seppälä | 95c8bc3 | 2015-08-20 21:41:07 +0300 | [diff] [blame] | 3087 | __func__, dwc2_readl(hsotg->regs + epctrl_reg)); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3088 | |
| 3089 | /* enable the endpoint interrupt */ |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 3090 | dwc2_hsotg_ctrl_epint(hsotg, index, dir_in, 1); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3091 | |
Sudip Mukherjee | b585a48 | 2014-10-17 10:14:02 +0530 | [diff] [blame] | 3092 | error: |
Lukasz Majewski | 22258f4 | 2012-06-14 10:02:24 +0200 | [diff] [blame] | 3093 | spin_unlock_irqrestore(&hsotg->lock, flags); |
Julia Lawall | 19c190f | 2010-03-29 17:36:44 +0200 | [diff] [blame] | 3094 | return ret; |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3095 | } |
| 3096 | |
Lukasz Majewski | 8b9bc46 | 2012-05-04 14:17:11 +0200 | [diff] [blame] | 3097 | /** |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 3098 | * dwc2_hsotg_ep_disable - disable given endpoint |
Lukasz Majewski | 8b9bc46 | 2012-05-04 14:17:11 +0200 | [diff] [blame] | 3099 | * @ep: The endpoint to disable. |
| 3100 | */ |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 3101 | static int dwc2_hsotg_ep_disable(struct usb_ep *ep) |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3102 | { |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 3103 | struct dwc2_hsotg_ep *hs_ep = our_ep(ep); |
Dinh Nguyen | 941fcce | 2014-11-11 11:13:33 -0600 | [diff] [blame] | 3104 | struct dwc2_hsotg *hsotg = hs_ep->parent; |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3105 | int dir_in = hs_ep->dir_in; |
| 3106 | int index = hs_ep->index; |
| 3107 | unsigned long flags; |
| 3108 | u32 epctrl_reg; |
| 3109 | u32 ctrl; |
| 3110 | |
Marek Szyprowski | 1e01129 | 2014-09-09 10:44:54 +0200 | [diff] [blame] | 3111 | dev_dbg(hsotg->dev, "%s(ep %p)\n", __func__, ep); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3112 | |
Mian Yousaf Kaukab | c6f5c05 | 2015-01-09 13:38:50 +0100 | [diff] [blame] | 3113 | if (ep == &hsotg->eps_out[0]->ep) { |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3114 | dev_err(hsotg->dev, "%s: called for ep0\n", __func__); |
| 3115 | return -EINVAL; |
| 3116 | } |
| 3117 | |
Lukasz Majewski | 94cb8fd | 2012-05-04 14:17:14 +0200 | [diff] [blame] | 3118 | epctrl_reg = dir_in ? DIEPCTL(index) : DOEPCTL(index); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3119 | |
Lukasz Majewski | 5ad1d31 | 2012-06-14 10:02:26 +0200 | [diff] [blame] | 3120 | spin_lock_irqsave(&hsotg->lock, flags); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3121 | |
Antti Seppälä | 95c8bc3 | 2015-08-20 21:41:07 +0300 | [diff] [blame] | 3122 | ctrl = dwc2_readl(hsotg->regs + epctrl_reg); |
Dinh Nguyen | 47a1685 | 2014-04-14 14:13:34 -0700 | [diff] [blame] | 3123 | ctrl &= ~DXEPCTL_EPENA; |
| 3124 | ctrl &= ~DXEPCTL_USBACTEP; |
| 3125 | ctrl |= DXEPCTL_SNAK; |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3126 | |
| 3127 | dev_dbg(hsotg->dev, "%s: DxEPCTL=0x%08x\n", __func__, ctrl); |
Antti Seppälä | 95c8bc3 | 2015-08-20 21:41:07 +0300 | [diff] [blame] | 3128 | dwc2_writel(ctrl, hsotg->regs + epctrl_reg); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3129 | |
| 3130 | /* disable endpoint interrupts */ |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 3131 | dwc2_hsotg_ctrl_epint(hsotg, hs_ep->index, hs_ep->dir_in, 0); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3132 | |
Mian Yousaf Kaukab | 1141ea0 | 2015-01-09 13:38:57 +0100 | [diff] [blame] | 3133 | /* terminate all requests with shutdown */ |
| 3134 | kill_all_requests(hsotg, hs_ep, -ESHUTDOWN); |
| 3135 | |
Robert Baldyga | 1c07b20 | 2016-08-29 13:39:00 -0700 | [diff] [blame] | 3136 | hsotg->fifo_map &= ~(1 << hs_ep->fifo_index); |
| 3137 | hs_ep->fifo_index = 0; |
| 3138 | hs_ep->fifo_size = 0; |
| 3139 | |
Lukasz Majewski | 22258f4 | 2012-06-14 10:02:24 +0200 | [diff] [blame] | 3140 | spin_unlock_irqrestore(&hsotg->lock, flags); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3141 | return 0; |
| 3142 | } |
| 3143 | |
| 3144 | /** |
| 3145 | * on_list - check request is on the given endpoint |
| 3146 | * @ep: The endpoint to check. |
| 3147 | * @test: The request to test if it is on the endpoint. |
Lukasz Majewski | 8b9bc46 | 2012-05-04 14:17:11 +0200 | [diff] [blame] | 3148 | */ |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 3149 | static bool on_list(struct dwc2_hsotg_ep *ep, struct dwc2_hsotg_req *test) |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3150 | { |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 3151 | struct dwc2_hsotg_req *req, *treq; |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3152 | |
| 3153 | list_for_each_entry_safe(req, treq, &ep->queue, queue) { |
| 3154 | if (req == test) |
| 3155 | return true; |
| 3156 | } |
| 3157 | |
| 3158 | return false; |
| 3159 | } |
| 3160 | |
Mian Yousaf Kaukab | c524dd5 | 2015-09-29 12:08:24 +0200 | [diff] [blame] | 3161 | static int dwc2_hsotg_wait_bit_set(struct dwc2_hsotg *hs_otg, u32 reg, |
| 3162 | u32 bit, u32 timeout) |
| 3163 | { |
| 3164 | u32 i; |
| 3165 | |
| 3166 | for (i = 0; i < timeout; i++) { |
| 3167 | if (dwc2_readl(hs_otg->regs + reg) & bit) |
| 3168 | return 0; |
| 3169 | udelay(1); |
| 3170 | } |
| 3171 | |
| 3172 | return -ETIMEDOUT; |
| 3173 | } |
| 3174 | |
| 3175 | static void dwc2_hsotg_ep_stop_xfr(struct dwc2_hsotg *hsotg, |
| 3176 | struct dwc2_hsotg_ep *hs_ep) |
| 3177 | { |
| 3178 | u32 epctrl_reg; |
| 3179 | u32 epint_reg; |
| 3180 | |
| 3181 | epctrl_reg = hs_ep->dir_in ? DIEPCTL(hs_ep->index) : |
| 3182 | DOEPCTL(hs_ep->index); |
| 3183 | epint_reg = hs_ep->dir_in ? DIEPINT(hs_ep->index) : |
| 3184 | DOEPINT(hs_ep->index); |
| 3185 | |
| 3186 | dev_dbg(hsotg->dev, "%s: stopping transfer on %s\n", __func__, |
| 3187 | hs_ep->name); |
| 3188 | if (hs_ep->dir_in) { |
| 3189 | __orr32(hsotg->regs + epctrl_reg, DXEPCTL_SNAK); |
| 3190 | /* Wait for Nak effect */ |
| 3191 | if (dwc2_hsotg_wait_bit_set(hsotg, epint_reg, |
| 3192 | DXEPINT_INEPNAKEFF, 100)) |
| 3193 | dev_warn(hsotg->dev, |
| 3194 | "%s: timeout DIEPINT.NAKEFF\n", __func__); |
| 3195 | } else { |
Vardan Mikayelyan | 6b58cb0 | 2016-05-25 18:07:02 -0700 | [diff] [blame] | 3196 | if (!(dwc2_readl(hsotg->regs + GINTSTS) & GINTSTS_GOUTNAKEFF)) |
| 3197 | __orr32(hsotg->regs + DCTL, DCTL_SGOUTNAK); |
Mian Yousaf Kaukab | c524dd5 | 2015-09-29 12:08:24 +0200 | [diff] [blame] | 3198 | |
| 3199 | /* Wait for global nak to take effect */ |
| 3200 | if (dwc2_hsotg_wait_bit_set(hsotg, GINTSTS, |
Du, Changbin | 0676c7e | 2015-12-04 15:38:23 +0800 | [diff] [blame] | 3201 | GINTSTS_GOUTNAKEFF, 100)) |
Mian Yousaf Kaukab | c524dd5 | 2015-09-29 12:08:24 +0200 | [diff] [blame] | 3202 | dev_warn(hsotg->dev, |
Du, Changbin | 0676c7e | 2015-12-04 15:38:23 +0800 | [diff] [blame] | 3203 | "%s: timeout GINTSTS.GOUTNAKEFF\n", __func__); |
Mian Yousaf Kaukab | c524dd5 | 2015-09-29 12:08:24 +0200 | [diff] [blame] | 3204 | } |
| 3205 | |
| 3206 | /* Disable ep */ |
| 3207 | __orr32(hsotg->regs + epctrl_reg, DXEPCTL_EPDIS | DXEPCTL_SNAK); |
| 3208 | |
| 3209 | /* Wait for ep to be disabled */ |
| 3210 | if (dwc2_hsotg_wait_bit_set(hsotg, epint_reg, DXEPINT_EPDISBLD, 100)) |
| 3211 | dev_warn(hsotg->dev, |
| 3212 | "%s: timeout DOEPCTL.EPDisable\n", __func__); |
| 3213 | |
| 3214 | if (hs_ep->dir_in) { |
| 3215 | if (hsotg->dedicated_fifos) { |
| 3216 | dwc2_writel(GRSTCTL_TXFNUM(hs_ep->fifo_index) | |
| 3217 | GRSTCTL_TXFFLSH, hsotg->regs + GRSTCTL); |
| 3218 | /* Wait for fifo flush */ |
| 3219 | if (dwc2_hsotg_wait_bit_set(hsotg, GRSTCTL, |
| 3220 | GRSTCTL_TXFFLSH, 100)) |
| 3221 | dev_warn(hsotg->dev, |
| 3222 | "%s: timeout flushing fifos\n", |
| 3223 | __func__); |
| 3224 | } |
| 3225 | /* TODO: Flush shared tx fifo */ |
| 3226 | } else { |
| 3227 | /* Remove global NAKs */ |
Du, Changbin | 0676c7e | 2015-12-04 15:38:23 +0800 | [diff] [blame] | 3228 | __bic32(hsotg->regs + DCTL, DCTL_SGOUTNAK); |
Mian Yousaf Kaukab | c524dd5 | 2015-09-29 12:08:24 +0200 | [diff] [blame] | 3229 | } |
| 3230 | } |
| 3231 | |
Lukasz Majewski | 8b9bc46 | 2012-05-04 14:17:11 +0200 | [diff] [blame] | 3232 | /** |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 3233 | * dwc2_hsotg_ep_dequeue - dequeue given endpoint |
Lukasz Majewski | 8b9bc46 | 2012-05-04 14:17:11 +0200 | [diff] [blame] | 3234 | * @ep: The endpoint to dequeue. |
| 3235 | * @req: The request to be removed from a queue. |
| 3236 | */ |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 3237 | static int dwc2_hsotg_ep_dequeue(struct usb_ep *ep, struct usb_request *req) |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3238 | { |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 3239 | struct dwc2_hsotg_req *hs_req = our_req(req); |
| 3240 | struct dwc2_hsotg_ep *hs_ep = our_ep(ep); |
Dinh Nguyen | 941fcce | 2014-11-11 11:13:33 -0600 | [diff] [blame] | 3241 | struct dwc2_hsotg *hs = hs_ep->parent; |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3242 | unsigned long flags; |
| 3243 | |
Marek Szyprowski | 1e01129 | 2014-09-09 10:44:54 +0200 | [diff] [blame] | 3244 | dev_dbg(hs->dev, "ep_dequeue(%p,%p)\n", ep, req); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3245 | |
Lukasz Majewski | 22258f4 | 2012-06-14 10:02:24 +0200 | [diff] [blame] | 3246 | spin_lock_irqsave(&hs->lock, flags); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3247 | |
| 3248 | if (!on_list(hs_ep, hs_req)) { |
Lukasz Majewski | 22258f4 | 2012-06-14 10:02:24 +0200 | [diff] [blame] | 3249 | spin_unlock_irqrestore(&hs->lock, flags); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3250 | return -EINVAL; |
| 3251 | } |
| 3252 | |
Mian Yousaf Kaukab | c524dd5 | 2015-09-29 12:08:24 +0200 | [diff] [blame] | 3253 | /* Dequeue already started request */ |
| 3254 | if (req == &hs_ep->req->req) |
| 3255 | dwc2_hsotg_ep_stop_xfr(hs, hs_ep); |
| 3256 | |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 3257 | dwc2_hsotg_complete_request(hs, hs_ep, hs_req, -ECONNRESET); |
Lukasz Majewski | 22258f4 | 2012-06-14 10:02:24 +0200 | [diff] [blame] | 3258 | spin_unlock_irqrestore(&hs->lock, flags); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3259 | |
| 3260 | return 0; |
| 3261 | } |
| 3262 | |
Lukasz Majewski | 8b9bc46 | 2012-05-04 14:17:11 +0200 | [diff] [blame] | 3263 | /** |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 3264 | * dwc2_hsotg_ep_sethalt - set halt on a given endpoint |
Lukasz Majewski | 8b9bc46 | 2012-05-04 14:17:11 +0200 | [diff] [blame] | 3265 | * @ep: The endpoint to set halt. |
| 3266 | * @value: Set or unset the halt. |
Vahram Aharonyan | 51da43b | 2016-05-23 22:41:57 -0700 | [diff] [blame] | 3267 | * @now: If true, stall the endpoint now. Otherwise return -EAGAIN if |
| 3268 | * the endpoint is busy processing requests. |
| 3269 | * |
| 3270 | * We need to stall the endpoint immediately if request comes from set_feature |
| 3271 | * protocol command handler. |
Lukasz Majewski | 8b9bc46 | 2012-05-04 14:17:11 +0200 | [diff] [blame] | 3272 | */ |
Vahram Aharonyan | 51da43b | 2016-05-23 22:41:57 -0700 | [diff] [blame] | 3273 | static int dwc2_hsotg_ep_sethalt(struct usb_ep *ep, int value, bool now) |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3274 | { |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 3275 | struct dwc2_hsotg_ep *hs_ep = our_ep(ep); |
Dinh Nguyen | 941fcce | 2014-11-11 11:13:33 -0600 | [diff] [blame] | 3276 | struct dwc2_hsotg *hs = hs_ep->parent; |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3277 | int index = hs_ep->index; |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3278 | u32 epreg; |
| 3279 | u32 epctl; |
Anton Tikhomirov | 9c39ddc | 2011-04-21 17:06:41 +0900 | [diff] [blame] | 3280 | u32 xfertype; |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3281 | |
| 3282 | dev_info(hs->dev, "%s(ep %p %s, %d)\n", __func__, ep, ep->name, value); |
| 3283 | |
Robert Baldyga | c9f721b | 2014-01-14 08:36:00 +0100 | [diff] [blame] | 3284 | if (index == 0) { |
| 3285 | if (value) |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 3286 | dwc2_hsotg_stall_ep0(hs); |
Robert Baldyga | c9f721b | 2014-01-14 08:36:00 +0100 | [diff] [blame] | 3287 | else |
| 3288 | dev_warn(hs->dev, |
| 3289 | "%s: can't clear halt on ep0\n", __func__); |
| 3290 | return 0; |
| 3291 | } |
| 3292 | |
Vahram Aharonyan | 15186f1 | 2016-05-23 22:41:59 -0700 | [diff] [blame] | 3293 | if (hs_ep->isochronous) { |
| 3294 | dev_err(hs->dev, "%s is Isochronous Endpoint\n", ep->name); |
| 3295 | return -EINVAL; |
| 3296 | } |
| 3297 | |
Vahram Aharonyan | 51da43b | 2016-05-23 22:41:57 -0700 | [diff] [blame] | 3298 | if (!now && value && !list_empty(&hs_ep->queue)) { |
| 3299 | dev_dbg(hs->dev, "%s request is pending, cannot halt\n", |
| 3300 | ep->name); |
| 3301 | return -EAGAIN; |
| 3302 | } |
| 3303 | |
Mian Yousaf Kaukab | c6f5c05 | 2015-01-09 13:38:50 +0100 | [diff] [blame] | 3304 | if (hs_ep->dir_in) { |
| 3305 | epreg = DIEPCTL(index); |
Antti Seppälä | 95c8bc3 | 2015-08-20 21:41:07 +0300 | [diff] [blame] | 3306 | epctl = dwc2_readl(hs->regs + epreg); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3307 | |
Mian Yousaf Kaukab | c6f5c05 | 2015-01-09 13:38:50 +0100 | [diff] [blame] | 3308 | if (value) { |
Felipe Balbi | 5a350d5 | 2015-06-29 20:17:22 -0500 | [diff] [blame] | 3309 | epctl |= DXEPCTL_STALL | DXEPCTL_SNAK; |
Mian Yousaf Kaukab | c6f5c05 | 2015-01-09 13:38:50 +0100 | [diff] [blame] | 3310 | if (epctl & DXEPCTL_EPENA) |
| 3311 | epctl |= DXEPCTL_EPDIS; |
| 3312 | } else { |
| 3313 | epctl &= ~DXEPCTL_STALL; |
| 3314 | xfertype = epctl & DXEPCTL_EPTYPE_MASK; |
| 3315 | if (xfertype == DXEPCTL_EPTYPE_BULK || |
| 3316 | xfertype == DXEPCTL_EPTYPE_INTERRUPT) |
| 3317 | epctl |= DXEPCTL_SETD0PID; |
| 3318 | } |
Antti Seppälä | 95c8bc3 | 2015-08-20 21:41:07 +0300 | [diff] [blame] | 3319 | dwc2_writel(epctl, hs->regs + epreg); |
Anton Tikhomirov | 9c39ddc | 2011-04-21 17:06:41 +0900 | [diff] [blame] | 3320 | } else { |
Mian Yousaf Kaukab | c6f5c05 | 2015-01-09 13:38:50 +0100 | [diff] [blame] | 3321 | |
| 3322 | epreg = DOEPCTL(index); |
Antti Seppälä | 95c8bc3 | 2015-08-20 21:41:07 +0300 | [diff] [blame] | 3323 | epctl = dwc2_readl(hs->regs + epreg); |
Mian Yousaf Kaukab | c6f5c05 | 2015-01-09 13:38:50 +0100 | [diff] [blame] | 3324 | |
| 3325 | if (value) |
| 3326 | epctl |= DXEPCTL_STALL; |
| 3327 | else { |
| 3328 | epctl &= ~DXEPCTL_STALL; |
| 3329 | xfertype = epctl & DXEPCTL_EPTYPE_MASK; |
| 3330 | if (xfertype == DXEPCTL_EPTYPE_BULK || |
| 3331 | xfertype == DXEPCTL_EPTYPE_INTERRUPT) |
| 3332 | epctl |= DXEPCTL_SETD0PID; |
| 3333 | } |
Antti Seppälä | 95c8bc3 | 2015-08-20 21:41:07 +0300 | [diff] [blame] | 3334 | dwc2_writel(epctl, hs->regs + epreg); |
Anton Tikhomirov | 9c39ddc | 2011-04-21 17:06:41 +0900 | [diff] [blame] | 3335 | } |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3336 | |
Robert Baldyga | a18ed7b | 2013-09-19 11:50:21 +0200 | [diff] [blame] | 3337 | hs_ep->halted = value; |
| 3338 | |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3339 | return 0; |
| 3340 | } |
| 3341 | |
Lukasz Majewski | 5ad1d31 | 2012-06-14 10:02:26 +0200 | [diff] [blame] | 3342 | /** |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 3343 | * dwc2_hsotg_ep_sethalt_lock - set halt on a given endpoint with lock held |
Lukasz Majewski | 5ad1d31 | 2012-06-14 10:02:26 +0200 | [diff] [blame] | 3344 | * @ep: The endpoint to set halt. |
| 3345 | * @value: Set or unset the halt. |
| 3346 | */ |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 3347 | static int dwc2_hsotg_ep_sethalt_lock(struct usb_ep *ep, int value) |
Lukasz Majewski | 5ad1d31 | 2012-06-14 10:02:26 +0200 | [diff] [blame] | 3348 | { |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 3349 | struct dwc2_hsotg_ep *hs_ep = our_ep(ep); |
Dinh Nguyen | 941fcce | 2014-11-11 11:13:33 -0600 | [diff] [blame] | 3350 | struct dwc2_hsotg *hs = hs_ep->parent; |
Lukasz Majewski | 5ad1d31 | 2012-06-14 10:02:26 +0200 | [diff] [blame] | 3351 | unsigned long flags = 0; |
| 3352 | int ret = 0; |
| 3353 | |
| 3354 | spin_lock_irqsave(&hs->lock, flags); |
Vahram Aharonyan | 51da43b | 2016-05-23 22:41:57 -0700 | [diff] [blame] | 3355 | ret = dwc2_hsotg_ep_sethalt(ep, value, false); |
Lukasz Majewski | 5ad1d31 | 2012-06-14 10:02:26 +0200 | [diff] [blame] | 3356 | spin_unlock_irqrestore(&hs->lock, flags); |
| 3357 | |
| 3358 | return ret; |
| 3359 | } |
| 3360 | |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 3361 | static struct usb_ep_ops dwc2_hsotg_ep_ops = { |
| 3362 | .enable = dwc2_hsotg_ep_enable, |
| 3363 | .disable = dwc2_hsotg_ep_disable, |
| 3364 | .alloc_request = dwc2_hsotg_ep_alloc_request, |
| 3365 | .free_request = dwc2_hsotg_ep_free_request, |
| 3366 | .queue = dwc2_hsotg_ep_queue_lock, |
| 3367 | .dequeue = dwc2_hsotg_ep_dequeue, |
| 3368 | .set_halt = dwc2_hsotg_ep_sethalt_lock, |
Lucas De Marchi | 25985ed | 2011-03-30 22:57:33 -0300 | [diff] [blame] | 3369 | /* note, don't believe we have any call for the fifo routines */ |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3370 | }; |
| 3371 | |
| 3372 | /** |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 3373 | * dwc2_hsotg_init - initalize the usb core |
Lukasz Majewski | 8b9bc46 | 2012-05-04 14:17:11 +0200 | [diff] [blame] | 3374 | * @hsotg: The driver state |
| 3375 | */ |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 3376 | static void dwc2_hsotg_init(struct dwc2_hsotg *hsotg) |
Lukasz Majewski | b3f489b | 2012-05-04 14:17:09 +0200 | [diff] [blame] | 3377 | { |
Mian Yousaf Kaukab | fa4a8d7 | 2015-01-30 09:09:35 +0100 | [diff] [blame] | 3378 | u32 trdtim; |
Przemek Rudy | ecd9a7a | 2016-03-16 23:10:26 +0100 | [diff] [blame] | 3379 | u32 usbcfg; |
Lukasz Majewski | b3f489b | 2012-05-04 14:17:09 +0200 | [diff] [blame] | 3380 | /* unmask subset of endpoint interrupts */ |
| 3381 | |
Antti Seppälä | 95c8bc3 | 2015-08-20 21:41:07 +0300 | [diff] [blame] | 3382 | dwc2_writel(DIEPMSK_TIMEOUTMSK | DIEPMSK_AHBERRMSK | |
| 3383 | DIEPMSK_EPDISBLDMSK | DIEPMSK_XFERCOMPLMSK, |
| 3384 | hsotg->regs + DIEPMSK); |
Lukasz Majewski | b3f489b | 2012-05-04 14:17:09 +0200 | [diff] [blame] | 3385 | |
Antti Seppälä | 95c8bc3 | 2015-08-20 21:41:07 +0300 | [diff] [blame] | 3386 | dwc2_writel(DOEPMSK_SETUPMSK | DOEPMSK_AHBERRMSK | |
| 3387 | DOEPMSK_EPDISBLDMSK | DOEPMSK_XFERCOMPLMSK, |
| 3388 | hsotg->regs + DOEPMSK); |
Lukasz Majewski | b3f489b | 2012-05-04 14:17:09 +0200 | [diff] [blame] | 3389 | |
Antti Seppälä | 95c8bc3 | 2015-08-20 21:41:07 +0300 | [diff] [blame] | 3390 | dwc2_writel(0, hsotg->regs + DAINTMSK); |
Lukasz Majewski | b3f489b | 2012-05-04 14:17:09 +0200 | [diff] [blame] | 3391 | |
| 3392 | /* Be in disconnected state until gadget is registered */ |
Dinh Nguyen | 47a1685 | 2014-04-14 14:13:34 -0700 | [diff] [blame] | 3393 | __orr32(hsotg->regs + DCTL, DCTL_SFTDISCON); |
Lukasz Majewski | b3f489b | 2012-05-04 14:17:09 +0200 | [diff] [blame] | 3394 | |
Lukasz Majewski | b3f489b | 2012-05-04 14:17:09 +0200 | [diff] [blame] | 3395 | /* setup fifos */ |
| 3396 | |
| 3397 | dev_dbg(hsotg->dev, "GRXFSIZ=0x%08x, GNPTXFSIZ=0x%08x\n", |
Antti Seppälä | 95c8bc3 | 2015-08-20 21:41:07 +0300 | [diff] [blame] | 3398 | dwc2_readl(hsotg->regs + GRXFSIZ), |
| 3399 | dwc2_readl(hsotg->regs + GNPTXFSIZ)); |
Lukasz Majewski | b3f489b | 2012-05-04 14:17:09 +0200 | [diff] [blame] | 3400 | |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 3401 | dwc2_hsotg_init_fifo(hsotg); |
Lukasz Majewski | b3f489b | 2012-05-04 14:17:09 +0200 | [diff] [blame] | 3402 | |
Przemek Rudy | ecd9a7a | 2016-03-16 23:10:26 +0100 | [diff] [blame] | 3403 | /* keep other bits untouched (so e.g. forced modes are not lost) */ |
| 3404 | usbcfg = dwc2_readl(hsotg->regs + GUSBCFG); |
| 3405 | usbcfg &= ~(GUSBCFG_TOUTCAL_MASK | GUSBCFG_PHYIF16 | GUSBCFG_SRPCAP | |
Amelie Delaunay | 5f54c4e | 2017-01-12 16:09:44 +0100 | [diff] [blame] | 3406 | GUSBCFG_HNPCAP | GUSBCFG_USBTRDTIM_MASK); |
Przemek Rudy | ecd9a7a | 2016-03-16 23:10:26 +0100 | [diff] [blame] | 3407 | |
Lukasz Majewski | b3f489b | 2012-05-04 14:17:09 +0200 | [diff] [blame] | 3408 | /* set the PLL on, remove the HNP/SRP and set the PHY */ |
Mian Yousaf Kaukab | fa4a8d7 | 2015-01-30 09:09:35 +0100 | [diff] [blame] | 3409 | trdtim = (hsotg->phyif == GUSBCFG_PHYIF8) ? 9 : 5; |
Przemek Rudy | ecd9a7a | 2016-03-16 23:10:26 +0100 | [diff] [blame] | 3410 | usbcfg |= hsotg->phyif | GUSBCFG_TOUTCAL(7) | |
| 3411 | (trdtim << GUSBCFG_USBTRDTIM_SHIFT); |
| 3412 | dwc2_writel(usbcfg, hsotg->regs + GUSBCFG); |
Lukasz Majewski | b3f489b | 2012-05-04 14:17:09 +0200 | [diff] [blame] | 3413 | |
Gregory Herrero | f509004 | 2015-01-09 13:38:47 +0100 | [diff] [blame] | 3414 | if (using_dma(hsotg)) |
| 3415 | __orr32(hsotg->regs + GAHBCFG, GAHBCFG_DMA_EN); |
Lukasz Majewski | b3f489b | 2012-05-04 14:17:09 +0200 | [diff] [blame] | 3416 | } |
| 3417 | |
Lukasz Majewski | 8b9bc46 | 2012-05-04 14:17:11 +0200 | [diff] [blame] | 3418 | /** |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 3419 | * dwc2_hsotg_udc_start - prepare the udc for work |
Lukasz Majewski | 8b9bc46 | 2012-05-04 14:17:11 +0200 | [diff] [blame] | 3420 | * @gadget: The usb gadget state |
| 3421 | * @driver: The usb gadget driver |
| 3422 | * |
| 3423 | * Perform initialization to prepare udc device and driver |
| 3424 | * to work. |
| 3425 | */ |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 3426 | static int dwc2_hsotg_udc_start(struct usb_gadget *gadget, |
Lukasz Majewski | f65f0f1 | 2012-05-04 14:17:10 +0200 | [diff] [blame] | 3427 | struct usb_gadget_driver *driver) |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3428 | { |
Dinh Nguyen | 941fcce | 2014-11-11 11:13:33 -0600 | [diff] [blame] | 3429 | struct dwc2_hsotg *hsotg = to_hsotg(gadget); |
Marek Szyprowski | 5b9451f | 2014-10-20 12:45:38 +0200 | [diff] [blame] | 3430 | unsigned long flags; |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3431 | int ret; |
| 3432 | |
| 3433 | if (!hsotg) { |
Pavel Machek | a023da3 | 2013-09-30 14:56:02 +0200 | [diff] [blame] | 3434 | pr_err("%s: called with no device\n", __func__); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3435 | return -ENODEV; |
| 3436 | } |
| 3437 | |
| 3438 | if (!driver) { |
| 3439 | dev_err(hsotg->dev, "%s: no driver\n", __func__); |
| 3440 | return -EINVAL; |
| 3441 | } |
| 3442 | |
Michal Nazarewicz | 7177aed | 2011-11-19 18:27:38 +0100 | [diff] [blame] | 3443 | if (driver->max_speed < USB_SPEED_FULL) |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3444 | dev_err(hsotg->dev, "%s: bad speed\n", __func__); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3445 | |
Lukasz Majewski | f65f0f1 | 2012-05-04 14:17:10 +0200 | [diff] [blame] | 3446 | if (!driver->setup) { |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3447 | dev_err(hsotg->dev, "%s: missing entry points\n", __func__); |
| 3448 | return -EINVAL; |
| 3449 | } |
| 3450 | |
| 3451 | WARN_ON(hsotg->driver); |
| 3452 | |
| 3453 | driver->driver.bus = NULL; |
| 3454 | hsotg->driver = driver; |
Alexandre Pereira da Silva | 7d7b229 | 2012-06-26 11:27:10 -0300 | [diff] [blame] | 3455 | hsotg->gadget.dev.of_node = hsotg->dev->of_node; |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3456 | hsotg->gadget.speed = USB_SPEED_UNKNOWN; |
| 3457 | |
Marek Szyprowski | 09a75e8 | 2015-10-14 08:52:29 +0200 | [diff] [blame] | 3458 | if (hsotg->dr_mode == USB_DR_MODE_PERIPHERAL) { |
| 3459 | ret = dwc2_lowlevel_hw_enable(hsotg); |
| 3460 | if (ret) |
| 3461 | goto err; |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3462 | } |
| 3463 | |
Gregory Herrero | f6c0159 | 2015-01-09 13:38:41 +0100 | [diff] [blame] | 3464 | if (!IS_ERR_OR_NULL(hsotg->uphy)) |
| 3465 | otg_set_peripheral(hsotg->uphy->otg, &hsotg->gadget); |
Marek Szyprowski | c816c47 | 2014-10-20 12:45:37 +0200 | [diff] [blame] | 3466 | |
Marek Szyprowski | 5b9451f | 2014-10-20 12:45:38 +0200 | [diff] [blame] | 3467 | spin_lock_irqsave(&hsotg->lock, flags); |
John Youn | d0f0ac5 | 2016-09-07 19:39:37 -0700 | [diff] [blame] | 3468 | if (dwc2_hw_is_device(hsotg)) { |
| 3469 | dwc2_hsotg_init(hsotg); |
| 3470 | dwc2_hsotg_core_init_disconnected(hsotg, false); |
| 3471 | } |
| 3472 | |
Marek Szyprowski | dc6e69e | 2014-11-21 15:14:49 +0100 | [diff] [blame] | 3473 | hsotg->enabled = 0; |
Marek Szyprowski | 5b9451f | 2014-10-20 12:45:38 +0200 | [diff] [blame] | 3474 | spin_unlock_irqrestore(&hsotg->lock, flags); |
| 3475 | |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3476 | dev_info(hsotg->dev, "bound driver %s\n", driver->driver.name); |
Marek Szyprowski | 5b9451f | 2014-10-20 12:45:38 +0200 | [diff] [blame] | 3477 | |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3478 | return 0; |
| 3479 | |
| 3480 | err: |
| 3481 | hsotg->driver = NULL; |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3482 | return ret; |
| 3483 | } |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3484 | |
Lukasz Majewski | 8b9bc46 | 2012-05-04 14:17:11 +0200 | [diff] [blame] | 3485 | /** |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 3486 | * dwc2_hsotg_udc_stop - stop the udc |
Lukasz Majewski | 8b9bc46 | 2012-05-04 14:17:11 +0200 | [diff] [blame] | 3487 | * @gadget: The usb gadget state |
| 3488 | * @driver: The usb gadget driver |
| 3489 | * |
| 3490 | * Stop udc hw block and stay tunned for future transmissions |
| 3491 | */ |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 3492 | static int dwc2_hsotg_udc_stop(struct usb_gadget *gadget) |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3493 | { |
Dinh Nguyen | 941fcce | 2014-11-11 11:13:33 -0600 | [diff] [blame] | 3494 | struct dwc2_hsotg *hsotg = to_hsotg(gadget); |
Lukasz Majewski | 2b19a52 | 2012-06-14 10:02:25 +0200 | [diff] [blame] | 3495 | unsigned long flags = 0; |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3496 | int ep; |
| 3497 | |
| 3498 | if (!hsotg) |
| 3499 | return -ENODEV; |
| 3500 | |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3501 | /* all endpoints should be shutdown */ |
Mian Yousaf Kaukab | c6f5c05 | 2015-01-09 13:38:50 +0100 | [diff] [blame] | 3502 | for (ep = 1; ep < hsotg->num_of_eps; ep++) { |
| 3503 | if (hsotg->eps_in[ep]) |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 3504 | dwc2_hsotg_ep_disable(&hsotg->eps_in[ep]->ep); |
Mian Yousaf Kaukab | c6f5c05 | 2015-01-09 13:38:50 +0100 | [diff] [blame] | 3505 | if (hsotg->eps_out[ep]) |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 3506 | dwc2_hsotg_ep_disable(&hsotg->eps_out[ep]->ep); |
Mian Yousaf Kaukab | c6f5c05 | 2015-01-09 13:38:50 +0100 | [diff] [blame] | 3507 | } |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3508 | |
Lukasz Majewski | 2b19a52 | 2012-06-14 10:02:25 +0200 | [diff] [blame] | 3509 | spin_lock_irqsave(&hsotg->lock, flags); |
| 3510 | |
Marek Szyprowski | 32805c3 | 2014-10-20 12:45:33 +0200 | [diff] [blame] | 3511 | hsotg->driver = NULL; |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3512 | hsotg->gadget.speed = USB_SPEED_UNKNOWN; |
Marek Szyprowski | dc6e69e | 2014-11-21 15:14:49 +0100 | [diff] [blame] | 3513 | hsotg->enabled = 0; |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3514 | |
Lukasz Majewski | 2b19a52 | 2012-06-14 10:02:25 +0200 | [diff] [blame] | 3515 | spin_unlock_irqrestore(&hsotg->lock, flags); |
| 3516 | |
Gregory Herrero | f6c0159 | 2015-01-09 13:38:41 +0100 | [diff] [blame] | 3517 | if (!IS_ERR_OR_NULL(hsotg->uphy)) |
| 3518 | otg_set_peripheral(hsotg->uphy->otg, NULL); |
Marek Szyprowski | c816c47 | 2014-10-20 12:45:37 +0200 | [diff] [blame] | 3519 | |
Marek Szyprowski | 09a75e8 | 2015-10-14 08:52:29 +0200 | [diff] [blame] | 3520 | if (hsotg->dr_mode == USB_DR_MODE_PERIPHERAL) |
| 3521 | dwc2_lowlevel_hw_disable(hsotg); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3522 | |
| 3523 | return 0; |
| 3524 | } |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3525 | |
Lukasz Majewski | 8b9bc46 | 2012-05-04 14:17:11 +0200 | [diff] [blame] | 3526 | /** |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 3527 | * dwc2_hsotg_gadget_getframe - read the frame number |
Lukasz Majewski | 8b9bc46 | 2012-05-04 14:17:11 +0200 | [diff] [blame] | 3528 | * @gadget: The usb gadget state |
| 3529 | * |
| 3530 | * Read the {micro} frame number |
| 3531 | */ |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 3532 | static int dwc2_hsotg_gadget_getframe(struct usb_gadget *gadget) |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3533 | { |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 3534 | return dwc2_hsotg_read_frameno(to_hsotg(gadget)); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3535 | } |
| 3536 | |
Lukasz Majewski | a188b68 | 2012-06-22 09:29:56 +0200 | [diff] [blame] | 3537 | /** |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 3538 | * dwc2_hsotg_pullup - connect/disconnect the USB PHY |
Lukasz Majewski | a188b68 | 2012-06-22 09:29:56 +0200 | [diff] [blame] | 3539 | * @gadget: The usb gadget state |
| 3540 | * @is_on: Current state of the USB PHY |
| 3541 | * |
| 3542 | * Connect/Disconnect the USB PHY pullup |
| 3543 | */ |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 3544 | static int dwc2_hsotg_pullup(struct usb_gadget *gadget, int is_on) |
Lukasz Majewski | a188b68 | 2012-06-22 09:29:56 +0200 | [diff] [blame] | 3545 | { |
Dinh Nguyen | 941fcce | 2014-11-11 11:13:33 -0600 | [diff] [blame] | 3546 | struct dwc2_hsotg *hsotg = to_hsotg(gadget); |
Lukasz Majewski | a188b68 | 2012-06-22 09:29:56 +0200 | [diff] [blame] | 3547 | unsigned long flags = 0; |
| 3548 | |
Gregory Herrero | 77ba911 | 2015-09-29 12:08:19 +0200 | [diff] [blame] | 3549 | dev_dbg(hsotg->dev, "%s: is_on: %d op_state: %d\n", __func__, is_on, |
| 3550 | hsotg->op_state); |
| 3551 | |
| 3552 | /* Don't modify pullup state while in host mode */ |
| 3553 | if (hsotg->op_state != OTG_STATE_B_PERIPHERAL) { |
| 3554 | hsotg->enabled = is_on; |
| 3555 | return 0; |
| 3556 | } |
Lukasz Majewski | a188b68 | 2012-06-22 09:29:56 +0200 | [diff] [blame] | 3557 | |
| 3558 | spin_lock_irqsave(&hsotg->lock, flags); |
| 3559 | if (is_on) { |
Marek Szyprowski | dc6e69e | 2014-11-21 15:14:49 +0100 | [diff] [blame] | 3560 | hsotg->enabled = 1; |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 3561 | dwc2_hsotg_core_init_disconnected(hsotg, false); |
| 3562 | dwc2_hsotg_core_connect(hsotg); |
Lukasz Majewski | a188b68 | 2012-06-22 09:29:56 +0200 | [diff] [blame] | 3563 | } else { |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 3564 | dwc2_hsotg_core_disconnect(hsotg); |
| 3565 | dwc2_hsotg_disconnect(hsotg); |
Marek Szyprowski | dc6e69e | 2014-11-21 15:14:49 +0100 | [diff] [blame] | 3566 | hsotg->enabled = 0; |
Lukasz Majewski | a188b68 | 2012-06-22 09:29:56 +0200 | [diff] [blame] | 3567 | } |
| 3568 | |
| 3569 | hsotg->gadget.speed = USB_SPEED_UNKNOWN; |
| 3570 | spin_unlock_irqrestore(&hsotg->lock, flags); |
| 3571 | |
| 3572 | return 0; |
| 3573 | } |
| 3574 | |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 3575 | static int dwc2_hsotg_vbus_session(struct usb_gadget *gadget, int is_active) |
Gregory Herrero | 83d9822 | 2015-01-09 13:39:02 +0100 | [diff] [blame] | 3576 | { |
| 3577 | struct dwc2_hsotg *hsotg = to_hsotg(gadget); |
| 3578 | unsigned long flags; |
| 3579 | |
| 3580 | dev_dbg(hsotg->dev, "%s: is_active: %d\n", __func__, is_active); |
| 3581 | spin_lock_irqsave(&hsotg->lock, flags); |
| 3582 | |
Gregory Herrero | 61f7223 | 2015-09-29 12:08:28 +0200 | [diff] [blame] | 3583 | /* |
| 3584 | * If controller is hibernated, it must exit from hibernation |
| 3585 | * before being initialized / de-initialized |
| 3586 | */ |
| 3587 | if (hsotg->lx_state == DWC2_L2) |
| 3588 | dwc2_exit_hibernation(hsotg, false); |
| 3589 | |
Gregory Herrero | 83d9822 | 2015-01-09 13:39:02 +0100 | [diff] [blame] | 3590 | if (is_active) { |
Gregory Herrero | cd0e641 | 2015-09-29 12:08:20 +0200 | [diff] [blame] | 3591 | hsotg->op_state = OTG_STATE_B_PERIPHERAL; |
Gregory Herrero | 065d393 | 2015-09-22 15:16:54 +0200 | [diff] [blame] | 3592 | |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 3593 | dwc2_hsotg_core_init_disconnected(hsotg, false); |
Gregory Herrero | 83d9822 | 2015-01-09 13:39:02 +0100 | [diff] [blame] | 3594 | if (hsotg->enabled) |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 3595 | dwc2_hsotg_core_connect(hsotg); |
Gregory Herrero | 83d9822 | 2015-01-09 13:39:02 +0100 | [diff] [blame] | 3596 | } else { |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 3597 | dwc2_hsotg_core_disconnect(hsotg); |
| 3598 | dwc2_hsotg_disconnect(hsotg); |
Gregory Herrero | 83d9822 | 2015-01-09 13:39:02 +0100 | [diff] [blame] | 3599 | } |
| 3600 | |
| 3601 | spin_unlock_irqrestore(&hsotg->lock, flags); |
| 3602 | return 0; |
| 3603 | } |
| 3604 | |
Gregory Herrero | 596d696 | 2015-01-09 13:39:08 +0100 | [diff] [blame] | 3605 | /** |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 3606 | * dwc2_hsotg_vbus_draw - report bMaxPower field |
Gregory Herrero | 596d696 | 2015-01-09 13:39:08 +0100 | [diff] [blame] | 3607 | * @gadget: The usb gadget state |
| 3608 | * @mA: Amount of current |
| 3609 | * |
| 3610 | * Report how much power the device may consume to the phy. |
| 3611 | */ |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 3612 | static int dwc2_hsotg_vbus_draw(struct usb_gadget *gadget, unsigned mA) |
Gregory Herrero | 596d696 | 2015-01-09 13:39:08 +0100 | [diff] [blame] | 3613 | { |
| 3614 | struct dwc2_hsotg *hsotg = to_hsotg(gadget); |
| 3615 | |
| 3616 | if (IS_ERR_OR_NULL(hsotg->uphy)) |
| 3617 | return -ENOTSUPP; |
| 3618 | return usb_phy_set_power(hsotg->uphy, mA); |
| 3619 | } |
| 3620 | |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 3621 | static const struct usb_gadget_ops dwc2_hsotg_gadget_ops = { |
| 3622 | .get_frame = dwc2_hsotg_gadget_getframe, |
| 3623 | .udc_start = dwc2_hsotg_udc_start, |
| 3624 | .udc_stop = dwc2_hsotg_udc_stop, |
| 3625 | .pullup = dwc2_hsotg_pullup, |
| 3626 | .vbus_session = dwc2_hsotg_vbus_session, |
| 3627 | .vbus_draw = dwc2_hsotg_vbus_draw, |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3628 | }; |
| 3629 | |
| 3630 | /** |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 3631 | * dwc2_hsotg_initep - initialise a single endpoint |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3632 | * @hsotg: The device state. |
| 3633 | * @hs_ep: The endpoint to be initialised. |
| 3634 | * @epnum: The endpoint number |
| 3635 | * |
| 3636 | * Initialise the given endpoint (as part of the probe and device state |
| 3637 | * creation) to give to the gadget driver. Setup the endpoint name, any |
| 3638 | * direction information and other state that may be required. |
| 3639 | */ |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 3640 | static void dwc2_hsotg_initep(struct dwc2_hsotg *hsotg, |
| 3641 | struct dwc2_hsotg_ep *hs_ep, |
Mian Yousaf Kaukab | c6f5c05 | 2015-01-09 13:38:50 +0100 | [diff] [blame] | 3642 | int epnum, |
| 3643 | bool dir_in) |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3644 | { |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3645 | char *dir; |
| 3646 | |
| 3647 | if (epnum == 0) |
| 3648 | dir = ""; |
Mian Yousaf Kaukab | c6f5c05 | 2015-01-09 13:38:50 +0100 | [diff] [blame] | 3649 | else if (dir_in) |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3650 | dir = "in"; |
Mian Yousaf Kaukab | c6f5c05 | 2015-01-09 13:38:50 +0100 | [diff] [blame] | 3651 | else |
| 3652 | dir = "out"; |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3653 | |
Mian Yousaf Kaukab | c6f5c05 | 2015-01-09 13:38:50 +0100 | [diff] [blame] | 3654 | hs_ep->dir_in = dir_in; |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3655 | hs_ep->index = epnum; |
| 3656 | |
| 3657 | snprintf(hs_ep->name, sizeof(hs_ep->name), "ep%d%s", epnum, dir); |
| 3658 | |
| 3659 | INIT_LIST_HEAD(&hs_ep->queue); |
| 3660 | INIT_LIST_HEAD(&hs_ep->ep.ep_list); |
| 3661 | |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3662 | /* add to the list of endpoints known by the gadget driver */ |
| 3663 | if (epnum) |
| 3664 | list_add_tail(&hs_ep->ep.ep_list, &hsotg->gadget.ep_list); |
| 3665 | |
| 3666 | hs_ep->parent = hsotg; |
| 3667 | hs_ep->ep.name = hs_ep->name; |
Robert Baldyga | e117e74 | 2013-12-13 12:23:38 +0100 | [diff] [blame] | 3668 | usb_ep_set_maxpacket_limit(&hs_ep->ep, epnum ? 1024 : EP0_MPS_LIMIT); |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 3669 | hs_ep->ep.ops = &dwc2_hsotg_ep_ops; |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3670 | |
Robert Baldyga | 2954522 | 2015-07-31 16:00:18 +0200 | [diff] [blame] | 3671 | if (epnum == 0) { |
| 3672 | hs_ep->ep.caps.type_control = true; |
| 3673 | } else { |
| 3674 | hs_ep->ep.caps.type_iso = true; |
| 3675 | hs_ep->ep.caps.type_bulk = true; |
| 3676 | hs_ep->ep.caps.type_int = true; |
| 3677 | } |
| 3678 | |
| 3679 | if (dir_in) |
| 3680 | hs_ep->ep.caps.dir_in = true; |
| 3681 | else |
| 3682 | hs_ep->ep.caps.dir_out = true; |
| 3683 | |
Lukasz Majewski | 8b9bc46 | 2012-05-04 14:17:11 +0200 | [diff] [blame] | 3684 | /* |
Lukasz Majewski | 8b9bc46 | 2012-05-04 14:17:11 +0200 | [diff] [blame] | 3685 | * if we're using dma, we need to set the next-endpoint pointer |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3686 | * to be something valid. |
| 3687 | */ |
| 3688 | |
| 3689 | if (using_dma(hsotg)) { |
Dinh Nguyen | 47a1685 | 2014-04-14 14:13:34 -0700 | [diff] [blame] | 3690 | u32 next = DXEPCTL_NEXTEP((epnum + 1) % 15); |
Mian Yousaf Kaukab | c6f5c05 | 2015-01-09 13:38:50 +0100 | [diff] [blame] | 3691 | if (dir_in) |
Antti Seppälä | 95c8bc3 | 2015-08-20 21:41:07 +0300 | [diff] [blame] | 3692 | dwc2_writel(next, hsotg->regs + DIEPCTL(epnum)); |
Mian Yousaf Kaukab | c6f5c05 | 2015-01-09 13:38:50 +0100 | [diff] [blame] | 3693 | else |
Antti Seppälä | 95c8bc3 | 2015-08-20 21:41:07 +0300 | [diff] [blame] | 3694 | dwc2_writel(next, hsotg->regs + DOEPCTL(epnum)); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3695 | } |
| 3696 | } |
| 3697 | |
Lukasz Majewski | b3f489b | 2012-05-04 14:17:09 +0200 | [diff] [blame] | 3698 | /** |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 3699 | * dwc2_hsotg_hw_cfg - read HW configuration registers |
Lukasz Majewski | b3f489b | 2012-05-04 14:17:09 +0200 | [diff] [blame] | 3700 | * @param: The device state |
| 3701 | * |
| 3702 | * Read the USB core HW configuration registers |
| 3703 | */ |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 3704 | static int dwc2_hsotg_hw_cfg(struct dwc2_hsotg *hsotg) |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3705 | { |
Mian Yousaf Kaukab | c6f5c05 | 2015-01-09 13:38:50 +0100 | [diff] [blame] | 3706 | u32 cfg; |
| 3707 | u32 ep_type; |
| 3708 | u32 i; |
| 3709 | |
Ben Dooks | 10aebc7 | 2010-07-19 09:40:44 +0100 | [diff] [blame] | 3710 | /* check hardware configuration */ |
| 3711 | |
John Youn | 43e9034 | 2015-12-17 11:17:45 -0800 | [diff] [blame] | 3712 | hsotg->num_of_eps = hsotg->hw_params.num_dev_ep; |
| 3713 | |
Mian Yousaf Kaukab | c6f5c05 | 2015-01-09 13:38:50 +0100 | [diff] [blame] | 3714 | /* Add ep0 */ |
| 3715 | hsotg->num_of_eps++; |
Lukasz Majewski | b3f489b | 2012-05-04 14:17:09 +0200 | [diff] [blame] | 3716 | |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 3717 | hsotg->eps_in[0] = devm_kzalloc(hsotg->dev, sizeof(struct dwc2_hsotg_ep), |
Mian Yousaf Kaukab | c6f5c05 | 2015-01-09 13:38:50 +0100 | [diff] [blame] | 3718 | GFP_KERNEL); |
| 3719 | if (!hsotg->eps_in[0]) |
| 3720 | return -ENOMEM; |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 3721 | /* Same dwc2_hsotg_ep is used in both directions for ep0 */ |
Mian Yousaf Kaukab | c6f5c05 | 2015-01-09 13:38:50 +0100 | [diff] [blame] | 3722 | hsotg->eps_out[0] = hsotg->eps_in[0]; |
Lukasz Majewski | b3f489b | 2012-05-04 14:17:09 +0200 | [diff] [blame] | 3723 | |
John Youn | 43e9034 | 2015-12-17 11:17:45 -0800 | [diff] [blame] | 3724 | cfg = hsotg->hw_params.dev_ep_dirs; |
Roshan Pius | 251a17f | 2015-02-02 14:55:38 -0800 | [diff] [blame] | 3725 | for (i = 1, cfg >>= 2; i < hsotg->num_of_eps; i++, cfg >>= 2) { |
Mian Yousaf Kaukab | c6f5c05 | 2015-01-09 13:38:50 +0100 | [diff] [blame] | 3726 | ep_type = cfg & 3; |
| 3727 | /* Direction in or both */ |
| 3728 | if (!(ep_type & 2)) { |
| 3729 | hsotg->eps_in[i] = devm_kzalloc(hsotg->dev, |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 3730 | sizeof(struct dwc2_hsotg_ep), GFP_KERNEL); |
Mian Yousaf Kaukab | c6f5c05 | 2015-01-09 13:38:50 +0100 | [diff] [blame] | 3731 | if (!hsotg->eps_in[i]) |
| 3732 | return -ENOMEM; |
| 3733 | } |
| 3734 | /* Direction out or both */ |
| 3735 | if (!(ep_type & 1)) { |
| 3736 | hsotg->eps_out[i] = devm_kzalloc(hsotg->dev, |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 3737 | sizeof(struct dwc2_hsotg_ep), GFP_KERNEL); |
Mian Yousaf Kaukab | c6f5c05 | 2015-01-09 13:38:50 +0100 | [diff] [blame] | 3738 | if (!hsotg->eps_out[i]) |
| 3739 | return -ENOMEM; |
| 3740 | } |
| 3741 | } |
| 3742 | |
John Youn | 43e9034 | 2015-12-17 11:17:45 -0800 | [diff] [blame] | 3743 | hsotg->fifo_mem = hsotg->hw_params.total_fifo_size; |
| 3744 | hsotg->dedicated_fifos = hsotg->hw_params.en_multiple_tx_fifo; |
Ben Dooks | 10aebc7 | 2010-07-19 09:40:44 +0100 | [diff] [blame] | 3745 | |
Marek Szyprowski | cff9eb7 | 2014-09-09 10:44:55 +0200 | [diff] [blame] | 3746 | dev_info(hsotg->dev, "EPs: %d, %s fifos, %d entries in SPRAM\n", |
| 3747 | hsotg->num_of_eps, |
| 3748 | hsotg->dedicated_fifos ? "dedicated" : "shared", |
| 3749 | hsotg->fifo_mem); |
Mian Yousaf Kaukab | c6f5c05 | 2015-01-09 13:38:50 +0100 | [diff] [blame] | 3750 | return 0; |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3751 | } |
| 3752 | |
Lukasz Majewski | 8b9bc46 | 2012-05-04 14:17:11 +0200 | [diff] [blame] | 3753 | /** |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 3754 | * dwc2_hsotg_dump - dump state of the udc |
Lukasz Majewski | 8b9bc46 | 2012-05-04 14:17:11 +0200 | [diff] [blame] | 3755 | * @param: The device state |
| 3756 | */ |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 3757 | static void dwc2_hsotg_dump(struct dwc2_hsotg *hsotg) |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3758 | { |
Mark Brown | 83a0180 | 2011-06-01 17:16:15 +0100 | [diff] [blame] | 3759 | #ifdef DEBUG |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3760 | struct device *dev = hsotg->dev; |
| 3761 | void __iomem *regs = hsotg->regs; |
| 3762 | u32 val; |
| 3763 | int idx; |
| 3764 | |
| 3765 | dev_info(dev, "DCFG=0x%08x, DCTL=0x%08x, DIEPMSK=%08x\n", |
Antti Seppälä | 95c8bc3 | 2015-08-20 21:41:07 +0300 | [diff] [blame] | 3766 | dwc2_readl(regs + DCFG), dwc2_readl(regs + DCTL), |
| 3767 | dwc2_readl(regs + DIEPMSK)); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3768 | |
Mian Yousaf Kaukab | f889f23 | 2015-01-30 09:09:36 +0100 | [diff] [blame] | 3769 | dev_info(dev, "GAHBCFG=0x%08x, GHWCFG1=0x%08x\n", |
Antti Seppälä | 95c8bc3 | 2015-08-20 21:41:07 +0300 | [diff] [blame] | 3770 | dwc2_readl(regs + GAHBCFG), dwc2_readl(regs + GHWCFG1)); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3771 | |
| 3772 | dev_info(dev, "GRXFSIZ=0x%08x, GNPTXFSIZ=0x%08x\n", |
Antti Seppälä | 95c8bc3 | 2015-08-20 21:41:07 +0300 | [diff] [blame] | 3773 | dwc2_readl(regs + GRXFSIZ), dwc2_readl(regs + GNPTXFSIZ)); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3774 | |
| 3775 | /* show periodic fifo settings */ |
| 3776 | |
Mian Yousaf Kaukab | 364f8e9 | 2015-01-09 13:38:55 +0100 | [diff] [blame] | 3777 | for (idx = 1; idx < hsotg->num_of_eps; idx++) { |
Antti Seppälä | 95c8bc3 | 2015-08-20 21:41:07 +0300 | [diff] [blame] | 3778 | val = dwc2_readl(regs + DPTXFSIZN(idx)); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3779 | dev_info(dev, "DPTx[%d] FSize=%d, StAddr=0x%08x\n", idx, |
Dinh Nguyen | 47a1685 | 2014-04-14 14:13:34 -0700 | [diff] [blame] | 3780 | val >> FIFOSIZE_DEPTH_SHIFT, |
| 3781 | val & FIFOSIZE_STARTADDR_MASK); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3782 | } |
| 3783 | |
Mian Yousaf Kaukab | 364f8e9 | 2015-01-09 13:38:55 +0100 | [diff] [blame] | 3784 | for (idx = 0; idx < hsotg->num_of_eps; idx++) { |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3785 | dev_info(dev, |
| 3786 | "ep%d-in: EPCTL=0x%08x, SIZ=0x%08x, DMA=0x%08x\n", idx, |
Antti Seppälä | 95c8bc3 | 2015-08-20 21:41:07 +0300 | [diff] [blame] | 3787 | dwc2_readl(regs + DIEPCTL(idx)), |
| 3788 | dwc2_readl(regs + DIEPTSIZ(idx)), |
| 3789 | dwc2_readl(regs + DIEPDMA(idx))); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3790 | |
Antti Seppälä | 95c8bc3 | 2015-08-20 21:41:07 +0300 | [diff] [blame] | 3791 | val = dwc2_readl(regs + DOEPCTL(idx)); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3792 | dev_info(dev, |
| 3793 | "ep%d-out: EPCTL=0x%08x, SIZ=0x%08x, DMA=0x%08x\n", |
Antti Seppälä | 95c8bc3 | 2015-08-20 21:41:07 +0300 | [diff] [blame] | 3794 | idx, dwc2_readl(regs + DOEPCTL(idx)), |
| 3795 | dwc2_readl(regs + DOEPTSIZ(idx)), |
| 3796 | dwc2_readl(regs + DOEPDMA(idx))); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3797 | |
| 3798 | } |
| 3799 | |
| 3800 | dev_info(dev, "DVBUSDIS=0x%08x, DVBUSPULSE=%08x\n", |
Antti Seppälä | 95c8bc3 | 2015-08-20 21:41:07 +0300 | [diff] [blame] | 3801 | dwc2_readl(regs + DVBUSDIS), dwc2_readl(regs + DVBUSPULSE)); |
Mark Brown | 83a0180 | 2011-06-01 17:16:15 +0100 | [diff] [blame] | 3802 | #endif |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3803 | } |
| 3804 | |
Gregory Herrero | edd74be | 2015-01-09 13:38:48 +0100 | [diff] [blame] | 3805 | #ifdef CONFIG_OF |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 3806 | static void dwc2_hsotg_of_probe(struct dwc2_hsotg *hsotg) |
Gregory Herrero | edd74be | 2015-01-09 13:38:48 +0100 | [diff] [blame] | 3807 | { |
| 3808 | struct device_node *np = hsotg->dev->of_node; |
John Youn | 3fa9538 | 2016-10-17 17:36:25 -0700 | [diff] [blame] | 3809 | u32 len = 0; |
| 3810 | u32 i = 0; |
Gregory Herrero | edd74be | 2015-01-09 13:38:48 +0100 | [diff] [blame] | 3811 | |
| 3812 | /* Enable dma if requested in device tree */ |
| 3813 | hsotg->g_using_dma = of_property_read_bool(np, "g-use-dma"); |
Gregory Herrero | 0a17627 | 2015-01-09 13:38:52 +0100 | [diff] [blame] | 3814 | |
John Youn | 3fa9538 | 2016-10-17 17:36:25 -0700 | [diff] [blame] | 3815 | /* |
| 3816 | * Register TX periodic fifo size per endpoint. |
| 3817 | * EP0 is excluded since it has no fifo configuration. |
| 3818 | */ |
| 3819 | if (!of_find_property(np, "g-tx-fifo-size", &len)) |
| 3820 | goto rx_fifo; |
| 3821 | |
| 3822 | len /= sizeof(u32); |
| 3823 | |
| 3824 | /* Read tx fifo sizes other than ep0 */ |
| 3825 | if (of_property_read_u32_array(np, "g-tx-fifo-size", |
| 3826 | &hsotg->g_tx_fifo_sz[1], len)) |
| 3827 | goto rx_fifo; |
| 3828 | |
| 3829 | /* Add ep0 */ |
| 3830 | len++; |
| 3831 | |
| 3832 | /* Make remaining TX fifos unavailable */ |
| 3833 | if (len < MAX_EPS_CHANNELS) { |
| 3834 | for (i = len; i < MAX_EPS_CHANNELS; i++) |
| 3835 | hsotg->g_tx_fifo_sz[i] = 0; |
| 3836 | } |
| 3837 | |
| 3838 | rx_fifo: |
Gregory Herrero | 0a17627 | 2015-01-09 13:38:52 +0100 | [diff] [blame] | 3839 | /* Register RX fifo size */ |
| 3840 | of_property_read_u32(np, "g-rx-fifo-size", &hsotg->g_rx_fifo_sz); |
| 3841 | |
| 3842 | /* Register NPTX fifo size */ |
| 3843 | of_property_read_u32(np, "g-np-tx-fifo-size", |
| 3844 | &hsotg->g_np_g_tx_fifo_sz); |
Gregory Herrero | edd74be | 2015-01-09 13:38:48 +0100 | [diff] [blame] | 3845 | } |
| 3846 | #else |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 3847 | static inline void dwc2_hsotg_of_probe(struct dwc2_hsotg *hsotg) { } |
Gregory Herrero | edd74be | 2015-01-09 13:38:48 +0100 | [diff] [blame] | 3848 | #endif |
| 3849 | |
Lukasz Majewski | 8b9bc46 | 2012-05-04 14:17:11 +0200 | [diff] [blame] | 3850 | /** |
Dinh Nguyen | 117777b | 2014-11-11 11:13:34 -0600 | [diff] [blame] | 3851 | * dwc2_gadget_init - init function for gadget |
| 3852 | * @dwc2: The data structure for the DWC2 driver. |
| 3853 | * @irq: The IRQ number for the controller. |
Lukasz Majewski | 8b9bc46 | 2012-05-04 14:17:11 +0200 | [diff] [blame] | 3854 | */ |
Dinh Nguyen | 117777b | 2014-11-11 11:13:34 -0600 | [diff] [blame] | 3855 | int dwc2_gadget_init(struct dwc2_hsotg *hsotg, int irq) |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3856 | { |
Dinh Nguyen | 117777b | 2014-11-11 11:13:34 -0600 | [diff] [blame] | 3857 | struct device *dev = hsotg->dev; |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3858 | int epnum; |
| 3859 | int ret; |
John Youn | 3fa9538 | 2016-10-17 17:36:25 -0700 | [diff] [blame] | 3860 | int i; |
| 3861 | u32 p_tx_fifo[] = DWC2_G_P_LEGACY_TX_FIFO_SIZE; |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3862 | |
Gregory Herrero | 0a17627 | 2015-01-09 13:38:52 +0100 | [diff] [blame] | 3863 | /* Initialize to legacy fifo configuration values */ |
| 3864 | hsotg->g_rx_fifo_sz = 2048; |
| 3865 | hsotg->g_np_g_tx_fifo_sz = 1024; |
John Youn | 3fa9538 | 2016-10-17 17:36:25 -0700 | [diff] [blame] | 3866 | memcpy(&hsotg->g_tx_fifo_sz[1], p_tx_fifo, sizeof(p_tx_fifo)); |
Gregory Herrero | 0a17627 | 2015-01-09 13:38:52 +0100 | [diff] [blame] | 3867 | /* Device tree specific probe */ |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 3868 | dwc2_hsotg_of_probe(hsotg); |
John Youn | 43e9034 | 2015-12-17 11:17:45 -0800 | [diff] [blame] | 3869 | |
| 3870 | /* Check against largest possible value. */ |
| 3871 | if (hsotg->g_np_g_tx_fifo_sz > |
| 3872 | hsotg->hw_params.dev_nperio_tx_fifo_size) { |
| 3873 | dev_warn(dev, "Specified GNPTXFDEP=%d > %d\n", |
| 3874 | hsotg->g_np_g_tx_fifo_sz, |
| 3875 | hsotg->hw_params.dev_nperio_tx_fifo_size); |
| 3876 | hsotg->g_np_g_tx_fifo_sz = |
| 3877 | hsotg->hw_params.dev_nperio_tx_fifo_size; |
| 3878 | } |
| 3879 | |
Gregory Herrero | 0a17627 | 2015-01-09 13:38:52 +0100 | [diff] [blame] | 3880 | /* Dump fifo information */ |
| 3881 | dev_dbg(dev, "NonPeriodic TXFIFO size: %d\n", |
| 3882 | hsotg->g_np_g_tx_fifo_sz); |
| 3883 | dev_dbg(dev, "RXFIFO size: %d\n", hsotg->g_rx_fifo_sz); |
John Youn | 3fa9538 | 2016-10-17 17:36:25 -0700 | [diff] [blame] | 3884 | for (i = 0; i < MAX_EPS_CHANNELS; i++) |
| 3885 | dev_dbg(dev, "Periodic TXFIFO%2d size: %d\n", i, |
| 3886 | hsotg->g_tx_fifo_sz[i]); |
Marek Szyprowski | 31ee04d | 2010-07-19 16:01:42 +0200 | [diff] [blame] | 3887 | |
Michal Nazarewicz | d327ab5 | 2011-11-19 18:27:37 +0100 | [diff] [blame] | 3888 | hsotg->gadget.max_speed = USB_SPEED_HIGH; |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 3889 | hsotg->gadget.ops = &dwc2_hsotg_gadget_ops; |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3890 | hsotg->gadget.name = dev_name(dev); |
Gregory Herrero | 097ee66 | 2015-04-29 22:09:10 +0200 | [diff] [blame] | 3891 | if (hsotg->dr_mode == USB_DR_MODE_OTG) |
| 3892 | hsotg->gadget.is_otg = 1; |
Mian Yousaf Kaukab | ec4cc65 | 2015-09-22 15:16:55 +0200 | [diff] [blame] | 3893 | else if (hsotg->dr_mode == USB_DR_MODE_PERIPHERAL) |
| 3894 | hsotg->op_state = OTG_STATE_B_PERIPHERAL; |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3895 | |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 3896 | ret = dwc2_hsotg_hw_cfg(hsotg); |
Mian Yousaf Kaukab | c6f5c05 | 2015-01-09 13:38:50 +0100 | [diff] [blame] | 3897 | if (ret) { |
| 3898 | dev_err(hsotg->dev, "Hardware configuration failed: %d\n", ret); |
Marek Szyprowski | 09a75e8 | 2015-10-14 08:52:29 +0200 | [diff] [blame] | 3899 | return ret; |
Mian Yousaf Kaukab | c6f5c05 | 2015-01-09 13:38:50 +0100 | [diff] [blame] | 3900 | } |
| 3901 | |
Mian Yousaf Kaukab | 3f95001 | 2015-01-09 13:38:44 +0100 | [diff] [blame] | 3902 | hsotg->ctrl_buff = devm_kzalloc(hsotg->dev, |
| 3903 | DWC2_CTRL_BUFF_SIZE, GFP_KERNEL); |
Wolfram Sang | 8bae0f8 | 2016-08-25 19:39:02 +0200 | [diff] [blame] | 3904 | if (!hsotg->ctrl_buff) |
Marek Szyprowski | 09a75e8 | 2015-10-14 08:52:29 +0200 | [diff] [blame] | 3905 | return -ENOMEM; |
Mian Yousaf Kaukab | 3f95001 | 2015-01-09 13:38:44 +0100 | [diff] [blame] | 3906 | |
| 3907 | hsotg->ep0_buff = devm_kzalloc(hsotg->dev, |
| 3908 | DWC2_CTRL_BUFF_SIZE, GFP_KERNEL); |
Wolfram Sang | 8bae0f8 | 2016-08-25 19:39:02 +0200 | [diff] [blame] | 3909 | if (!hsotg->ep0_buff) |
Marek Szyprowski | 09a75e8 | 2015-10-14 08:52:29 +0200 | [diff] [blame] | 3910 | return -ENOMEM; |
Mian Yousaf Kaukab | 3f95001 | 2015-01-09 13:38:44 +0100 | [diff] [blame] | 3911 | |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 3912 | ret = devm_request_irq(hsotg->dev, irq, dwc2_hsotg_irq, IRQF_SHARED, |
Dinh Nguyen | db8178c | 2014-11-11 11:13:37 -0600 | [diff] [blame] | 3913 | dev_name(hsotg->dev), hsotg); |
Marek Szyprowski | eb3c56c | 2014-09-09 10:44:12 +0200 | [diff] [blame] | 3914 | if (ret < 0) { |
Dinh Nguyen | db8178c | 2014-11-11 11:13:37 -0600 | [diff] [blame] | 3915 | dev_err(dev, "cannot claim IRQ for gadget\n"); |
Marek Szyprowski | 09a75e8 | 2015-10-14 08:52:29 +0200 | [diff] [blame] | 3916 | return ret; |
Marek Szyprowski | eb3c56c | 2014-09-09 10:44:12 +0200 | [diff] [blame] | 3917 | } |
| 3918 | |
Lukasz Majewski | b3f489b | 2012-05-04 14:17:09 +0200 | [diff] [blame] | 3919 | /* hsotg->num_of_eps holds number of EPs other than ep0 */ |
| 3920 | |
| 3921 | if (hsotg->num_of_eps == 0) { |
| 3922 | dev_err(dev, "wrong number of EPs (zero)\n"); |
Marek Szyprowski | 09a75e8 | 2015-10-14 08:52:29 +0200 | [diff] [blame] | 3923 | return -EINVAL; |
Lukasz Majewski | b3f489b | 2012-05-04 14:17:09 +0200 | [diff] [blame] | 3924 | } |
| 3925 | |
Lukasz Majewski | b3f489b | 2012-05-04 14:17:09 +0200 | [diff] [blame] | 3926 | /* setup endpoint information */ |
| 3927 | |
| 3928 | INIT_LIST_HEAD(&hsotg->gadget.ep_list); |
Mian Yousaf Kaukab | c6f5c05 | 2015-01-09 13:38:50 +0100 | [diff] [blame] | 3929 | hsotg->gadget.ep0 = &hsotg->eps_out[0]->ep; |
Lukasz Majewski | b3f489b | 2012-05-04 14:17:09 +0200 | [diff] [blame] | 3930 | |
| 3931 | /* allocate EP0 request */ |
| 3932 | |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 3933 | hsotg->ctrl_req = dwc2_hsotg_ep_alloc_request(&hsotg->eps_out[0]->ep, |
Lukasz Majewski | b3f489b | 2012-05-04 14:17:09 +0200 | [diff] [blame] | 3934 | GFP_KERNEL); |
| 3935 | if (!hsotg->ctrl_req) { |
| 3936 | dev_err(dev, "failed to allocate ctrl req\n"); |
Marek Szyprowski | 09a75e8 | 2015-10-14 08:52:29 +0200 | [diff] [blame] | 3937 | return -ENOMEM; |
Lukasz Majewski | b3f489b | 2012-05-04 14:17:09 +0200 | [diff] [blame] | 3938 | } |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3939 | |
| 3940 | /* initialise the endpoints now the core has been initialised */ |
Mian Yousaf Kaukab | c6f5c05 | 2015-01-09 13:38:50 +0100 | [diff] [blame] | 3941 | for (epnum = 0; epnum < hsotg->num_of_eps; epnum++) { |
| 3942 | if (hsotg->eps_in[epnum]) |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 3943 | dwc2_hsotg_initep(hsotg, hsotg->eps_in[epnum], |
Mian Yousaf Kaukab | c6f5c05 | 2015-01-09 13:38:50 +0100 | [diff] [blame] | 3944 | epnum, 1); |
| 3945 | if (hsotg->eps_out[epnum]) |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 3946 | dwc2_hsotg_initep(hsotg, hsotg->eps_out[epnum], |
Mian Yousaf Kaukab | c6f5c05 | 2015-01-09 13:38:50 +0100 | [diff] [blame] | 3947 | epnum, 0); |
| 3948 | } |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3949 | |
Dinh Nguyen | 117777b | 2014-11-11 11:13:34 -0600 | [diff] [blame] | 3950 | ret = usb_add_gadget_udc(dev, &hsotg->gadget); |
Sebastian Andrzej Siewior | 0f91349 | 2011-06-28 16:33:47 +0300 | [diff] [blame] | 3951 | if (ret) |
Marek Szyprowski | 09a75e8 | 2015-10-14 08:52:29 +0200 | [diff] [blame] | 3952 | return ret; |
Sebastian Andrzej Siewior | 0f91349 | 2011-06-28 16:33:47 +0300 | [diff] [blame] | 3953 | |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 3954 | dwc2_hsotg_dump(hsotg); |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3955 | |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3956 | return 0; |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3957 | } |
| 3958 | |
Lukasz Majewski | 8b9bc46 | 2012-05-04 14:17:11 +0200 | [diff] [blame] | 3959 | /** |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 3960 | * dwc2_hsotg_remove - remove function for hsotg driver |
Lukasz Majewski | 8b9bc46 | 2012-05-04 14:17:11 +0200 | [diff] [blame] | 3961 | * @pdev: The platform information for the driver |
| 3962 | */ |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 3963 | int dwc2_hsotg_remove(struct dwc2_hsotg *hsotg) |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3964 | { |
Sebastian Andrzej Siewior | 0f91349 | 2011-06-28 16:33:47 +0300 | [diff] [blame] | 3965 | usb_del_gadget_udc(&hsotg->gadget); |
Marek Szyprowski | 31ee04d | 2010-07-19 16:01:42 +0200 | [diff] [blame] | 3966 | |
Ben Dooks | 5b7d70c | 2009-06-02 14:58:06 +0100 | [diff] [blame] | 3967 | return 0; |
| 3968 | } |
| 3969 | |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 3970 | int dwc2_hsotg_suspend(struct dwc2_hsotg *hsotg) |
Marek Szyprowski | b83e333 | 2014-02-28 13:06:11 +0100 | [diff] [blame] | 3971 | { |
Marek Szyprowski | b83e333 | 2014-02-28 13:06:11 +0100 | [diff] [blame] | 3972 | unsigned long flags; |
Marek Szyprowski | b83e333 | 2014-02-28 13:06:11 +0100 | [diff] [blame] | 3973 | |
Gregory Herrero | 9e77977 | 2015-04-29 22:09:07 +0200 | [diff] [blame] | 3974 | if (hsotg->lx_state != DWC2_L0) |
Marek Szyprowski | 09a75e8 | 2015-10-14 08:52:29 +0200 | [diff] [blame] | 3975 | return 0; |
Gregory Herrero | 9e77977 | 2015-04-29 22:09:07 +0200 | [diff] [blame] | 3976 | |
Marek Szyprowski | b83e333 | 2014-02-28 13:06:11 +0100 | [diff] [blame] | 3977 | if (hsotg->driver) { |
| 3978 | int ep; |
Marek Szyprowski | dc6e69e | 2014-11-21 15:14:49 +0100 | [diff] [blame] | 3979 | |
Marek Szyprowski | b83e333 | 2014-02-28 13:06:11 +0100 | [diff] [blame] | 3980 | dev_info(hsotg->dev, "suspending usb gadget %s\n", |
| 3981 | hsotg->driver->driver.name); |
| 3982 | |
Marek Szyprowski | dc6e69e | 2014-11-21 15:14:49 +0100 | [diff] [blame] | 3983 | spin_lock_irqsave(&hsotg->lock, flags); |
| 3984 | if (hsotg->enabled) |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 3985 | dwc2_hsotg_core_disconnect(hsotg); |
| 3986 | dwc2_hsotg_disconnect(hsotg); |
Marek Szyprowski | dc6e69e | 2014-11-21 15:14:49 +0100 | [diff] [blame] | 3987 | hsotg->gadget.speed = USB_SPEED_UNKNOWN; |
| 3988 | spin_unlock_irqrestore(&hsotg->lock, flags); |
Marek Szyprowski | b83e333 | 2014-02-28 13:06:11 +0100 | [diff] [blame] | 3989 | |
Mian Yousaf Kaukab | c6f5c05 | 2015-01-09 13:38:50 +0100 | [diff] [blame] | 3990 | for (ep = 0; ep < hsotg->num_of_eps; ep++) { |
| 3991 | if (hsotg->eps_in[ep]) |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 3992 | dwc2_hsotg_ep_disable(&hsotg->eps_in[ep]->ep); |
Mian Yousaf Kaukab | c6f5c05 | 2015-01-09 13:38:50 +0100 | [diff] [blame] | 3993 | if (hsotg->eps_out[ep]) |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 3994 | dwc2_hsotg_ep_disable(&hsotg->eps_out[ep]->ep); |
Mian Yousaf Kaukab | c6f5c05 | 2015-01-09 13:38:50 +0100 | [diff] [blame] | 3995 | } |
Marek Szyprowski | b83e333 | 2014-02-28 13:06:11 +0100 | [diff] [blame] | 3996 | } |
| 3997 | |
Marek Szyprowski | 09a75e8 | 2015-10-14 08:52:29 +0200 | [diff] [blame] | 3998 | return 0; |
Marek Szyprowski | b83e333 | 2014-02-28 13:06:11 +0100 | [diff] [blame] | 3999 | } |
| 4000 | |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 4001 | int dwc2_hsotg_resume(struct dwc2_hsotg *hsotg) |
Marek Szyprowski | b83e333 | 2014-02-28 13:06:11 +0100 | [diff] [blame] | 4002 | { |
Marek Szyprowski | b83e333 | 2014-02-28 13:06:11 +0100 | [diff] [blame] | 4003 | unsigned long flags; |
Marek Szyprowski | b83e333 | 2014-02-28 13:06:11 +0100 | [diff] [blame] | 4004 | |
Gregory Herrero | 9e77977 | 2015-04-29 22:09:07 +0200 | [diff] [blame] | 4005 | if (hsotg->lx_state == DWC2_L2) |
Marek Szyprowski | 09a75e8 | 2015-10-14 08:52:29 +0200 | [diff] [blame] | 4006 | return 0; |
Gregory Herrero | 9e77977 | 2015-04-29 22:09:07 +0200 | [diff] [blame] | 4007 | |
Marek Szyprowski | b83e333 | 2014-02-28 13:06:11 +0100 | [diff] [blame] | 4008 | if (hsotg->driver) { |
| 4009 | dev_info(hsotg->dev, "resuming usb gadget %s\n", |
| 4010 | hsotg->driver->driver.name); |
Robert Baldyga | d00b414 | 2014-09-09 10:44:57 +0200 | [diff] [blame] | 4011 | |
Marek Szyprowski | dc6e69e | 2014-11-21 15:14:49 +0100 | [diff] [blame] | 4012 | spin_lock_irqsave(&hsotg->lock, flags); |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 4013 | dwc2_hsotg_core_init_disconnected(hsotg, false); |
Marek Szyprowski | dc6e69e | 2014-11-21 15:14:49 +0100 | [diff] [blame] | 4014 | if (hsotg->enabled) |
Felipe Balbi | 1f91b4c | 2015-08-06 18:11:54 -0500 | [diff] [blame] | 4015 | dwc2_hsotg_core_connect(hsotg); |
Marek Szyprowski | dc6e69e | 2014-11-21 15:14:49 +0100 | [diff] [blame] | 4016 | spin_unlock_irqrestore(&hsotg->lock, flags); |
Marek Szyprowski | b83e333 | 2014-02-28 13:06:11 +0100 | [diff] [blame] | 4017 | } |
Marek Szyprowski | b83e333 | 2014-02-28 13:06:11 +0100 | [diff] [blame] | 4018 | |
Marek Szyprowski | 09a75e8 | 2015-10-14 08:52:29 +0200 | [diff] [blame] | 4019 | return 0; |
Marek Szyprowski | b83e333 | 2014-02-28 13:06:11 +0100 | [diff] [blame] | 4020 | } |
John Youn | 58e52ff6a | 2016-02-23 19:54:57 -0800 | [diff] [blame] | 4021 | |
| 4022 | /** |
| 4023 | * dwc2_backup_device_registers() - Backup controller device registers. |
| 4024 | * When suspending usb bus, registers needs to be backuped |
| 4025 | * if controller power is disabled once suspended. |
| 4026 | * |
| 4027 | * @hsotg: Programming view of the DWC_otg controller |
| 4028 | */ |
| 4029 | int dwc2_backup_device_registers(struct dwc2_hsotg *hsotg) |
| 4030 | { |
| 4031 | struct dwc2_dregs_backup *dr; |
| 4032 | int i; |
| 4033 | |
| 4034 | dev_dbg(hsotg->dev, "%s\n", __func__); |
| 4035 | |
| 4036 | /* Backup dev regs */ |
| 4037 | dr = &hsotg->dr_backup; |
| 4038 | |
| 4039 | dr->dcfg = dwc2_readl(hsotg->regs + DCFG); |
| 4040 | dr->dctl = dwc2_readl(hsotg->regs + DCTL); |
| 4041 | dr->daintmsk = dwc2_readl(hsotg->regs + DAINTMSK); |
| 4042 | dr->diepmsk = dwc2_readl(hsotg->regs + DIEPMSK); |
| 4043 | dr->doepmsk = dwc2_readl(hsotg->regs + DOEPMSK); |
| 4044 | |
| 4045 | for (i = 0; i < hsotg->num_of_eps; i++) { |
| 4046 | /* Backup IN EPs */ |
| 4047 | dr->diepctl[i] = dwc2_readl(hsotg->regs + DIEPCTL(i)); |
| 4048 | |
| 4049 | /* Ensure DATA PID is correctly configured */ |
| 4050 | if (dr->diepctl[i] & DXEPCTL_DPID) |
| 4051 | dr->diepctl[i] |= DXEPCTL_SETD1PID; |
| 4052 | else |
| 4053 | dr->diepctl[i] |= DXEPCTL_SETD0PID; |
| 4054 | |
| 4055 | dr->dieptsiz[i] = dwc2_readl(hsotg->regs + DIEPTSIZ(i)); |
| 4056 | dr->diepdma[i] = dwc2_readl(hsotg->regs + DIEPDMA(i)); |
| 4057 | |
| 4058 | /* Backup OUT EPs */ |
| 4059 | dr->doepctl[i] = dwc2_readl(hsotg->regs + DOEPCTL(i)); |
| 4060 | |
| 4061 | /* Ensure DATA PID is correctly configured */ |
| 4062 | if (dr->doepctl[i] & DXEPCTL_DPID) |
| 4063 | dr->doepctl[i] |= DXEPCTL_SETD1PID; |
| 4064 | else |
| 4065 | dr->doepctl[i] |= DXEPCTL_SETD0PID; |
| 4066 | |
| 4067 | dr->doeptsiz[i] = dwc2_readl(hsotg->regs + DOEPTSIZ(i)); |
| 4068 | dr->doepdma[i] = dwc2_readl(hsotg->regs + DOEPDMA(i)); |
| 4069 | } |
| 4070 | dr->valid = true; |
| 4071 | return 0; |
| 4072 | } |
| 4073 | |
| 4074 | /** |
| 4075 | * dwc2_restore_device_registers() - Restore controller device registers. |
| 4076 | * When resuming usb bus, device registers needs to be restored |
| 4077 | * if controller power were disabled. |
| 4078 | * |
| 4079 | * @hsotg: Programming view of the DWC_otg controller |
| 4080 | */ |
| 4081 | int dwc2_restore_device_registers(struct dwc2_hsotg *hsotg) |
| 4082 | { |
| 4083 | struct dwc2_dregs_backup *dr; |
| 4084 | u32 dctl; |
| 4085 | int i; |
| 4086 | |
| 4087 | dev_dbg(hsotg->dev, "%s\n", __func__); |
| 4088 | |
| 4089 | /* Restore dev regs */ |
| 4090 | dr = &hsotg->dr_backup; |
| 4091 | if (!dr->valid) { |
| 4092 | dev_err(hsotg->dev, "%s: no device registers to restore\n", |
| 4093 | __func__); |
| 4094 | return -EINVAL; |
| 4095 | } |
| 4096 | dr->valid = false; |
| 4097 | |
| 4098 | dwc2_writel(dr->dcfg, hsotg->regs + DCFG); |
| 4099 | dwc2_writel(dr->dctl, hsotg->regs + DCTL); |
| 4100 | dwc2_writel(dr->daintmsk, hsotg->regs + DAINTMSK); |
| 4101 | dwc2_writel(dr->diepmsk, hsotg->regs + DIEPMSK); |
| 4102 | dwc2_writel(dr->doepmsk, hsotg->regs + DOEPMSK); |
| 4103 | |
| 4104 | for (i = 0; i < hsotg->num_of_eps; i++) { |
| 4105 | /* Restore IN EPs */ |
| 4106 | dwc2_writel(dr->diepctl[i], hsotg->regs + DIEPCTL(i)); |
| 4107 | dwc2_writel(dr->dieptsiz[i], hsotg->regs + DIEPTSIZ(i)); |
| 4108 | dwc2_writel(dr->diepdma[i], hsotg->regs + DIEPDMA(i)); |
| 4109 | |
| 4110 | /* Restore OUT EPs */ |
| 4111 | dwc2_writel(dr->doepctl[i], hsotg->regs + DOEPCTL(i)); |
| 4112 | dwc2_writel(dr->doeptsiz[i], hsotg->regs + DOEPTSIZ(i)); |
| 4113 | dwc2_writel(dr->doepdma[i], hsotg->regs + DOEPDMA(i)); |
| 4114 | } |
| 4115 | |
| 4116 | /* Set the Power-On Programming done bit */ |
| 4117 | dctl = dwc2_readl(hsotg->regs + DCTL); |
| 4118 | dctl |= DCTL_PWRONPRGDONE; |
| 4119 | dwc2_writel(dctl, hsotg->regs + DCTL); |
| 4120 | |
| 4121 | return 0; |
| 4122 | } |