Srinivas Ramana | 3cac278 | 2017-09-13 16:31:17 +0530 | [diff] [blame] | 1 | /* |
Maria Yu | f16c160 | 2017-12-22 13:05:17 +0800 | [diff] [blame^] | 2 | * Copyright (c) 2015-2018, The Linux Foundation. All rights reserved. |
Srinivas Ramana | 3cac278 | 2017-09-13 16:31:17 +0530 | [diff] [blame] | 3 | * |
| 4 | * This program is free software; you can redistribute it and/or modify |
| 5 | * it under the terms of the GNU General Public License version 2 and |
| 6 | * only version 2 as published by the Free Software Foundation. |
| 7 | * |
| 8 | * This program is distributed in the hope that it will be useful, |
| 9 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 10 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 11 | * GNU General Public License for more details. |
| 12 | */ |
| 13 | |
| 14 | &soc { |
| 15 | tlmm: pinctrl@1000000 { |
| 16 | compatible = "qcom,msm8953-pinctrl"; |
| 17 | reg = <0x1000000 0x300000>; |
| 18 | interrupts = <0 208 0>; |
| 19 | gpio-controller; |
| 20 | #gpio-cells = <2>; |
| 21 | interrupt-controller; |
| 22 | #interrupt-cells = <2>; |
| 23 | |
| 24 | pmx-uartconsole { |
| 25 | uart_console_active: uart_console_active { |
| 26 | mux { |
| 27 | pins = "gpio4", "gpio5"; |
| 28 | function = "blsp_uart2"; |
| 29 | }; |
| 30 | |
| 31 | config { |
| 32 | pins = "gpio4", "gpio5"; |
| 33 | drive-strength = <2>; |
| 34 | bias-disable; |
| 35 | }; |
| 36 | }; |
| 37 | |
| 38 | uart_console_sleep: uart_console_sleep { |
| 39 | mux { |
| 40 | pins = "gpio4", "gpio5"; |
| 41 | function = "blsp_uart2"; |
| 42 | }; |
| 43 | |
| 44 | config { |
| 45 | pins = "gpio4", "gpio5"; |
| 46 | drive-strength = <2>; |
| 47 | bias-pull-down; |
| 48 | }; |
| 49 | }; |
| 50 | |
Maria Yu | f16c160 | 2017-12-22 13:05:17 +0800 | [diff] [blame^] | 51 | uart1_console_active: uart1_console_active { |
| 52 | mux { |
| 53 | pins = "gpio20", "gpio21"; |
| 54 | function = "blsp_uart6"; |
| 55 | }; |
| 56 | |
| 57 | config { |
| 58 | pins = "gpio20", "gpio21"; |
| 59 | drive-strength = <2>; |
| 60 | bias-disable; |
| 61 | }; |
| 62 | }; |
| 63 | |
| 64 | uart1_console_sleep: uart1_console_sleep { |
| 65 | mux { |
| 66 | pins = "gpio20", "gpio21"; |
| 67 | function = "blsp_uart6"; |
| 68 | }; |
| 69 | |
| 70 | config { |
| 71 | pins = "gpio20", "gpio21"; |
| 72 | drive-strength = <2>; |
| 73 | bias-pull-down; |
| 74 | }; |
| 75 | }; |
Srinivas Ramana | 3cac278 | 2017-09-13 16:31:17 +0530 | [diff] [blame] | 76 | }; |
| 77 | cci { |
| 78 | cci0_active: cci0_active { |
| 79 | /* cci0 active state */ |
| 80 | mux { |
| 81 | /* CLK, DATA */ |
| 82 | pins = "gpio29", "gpio30"; |
| 83 | function = "cci_i2c"; |
| 84 | }; |
| 85 | |
| 86 | config { |
| 87 | pins = "gpio29", "gpio30"; |
| 88 | drive-strength = <2>; /* 2 MA */ |
| 89 | bias-disable; /* No PULL */ |
| 90 | }; |
| 91 | }; |
| 92 | |
| 93 | cci0_suspend: cci0_suspend { |
| 94 | /* cci0 suspended state */ |
| 95 | mux { |
| 96 | /* CLK, DATA */ |
| 97 | pins = "gpio29", "gpio30"; |
| 98 | function = "cci_i2c"; |
| 99 | }; |
| 100 | |
| 101 | config { |
| 102 | pins = "gpio29", "gpio30"; |
| 103 | drive-strength = <2>; /* 2 MA */ |
| 104 | bias-disable; /* No PULL */ |
| 105 | }; |
| 106 | }; |
| 107 | |
| 108 | cci1_active: cci1_active { |
| 109 | /* cci1 active state */ |
| 110 | mux { |
| 111 | /* CLK, DATA */ |
| 112 | pins = "gpio31", "gpio32"; |
| 113 | function = "cci_i2c"; |
| 114 | }; |
| 115 | |
| 116 | config { |
| 117 | pins = "gpio31", "gpio32"; |
| 118 | drive-strength = <2>; /* 2 MA */ |
| 119 | bias-disable; /* No PULL */ |
| 120 | }; |
| 121 | }; |
| 122 | |
| 123 | cci1_suspend: cci1_suspend { |
| 124 | /* cci1 suspended state */ |
| 125 | mux { |
| 126 | /* CLK, DATA */ |
| 127 | pins = "gpio31", "gpio32"; |
| 128 | function = "cci_i2c"; |
| 129 | }; |
| 130 | |
| 131 | config { |
| 132 | pins = "gpio31", "gpio32"; |
| 133 | drive-strength = <2>; /* 2 MA */ |
| 134 | bias-disable; /* No PULL */ |
| 135 | }; |
| 136 | }; |
| 137 | }; |
| 138 | |
| 139 | /*sensors */ |
| 140 | cam_sensor_mclk0_default: cam_sensor_mclk0_default { |
| 141 | /* MCLK0 */ |
| 142 | mux { |
| 143 | /* CLK, DATA */ |
| 144 | pins = "gpio26"; |
| 145 | function = "cam_mclk"; |
| 146 | }; |
| 147 | |
| 148 | config { |
| 149 | pins = "gpio26"; |
| 150 | bias-disable; /* No PULL */ |
| 151 | drive-strength = <2>; /* 2 MA */ |
| 152 | }; |
| 153 | }; |
| 154 | |
| 155 | cam_sensor_mclk0_sleep: cam_sensor_mclk0_sleep { |
| 156 | /* MCLK0 */ |
| 157 | mux { |
| 158 | /* CLK, DATA */ |
| 159 | pins = "gpio26"; |
| 160 | function = "cam_mclk"; |
| 161 | }; |
| 162 | |
| 163 | config { |
| 164 | pins = "gpio26"; |
| 165 | bias-pull-down; /* PULL DOWN */ |
| 166 | drive-strength = <2>; /* 2 MA */ |
| 167 | }; |
| 168 | }; |
| 169 | |
| 170 | cam_sensor_rear_default: cam_sensor_rear_default { |
| 171 | /* RESET, STANDBY */ |
| 172 | mux { |
| 173 | pins = "gpio40", "gpio39"; |
| 174 | function = "gpio"; |
| 175 | }; |
| 176 | |
| 177 | config { |
| 178 | pins = "gpio40","gpio39"; |
| 179 | bias-disable; /* No PULL */ |
| 180 | drive-strength = <2>; /* 2 MA */ |
| 181 | }; |
| 182 | }; |
| 183 | |
| 184 | cam_sensor_rear_sleep: cam_sensor_rear_sleep { |
| 185 | /* RESET, STANDBY */ |
| 186 | mux { |
| 187 | pins = "gpio40","gpio39"; |
| 188 | function = "gpio"; |
| 189 | }; |
| 190 | |
| 191 | config { |
| 192 | pins = "gpio40","gpio39"; |
| 193 | bias-disable; /* No PULL */ |
| 194 | drive-strength = <2>; /* 2 MA */ |
| 195 | }; |
| 196 | }; |
| 197 | |
| 198 | cam_sensor_rear_vana: cam_sensor_rear_vdig { |
| 199 | /* VDIG */ |
| 200 | mux { |
| 201 | pins = "gpio134"; |
| 202 | function = "gpio"; |
| 203 | }; |
| 204 | |
| 205 | config { |
| 206 | pins = "gpio134"; |
| 207 | bias-disable; /* No PULL */ |
| 208 | drive-strength = <2>; /* 2 MA */ |
| 209 | }; |
| 210 | }; |
| 211 | |
| 212 | cam_sensor_rear_vana_sleep: cam_sensor_rear_vdig_sleep { |
| 213 | /* VDIG */ |
| 214 | mux { |
| 215 | pins = "gpio134"; |
| 216 | function = "gpio"; |
| 217 | }; |
| 218 | |
| 219 | config { |
| 220 | pins = "gpio134"; |
| 221 | bias-disable; /* No PULL */ |
| 222 | drive-strength = <2>; /* 2 MA */ |
| 223 | }; |
| 224 | }; |
| 225 | |
| 226 | cam_sensor_mclk1_default: cam_sensor_mclk1_default { |
| 227 | /* MCLK1 */ |
| 228 | mux { |
| 229 | /* CLK, DATA */ |
| 230 | pins = "gpio27"; |
| 231 | function = "cam_mclk"; |
| 232 | }; |
| 233 | |
| 234 | config { |
| 235 | pins = "gpio27"; |
| 236 | bias-disable; /* No PULL */ |
| 237 | drive-strength = <2>; /* 2 MA */ |
| 238 | }; |
| 239 | }; |
| 240 | |
| 241 | cam_sensor_mclk1_sleep: cam_sensor_mclk1_sleep { |
| 242 | /* MCLK1 */ |
| 243 | mux { |
| 244 | /* CLK, DATA */ |
| 245 | pins = "gpio27"; |
| 246 | function = "cam_mclk"; |
| 247 | }; |
| 248 | |
| 249 | config { |
| 250 | pins = "gpio27"; |
| 251 | bias-pull-down; /* PULL DOWN */ |
| 252 | drive-strength = <2>; /* 2 MA */ |
| 253 | }; |
| 254 | }; |
| 255 | |
| 256 | cam_sensor_front_default: cam_sensor_front_default { |
| 257 | /* RESET, STANDBY */ |
| 258 | mux { |
| 259 | pins = "gpio131","gpio132"; |
| 260 | function = "gpio"; |
| 261 | }; |
| 262 | |
| 263 | config { |
| 264 | pins = "gpio131","gpio132"; |
| 265 | bias-disable; /* No PULL */ |
| 266 | drive-strength = <2>; /* 2 MA */ |
| 267 | }; |
| 268 | }; |
| 269 | |
| 270 | cam_sensor_front_sleep: cam_sensor_front_sleep { |
| 271 | /* RESET, STANDBY */ |
| 272 | mux { |
| 273 | pins = "gpio131","gpio132"; |
| 274 | function = "gpio"; |
| 275 | }; |
| 276 | |
| 277 | config { |
| 278 | pins = "gpio131","gpio132"; |
| 279 | bias-disable; /* No PULL */ |
| 280 | drive-strength = <2>; /* 2 MA */ |
| 281 | }; |
| 282 | }; |
| 283 | |
| 284 | cam_sensor_mclk2_default: cam_sensor_mclk2_default { |
| 285 | /* MCLK2 */ |
| 286 | mux { |
| 287 | /* CLK, DATA */ |
| 288 | pins = "gpio28"; |
| 289 | function = "cam_mclk"; |
| 290 | }; |
| 291 | |
| 292 | config { |
| 293 | pins = "gpio28"; |
| 294 | bias-disable; /* No PULL */ |
| 295 | drive-strength = <2>; /* 2 MA */ |
| 296 | }; |
| 297 | }; |
| 298 | |
| 299 | cam_sensor_mclk2_sleep: cam_sensor_mclk2_sleep { |
| 300 | /* MCLK2 */ |
| 301 | mux { |
| 302 | /* CLK, DATA */ |
| 303 | pins = "gpio28"; |
| 304 | function = "cam_mclk"; |
| 305 | }; |
| 306 | |
| 307 | config { |
| 308 | pins = "gpio28"; |
| 309 | bias-pull-down; /* PULL DOWN */ |
| 310 | drive-strength = <2>; /* 2 MA */ |
| 311 | }; |
| 312 | }; |
| 313 | |
| 314 | cam_sensor_front1_default: cam_sensor_front1_default { |
| 315 | /* RESET, STANDBY */ |
| 316 | mux { |
| 317 | pins = "gpio129", "gpio130"; |
| 318 | function = "gpio"; |
| 319 | }; |
| 320 | |
| 321 | config { |
| 322 | pins = "gpio129", "gpio130"; |
| 323 | bias-disable; /* No PULL */ |
| 324 | drive-strength = <2>; /* 2 MA */ |
| 325 | }; |
| 326 | }; |
| 327 | |
| 328 | cam_sensor_front1_sleep: cam_sensor_front1_sleep { |
| 329 | /* RESET, STANDBY */ |
| 330 | mux { |
| 331 | pins = "gpio129", "gpio130"; |
| 332 | function = "gpio"; |
| 333 | }; |
| 334 | |
| 335 | config { |
| 336 | pins = "gpio129", "gpio130"; |
| 337 | bias-disable; /* No PULL */ |
| 338 | drive-strength = <2>; /* 2 MA */ |
| 339 | }; |
| 340 | }; |
| 341 | |
| 342 | pmx_adv7533_int: pmx_adv7533_int { |
| 343 | adv7533_int_active: adv7533_int_active { |
| 344 | mux { |
| 345 | pins = "gpio90"; |
| 346 | function = "gpio"; |
| 347 | }; |
| 348 | |
| 349 | config { |
| 350 | pins = "gpio90"; |
| 351 | drive-strength = <16>; |
| 352 | bias-disable; |
| 353 | }; |
| 354 | }; |
| 355 | |
| 356 | adv7533_int_suspend: adv7533_int_suspend { |
| 357 | mux { |
| 358 | pins = "gpio90"; |
| 359 | function = "gpio"; |
| 360 | }; |
| 361 | |
| 362 | config { |
| 363 | pins = "gpio90"; |
| 364 | drive-strength = <16>; |
| 365 | bias-disable; |
| 366 | }; |
| 367 | }; |
| 368 | |
| 369 | }; |
| 370 | |
| 371 | pmx_mdss: pmx_mdss { |
| 372 | mdss_dsi_active: mdss_dsi_active { |
| 373 | mux { |
| 374 | pins = "gpio61", "gpio59"; |
| 375 | function = "gpio"; |
| 376 | }; |
| 377 | |
| 378 | config { |
| 379 | pins = "gpio61", "gpio59"; |
| 380 | drive-strength = <8>; /* 8 mA */ |
| 381 | bias-disable = <0>; /* no pull */ |
| 382 | output-high; |
| 383 | }; |
| 384 | }; |
| 385 | |
| 386 | mdss_dsi_suspend: mdss_dsi_suspend { |
| 387 | mux { |
| 388 | pins = "gpio61", "gpio59"; |
| 389 | function = "gpio"; |
| 390 | }; |
| 391 | |
| 392 | config { |
| 393 | pins = "gpio61", "gpio59"; |
| 394 | drive-strength = <2>; /* 2 mA */ |
| 395 | bias-pull-down; /* pull down */ |
| 396 | }; |
| 397 | }; |
| 398 | }; |
| 399 | |
| 400 | pmx_mdss_te { |
| 401 | mdss_te_active: mdss_te_active { |
| 402 | mux { |
| 403 | pins = "gpio24"; |
| 404 | function = "mdp_vsync"; |
| 405 | }; |
| 406 | config { |
| 407 | pins = "gpio24"; |
| 408 | drive-strength = <2>; /* 8 mA */ |
| 409 | bias-pull-down; /* pull down*/ |
| 410 | }; |
| 411 | }; |
| 412 | |
| 413 | mdss_te_suspend: mdss_te_suspend { |
| 414 | mux { |
| 415 | pins = "gpio24"; |
| 416 | function = "mdp_vsync"; |
| 417 | }; |
| 418 | config { |
| 419 | pins = "gpio24"; |
| 420 | drive-strength = <2>; /* 2 mA */ |
| 421 | bias-pull-down; /* pull down */ |
| 422 | }; |
| 423 | }; |
| 424 | }; |
| 425 | |
| 426 | hsuart_active: default { |
| 427 | mux { |
| 428 | pins = "gpio12", "gpio13", "gpio14", "gpio15"; |
| 429 | function = "blsp_uart4"; |
| 430 | }; |
| 431 | |
| 432 | config { |
| 433 | pins = "gpio12", "gpio13", "gpio14", "gpio15"; |
| 434 | drive-strength = <16>; |
| 435 | bias-disable; |
| 436 | }; |
| 437 | }; |
| 438 | |
| 439 | hsuart_sleep: sleep { |
| 440 | mux { |
| 441 | pins = "gpio12", "gpio13", "gpio14", "gpio15"; |
| 442 | function = "gpio"; |
| 443 | }; |
| 444 | |
| 445 | config { |
| 446 | pins = "gpio12", "gpio13", "gpio14", "gpio15"; |
| 447 | drive-strength = <2>; |
| 448 | bias-disable; |
| 449 | }; |
| 450 | }; |
| 451 | |
Shrey Vijay | 88eddb5 | 2017-11-30 14:47:52 +0530 | [diff] [blame] | 452 | blsp2_uart0_active: blsp2_uart0_active { |
| 453 | mux { |
| 454 | pins = "gpio16", "gpio17", "gpio18", "gpio19"; |
| 455 | function = "blsp_uart5"; |
| 456 | }; |
| 457 | |
| 458 | config { |
| 459 | pins = "gpio16", "gpio17", "gpio18", "gpio19"; |
| 460 | drive-strength = <16>; |
| 461 | bias-disable; |
| 462 | }; |
| 463 | }; |
| 464 | |
| 465 | blsp2_uart0_sleep: blsp2_uart0_sleep { |
| 466 | mux { |
| 467 | pins = "gpio16", "gpio17", "gpio18", "gpio19"; |
| 468 | function = "gpio"; |
| 469 | }; |
| 470 | |
| 471 | config { |
| 472 | pins = "gpio16", "gpio17", "gpio18", "gpio19"; |
| 473 | drive-strength = <2>; |
| 474 | bias-disable; |
| 475 | }; |
| 476 | }; |
| 477 | |
Srinivas Ramana | 3cac278 | 2017-09-13 16:31:17 +0530 | [diff] [blame] | 478 | /* SDC pin type */ |
| 479 | sdc1_clk_on: sdc1_clk_on { |
| 480 | config { |
| 481 | pins = "sdc1_clk"; |
| 482 | bias-disable; /* NO pull */ |
| 483 | drive-strength = <16>; /* 16 MA */ |
| 484 | }; |
| 485 | }; |
| 486 | |
| 487 | sdc1_clk_off: sdc1_clk_off { |
| 488 | config { |
| 489 | pins = "sdc1_clk"; |
| 490 | bias-disable; /* NO pull */ |
| 491 | drive-strength = <2>; /* 2 MA */ |
| 492 | }; |
| 493 | }; |
| 494 | |
| 495 | sdc1_cmd_on: sdc1_cmd_on { |
| 496 | config { |
| 497 | pins = "sdc1_cmd"; |
| 498 | bias-pull-up; /* pull up */ |
| 499 | drive-strength = <10>; /* 10 MA */ |
| 500 | }; |
| 501 | }; |
| 502 | |
| 503 | sdc1_cmd_off: sdc1_cmd_off { |
| 504 | config { |
| 505 | pins = "sdc1_cmd"; |
| 506 | num-grp-pins = <1>; |
| 507 | bias-pull-up; /* pull up */ |
| 508 | drive-strength = <2>; /* 2 MA */ |
| 509 | }; |
| 510 | }; |
| 511 | |
| 512 | sdc1_data_on: sdc1_data_on { |
| 513 | config { |
| 514 | pins = "sdc1_data"; |
| 515 | bias-pull-up; /* pull up */ |
| 516 | drive-strength = <10>; /* 10 MA */ |
| 517 | }; |
| 518 | }; |
| 519 | |
| 520 | sdc1_data_off: sdc1_data_off { |
| 521 | config { |
| 522 | pins = "sdc1_data"; |
| 523 | bias-pull-up; /* pull up */ |
| 524 | drive-strength = <2>; /* 2 MA */ |
| 525 | }; |
| 526 | }; |
| 527 | |
| 528 | sdc1_rclk_on: sdc1_rclk_on { |
| 529 | config { |
| 530 | pins = "sdc1_rclk"; |
| 531 | bias-pull-down; /* pull down */ |
| 532 | }; |
| 533 | }; |
| 534 | |
| 535 | sdc1_rclk_off: sdc1_rclk_off { |
| 536 | config { |
| 537 | pins = "sdc1_rclk"; |
| 538 | bias-pull-down; /* pull down */ |
| 539 | }; |
| 540 | }; |
| 541 | |
| 542 | sdc2_clk_on: sdc2_clk_on { |
| 543 | config { |
| 544 | pins = "sdc2_clk"; |
| 545 | drive-strength = <16>; /* 16 MA */ |
| 546 | bias-disable; /* NO pull */ |
| 547 | }; |
| 548 | }; |
| 549 | |
| 550 | sdc2_clk_off: sdc2_clk_off { |
| 551 | config { |
| 552 | pins = "sdc2_clk"; |
| 553 | bias-disable; /* NO pull */ |
| 554 | drive-strength = <2>; /* 2 MA */ |
| 555 | }; |
| 556 | }; |
| 557 | |
| 558 | sdc2_cmd_on: sdc2_cmd_on { |
| 559 | config { |
| 560 | pins = "sdc2_cmd"; |
| 561 | bias-pull-up; /* pull up */ |
| 562 | drive-strength = <10>; /* 10 MA */ |
| 563 | }; |
| 564 | }; |
| 565 | |
| 566 | sdc2_cmd_off: sdc2_cmd_off { |
| 567 | config { |
| 568 | pins = "sdc2_cmd"; |
| 569 | bias-pull-up; /* pull up */ |
| 570 | drive-strength = <2>; /* 2 MA */ |
| 571 | }; |
| 572 | }; |
| 573 | |
| 574 | sdc2_data_on: sdc2_data_on { |
| 575 | config { |
| 576 | pins = "sdc2_data"; |
| 577 | bias-pull-up; /* pull up */ |
| 578 | drive-strength = <10>; /* 10 MA */ |
| 579 | }; |
| 580 | }; |
| 581 | |
| 582 | sdc2_data_off: sdc2_data_off { |
| 583 | config { |
| 584 | pins = "sdc2_data"; |
| 585 | bias-pull-up; /* pull up */ |
| 586 | drive-strength = <2>; /* 2 MA */ |
| 587 | }; |
| 588 | }; |
| 589 | |
| 590 | sdc2_cd_on: cd_on { |
| 591 | mux { |
| 592 | pins = "gpio133"; |
| 593 | function = "gpio"; |
| 594 | }; |
| 595 | |
| 596 | config { |
| 597 | pins = "gpio133"; |
| 598 | drive-strength = <2>; |
| 599 | bias-pull-up; |
| 600 | }; |
| 601 | }; |
| 602 | |
| 603 | sdc2_cd_off: cd_off { |
| 604 | mux { |
| 605 | pins = "gpio133"; |
| 606 | function = "gpio"; |
| 607 | }; |
| 608 | |
| 609 | config { |
| 610 | pins = "gpio133"; |
| 611 | drive-strength = <2>; |
| 612 | bias-disable; |
| 613 | }; |
| 614 | }; |
| 615 | |
| 616 | i2c_2 { |
| 617 | i2c_2_active: i2c_2_active { |
| 618 | /* active state */ |
| 619 | mux { |
| 620 | pins = "gpio6", "gpio7"; |
| 621 | function = "blsp_i2c2"; |
| 622 | }; |
| 623 | |
| 624 | config { |
| 625 | pins = "gpio6", "gpio7"; |
| 626 | drive-strength = <2>; |
| 627 | bias-disable; |
| 628 | }; |
| 629 | }; |
| 630 | |
| 631 | i2c_2_sleep: i2c_2_sleep { |
| 632 | /* suspended state */ |
| 633 | mux { |
| 634 | pins = "gpio6", "gpio7"; |
| 635 | function = "gpio"; |
| 636 | }; |
| 637 | |
| 638 | config { |
| 639 | pins = "gpio6", "gpio7"; |
| 640 | drive-strength = <2>; |
| 641 | bias-disable; |
| 642 | }; |
| 643 | }; |
| 644 | }; |
| 645 | |
| 646 | i2c_3 { |
| 647 | i2c_3_active: i2c_3_active { |
| 648 | /* active state */ |
| 649 | mux { |
| 650 | pins = "gpio10", "gpio11"; |
| 651 | function = "blsp_i2c3"; |
| 652 | }; |
| 653 | |
| 654 | config { |
| 655 | pins = "gpio10", "gpio11"; |
| 656 | drive-strength = <2>; |
| 657 | bias-disable; |
| 658 | }; |
| 659 | }; |
| 660 | |
| 661 | i2c_3_sleep: i2c_3_sleep { |
| 662 | /* suspended state */ |
| 663 | mux { |
| 664 | pins = "gpio10", "gpio11"; |
| 665 | function = "gpio"; |
| 666 | }; |
| 667 | |
| 668 | config { |
| 669 | pins = "gpio10", "gpio11"; |
| 670 | drive-strength = <2>; |
| 671 | bias-disable; |
| 672 | }; |
| 673 | }; |
| 674 | }; |
| 675 | |
| 676 | i2c_5 { |
| 677 | i2c_5_active: i2c_5_active { |
| 678 | /* active state */ |
| 679 | mux { |
| 680 | pins = "gpio18", "gpio19"; |
| 681 | function = "blsp_i2c5"; |
| 682 | }; |
| 683 | |
| 684 | config { |
| 685 | pins = "gpio18", "gpio19"; |
| 686 | drive-strength = <2>; |
| 687 | bias-disable; |
| 688 | }; |
| 689 | }; |
| 690 | |
| 691 | i2c_5_sleep: i2c_5_sleep { |
| 692 | /* suspended state */ |
| 693 | mux { |
| 694 | pins = "gpio18", "gpio19"; |
| 695 | function = "gpio"; |
| 696 | }; |
| 697 | |
| 698 | config { |
| 699 | pins = "gpio18", "gpio19"; |
| 700 | drive-strength = <2>; |
| 701 | bias-disable; |
| 702 | }; |
| 703 | }; |
| 704 | }; |
| 705 | |
| 706 | pmx_rd_nfc_int { |
| 707 | /*qcom,pins = <&gp 17>;*/ |
| 708 | pins = "gpio17"; |
| 709 | qcom,pin-func = <0>; |
| 710 | qcom,num-grp-pins = <1>; |
| 711 | label = "pmx_nfc_int"; |
| 712 | |
| 713 | nfc_int_active: active { |
| 714 | drive-strength = <6>; |
| 715 | bias-pull-up; |
| 716 | }; |
| 717 | |
| 718 | nfc_int_suspend: suspend { |
| 719 | drive-strength = <6>; |
| 720 | bias-pull-up; |
| 721 | }; |
| 722 | }; |
| 723 | |
| 724 | pmx_nfc_reset { |
| 725 | /*qcom,pins = <&gp 16>;*/ |
| 726 | pins = "gpio16"; |
| 727 | qcom,pin-func = <0>; |
| 728 | qcom,num-grp-pins = <1>; |
| 729 | label = "pmx_nfc_disable"; |
| 730 | |
| 731 | nfc_disable_active: active { |
| 732 | drive-strength = <6>; |
| 733 | bias-pull-up; |
| 734 | }; |
| 735 | |
| 736 | nfc_disable_suspend: suspend { |
| 737 | drive-strength = <6>; |
| 738 | bias-disable; |
| 739 | }; |
| 740 | }; |
| 741 | |
| 742 | wcnss_pmux_5wire { |
| 743 | /* Active configuration of bus pins */ |
| 744 | wcnss_default: wcnss_default { |
| 745 | wcss_wlan2 { |
| 746 | pins = "gpio76"; |
| 747 | function = "wcss_wlan2"; |
| 748 | }; |
| 749 | wcss_wlan1 { |
| 750 | pins = "gpio77"; |
| 751 | function = "wcss_wlan1"; |
| 752 | }; |
| 753 | wcss_wlan0 { |
| 754 | pins = "gpio78"; |
| 755 | function = "wcss_wlan0"; |
| 756 | }; |
| 757 | wcss_wlan { |
| 758 | pins = "gpio79", "gpio80"; |
| 759 | function = "wcss_wlan"; |
| 760 | }; |
| 761 | |
| 762 | config { |
| 763 | pins = "gpio76", "gpio77", |
| 764 | "gpio78", "gpio79", |
| 765 | "gpio80"; |
| 766 | drive-strength = <6>; /* 6 MA */ |
| 767 | bias-pull-up; /* PULL UP */ |
| 768 | }; |
| 769 | }; |
| 770 | |
| 771 | wcnss_sleep: wcnss_sleep { |
| 772 | wcss_wlan2 { |
| 773 | pins = "gpio76"; |
| 774 | function = "wcss_wlan2"; |
| 775 | }; |
| 776 | wcss_wlan1 { |
| 777 | pins = "gpio77"; |
| 778 | function = "wcss_wlan1"; |
| 779 | }; |
| 780 | wcss_wlan0 { |
| 781 | pins = "gpio78"; |
| 782 | function = "wcss_wlan0"; |
| 783 | }; |
| 784 | wcss_wlan { |
| 785 | pins = "gpio79", "gpio80"; |
| 786 | function = "wcss_wlan"; |
| 787 | }; |
| 788 | |
| 789 | config { |
| 790 | pins = "gpio76", "gpio77", |
| 791 | "gpio78", "gpio79", |
| 792 | "gpio80"; |
| 793 | drive-strength = <2>; /* 2 MA */ |
| 794 | bias-pull-down; /* PULL Down */ |
| 795 | }; |
| 796 | }; |
| 797 | }; |
| 798 | |
| 799 | wcnss_pmux_gpio: wcnss_pmux_gpio { |
| 800 | wcnss_gpio_default: wcnss_gpio_default { |
| 801 | /* Active configuration of bus pins */ |
| 802 | mux { |
| 803 | /* Uses general purpose pins */ |
| 804 | pins = "gpio76", "gpio77", |
| 805 | "gpio78", "gpio79", |
| 806 | "gpio80"; |
| 807 | function = "gpio"; |
| 808 | }; |
| 809 | |
| 810 | config { |
| 811 | pins = "gpio76", "gpio77", |
| 812 | "gpio78", "gpio79", |
| 813 | "gpio80"; |
| 814 | drive-strength = <6>; /* 6 MA */ |
| 815 | bias-pull-up; /* PULL UP */ |
| 816 | }; |
| 817 | }; |
| 818 | }; |
| 819 | |
| 820 | wcd9xxx_intr { |
| 821 | wcd_intr_default: wcd_intr_default{ |
| 822 | mux { |
| 823 | pins = "gpio73"; |
| 824 | function = "gpio"; |
| 825 | }; |
| 826 | |
| 827 | config { |
| 828 | pins = "gpio73"; |
| 829 | drive-strength = <2>; /* 2 mA */ |
| 830 | bias-pull-down; /* pull down */ |
| 831 | input-enable; |
| 832 | }; |
| 833 | }; |
| 834 | }; |
| 835 | |
| 836 | cdc_reset_ctrl { |
| 837 | cdc_reset_sleep: cdc_reset_sleep { |
| 838 | mux { |
| 839 | pins = "gpio67"; |
| 840 | function = "gpio"; |
| 841 | }; |
| 842 | config { |
| 843 | pins = "gpio67"; |
| 844 | drive-strength = <16>; |
| 845 | bias-disable; |
| 846 | output-low; |
| 847 | }; |
| 848 | }; |
| 849 | cdc_reset_active:cdc_reset_active { |
| 850 | mux { |
| 851 | pins = "gpio67"; |
| 852 | function = "gpio"; |
| 853 | }; |
| 854 | config { |
| 855 | pins = "gpio67"; |
| 856 | drive-strength = <16>; |
| 857 | bias-pull-down; |
| 858 | output-high; |
| 859 | }; |
| 860 | }; |
| 861 | }; |
| 862 | |
| 863 | cdc_mclk2_pin { |
| 864 | cdc_mclk2_sleep: cdc_mclk2_sleep { |
| 865 | mux { |
| 866 | pins = "gpio66"; |
| 867 | function = "pri_mi2s"; |
| 868 | }; |
| 869 | config { |
| 870 | pins = "gpio66"; |
| 871 | drive-strength = <2>; /* 2 mA */ |
| 872 | bias-pull-down; /* PULL DOWN */ |
| 873 | }; |
| 874 | }; |
| 875 | cdc_mclk2_active: cdc_mclk2_active { |
| 876 | mux { |
| 877 | pins = "gpio66"; |
| 878 | function = "pri_mi2s"; |
| 879 | }; |
| 880 | config { |
| 881 | pins = "gpio66"; |
| 882 | drive-strength = <8>; /* 8 mA */ |
| 883 | bias-disable; /* NO PULL */ |
| 884 | }; |
| 885 | }; |
| 886 | }; |
| 887 | |
| 888 | cdc-pdm-2-lines { |
| 889 | cdc_pdm_lines_2_act: pdm_lines_2_on { |
| 890 | mux { |
| 891 | pins = "gpio70", "gpio71", "gpio72"; |
| 892 | function = "cdc_pdm0"; |
| 893 | }; |
| 894 | |
| 895 | config { |
| 896 | pins = "gpio70", "gpio71", "gpio72"; |
| 897 | drive-strength = <8>; |
| 898 | }; |
| 899 | }; |
| 900 | |
| 901 | cdc_pdm_lines_2_sus: pdm_lines_2_off { |
| 902 | mux { |
| 903 | pins = "gpio70", "gpio71", "gpio72"; |
| 904 | function = "cdc_pdm0"; |
| 905 | }; |
| 906 | |
| 907 | config { |
| 908 | pins = "gpio70", "gpio71", "gpio72"; |
| 909 | drive-strength = <2>; |
| 910 | bias-disable; |
| 911 | }; |
| 912 | }; |
| 913 | }; |
| 914 | |
| 915 | cdc-pdm-lines { |
| 916 | cdc_pdm_lines_act: pdm_lines_on { |
| 917 | mux { |
| 918 | pins = "gpio69", "gpio73", "gpio74"; |
| 919 | function = "cdc_pdm0"; |
| 920 | }; |
| 921 | |
| 922 | config { |
| 923 | pins = "gpio69", "gpio73", "gpio74"; |
| 924 | drive-strength = <8>; |
| 925 | }; |
| 926 | }; |
| 927 | cdc_pdm_lines_sus: pdm_lines_off { |
| 928 | mux { |
| 929 | pins = "gpio69", "gpio73", "gpio74"; |
| 930 | function = "cdc_pdm0"; |
| 931 | }; |
| 932 | |
| 933 | config { |
| 934 | pins = "gpio69", "gpio73", "gpio74"; |
| 935 | drive-strength = <2>; |
| 936 | bias-disable; |
| 937 | }; |
| 938 | }; |
| 939 | }; |
| 940 | |
| 941 | cdc-pdm-comp-lines { |
| 942 | cdc_pdm_comp_lines_act: pdm_comp_lines_on { |
| 943 | mux { |
| 944 | pins = "gpio67", "gpio68"; |
| 945 | function = "cdc_pdm0"; |
| 946 | }; |
| 947 | |
| 948 | config { |
| 949 | pins = "gpio67", "gpio68"; |
| 950 | drive-strength = <8>; |
| 951 | }; |
| 952 | }; |
| 953 | |
| 954 | cdc_pdm_comp_lines_sus: pdm_comp_lines_off { |
| 955 | mux { |
| 956 | pins = "gpio67", "gpio68"; |
| 957 | function = "cdc_pdm0"; |
| 958 | }; |
| 959 | |
| 960 | config { |
| 961 | pins = "gpio67", "gpio68"; |
| 962 | drive-strength = <2>; |
| 963 | bias-disable; |
| 964 | }; |
| 965 | }; |
| 966 | }; |
| 967 | |
| 968 | cross-conn-det { |
| 969 | cross_conn_det_act: lines_on { |
| 970 | mux { |
| 971 | pins = "gpio63"; |
| 972 | function = "gpio"; |
| 973 | }; |
| 974 | |
| 975 | config { |
| 976 | pins = "gpio63"; |
| 977 | drive-strength = <8>; |
| 978 | output-low; |
| 979 | bias-pull-down; |
| 980 | }; |
| 981 | }; |
| 982 | |
| 983 | cross_conn_det_sus: lines_off { |
| 984 | mux { |
| 985 | pins = "gpio63"; |
| 986 | function = "gpio"; |
| 987 | }; |
| 988 | |
| 989 | config { |
| 990 | pins = "gpio63"; |
| 991 | drive-strength = <2>; |
| 992 | bias-pull-down; |
| 993 | }; |
| 994 | }; |
| 995 | }; |
| 996 | |
| 997 | /* WSA VI sense */ |
| 998 | wsa-vi { |
| 999 | wsa_vi_on: wsa_vi_on { |
| 1000 | mux { |
| 1001 | pins = "gpio94", "gpio95"; |
| 1002 | function = "wsa_io"; |
| 1003 | }; |
| 1004 | |
| 1005 | config { |
| 1006 | pins = "gpio94", "gpio95"; |
| 1007 | drive-strength = <8>; /* 8 MA */ |
| 1008 | bias-disable; /* NO pull */ |
| 1009 | }; |
| 1010 | }; |
| 1011 | |
| 1012 | wsa_vi_off: wsa_vi_off { |
| 1013 | mux { |
| 1014 | pins = "gpio94", "gpio95"; |
| 1015 | function = "wsa_io"; |
| 1016 | }; |
| 1017 | |
| 1018 | config { |
| 1019 | pins = "gpio94", "gpio95"; |
| 1020 | drive-strength = <2>; /* 2 MA */ |
| 1021 | bias-pull-down; |
| 1022 | }; |
| 1023 | }; |
| 1024 | }; |
| 1025 | |
| 1026 | /* WSA Reset */ |
| 1027 | wsa_reset { |
| 1028 | wsa_reset_on: wsa_reset_on { |
| 1029 | mux { |
| 1030 | pins = "gpio96"; |
| 1031 | function = "gpio"; |
| 1032 | }; |
| 1033 | |
| 1034 | config { |
| 1035 | pins = "gpio96"; |
| 1036 | drive-strength = <2>; /* 2 MA */ |
| 1037 | output-high; |
| 1038 | }; |
| 1039 | }; |
| 1040 | |
| 1041 | wsa_reset_off: wsa_reset_off { |
| 1042 | mux { |
| 1043 | pins = "gpio96"; |
| 1044 | function = "gpio"; |
| 1045 | }; |
| 1046 | |
| 1047 | config { |
| 1048 | pins = "gpio96"; |
| 1049 | drive-strength = <2>; /* 2 MA */ |
| 1050 | output-low; |
| 1051 | }; |
| 1052 | }; |
| 1053 | }; |
| 1054 | |
| 1055 | /* WSA CLK */ |
| 1056 | wsa_clk { |
| 1057 | wsa_clk_on: wsa_clk_on { |
| 1058 | mux { |
| 1059 | pins = "gpio25"; |
| 1060 | function = "pri_mi2s_mclk_a"; |
| 1061 | }; |
| 1062 | |
| 1063 | config { |
| 1064 | pins = "gpio25"; |
| 1065 | drive-strength = <8>; /* 8 MA */ |
| 1066 | output-high; |
| 1067 | }; |
| 1068 | }; |
| 1069 | |
| 1070 | wsa_clk_off: wsa_clk_off { |
| 1071 | mux { |
| 1072 | pins = "gpio25"; |
| 1073 | function = "pri_mi2s_mclk_a"; |
| 1074 | }; |
| 1075 | |
| 1076 | config { |
| 1077 | pins = "gpio25"; |
| 1078 | drive-strength = <2>; /* 2 MA */ |
| 1079 | output-low; |
| 1080 | bias-pull-down; |
| 1081 | }; |
| 1082 | }; |
| 1083 | }; |
| 1084 | |
| 1085 | pri-tlmm-lines { |
| 1086 | pri_tlmm_lines_act: pri_tlmm_lines_act { |
| 1087 | mux { |
| 1088 | pins = "gpio91", "gpio93"; |
| 1089 | function = "pri_mi2s"; |
| 1090 | }; |
| 1091 | |
| 1092 | config { |
| 1093 | pins = "gpio91", "gpio93"; |
| 1094 | drive-strength = <8>; |
| 1095 | }; |
| 1096 | }; |
| 1097 | |
| 1098 | pri_tlmm_lines_sus: pri_tlmm_lines_sus { |
| 1099 | mux { |
| 1100 | pins = "gpio91", "gpio93"; |
| 1101 | function = "pri_mi2s"; |
| 1102 | }; |
| 1103 | |
| 1104 | config { |
| 1105 | pins = "gpio91", "gpio93"; |
| 1106 | drive-strength = <2>; |
| 1107 | bias-pull-down; |
| 1108 | }; |
| 1109 | }; |
| 1110 | }; |
| 1111 | |
| 1112 | pri-tlmm-ws-lines { |
| 1113 | pri_tlmm_ws_act: pri_tlmm_ws_act { |
| 1114 | mux { |
| 1115 | pins = "gpio92"; |
| 1116 | function = "pri_mi2s_ws"; |
| 1117 | }; |
| 1118 | |
| 1119 | config { |
| 1120 | pins = "gpio92"; |
| 1121 | drive-strength = <8>; |
| 1122 | }; |
| 1123 | }; |
| 1124 | |
| 1125 | pri_tlmm_ws_sus: pri_tlmm_ws_sus { |
| 1126 | mux { |
| 1127 | pins = "gpio92"; |
| 1128 | function = "pri_mi2s_ws"; |
| 1129 | }; |
| 1130 | |
| 1131 | config { |
| 1132 | pins = "gpio92"; |
| 1133 | drive-strength = <2>; |
| 1134 | bias-pull-down; |
| 1135 | }; |
| 1136 | }; |
| 1137 | }; |
| 1138 | |
| 1139 | spi3 { |
| 1140 | spi3_default: spi3_default { |
| 1141 | /* active state */ |
| 1142 | mux { |
| 1143 | /* MOSI, MISO, CLK */ |
| 1144 | pins = "gpio8", "gpio9", "gpio11"; |
| 1145 | function = "blsp_spi3"; |
| 1146 | }; |
| 1147 | |
| 1148 | config { |
| 1149 | pins = "gpio8", "gpio9", "gpio11"; |
| 1150 | drive-strength = <12>; /* 12 MA */ |
| 1151 | bias-disable = <0>; /* No PULL */ |
| 1152 | }; |
| 1153 | }; |
| 1154 | |
| 1155 | spi3_sleep: spi3_sleep { |
| 1156 | /* suspended state */ |
| 1157 | mux { |
| 1158 | /* MOSI, MISO, CLK */ |
| 1159 | pins = "gpio8", "gpio9", "gpio11"; |
| 1160 | function = "gpio"; |
| 1161 | }; |
| 1162 | |
| 1163 | config { |
| 1164 | pins = "gpio8", "gpio9", "gpio11"; |
| 1165 | drive-strength = <2>; /* 2 MA */ |
| 1166 | bias-pull-down; /* PULL Down */ |
| 1167 | }; |
| 1168 | }; |
| 1169 | |
| 1170 | spi3_cs0_active: cs0_active { |
| 1171 | /* CS */ |
| 1172 | mux { |
| 1173 | pins = "gpio10"; |
| 1174 | function = "blsp_spi3"; |
| 1175 | }; |
| 1176 | |
| 1177 | config { |
| 1178 | pins = "gpio10"; |
| 1179 | drive-strength = <2>; |
| 1180 | bias-disable = <0>; |
| 1181 | }; |
| 1182 | }; |
| 1183 | |
| 1184 | spi3_cs0_sleep: cs0_sleep { |
| 1185 | /* CS */ |
| 1186 | mux { |
| 1187 | pins = "gpio10"; |
| 1188 | function = "gpio"; |
| 1189 | }; |
| 1190 | |
| 1191 | config { |
| 1192 | pins = "gpio10"; |
| 1193 | drive-strength = <2>; |
| 1194 | bias-disable = <0>; |
| 1195 | }; |
| 1196 | }; |
| 1197 | }; |
| 1198 | |
| 1199 | /* add pingrp for touchscreen */ |
| 1200 | pmx_ts_int_active { |
| 1201 | ts_int_active: ts_int_active { |
| 1202 | mux { |
| 1203 | pins = "gpio65"; |
| 1204 | function = "gpio"; |
| 1205 | }; |
| 1206 | |
| 1207 | config { |
| 1208 | pins = "gpio65"; |
| 1209 | drive-strength = <8>; |
| 1210 | bias-pull-up; |
| 1211 | }; |
| 1212 | }; |
| 1213 | }; |
| 1214 | |
| 1215 | pmx_ts_int_suspend { |
| 1216 | ts_int_suspend: ts_int_suspend { |
| 1217 | mux { |
| 1218 | pins = "gpio65"; |
| 1219 | function = "gpio"; |
| 1220 | }; |
| 1221 | |
| 1222 | config { |
| 1223 | pins = "gpio65"; |
| 1224 | drive-strength = <2>; |
| 1225 | bias-pull-down; |
| 1226 | }; |
| 1227 | }; |
| 1228 | }; |
| 1229 | |
| 1230 | pmx_ts_reset_active { |
| 1231 | ts_reset_active: ts_reset_active { |
| 1232 | mux { |
| 1233 | pins = "gpio64"; |
| 1234 | function = "gpio"; |
| 1235 | }; |
| 1236 | |
| 1237 | config { |
| 1238 | pins = "gpio64"; |
| 1239 | drive-strength = <8>; |
| 1240 | bias-pull-up; |
| 1241 | }; |
| 1242 | }; |
| 1243 | }; |
| 1244 | |
| 1245 | pmx_ts_reset_suspend { |
| 1246 | ts_reset_suspend: ts_reset_suspend { |
| 1247 | mux { |
| 1248 | pins = "gpio64"; |
| 1249 | function = "gpio"; |
| 1250 | }; |
| 1251 | |
| 1252 | config { |
| 1253 | pins = "gpio64"; |
| 1254 | drive-strength = <2>; |
| 1255 | bias-pull-down; |
| 1256 | }; |
| 1257 | }; |
| 1258 | }; |
| 1259 | |
| 1260 | pmx_ts_release { |
| 1261 | ts_release: ts_release { |
| 1262 | mux { |
| 1263 | pins = "gpio65", "gpio64"; |
| 1264 | function = "gpio"; |
| 1265 | }; |
| 1266 | |
| 1267 | config { |
| 1268 | pins = "gpio65", "gpio64"; |
| 1269 | drive-strength = <2>; |
| 1270 | bias-pull-down; |
| 1271 | }; |
| 1272 | }; |
| 1273 | }; |
| 1274 | |
| 1275 | tlmm_gpio_key { |
| 1276 | gpio_key_active: gpio_key_active { |
| 1277 | mux { |
| 1278 | pins = "gpio85", "gpio86", "gpio87"; |
| 1279 | function = "gpio"; |
| 1280 | }; |
| 1281 | |
| 1282 | config { |
| 1283 | pins = "gpio85", "gpio86", "gpio87"; |
| 1284 | drive-strength = <2>; |
| 1285 | bias-pull-up; |
| 1286 | }; |
| 1287 | }; |
| 1288 | |
| 1289 | gpio_key_suspend: gpio_key_suspend { |
| 1290 | mux { |
| 1291 | pins = "gpio85", "gpio86", "gpio87"; |
| 1292 | function = "gpio"; |
| 1293 | }; |
| 1294 | |
| 1295 | config { |
| 1296 | pins = "gpio85", "gpio86", "gpio87"; |
| 1297 | drive-strength = <2>; |
| 1298 | bias-pull-up; |
| 1299 | }; |
| 1300 | }; |
| 1301 | }; |
| 1302 | pmx_qdsd_clk { |
| 1303 | qdsd_clk_sdcard: clk_sdcard { |
| 1304 | config { |
| 1305 | pins = "qdsd_clk"; |
| 1306 | bias-disable;/* NO pull */ |
| 1307 | drive-strength = <16>; /* 16 MA */ |
| 1308 | }; |
| 1309 | }; |
| 1310 | qdsd_clk_trace: clk_trace { |
| 1311 | config { |
| 1312 | pins = "qdsd_clk"; |
| 1313 | bias-pull-down; /* pull down */ |
| 1314 | drive-strength = <2>; /* 2 MA */ |
| 1315 | }; |
| 1316 | }; |
| 1317 | qdsd_clk_swdtrc: clk_swdtrc { |
| 1318 | config { |
| 1319 | pins = "qdsd_clk"; |
| 1320 | bias-pull-down; /* pull down */ |
| 1321 | drive-strength = <2>; /* 2 MA */ |
| 1322 | }; |
| 1323 | }; |
| 1324 | qdsd_clk_spmi: clk_spmi { |
| 1325 | config { |
| 1326 | pins = "qdsd_clk"; |
| 1327 | bias-pull-down; /* pull down */ |
| 1328 | drive-strength = <2>; /* 2 MA */ |
| 1329 | }; |
| 1330 | }; |
| 1331 | }; |
| 1332 | |
| 1333 | pmx_qdsd_cmd { |
| 1334 | qdsd_cmd_sdcard: cmd_sdcard { |
| 1335 | config { |
| 1336 | pins = "qdsd_cmd"; |
| 1337 | bias-pull-down; /* pull down */ |
| 1338 | drive-strength = <8>; /* 8 MA */ |
| 1339 | }; |
| 1340 | }; |
| 1341 | qdsd_cmd_trace: cmd_trace { |
| 1342 | config { |
| 1343 | pins = "qdsd_cmd"; |
| 1344 | bias-pull-down; /* pull down */ |
| 1345 | drive-strength = <2>; /* 2 MA */ |
| 1346 | }; |
| 1347 | }; |
| 1348 | qdsd_cmd_swduart: cmd_uart { |
| 1349 | config { |
| 1350 | pins = "qdsd_cmd"; |
| 1351 | bias-pull-up; /* pull up */ |
| 1352 | drive-strength = <2>; /* 2 MA */ |
| 1353 | }; |
| 1354 | }; |
| 1355 | qdsd_cmd_swdtrc: cmd_swdtrc { |
| 1356 | config { |
| 1357 | pins = "qdsd_cmd"; |
| 1358 | bias-pull-up; /* pull up */ |
| 1359 | drive-strength = <2>; /* 2 MA */ |
| 1360 | }; |
| 1361 | }; |
| 1362 | qdsd_cmd_jtag: cmd_jtag { |
| 1363 | config { |
| 1364 | pins = "qdsd_cmd"; |
| 1365 | bias-disable; /* NO pull */ |
| 1366 | drive-strength = <8>; /* 8 MA */ |
| 1367 | }; |
| 1368 | }; |
| 1369 | qdsd_cmd_spmi: cmd_spmi { |
| 1370 | config { |
| 1371 | pins = "qdsd_cmd"; |
| 1372 | bias-pull-down; /* pull down */ |
| 1373 | drive-strength = <10>; /* 10 MA */ |
| 1374 | }; |
| 1375 | }; |
| 1376 | }; |
| 1377 | |
| 1378 | pmx_qdsd_data0 { |
| 1379 | qdsd_data0_sdcard: data0_sdcard { |
| 1380 | config { |
| 1381 | pins = "qdsd_data0"; |
| 1382 | bias-pull-down; /* pull down */ |
| 1383 | drive-strength = <8>; /* 8 MA */ |
| 1384 | }; |
| 1385 | }; |
| 1386 | qdsd_data0_trace: data0_trace { |
| 1387 | config { |
| 1388 | pins = "qdsd_data0"; |
| 1389 | bias-pull-down; /* pull down */ |
| 1390 | drive-strength = <8>; /* 8 MA */ |
| 1391 | }; |
| 1392 | }; |
| 1393 | qdsd_data0_swduart: data0_uart { |
| 1394 | config { |
| 1395 | pins = "qdsd_data0"; |
| 1396 | bias-pull-down; /* pull down */ |
| 1397 | drive-strength = <2>; /* 2 MA */ |
| 1398 | }; |
| 1399 | }; |
| 1400 | qdsd_data0_swdtrc: data0_swdtrc { |
| 1401 | config { |
| 1402 | pins = "qdsd_data0"; |
| 1403 | bias-pull-down; /* pull down */ |
| 1404 | drive-strength = <2>; /* 2 MA */ |
| 1405 | }; |
| 1406 | }; |
| 1407 | qdsd_data0_jtag: data0_jtag { |
| 1408 | config { |
| 1409 | pins = "qdsd_data0"; |
| 1410 | bias-pull-up; /* pull up */ |
| 1411 | drive-strength = <2>; /* 2 MA */ |
| 1412 | }; |
| 1413 | }; |
| 1414 | qdsd_data0_spmi: data0_spmi { |
| 1415 | config { |
| 1416 | pins = "qdsd_data0"; |
| 1417 | bias-pull-down; /* pull down */ |
| 1418 | drive-strength = <2>; /* 2 MA */ |
| 1419 | }; |
| 1420 | }; |
| 1421 | }; |
| 1422 | |
| 1423 | pmx_qdsd_data1 { |
| 1424 | qdsd_data1_sdcard: data1_sdcard { |
| 1425 | config { |
| 1426 | pins = "qdsd_data1"; |
| 1427 | bias-pull-down; /* pull down */ |
| 1428 | drive-strength = <8>; /* 8 MA */ |
| 1429 | }; |
| 1430 | }; |
| 1431 | qdsd_data1_trace: data1_trace { |
| 1432 | config { |
| 1433 | pins = "qdsd_data1"; |
| 1434 | bias-pull-down; /* pull down */ |
| 1435 | drive-strength = <8>; /* 8 MA */ |
| 1436 | }; |
| 1437 | }; |
| 1438 | qdsd_data1_swduart: data1_uart { |
| 1439 | config { |
| 1440 | pins = "qdsd_data1"; |
| 1441 | bias-pull-down; /* pull down */ |
| 1442 | drive-strength = <2>; /* 2 MA */ |
| 1443 | }; |
| 1444 | }; |
| 1445 | qdsd_data1_swdtrc: data1_swdtrc { |
| 1446 | config { |
| 1447 | pins = "qdsd_data1"; |
| 1448 | bias-pull-down; /* pull down */ |
| 1449 | drive-strength = <2>; /* 2 MA */ |
| 1450 | }; |
| 1451 | }; |
| 1452 | qdsd_data1_jtag: data1_jtag { |
| 1453 | config { |
| 1454 | pins = "qdsd_data1"; |
| 1455 | bias-pull-down; /* pull down */ |
| 1456 | drive-strength = <2>; /* 2 MA */ |
| 1457 | }; |
| 1458 | }; |
| 1459 | }; |
| 1460 | |
| 1461 | pmx_qdsd_data2 { |
| 1462 | qdsd_data2_sdcard: data2_sdcard { |
| 1463 | config { |
| 1464 | pins = "qdsd_data2"; |
| 1465 | bias-pull-down; /* pull down */ |
| 1466 | drive-strength = <8>; /* 8 MA */ |
| 1467 | }; |
| 1468 | }; |
| 1469 | qdsd_data2_trace: data2_trace { |
| 1470 | config { |
| 1471 | pins = "qdsd_data2"; |
| 1472 | bias-pull-down; /* pull down */ |
| 1473 | drive-strength = <8>; /* 8 MA */ |
| 1474 | }; |
| 1475 | }; |
| 1476 | qdsd_data2_swduart: data2_uart { |
| 1477 | config { |
| 1478 | pins = "qdsd_data2"; |
| 1479 | bias-pull-down; /* pull down */ |
| 1480 | drive-strength = <2>; /* 2 MA */ |
| 1481 | }; |
| 1482 | }; |
| 1483 | qdsd_data2_swdtrc: data2_swdtrc { |
| 1484 | config { |
| 1485 | pins = "qdsd_data2"; |
| 1486 | bias-pull-down; /* pull down */ |
| 1487 | drive-strength = <2>; /* 2 MA */ |
| 1488 | }; |
| 1489 | }; |
| 1490 | qdsd_data2_jtag: data2_jtag { |
| 1491 | config { |
| 1492 | pins = "qdsd_data2"; |
| 1493 | bias-pull-up; /* pull up */ |
| 1494 | drive-strength = <8>; /* 8 MA */ |
| 1495 | }; |
| 1496 | }; |
| 1497 | }; |
| 1498 | |
| 1499 | pmx_qdsd_data3 { |
| 1500 | qdsd_data3_sdcard: data3_sdcard { |
| 1501 | config { |
| 1502 | pins = "qdsd_data3"; |
| 1503 | bias-pull-down; /* pull down */ |
| 1504 | drive-strength = <8>; /* 8 MA */ |
| 1505 | }; |
| 1506 | }; |
| 1507 | qdsd_data3_trace: data3_trace { |
| 1508 | config { |
| 1509 | pins = "qdsd_data3"; |
| 1510 | bias-pull-down; /* pull down */ |
| 1511 | drive-strength = <8>; /* 8 MA */ |
| 1512 | }; |
| 1513 | }; |
| 1514 | qdsd_data3_swduart: data3_uart { |
| 1515 | config { |
| 1516 | pins = "qdsd_data3"; |
| 1517 | bias-pull-up; /* pull up */ |
| 1518 | drive-strength = <2>; /* 2 MA */ |
| 1519 | }; |
| 1520 | }; |
| 1521 | qdsd_data3_swdtrc: data3_swdtrc { |
| 1522 | config { |
| 1523 | pins = "qdsd_data3"; |
| 1524 | bias-pull-up; /* pull up */ |
| 1525 | drive-strength = <2>; /* 2 MA */ |
| 1526 | }; |
| 1527 | }; |
| 1528 | qdsd_data3_jtag: data3_jtag { |
| 1529 | config { |
| 1530 | pins = "qdsd_data3"; |
| 1531 | bias-pull-up; /* pull up */ |
| 1532 | drive-strength = <2>; /* 2 MA */ |
| 1533 | }; |
| 1534 | }; |
| 1535 | qdsd_data3_spmi: data3_spmi { |
| 1536 | config { |
| 1537 | pins = "qdsd_data3"; |
| 1538 | bias-pull-down; /* pull down */ |
| 1539 | drive-strength = <8>; /* 8 MA */ |
| 1540 | }; |
| 1541 | }; |
| 1542 | }; |
| 1543 | |
| 1544 | typec_ssmux_config: typec_ssmux_config { |
| 1545 | mux { |
| 1546 | pins = "gpio139"; |
| 1547 | function = "gpio"; |
| 1548 | }; |
| 1549 | |
| 1550 | config { |
| 1551 | pins = "gpio139"; |
| 1552 | drive-strength = <2>; |
| 1553 | bias-disable; |
| 1554 | }; |
| 1555 | }; |
| 1556 | }; |
| 1557 | }; |