Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 1 | /* |
| 2 | * tps65910.c -- TI tps65910 |
| 3 | * |
| 4 | * Copyright 2010 Texas Instruments Inc. |
| 5 | * |
| 6 | * Author: Graeme Gregory <gg@slimlogic.co.uk> |
| 7 | * Author: Jorge Eduardo Candelaria <jedu@slimlogic.co.uk> |
| 8 | * |
| 9 | * This program is free software; you can redistribute it and/or modify it |
| 10 | * under the terms of the GNU General Public License as published by the |
| 11 | * Free Software Foundation; either version 2 of the License, or (at your |
| 12 | * option) any later version. |
| 13 | * |
| 14 | */ |
| 15 | |
| 16 | #include <linux/kernel.h> |
| 17 | #include <linux/module.h> |
| 18 | #include <linux/init.h> |
| 19 | #include <linux/err.h> |
| 20 | #include <linux/platform_device.h> |
| 21 | #include <linux/regulator/driver.h> |
| 22 | #include <linux/regulator/machine.h> |
| 23 | #include <linux/delay.h> |
| 24 | #include <linux/slab.h> |
| 25 | #include <linux/gpio.h> |
| 26 | #include <linux/mfd/tps65910.h> |
| 27 | |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 28 | #define TPS65910_SUPPLY_STATE_ENABLED 0x1 |
Laxman Dewangan | 1e0c66f | 2012-01-28 15:07:57 +0530 | [diff] [blame] | 29 | #define EXT_SLEEP_CONTROL (TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1 | \ |
| 30 | TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2 | \ |
Laxman Dewangan | f30b071 | 2012-03-07 18:21:49 +0530 | [diff] [blame^] | 31 | TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3 | \ |
| 32 | TPS65911_SLEEP_CONTROL_EXT_INPUT_SLEEP) |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 33 | |
| 34 | /* supported VIO voltages in milivolts */ |
| 35 | static const u16 VIO_VSEL_table[] = { |
| 36 | 1500, 1800, 2500, 3300, |
| 37 | }; |
| 38 | |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 39 | /* VSEL tables for TPS65910 specific LDOs and dcdc's */ |
| 40 | |
| 41 | /* supported VDD3 voltages in milivolts */ |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 42 | static const u16 VDD3_VSEL_table[] = { |
| 43 | 5000, |
| 44 | }; |
| 45 | |
| 46 | /* supported VDIG1 voltages in milivolts */ |
| 47 | static const u16 VDIG1_VSEL_table[] = { |
| 48 | 1200, 1500, 1800, 2700, |
| 49 | }; |
| 50 | |
| 51 | /* supported VDIG2 voltages in milivolts */ |
| 52 | static const u16 VDIG2_VSEL_table[] = { |
| 53 | 1000, 1100, 1200, 1800, |
| 54 | }; |
| 55 | |
| 56 | /* supported VPLL voltages in milivolts */ |
| 57 | static const u16 VPLL_VSEL_table[] = { |
| 58 | 1000, 1100, 1800, 2500, |
| 59 | }; |
| 60 | |
| 61 | /* supported VDAC voltages in milivolts */ |
| 62 | static const u16 VDAC_VSEL_table[] = { |
| 63 | 1800, 2600, 2800, 2850, |
| 64 | }; |
| 65 | |
| 66 | /* supported VAUX1 voltages in milivolts */ |
| 67 | static const u16 VAUX1_VSEL_table[] = { |
| 68 | 1800, 2500, 2800, 2850, |
| 69 | }; |
| 70 | |
| 71 | /* supported VAUX2 voltages in milivolts */ |
| 72 | static const u16 VAUX2_VSEL_table[] = { |
| 73 | 1800, 2800, 2900, 3300, |
| 74 | }; |
| 75 | |
| 76 | /* supported VAUX33 voltages in milivolts */ |
| 77 | static const u16 VAUX33_VSEL_table[] = { |
| 78 | 1800, 2000, 2800, 3300, |
| 79 | }; |
| 80 | |
| 81 | /* supported VMMC voltages in milivolts */ |
| 82 | static const u16 VMMC_VSEL_table[] = { |
| 83 | 1800, 2800, 3000, 3300, |
| 84 | }; |
| 85 | |
| 86 | struct tps_info { |
| 87 | const char *name; |
| 88 | unsigned min_uV; |
| 89 | unsigned max_uV; |
Laxman Dewangan | 7d38a3c | 2012-01-20 16:36:22 +0530 | [diff] [blame] | 90 | u8 n_voltages; |
| 91 | const u16 *voltage_table; |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 92 | }; |
| 93 | |
| 94 | static struct tps_info tps65910_regs[] = { |
| 95 | { |
| 96 | .name = "VRTC", |
| 97 | }, |
| 98 | { |
| 99 | .name = "VIO", |
| 100 | .min_uV = 1500000, |
| 101 | .max_uV = 3300000, |
Laxman Dewangan | 7d38a3c | 2012-01-20 16:36:22 +0530 | [diff] [blame] | 102 | .n_voltages = ARRAY_SIZE(VIO_VSEL_table), |
| 103 | .voltage_table = VIO_VSEL_table, |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 104 | }, |
| 105 | { |
| 106 | .name = "VDD1", |
| 107 | .min_uV = 600000, |
| 108 | .max_uV = 4500000, |
| 109 | }, |
| 110 | { |
| 111 | .name = "VDD2", |
| 112 | .min_uV = 600000, |
| 113 | .max_uV = 4500000, |
| 114 | }, |
| 115 | { |
| 116 | .name = "VDD3", |
| 117 | .min_uV = 5000000, |
| 118 | .max_uV = 5000000, |
Laxman Dewangan | 7d38a3c | 2012-01-20 16:36:22 +0530 | [diff] [blame] | 119 | .n_voltages = ARRAY_SIZE(VDD3_VSEL_table), |
| 120 | .voltage_table = VDD3_VSEL_table, |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 121 | }, |
| 122 | { |
| 123 | .name = "VDIG1", |
| 124 | .min_uV = 1200000, |
| 125 | .max_uV = 2700000, |
Laxman Dewangan | 7d38a3c | 2012-01-20 16:36:22 +0530 | [diff] [blame] | 126 | .n_voltages = ARRAY_SIZE(VDIG1_VSEL_table), |
| 127 | .voltage_table = VDIG1_VSEL_table, |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 128 | }, |
| 129 | { |
| 130 | .name = "VDIG2", |
| 131 | .min_uV = 1000000, |
| 132 | .max_uV = 1800000, |
Laxman Dewangan | 7d38a3c | 2012-01-20 16:36:22 +0530 | [diff] [blame] | 133 | .n_voltages = ARRAY_SIZE(VDIG2_VSEL_table), |
| 134 | .voltage_table = VDIG2_VSEL_table, |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 135 | }, |
| 136 | { |
| 137 | .name = "VPLL", |
| 138 | .min_uV = 1000000, |
| 139 | .max_uV = 2500000, |
Laxman Dewangan | 7d38a3c | 2012-01-20 16:36:22 +0530 | [diff] [blame] | 140 | .n_voltages = ARRAY_SIZE(VPLL_VSEL_table), |
| 141 | .voltage_table = VPLL_VSEL_table, |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 142 | }, |
| 143 | { |
| 144 | .name = "VDAC", |
| 145 | .min_uV = 1800000, |
| 146 | .max_uV = 2850000, |
Laxman Dewangan | 7d38a3c | 2012-01-20 16:36:22 +0530 | [diff] [blame] | 147 | .n_voltages = ARRAY_SIZE(VDAC_VSEL_table), |
| 148 | .voltage_table = VDAC_VSEL_table, |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 149 | }, |
| 150 | { |
| 151 | .name = "VAUX1", |
| 152 | .min_uV = 1800000, |
| 153 | .max_uV = 2850000, |
Laxman Dewangan | 7d38a3c | 2012-01-20 16:36:22 +0530 | [diff] [blame] | 154 | .n_voltages = ARRAY_SIZE(VAUX1_VSEL_table), |
| 155 | .voltage_table = VAUX1_VSEL_table, |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 156 | }, |
| 157 | { |
| 158 | .name = "VAUX2", |
| 159 | .min_uV = 1800000, |
| 160 | .max_uV = 3300000, |
Laxman Dewangan | 7d38a3c | 2012-01-20 16:36:22 +0530 | [diff] [blame] | 161 | .n_voltages = ARRAY_SIZE(VAUX2_VSEL_table), |
| 162 | .voltage_table = VAUX2_VSEL_table, |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 163 | }, |
| 164 | { |
| 165 | .name = "VAUX33", |
| 166 | .min_uV = 1800000, |
| 167 | .max_uV = 3300000, |
Laxman Dewangan | 7d38a3c | 2012-01-20 16:36:22 +0530 | [diff] [blame] | 168 | .n_voltages = ARRAY_SIZE(VAUX33_VSEL_table), |
| 169 | .voltage_table = VAUX33_VSEL_table, |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 170 | }, |
| 171 | { |
| 172 | .name = "VMMC", |
| 173 | .min_uV = 1800000, |
| 174 | .max_uV = 3300000, |
Laxman Dewangan | 7d38a3c | 2012-01-20 16:36:22 +0530 | [diff] [blame] | 175 | .n_voltages = ARRAY_SIZE(VMMC_VSEL_table), |
| 176 | .voltage_table = VMMC_VSEL_table, |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 177 | }, |
| 178 | }; |
| 179 | |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 180 | static struct tps_info tps65911_regs[] = { |
| 181 | { |
Laxman Dewangan | c2f8efd | 2012-01-18 20:46:56 +0530 | [diff] [blame] | 182 | .name = "VRTC", |
| 183 | }, |
| 184 | { |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 185 | .name = "VIO", |
| 186 | .min_uV = 1500000, |
| 187 | .max_uV = 3300000, |
Laxman Dewangan | 7d38a3c | 2012-01-20 16:36:22 +0530 | [diff] [blame] | 188 | .n_voltages = ARRAY_SIZE(VIO_VSEL_table), |
| 189 | .voltage_table = VIO_VSEL_table, |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 190 | }, |
| 191 | { |
| 192 | .name = "VDD1", |
| 193 | .min_uV = 600000, |
| 194 | .max_uV = 4500000, |
Laxman Dewangan | 7d38a3c | 2012-01-20 16:36:22 +0530 | [diff] [blame] | 195 | .n_voltages = 73, |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 196 | }, |
| 197 | { |
| 198 | .name = "VDD2", |
| 199 | .min_uV = 600000, |
| 200 | .max_uV = 4500000, |
Laxman Dewangan | 7d38a3c | 2012-01-20 16:36:22 +0530 | [diff] [blame] | 201 | .n_voltages = 73, |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 202 | }, |
| 203 | { |
| 204 | .name = "VDDCTRL", |
| 205 | .min_uV = 600000, |
| 206 | .max_uV = 1400000, |
Laxman Dewangan | 7d38a3c | 2012-01-20 16:36:22 +0530 | [diff] [blame] | 207 | .n_voltages = 65, |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 208 | }, |
| 209 | { |
| 210 | .name = "LDO1", |
| 211 | .min_uV = 1000000, |
| 212 | .max_uV = 3300000, |
Laxman Dewangan | 7d38a3c | 2012-01-20 16:36:22 +0530 | [diff] [blame] | 213 | .n_voltages = 47, |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 214 | }, |
| 215 | { |
| 216 | .name = "LDO2", |
| 217 | .min_uV = 1000000, |
| 218 | .max_uV = 3300000, |
Laxman Dewangan | 7d38a3c | 2012-01-20 16:36:22 +0530 | [diff] [blame] | 219 | .n_voltages = 47, |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 220 | }, |
| 221 | { |
| 222 | .name = "LDO3", |
| 223 | .min_uV = 1000000, |
| 224 | .max_uV = 3300000, |
Laxman Dewangan | 7d38a3c | 2012-01-20 16:36:22 +0530 | [diff] [blame] | 225 | .n_voltages = 24, |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 226 | }, |
| 227 | { |
| 228 | .name = "LDO4", |
| 229 | .min_uV = 1000000, |
| 230 | .max_uV = 3300000, |
Laxman Dewangan | 7d38a3c | 2012-01-20 16:36:22 +0530 | [diff] [blame] | 231 | .n_voltages = 47, |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 232 | }, |
| 233 | { |
| 234 | .name = "LDO5", |
| 235 | .min_uV = 1000000, |
| 236 | .max_uV = 3300000, |
Laxman Dewangan | 7d38a3c | 2012-01-20 16:36:22 +0530 | [diff] [blame] | 237 | .n_voltages = 24, |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 238 | }, |
| 239 | { |
| 240 | .name = "LDO6", |
| 241 | .min_uV = 1000000, |
| 242 | .max_uV = 3300000, |
Laxman Dewangan | 7d38a3c | 2012-01-20 16:36:22 +0530 | [diff] [blame] | 243 | .n_voltages = 24, |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 244 | }, |
| 245 | { |
| 246 | .name = "LDO7", |
| 247 | .min_uV = 1000000, |
| 248 | .max_uV = 3300000, |
Laxman Dewangan | 7d38a3c | 2012-01-20 16:36:22 +0530 | [diff] [blame] | 249 | .n_voltages = 24, |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 250 | }, |
| 251 | { |
| 252 | .name = "LDO8", |
| 253 | .min_uV = 1000000, |
| 254 | .max_uV = 3300000, |
Laxman Dewangan | 7d38a3c | 2012-01-20 16:36:22 +0530 | [diff] [blame] | 255 | .n_voltages = 24, |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 256 | }, |
| 257 | }; |
| 258 | |
Laxman Dewangan | 1e0c66f | 2012-01-28 15:07:57 +0530 | [diff] [blame] | 259 | #define EXT_CONTROL_REG_BITS(id, regs_offs, bits) (((regs_offs) << 8) | (bits)) |
| 260 | static unsigned int tps65910_ext_sleep_control[] = { |
| 261 | 0, |
| 262 | EXT_CONTROL_REG_BITS(VIO, 1, 0), |
| 263 | EXT_CONTROL_REG_BITS(VDD1, 1, 1), |
| 264 | EXT_CONTROL_REG_BITS(VDD2, 1, 2), |
| 265 | EXT_CONTROL_REG_BITS(VDD3, 1, 3), |
| 266 | EXT_CONTROL_REG_BITS(VDIG1, 0, 1), |
| 267 | EXT_CONTROL_REG_BITS(VDIG2, 0, 2), |
| 268 | EXT_CONTROL_REG_BITS(VPLL, 0, 6), |
| 269 | EXT_CONTROL_REG_BITS(VDAC, 0, 7), |
| 270 | EXT_CONTROL_REG_BITS(VAUX1, 0, 3), |
| 271 | EXT_CONTROL_REG_BITS(VAUX2, 0, 4), |
| 272 | EXT_CONTROL_REG_BITS(VAUX33, 0, 5), |
| 273 | EXT_CONTROL_REG_BITS(VMMC, 0, 0), |
| 274 | }; |
| 275 | |
| 276 | static unsigned int tps65911_ext_sleep_control[] = { |
| 277 | 0, |
| 278 | EXT_CONTROL_REG_BITS(VIO, 1, 0), |
| 279 | EXT_CONTROL_REG_BITS(VDD1, 1, 1), |
| 280 | EXT_CONTROL_REG_BITS(VDD2, 1, 2), |
| 281 | EXT_CONTROL_REG_BITS(VDDCTRL, 1, 3), |
| 282 | EXT_CONTROL_REG_BITS(LDO1, 0, 1), |
| 283 | EXT_CONTROL_REG_BITS(LDO2, 0, 2), |
| 284 | EXT_CONTROL_REG_BITS(LDO3, 0, 7), |
| 285 | EXT_CONTROL_REG_BITS(LDO4, 0, 6), |
| 286 | EXT_CONTROL_REG_BITS(LDO5, 0, 3), |
| 287 | EXT_CONTROL_REG_BITS(LDO6, 0, 0), |
| 288 | EXT_CONTROL_REG_BITS(LDO7, 0, 5), |
| 289 | EXT_CONTROL_REG_BITS(LDO8, 0, 4), |
| 290 | }; |
| 291 | |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 292 | struct tps65910_reg { |
Axel Lin | 39aa9b6 | 2011-07-11 09:57:43 +0800 | [diff] [blame] | 293 | struct regulator_desc *desc; |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 294 | struct tps65910 *mfd; |
Axel Lin | 39aa9b6 | 2011-07-11 09:57:43 +0800 | [diff] [blame] | 295 | struct regulator_dev **rdev; |
| 296 | struct tps_info **info; |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 297 | struct mutex mutex; |
Axel Lin | 39aa9b6 | 2011-07-11 09:57:43 +0800 | [diff] [blame] | 298 | int num_regulators; |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 299 | int mode; |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 300 | int (*get_ctrl_reg)(int); |
Laxman Dewangan | 1e0c66f | 2012-01-28 15:07:57 +0530 | [diff] [blame] | 301 | unsigned int *ext_sleep_control; |
| 302 | unsigned int board_ext_control[TPS65910_NUM_REGS]; |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 303 | }; |
| 304 | |
| 305 | static inline int tps65910_read(struct tps65910_reg *pmic, u8 reg) |
| 306 | { |
| 307 | u8 val; |
| 308 | int err; |
| 309 | |
| 310 | err = pmic->mfd->read(pmic->mfd, reg, 1, &val); |
| 311 | if (err) |
| 312 | return err; |
| 313 | |
| 314 | return val; |
| 315 | } |
| 316 | |
| 317 | static inline int tps65910_write(struct tps65910_reg *pmic, u8 reg, u8 val) |
| 318 | { |
| 319 | return pmic->mfd->write(pmic->mfd, reg, 1, &val); |
| 320 | } |
| 321 | |
| 322 | static int tps65910_modify_bits(struct tps65910_reg *pmic, u8 reg, |
| 323 | u8 set_mask, u8 clear_mask) |
| 324 | { |
| 325 | int err, data; |
| 326 | |
| 327 | mutex_lock(&pmic->mutex); |
| 328 | |
| 329 | data = tps65910_read(pmic, reg); |
| 330 | if (data < 0) { |
| 331 | dev_err(pmic->mfd->dev, "Read from reg 0x%x failed\n", reg); |
| 332 | err = data; |
| 333 | goto out; |
| 334 | } |
| 335 | |
| 336 | data &= ~clear_mask; |
| 337 | data |= set_mask; |
| 338 | err = tps65910_write(pmic, reg, data); |
| 339 | if (err) |
| 340 | dev_err(pmic->mfd->dev, "Write for reg 0x%x failed\n", reg); |
| 341 | |
| 342 | out: |
| 343 | mutex_unlock(&pmic->mutex); |
| 344 | return err; |
| 345 | } |
| 346 | |
| 347 | static int tps65910_reg_read(struct tps65910_reg *pmic, u8 reg) |
| 348 | { |
| 349 | int data; |
| 350 | |
| 351 | mutex_lock(&pmic->mutex); |
| 352 | |
| 353 | data = tps65910_read(pmic, reg); |
| 354 | if (data < 0) |
| 355 | dev_err(pmic->mfd->dev, "Read from reg 0x%x failed\n", reg); |
| 356 | |
| 357 | mutex_unlock(&pmic->mutex); |
| 358 | return data; |
| 359 | } |
| 360 | |
| 361 | static int tps65910_reg_write(struct tps65910_reg *pmic, u8 reg, u8 val) |
| 362 | { |
| 363 | int err; |
| 364 | |
| 365 | mutex_lock(&pmic->mutex); |
| 366 | |
| 367 | err = tps65910_write(pmic, reg, val); |
| 368 | if (err < 0) |
| 369 | dev_err(pmic->mfd->dev, "Write for reg 0x%x failed\n", reg); |
| 370 | |
| 371 | mutex_unlock(&pmic->mutex); |
| 372 | return err; |
| 373 | } |
| 374 | |
| 375 | static int tps65910_get_ctrl_register(int id) |
| 376 | { |
| 377 | switch (id) { |
| 378 | case TPS65910_REG_VRTC: |
| 379 | return TPS65910_VRTC; |
| 380 | case TPS65910_REG_VIO: |
| 381 | return TPS65910_VIO; |
| 382 | case TPS65910_REG_VDD1: |
| 383 | return TPS65910_VDD1; |
| 384 | case TPS65910_REG_VDD2: |
| 385 | return TPS65910_VDD2; |
| 386 | case TPS65910_REG_VDD3: |
| 387 | return TPS65910_VDD3; |
| 388 | case TPS65910_REG_VDIG1: |
| 389 | return TPS65910_VDIG1; |
| 390 | case TPS65910_REG_VDIG2: |
| 391 | return TPS65910_VDIG2; |
| 392 | case TPS65910_REG_VPLL: |
| 393 | return TPS65910_VPLL; |
| 394 | case TPS65910_REG_VDAC: |
| 395 | return TPS65910_VDAC; |
| 396 | case TPS65910_REG_VAUX1: |
| 397 | return TPS65910_VAUX1; |
| 398 | case TPS65910_REG_VAUX2: |
| 399 | return TPS65910_VAUX2; |
| 400 | case TPS65910_REG_VAUX33: |
| 401 | return TPS65910_VAUX33; |
| 402 | case TPS65910_REG_VMMC: |
| 403 | return TPS65910_VMMC; |
| 404 | default: |
| 405 | return -EINVAL; |
| 406 | } |
| 407 | } |
| 408 | |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 409 | static int tps65911_get_ctrl_register(int id) |
| 410 | { |
| 411 | switch (id) { |
| 412 | case TPS65910_REG_VRTC: |
| 413 | return TPS65910_VRTC; |
| 414 | case TPS65910_REG_VIO: |
| 415 | return TPS65910_VIO; |
| 416 | case TPS65910_REG_VDD1: |
| 417 | return TPS65910_VDD1; |
| 418 | case TPS65910_REG_VDD2: |
| 419 | return TPS65910_VDD2; |
| 420 | case TPS65911_REG_VDDCTRL: |
| 421 | return TPS65911_VDDCTRL; |
| 422 | case TPS65911_REG_LDO1: |
| 423 | return TPS65911_LDO1; |
| 424 | case TPS65911_REG_LDO2: |
| 425 | return TPS65911_LDO2; |
| 426 | case TPS65911_REG_LDO3: |
| 427 | return TPS65911_LDO3; |
| 428 | case TPS65911_REG_LDO4: |
| 429 | return TPS65911_LDO4; |
| 430 | case TPS65911_REG_LDO5: |
| 431 | return TPS65911_LDO5; |
| 432 | case TPS65911_REG_LDO6: |
| 433 | return TPS65911_LDO6; |
| 434 | case TPS65911_REG_LDO7: |
| 435 | return TPS65911_LDO7; |
| 436 | case TPS65911_REG_LDO8: |
| 437 | return TPS65911_LDO8; |
| 438 | default: |
| 439 | return -EINVAL; |
| 440 | } |
| 441 | } |
| 442 | |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 443 | static int tps65910_is_enabled(struct regulator_dev *dev) |
| 444 | { |
| 445 | struct tps65910_reg *pmic = rdev_get_drvdata(dev); |
| 446 | int reg, value, id = rdev_get_id(dev); |
| 447 | |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 448 | reg = pmic->get_ctrl_reg(id); |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 449 | if (reg < 0) |
| 450 | return reg; |
| 451 | |
| 452 | value = tps65910_reg_read(pmic, reg); |
| 453 | if (value < 0) |
| 454 | return value; |
| 455 | |
| 456 | return value & TPS65910_SUPPLY_STATE_ENABLED; |
| 457 | } |
| 458 | |
| 459 | static int tps65910_enable(struct regulator_dev *dev) |
| 460 | { |
| 461 | struct tps65910_reg *pmic = rdev_get_drvdata(dev); |
| 462 | struct tps65910 *mfd = pmic->mfd; |
| 463 | int reg, id = rdev_get_id(dev); |
| 464 | |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 465 | reg = pmic->get_ctrl_reg(id); |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 466 | if (reg < 0) |
| 467 | return reg; |
| 468 | |
| 469 | return tps65910_set_bits(mfd, reg, TPS65910_SUPPLY_STATE_ENABLED); |
| 470 | } |
| 471 | |
| 472 | static int tps65910_disable(struct regulator_dev *dev) |
| 473 | { |
| 474 | struct tps65910_reg *pmic = rdev_get_drvdata(dev); |
| 475 | struct tps65910 *mfd = pmic->mfd; |
| 476 | int reg, id = rdev_get_id(dev); |
| 477 | |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 478 | reg = pmic->get_ctrl_reg(id); |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 479 | if (reg < 0) |
| 480 | return reg; |
| 481 | |
| 482 | return tps65910_clear_bits(mfd, reg, TPS65910_SUPPLY_STATE_ENABLED); |
| 483 | } |
| 484 | |
| 485 | |
| 486 | static int tps65910_set_mode(struct regulator_dev *dev, unsigned int mode) |
| 487 | { |
| 488 | struct tps65910_reg *pmic = rdev_get_drvdata(dev); |
| 489 | struct tps65910 *mfd = pmic->mfd; |
| 490 | int reg, value, id = rdev_get_id(dev); |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 491 | |
| 492 | reg = pmic->get_ctrl_reg(id); |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 493 | if (reg < 0) |
| 494 | return reg; |
| 495 | |
| 496 | switch (mode) { |
| 497 | case REGULATOR_MODE_NORMAL: |
| 498 | return tps65910_modify_bits(pmic, reg, LDO_ST_ON_BIT, |
| 499 | LDO_ST_MODE_BIT); |
| 500 | case REGULATOR_MODE_IDLE: |
| 501 | value = LDO_ST_ON_BIT | LDO_ST_MODE_BIT; |
| 502 | return tps65910_set_bits(mfd, reg, value); |
| 503 | case REGULATOR_MODE_STANDBY: |
| 504 | return tps65910_clear_bits(mfd, reg, LDO_ST_ON_BIT); |
| 505 | } |
| 506 | |
| 507 | return -EINVAL; |
| 508 | } |
| 509 | |
| 510 | static unsigned int tps65910_get_mode(struct regulator_dev *dev) |
| 511 | { |
| 512 | struct tps65910_reg *pmic = rdev_get_drvdata(dev); |
| 513 | int reg, value, id = rdev_get_id(dev); |
| 514 | |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 515 | reg = pmic->get_ctrl_reg(id); |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 516 | if (reg < 0) |
| 517 | return reg; |
| 518 | |
| 519 | value = tps65910_reg_read(pmic, reg); |
| 520 | if (value < 0) |
| 521 | return value; |
| 522 | |
| 523 | if (value & LDO_ST_ON_BIT) |
| 524 | return REGULATOR_MODE_STANDBY; |
| 525 | else if (value & LDO_ST_MODE_BIT) |
| 526 | return REGULATOR_MODE_IDLE; |
| 527 | else |
| 528 | return REGULATOR_MODE_NORMAL; |
| 529 | } |
| 530 | |
| 531 | static int tps65910_get_voltage_dcdc(struct regulator_dev *dev) |
| 532 | { |
| 533 | struct tps65910_reg *pmic = rdev_get_drvdata(dev); |
| 534 | int id = rdev_get_id(dev), voltage = 0; |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 535 | int opvsel = 0, srvsel = 0, vselmax = 0, mult = 0, sr = 0; |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 536 | |
| 537 | switch (id) { |
| 538 | case TPS65910_REG_VDD1: |
| 539 | opvsel = tps65910_reg_read(pmic, TPS65910_VDD1_OP); |
| 540 | mult = tps65910_reg_read(pmic, TPS65910_VDD1); |
| 541 | mult = (mult & VDD1_VGAIN_SEL_MASK) >> VDD1_VGAIN_SEL_SHIFT; |
| 542 | srvsel = tps65910_reg_read(pmic, TPS65910_VDD1_SR); |
| 543 | sr = opvsel & VDD1_OP_CMD_MASK; |
| 544 | opvsel &= VDD1_OP_SEL_MASK; |
| 545 | srvsel &= VDD1_SR_SEL_MASK; |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 546 | vselmax = 75; |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 547 | break; |
| 548 | case TPS65910_REG_VDD2: |
| 549 | opvsel = tps65910_reg_read(pmic, TPS65910_VDD2_OP); |
| 550 | mult = tps65910_reg_read(pmic, TPS65910_VDD2); |
| 551 | mult = (mult & VDD2_VGAIN_SEL_MASK) >> VDD2_VGAIN_SEL_SHIFT; |
| 552 | srvsel = tps65910_reg_read(pmic, TPS65910_VDD2_SR); |
| 553 | sr = opvsel & VDD2_OP_CMD_MASK; |
| 554 | opvsel &= VDD2_OP_SEL_MASK; |
| 555 | srvsel &= VDD2_SR_SEL_MASK; |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 556 | vselmax = 75; |
| 557 | break; |
| 558 | case TPS65911_REG_VDDCTRL: |
| 559 | opvsel = tps65910_reg_read(pmic, TPS65911_VDDCTRL_OP); |
| 560 | srvsel = tps65910_reg_read(pmic, TPS65911_VDDCTRL_SR); |
| 561 | sr = opvsel & VDDCTRL_OP_CMD_MASK; |
| 562 | opvsel &= VDDCTRL_OP_SEL_MASK; |
| 563 | srvsel &= VDDCTRL_SR_SEL_MASK; |
| 564 | vselmax = 64; |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 565 | break; |
| 566 | } |
| 567 | |
| 568 | /* multiplier 0 == 1 but 2,3 normal */ |
| 569 | if (!mult) |
| 570 | mult=1; |
| 571 | |
| 572 | if (sr) { |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 573 | /* normalise to valid range */ |
| 574 | if (srvsel < 3) |
| 575 | srvsel = 3; |
| 576 | if (srvsel > vselmax) |
| 577 | srvsel = vselmax; |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 578 | srvsel -= 3; |
| 579 | |
| 580 | voltage = (srvsel * VDD1_2_OFFSET + VDD1_2_MIN_VOLT) * 100; |
| 581 | } else { |
| 582 | |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 583 | /* normalise to valid range*/ |
| 584 | if (opvsel < 3) |
| 585 | opvsel = 3; |
| 586 | if (opvsel > vselmax) |
| 587 | opvsel = vselmax; |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 588 | opvsel -= 3; |
| 589 | |
| 590 | voltage = (opvsel * VDD1_2_OFFSET + VDD1_2_MIN_VOLT) * 100; |
| 591 | } |
| 592 | |
| 593 | voltage *= mult; |
| 594 | |
| 595 | return voltage; |
| 596 | } |
| 597 | |
| 598 | static int tps65910_get_voltage(struct regulator_dev *dev) |
| 599 | { |
| 600 | struct tps65910_reg *pmic = rdev_get_drvdata(dev); |
| 601 | int reg, value, id = rdev_get_id(dev), voltage = 0; |
| 602 | |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 603 | reg = pmic->get_ctrl_reg(id); |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 604 | if (reg < 0) |
| 605 | return reg; |
| 606 | |
| 607 | value = tps65910_reg_read(pmic, reg); |
| 608 | if (value < 0) |
| 609 | return value; |
| 610 | |
| 611 | switch (id) { |
| 612 | case TPS65910_REG_VIO: |
| 613 | case TPS65910_REG_VDIG1: |
| 614 | case TPS65910_REG_VDIG2: |
| 615 | case TPS65910_REG_VPLL: |
| 616 | case TPS65910_REG_VDAC: |
| 617 | case TPS65910_REG_VAUX1: |
| 618 | case TPS65910_REG_VAUX2: |
| 619 | case TPS65910_REG_VAUX33: |
| 620 | case TPS65910_REG_VMMC: |
| 621 | value &= LDO_SEL_MASK; |
| 622 | value >>= LDO_SEL_SHIFT; |
| 623 | break; |
| 624 | default: |
| 625 | return -EINVAL; |
| 626 | } |
| 627 | |
Laxman Dewangan | 7d38a3c | 2012-01-20 16:36:22 +0530 | [diff] [blame] | 628 | voltage = pmic->info[id]->voltage_table[value] * 1000; |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 629 | |
| 630 | return voltage; |
| 631 | } |
| 632 | |
| 633 | static int tps65910_get_voltage_vdd3(struct regulator_dev *dev) |
| 634 | { |
| 635 | return 5 * 1000 * 1000; |
| 636 | } |
| 637 | |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 638 | static int tps65911_get_voltage(struct regulator_dev *dev) |
| 639 | { |
| 640 | struct tps65910_reg *pmic = rdev_get_drvdata(dev); |
| 641 | int step_mv, id = rdev_get_id(dev); |
| 642 | u8 value, reg; |
| 643 | |
| 644 | reg = pmic->get_ctrl_reg(id); |
| 645 | |
| 646 | value = tps65910_reg_read(pmic, reg); |
| 647 | |
| 648 | switch (id) { |
| 649 | case TPS65911_REG_LDO1: |
| 650 | case TPS65911_REG_LDO2: |
| 651 | case TPS65911_REG_LDO4: |
| 652 | value &= LDO1_SEL_MASK; |
| 653 | value >>= LDO_SEL_SHIFT; |
| 654 | /* The first 5 values of the selector correspond to 1V */ |
| 655 | if (value < 5) |
| 656 | value = 0; |
| 657 | else |
| 658 | value -= 4; |
| 659 | |
| 660 | step_mv = 50; |
| 661 | break; |
| 662 | case TPS65911_REG_LDO3: |
| 663 | case TPS65911_REG_LDO5: |
| 664 | case TPS65911_REG_LDO6: |
| 665 | case TPS65911_REG_LDO7: |
| 666 | case TPS65911_REG_LDO8: |
| 667 | value &= LDO3_SEL_MASK; |
| 668 | value >>= LDO_SEL_SHIFT; |
| 669 | /* The first 3 values of the selector correspond to 1V */ |
| 670 | if (value < 3) |
| 671 | value = 0; |
| 672 | else |
| 673 | value -= 2; |
| 674 | |
| 675 | step_mv = 100; |
| 676 | break; |
| 677 | case TPS65910_REG_VIO: |
Laxman Dewangan | e882eae | 2012-02-17 18:56:11 +0530 | [diff] [blame] | 678 | value &= LDO_SEL_MASK; |
| 679 | value >>= LDO_SEL_SHIFT; |
Laxman Dewangan | 7d38a3c | 2012-01-20 16:36:22 +0530 | [diff] [blame] | 680 | return pmic->info[id]->voltage_table[value] * 1000; |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 681 | default: |
| 682 | return -EINVAL; |
| 683 | } |
| 684 | |
| 685 | return (LDO_MIN_VOLT + value * step_mv) * 1000; |
| 686 | } |
| 687 | |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 688 | static int tps65910_set_voltage_dcdc(struct regulator_dev *dev, |
| 689 | unsigned selector) |
| 690 | { |
| 691 | struct tps65910_reg *pmic = rdev_get_drvdata(dev); |
| 692 | int id = rdev_get_id(dev), vsel; |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 693 | int dcdc_mult = 0; |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 694 | |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 695 | switch (id) { |
| 696 | case TPS65910_REG_VDD1: |
Afzal Mohammed | 780dc9b | 2011-11-08 18:54:10 +0530 | [diff] [blame] | 697 | dcdc_mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1; |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 698 | if (dcdc_mult == 1) |
| 699 | dcdc_mult--; |
Afzal Mohammed | 780dc9b | 2011-11-08 18:54:10 +0530 | [diff] [blame] | 700 | vsel = (selector % VDD1_2_NUM_VOLT_FINE) + 3; |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 701 | |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 702 | tps65910_modify_bits(pmic, TPS65910_VDD1, |
| 703 | (dcdc_mult << VDD1_VGAIN_SEL_SHIFT), |
| 704 | VDD1_VGAIN_SEL_MASK); |
| 705 | tps65910_reg_write(pmic, TPS65910_VDD1_OP, vsel); |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 706 | break; |
| 707 | case TPS65910_REG_VDD2: |
Afzal Mohammed | 780dc9b | 2011-11-08 18:54:10 +0530 | [diff] [blame] | 708 | dcdc_mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1; |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 709 | if (dcdc_mult == 1) |
| 710 | dcdc_mult--; |
Afzal Mohammed | 780dc9b | 2011-11-08 18:54:10 +0530 | [diff] [blame] | 711 | vsel = (selector % VDD1_2_NUM_VOLT_FINE) + 3; |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 712 | |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 713 | tps65910_modify_bits(pmic, TPS65910_VDD2, |
| 714 | (dcdc_mult << VDD2_VGAIN_SEL_SHIFT), |
| 715 | VDD1_VGAIN_SEL_MASK); |
| 716 | tps65910_reg_write(pmic, TPS65910_VDD2_OP, vsel); |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 717 | break; |
| 718 | case TPS65911_REG_VDDCTRL: |
| 719 | vsel = selector; |
| 720 | tps65910_reg_write(pmic, TPS65911_VDDCTRL_OP, vsel); |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 721 | } |
| 722 | |
| 723 | return 0; |
| 724 | } |
| 725 | |
| 726 | static int tps65910_set_voltage(struct regulator_dev *dev, unsigned selector) |
| 727 | { |
| 728 | struct tps65910_reg *pmic = rdev_get_drvdata(dev); |
| 729 | int reg, id = rdev_get_id(dev); |
| 730 | |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 731 | reg = pmic->get_ctrl_reg(id); |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 732 | if (reg < 0) |
| 733 | return reg; |
| 734 | |
| 735 | switch (id) { |
| 736 | case TPS65910_REG_VIO: |
| 737 | case TPS65910_REG_VDIG1: |
| 738 | case TPS65910_REG_VDIG2: |
| 739 | case TPS65910_REG_VPLL: |
| 740 | case TPS65910_REG_VDAC: |
| 741 | case TPS65910_REG_VAUX1: |
| 742 | case TPS65910_REG_VAUX2: |
| 743 | case TPS65910_REG_VAUX33: |
| 744 | case TPS65910_REG_VMMC: |
| 745 | return tps65910_modify_bits(pmic, reg, |
| 746 | (selector << LDO_SEL_SHIFT), LDO_SEL_MASK); |
| 747 | } |
| 748 | |
| 749 | return -EINVAL; |
| 750 | } |
| 751 | |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 752 | static int tps65911_set_voltage(struct regulator_dev *dev, unsigned selector) |
| 753 | { |
| 754 | struct tps65910_reg *pmic = rdev_get_drvdata(dev); |
| 755 | int reg, id = rdev_get_id(dev); |
| 756 | |
| 757 | reg = pmic->get_ctrl_reg(id); |
| 758 | if (reg < 0) |
| 759 | return reg; |
| 760 | |
| 761 | switch (id) { |
| 762 | case TPS65911_REG_LDO1: |
| 763 | case TPS65911_REG_LDO2: |
| 764 | case TPS65911_REG_LDO4: |
| 765 | return tps65910_modify_bits(pmic, reg, |
| 766 | (selector << LDO_SEL_SHIFT), LDO1_SEL_MASK); |
| 767 | case TPS65911_REG_LDO3: |
| 768 | case TPS65911_REG_LDO5: |
| 769 | case TPS65911_REG_LDO6: |
| 770 | case TPS65911_REG_LDO7: |
| 771 | case TPS65911_REG_LDO8: |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 772 | return tps65910_modify_bits(pmic, reg, |
| 773 | (selector << LDO_SEL_SHIFT), LDO3_SEL_MASK); |
Laxman Dewangan | e882eae | 2012-02-17 18:56:11 +0530 | [diff] [blame] | 774 | case TPS65910_REG_VIO: |
| 775 | return tps65910_modify_bits(pmic, reg, |
| 776 | (selector << LDO_SEL_SHIFT), LDO_SEL_MASK); |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 777 | } |
| 778 | |
| 779 | return -EINVAL; |
| 780 | } |
| 781 | |
| 782 | |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 783 | static int tps65910_list_voltage_dcdc(struct regulator_dev *dev, |
| 784 | unsigned selector) |
| 785 | { |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 786 | int volt, mult = 1, id = rdev_get_id(dev); |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 787 | |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 788 | switch (id) { |
| 789 | case TPS65910_REG_VDD1: |
| 790 | case TPS65910_REG_VDD2: |
Afzal Mohammed | 780dc9b | 2011-11-08 18:54:10 +0530 | [diff] [blame] | 791 | mult = (selector / VDD1_2_NUM_VOLT_FINE) + 1; |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 792 | volt = VDD1_2_MIN_VOLT + |
Afzal Mohammed | 780dc9b | 2011-11-08 18:54:10 +0530 | [diff] [blame] | 793 | (selector % VDD1_2_NUM_VOLT_FINE) * VDD1_2_OFFSET; |
Axel Lin | d04156b | 2011-07-10 21:44:09 +0800 | [diff] [blame] | 794 | break; |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 795 | case TPS65911_REG_VDDCTRL: |
| 796 | volt = VDDCTRL_MIN_VOLT + (selector * VDDCTRL_OFFSET); |
Axel Lin | d04156b | 2011-07-10 21:44:09 +0800 | [diff] [blame] | 797 | break; |
| 798 | default: |
| 799 | BUG(); |
| 800 | return -EINVAL; |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 801 | } |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 802 | |
| 803 | return volt * 100 * mult; |
| 804 | } |
| 805 | |
| 806 | static int tps65910_list_voltage(struct regulator_dev *dev, |
| 807 | unsigned selector) |
| 808 | { |
| 809 | struct tps65910_reg *pmic = rdev_get_drvdata(dev); |
| 810 | int id = rdev_get_id(dev), voltage; |
| 811 | |
| 812 | if (id < TPS65910_REG_VIO || id > TPS65910_REG_VMMC) |
| 813 | return -EINVAL; |
| 814 | |
Laxman Dewangan | 7d38a3c | 2012-01-20 16:36:22 +0530 | [diff] [blame] | 815 | if (selector >= pmic->info[id]->n_voltages) |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 816 | return -EINVAL; |
| 817 | else |
Laxman Dewangan | 7d38a3c | 2012-01-20 16:36:22 +0530 | [diff] [blame] | 818 | voltage = pmic->info[id]->voltage_table[selector] * 1000; |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 819 | |
| 820 | return voltage; |
| 821 | } |
| 822 | |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 823 | static int tps65911_list_voltage(struct regulator_dev *dev, unsigned selector) |
| 824 | { |
| 825 | struct tps65910_reg *pmic = rdev_get_drvdata(dev); |
| 826 | int step_mv = 0, id = rdev_get_id(dev); |
| 827 | |
| 828 | switch(id) { |
| 829 | case TPS65911_REG_LDO1: |
| 830 | case TPS65911_REG_LDO2: |
| 831 | case TPS65911_REG_LDO4: |
| 832 | /* The first 5 values of the selector correspond to 1V */ |
| 833 | if (selector < 5) |
| 834 | selector = 0; |
| 835 | else |
| 836 | selector -= 4; |
| 837 | |
| 838 | step_mv = 50; |
| 839 | break; |
| 840 | case TPS65911_REG_LDO3: |
| 841 | case TPS65911_REG_LDO5: |
| 842 | case TPS65911_REG_LDO6: |
| 843 | case TPS65911_REG_LDO7: |
| 844 | case TPS65911_REG_LDO8: |
| 845 | /* The first 3 values of the selector correspond to 1V */ |
| 846 | if (selector < 3) |
| 847 | selector = 0; |
| 848 | else |
| 849 | selector -= 2; |
| 850 | |
| 851 | step_mv = 100; |
| 852 | break; |
| 853 | case TPS65910_REG_VIO: |
Laxman Dewangan | 7d38a3c | 2012-01-20 16:36:22 +0530 | [diff] [blame] | 854 | return pmic->info[id]->voltage_table[selector] * 1000; |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 855 | default: |
| 856 | return -EINVAL; |
| 857 | } |
| 858 | |
| 859 | return (LDO_MIN_VOLT + selector * step_mv) * 1000; |
| 860 | } |
| 861 | |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 862 | /* Regulator ops (except VRTC) */ |
| 863 | static struct regulator_ops tps65910_ops_dcdc = { |
| 864 | .is_enabled = tps65910_is_enabled, |
| 865 | .enable = tps65910_enable, |
| 866 | .disable = tps65910_disable, |
| 867 | .set_mode = tps65910_set_mode, |
| 868 | .get_mode = tps65910_get_mode, |
| 869 | .get_voltage = tps65910_get_voltage_dcdc, |
| 870 | .set_voltage_sel = tps65910_set_voltage_dcdc, |
| 871 | .list_voltage = tps65910_list_voltage_dcdc, |
| 872 | }; |
| 873 | |
| 874 | static struct regulator_ops tps65910_ops_vdd3 = { |
| 875 | .is_enabled = tps65910_is_enabled, |
| 876 | .enable = tps65910_enable, |
| 877 | .disable = tps65910_disable, |
| 878 | .set_mode = tps65910_set_mode, |
| 879 | .get_mode = tps65910_get_mode, |
| 880 | .get_voltage = tps65910_get_voltage_vdd3, |
| 881 | .list_voltage = tps65910_list_voltage, |
| 882 | }; |
| 883 | |
| 884 | static struct regulator_ops tps65910_ops = { |
| 885 | .is_enabled = tps65910_is_enabled, |
| 886 | .enable = tps65910_enable, |
| 887 | .disable = tps65910_disable, |
| 888 | .set_mode = tps65910_set_mode, |
| 889 | .get_mode = tps65910_get_mode, |
| 890 | .get_voltage = tps65910_get_voltage, |
| 891 | .set_voltage_sel = tps65910_set_voltage, |
| 892 | .list_voltage = tps65910_list_voltage, |
| 893 | }; |
| 894 | |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 895 | static struct regulator_ops tps65911_ops = { |
| 896 | .is_enabled = tps65910_is_enabled, |
| 897 | .enable = tps65910_enable, |
| 898 | .disable = tps65910_disable, |
| 899 | .set_mode = tps65910_set_mode, |
| 900 | .get_mode = tps65910_get_mode, |
| 901 | .get_voltage = tps65911_get_voltage, |
| 902 | .set_voltage_sel = tps65911_set_voltage, |
| 903 | .list_voltage = tps65911_list_voltage, |
| 904 | }; |
| 905 | |
Laxman Dewangan | 1e0c66f | 2012-01-28 15:07:57 +0530 | [diff] [blame] | 906 | static int tps65910_set_ext_sleep_config(struct tps65910_reg *pmic, |
| 907 | int id, int ext_sleep_config) |
| 908 | { |
| 909 | struct tps65910 *mfd = pmic->mfd; |
| 910 | u8 regoffs = (pmic->ext_sleep_control[id] >> 8) & 0xFF; |
| 911 | u8 bit_pos = (1 << pmic->ext_sleep_control[id] & 0xFF); |
| 912 | int ret; |
| 913 | |
| 914 | /* |
| 915 | * Regulator can not be control from multiple external input EN1, EN2 |
| 916 | * and EN3 together. |
| 917 | */ |
| 918 | if (ext_sleep_config & EXT_SLEEP_CONTROL) { |
| 919 | int en_count; |
| 920 | en_count = ((ext_sleep_config & |
| 921 | TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1) != 0); |
| 922 | en_count += ((ext_sleep_config & |
| 923 | TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2) != 0); |
| 924 | en_count += ((ext_sleep_config & |
| 925 | TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3) != 0); |
Laxman Dewangan | f30b071 | 2012-03-07 18:21:49 +0530 | [diff] [blame^] | 926 | en_count += ((ext_sleep_config & |
| 927 | TPS65911_SLEEP_CONTROL_EXT_INPUT_SLEEP) != 0); |
Laxman Dewangan | 1e0c66f | 2012-01-28 15:07:57 +0530 | [diff] [blame] | 928 | if (en_count > 1) { |
| 929 | dev_err(mfd->dev, |
| 930 | "External sleep control flag is not proper\n"); |
| 931 | return -EINVAL; |
| 932 | } |
| 933 | } |
| 934 | |
| 935 | pmic->board_ext_control[id] = ext_sleep_config; |
| 936 | |
| 937 | /* External EN1 control */ |
| 938 | if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN1) |
| 939 | ret = tps65910_set_bits(mfd, |
| 940 | TPS65910_EN1_LDO_ASS + regoffs, bit_pos); |
| 941 | else |
| 942 | ret = tps65910_clear_bits(mfd, |
| 943 | TPS65910_EN1_LDO_ASS + regoffs, bit_pos); |
| 944 | if (ret < 0) { |
| 945 | dev_err(mfd->dev, |
| 946 | "Error in configuring external control EN1\n"); |
| 947 | return ret; |
| 948 | } |
| 949 | |
| 950 | /* External EN2 control */ |
| 951 | if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN2) |
| 952 | ret = tps65910_set_bits(mfd, |
| 953 | TPS65910_EN2_LDO_ASS + regoffs, bit_pos); |
| 954 | else |
| 955 | ret = tps65910_clear_bits(mfd, |
| 956 | TPS65910_EN2_LDO_ASS + regoffs, bit_pos); |
| 957 | if (ret < 0) { |
| 958 | dev_err(mfd->dev, |
| 959 | "Error in configuring external control EN2\n"); |
| 960 | return ret; |
| 961 | } |
| 962 | |
| 963 | /* External EN3 control for TPS65910 LDO only */ |
| 964 | if ((tps65910_chip_id(mfd) == TPS65910) && |
| 965 | (id >= TPS65910_REG_VDIG1)) { |
| 966 | if (ext_sleep_config & TPS65910_SLEEP_CONTROL_EXT_INPUT_EN3) |
| 967 | ret = tps65910_set_bits(mfd, |
| 968 | TPS65910_EN3_LDO_ASS + regoffs, bit_pos); |
| 969 | else |
| 970 | ret = tps65910_clear_bits(mfd, |
| 971 | TPS65910_EN3_LDO_ASS + regoffs, bit_pos); |
| 972 | if (ret < 0) { |
| 973 | dev_err(mfd->dev, |
| 974 | "Error in configuring external control EN3\n"); |
| 975 | return ret; |
| 976 | } |
| 977 | } |
| 978 | |
| 979 | /* Return if no external control is selected */ |
| 980 | if (!(ext_sleep_config & EXT_SLEEP_CONTROL)) { |
| 981 | /* Clear all sleep controls */ |
| 982 | ret = tps65910_clear_bits(mfd, |
| 983 | TPS65910_SLEEP_KEEP_LDO_ON + regoffs, bit_pos); |
| 984 | if (!ret) |
| 985 | ret = tps65910_clear_bits(mfd, |
| 986 | TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos); |
| 987 | if (ret < 0) |
| 988 | dev_err(mfd->dev, |
| 989 | "Error in configuring SLEEP register\n"); |
| 990 | return ret; |
| 991 | } |
| 992 | |
| 993 | /* |
| 994 | * For regulator that has separate operational and sleep register make |
| 995 | * sure that operational is used and clear sleep register to turn |
| 996 | * regulator off when external control is inactive |
| 997 | */ |
| 998 | if ((id == TPS65910_REG_VDD1) || |
| 999 | (id == TPS65910_REG_VDD2) || |
| 1000 | ((id == TPS65911_REG_VDDCTRL) && |
| 1001 | (tps65910_chip_id(mfd) == TPS65911))) { |
| 1002 | int op_reg_add = pmic->get_ctrl_reg(id) + 1; |
| 1003 | int sr_reg_add = pmic->get_ctrl_reg(id) + 2; |
| 1004 | int opvsel = tps65910_reg_read(pmic, op_reg_add); |
| 1005 | int srvsel = tps65910_reg_read(pmic, sr_reg_add); |
| 1006 | if (opvsel & VDD1_OP_CMD_MASK) { |
| 1007 | u8 reg_val = srvsel & VDD1_OP_SEL_MASK; |
| 1008 | ret = tps65910_reg_write(pmic, op_reg_add, reg_val); |
| 1009 | if (ret < 0) { |
| 1010 | dev_err(mfd->dev, |
| 1011 | "Error in configuring op register\n"); |
| 1012 | return ret; |
| 1013 | } |
| 1014 | } |
| 1015 | ret = tps65910_reg_write(pmic, sr_reg_add, 0); |
| 1016 | if (ret < 0) { |
| 1017 | dev_err(mfd->dev, "Error in settting sr register\n"); |
| 1018 | return ret; |
| 1019 | } |
| 1020 | } |
| 1021 | |
| 1022 | ret = tps65910_clear_bits(mfd, |
| 1023 | TPS65910_SLEEP_KEEP_LDO_ON + regoffs, bit_pos); |
Laxman Dewangan | f30b071 | 2012-03-07 18:21:49 +0530 | [diff] [blame^] | 1024 | if (!ret) { |
| 1025 | if (ext_sleep_config & TPS65911_SLEEP_CONTROL_EXT_INPUT_SLEEP) |
| 1026 | ret = tps65910_set_bits(mfd, |
| 1027 | TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos); |
| 1028 | else |
| 1029 | ret = tps65910_clear_bits(mfd, |
| 1030 | TPS65910_SLEEP_SET_LDO_OFF + regoffs, bit_pos); |
| 1031 | } |
Laxman Dewangan | 1e0c66f | 2012-01-28 15:07:57 +0530 | [diff] [blame] | 1032 | if (ret < 0) |
| 1033 | dev_err(mfd->dev, |
| 1034 | "Error in configuring SLEEP register\n"); |
Laxman Dewangan | f30b071 | 2012-03-07 18:21:49 +0530 | [diff] [blame^] | 1035 | |
Laxman Dewangan | 1e0c66f | 2012-01-28 15:07:57 +0530 | [diff] [blame] | 1036 | return ret; |
| 1037 | } |
| 1038 | |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 1039 | static __devinit int tps65910_probe(struct platform_device *pdev) |
| 1040 | { |
| 1041 | struct tps65910 *tps65910 = dev_get_drvdata(pdev->dev.parent); |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 1042 | struct tps_info *info; |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 1043 | struct regulator_init_data *reg_data; |
| 1044 | struct regulator_dev *rdev; |
| 1045 | struct tps65910_reg *pmic; |
| 1046 | struct tps65910_board *pmic_plat_data; |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 1047 | int i, err; |
| 1048 | |
| 1049 | pmic_plat_data = dev_get_platdata(tps65910->dev); |
| 1050 | if (!pmic_plat_data) |
| 1051 | return -EINVAL; |
| 1052 | |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 1053 | pmic = kzalloc(sizeof(*pmic), GFP_KERNEL); |
| 1054 | if (!pmic) |
| 1055 | return -ENOMEM; |
| 1056 | |
| 1057 | mutex_init(&pmic->mutex); |
| 1058 | pmic->mfd = tps65910; |
| 1059 | platform_set_drvdata(pdev, pmic); |
| 1060 | |
| 1061 | /* Give control of all register to control port */ |
| 1062 | tps65910_set_bits(pmic->mfd, TPS65910_DEVCTRL, |
| 1063 | DEVCTRL_SR_CTL_I2C_SEL_MASK); |
| 1064 | |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 1065 | switch(tps65910_chip_id(tps65910)) { |
| 1066 | case TPS65910: |
| 1067 | pmic->get_ctrl_reg = &tps65910_get_ctrl_register; |
Axel Lin | 39aa9b6 | 2011-07-11 09:57:43 +0800 | [diff] [blame] | 1068 | pmic->num_regulators = ARRAY_SIZE(tps65910_regs); |
Laxman Dewangan | 1e0c66f | 2012-01-28 15:07:57 +0530 | [diff] [blame] | 1069 | pmic->ext_sleep_control = tps65910_ext_sleep_control; |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 1070 | info = tps65910_regs; |
Axel Lin | d04156b | 2011-07-10 21:44:09 +0800 | [diff] [blame] | 1071 | break; |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 1072 | case TPS65911: |
| 1073 | pmic->get_ctrl_reg = &tps65911_get_ctrl_register; |
Axel Lin | 39aa9b6 | 2011-07-11 09:57:43 +0800 | [diff] [blame] | 1074 | pmic->num_regulators = ARRAY_SIZE(tps65911_regs); |
Laxman Dewangan | 1e0c66f | 2012-01-28 15:07:57 +0530 | [diff] [blame] | 1075 | pmic->ext_sleep_control = tps65911_ext_sleep_control; |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 1076 | info = tps65911_regs; |
Axel Lin | d04156b | 2011-07-10 21:44:09 +0800 | [diff] [blame] | 1077 | break; |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 1078 | default: |
| 1079 | pr_err("Invalid tps chip version\n"); |
Axel Lin | a3ee13e | 2011-07-10 18:52:07 +0800 | [diff] [blame] | 1080 | kfree(pmic); |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 1081 | return -ENODEV; |
| 1082 | } |
| 1083 | |
Axel Lin | 39aa9b6 | 2011-07-11 09:57:43 +0800 | [diff] [blame] | 1084 | pmic->desc = kcalloc(pmic->num_regulators, |
| 1085 | sizeof(struct regulator_desc), GFP_KERNEL); |
| 1086 | if (!pmic->desc) { |
| 1087 | err = -ENOMEM; |
| 1088 | goto err_free_pmic; |
| 1089 | } |
| 1090 | |
| 1091 | pmic->info = kcalloc(pmic->num_regulators, |
| 1092 | sizeof(struct tps_info *), GFP_KERNEL); |
| 1093 | if (!pmic->info) { |
| 1094 | err = -ENOMEM; |
| 1095 | goto err_free_desc; |
| 1096 | } |
| 1097 | |
| 1098 | pmic->rdev = kcalloc(pmic->num_regulators, |
| 1099 | sizeof(struct regulator_dev *), GFP_KERNEL); |
| 1100 | if (!pmic->rdev) { |
| 1101 | err = -ENOMEM; |
| 1102 | goto err_free_info; |
| 1103 | } |
| 1104 | |
Kyle Manna | c1fc148 | 2011-11-03 12:08:06 -0500 | [diff] [blame] | 1105 | for (i = 0; i < pmic->num_regulators && i < TPS65910_NUM_REGS; |
| 1106 | i++, info++) { |
| 1107 | |
| 1108 | reg_data = pmic_plat_data->tps65910_pmic_init_data[i]; |
| 1109 | |
| 1110 | /* Regulator API handles empty constraints but not NULL |
| 1111 | * constraints */ |
| 1112 | if (!reg_data) |
| 1113 | continue; |
| 1114 | |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 1115 | /* Register the regulators */ |
| 1116 | pmic->info[i] = info; |
| 1117 | |
| 1118 | pmic->desc[i].name = info->name; |
Axel Lin | 77fa44d | 2011-05-12 13:47:50 +0800 | [diff] [blame] | 1119 | pmic->desc[i].id = i; |
Laxman Dewangan | 7d38a3c | 2012-01-20 16:36:22 +0530 | [diff] [blame] | 1120 | pmic->desc[i].n_voltages = info->n_voltages; |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 1121 | |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 1122 | if (i == TPS65910_REG_VDD1 || i == TPS65910_REG_VDD2) { |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 1123 | pmic->desc[i].ops = &tps65910_ops_dcdc; |
Afzal Mohammed | 780dc9b | 2011-11-08 18:54:10 +0530 | [diff] [blame] | 1124 | pmic->desc[i].n_voltages = VDD1_2_NUM_VOLT_FINE * |
| 1125 | VDD1_2_NUM_VOLT_COARSE; |
Jorge Eduardo Candelaria | a320e3c | 2011-05-16 18:35:03 -0500 | [diff] [blame] | 1126 | } else if (i == TPS65910_REG_VDD3) { |
| 1127 | if (tps65910_chip_id(tps65910) == TPS65910) |
| 1128 | pmic->desc[i].ops = &tps65910_ops_vdd3; |
| 1129 | else |
| 1130 | pmic->desc[i].ops = &tps65910_ops_dcdc; |
| 1131 | } else { |
| 1132 | if (tps65910_chip_id(tps65910) == TPS65910) |
| 1133 | pmic->desc[i].ops = &tps65910_ops; |
| 1134 | else |
| 1135 | pmic->desc[i].ops = &tps65911_ops; |
| 1136 | } |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 1137 | |
Laxman Dewangan | 1e0c66f | 2012-01-28 15:07:57 +0530 | [diff] [blame] | 1138 | err = tps65910_set_ext_sleep_config(pmic, i, |
| 1139 | pmic_plat_data->regulator_ext_sleep_control[i]); |
| 1140 | /* |
| 1141 | * Failing on regulator for configuring externally control |
| 1142 | * is not a serious issue, just throw warning. |
| 1143 | */ |
| 1144 | if (err < 0) |
| 1145 | dev_warn(tps65910->dev, |
| 1146 | "Failed to initialise ext control config\n"); |
| 1147 | |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 1148 | pmic->desc[i].type = REGULATOR_VOLTAGE; |
| 1149 | pmic->desc[i].owner = THIS_MODULE; |
| 1150 | |
| 1151 | rdev = regulator_register(&pmic->desc[i], |
Rajendra Nayak | 2c043bc | 2011-11-18 16:47:19 +0530 | [diff] [blame] | 1152 | tps65910->dev, reg_data, pmic, NULL); |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 1153 | if (IS_ERR(rdev)) { |
| 1154 | dev_err(tps65910->dev, |
| 1155 | "failed to register %s regulator\n", |
| 1156 | pdev->name); |
| 1157 | err = PTR_ERR(rdev); |
Axel Lin | 39aa9b6 | 2011-07-11 09:57:43 +0800 | [diff] [blame] | 1158 | goto err_unregister_regulator; |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 1159 | } |
| 1160 | |
| 1161 | /* Save regulator for cleanup */ |
| 1162 | pmic->rdev[i] = rdev; |
| 1163 | } |
| 1164 | return 0; |
| 1165 | |
Axel Lin | 39aa9b6 | 2011-07-11 09:57:43 +0800 | [diff] [blame] | 1166 | err_unregister_regulator: |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 1167 | while (--i >= 0) |
| 1168 | regulator_unregister(pmic->rdev[i]); |
Axel Lin | 39aa9b6 | 2011-07-11 09:57:43 +0800 | [diff] [blame] | 1169 | kfree(pmic->rdev); |
| 1170 | err_free_info: |
| 1171 | kfree(pmic->info); |
| 1172 | err_free_desc: |
| 1173 | kfree(pmic->desc); |
| 1174 | err_free_pmic: |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 1175 | kfree(pmic); |
| 1176 | return err; |
| 1177 | } |
| 1178 | |
| 1179 | static int __devexit tps65910_remove(struct platform_device *pdev) |
| 1180 | { |
Axel Lin | 39aa9b6 | 2011-07-11 09:57:43 +0800 | [diff] [blame] | 1181 | struct tps65910_reg *pmic = platform_get_drvdata(pdev); |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 1182 | int i; |
| 1183 | |
Axel Lin | 39aa9b6 | 2011-07-11 09:57:43 +0800 | [diff] [blame] | 1184 | for (i = 0; i < pmic->num_regulators; i++) |
| 1185 | regulator_unregister(pmic->rdev[i]); |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 1186 | |
Axel Lin | 39aa9b6 | 2011-07-11 09:57:43 +0800 | [diff] [blame] | 1187 | kfree(pmic->rdev); |
| 1188 | kfree(pmic->info); |
| 1189 | kfree(pmic->desc); |
| 1190 | kfree(pmic); |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 1191 | return 0; |
| 1192 | } |
| 1193 | |
Laxman Dewangan | 1e0c66f | 2012-01-28 15:07:57 +0530 | [diff] [blame] | 1194 | static void tps65910_shutdown(struct platform_device *pdev) |
| 1195 | { |
| 1196 | struct tps65910_reg *pmic = platform_get_drvdata(pdev); |
| 1197 | int i; |
| 1198 | |
| 1199 | /* |
| 1200 | * Before bootloader jumps to kernel, it makes sure that required |
| 1201 | * external control signals are in desired state so that given rails |
| 1202 | * can be configure accordingly. |
| 1203 | * If rails are configured to be controlled from external control |
| 1204 | * then before shutting down/rebooting the system, the external |
| 1205 | * control configuration need to be remove from the rails so that |
| 1206 | * its output will be available as per register programming even |
| 1207 | * if external controls are removed. This is require when the POR |
| 1208 | * value of the control signals are not in active state and before |
| 1209 | * bootloader initializes it, the system requires the rail output |
| 1210 | * to be active for booting. |
| 1211 | */ |
| 1212 | for (i = 0; i < pmic->num_regulators; i++) { |
| 1213 | int err; |
| 1214 | if (!pmic->rdev[i]) |
| 1215 | continue; |
| 1216 | |
| 1217 | err = tps65910_set_ext_sleep_config(pmic, i, 0); |
| 1218 | if (err < 0) |
| 1219 | dev_err(&pdev->dev, |
| 1220 | "Error in clearing external control\n"); |
| 1221 | } |
| 1222 | } |
| 1223 | |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 1224 | static struct platform_driver tps65910_driver = { |
| 1225 | .driver = { |
| 1226 | .name = "tps65910-pmic", |
| 1227 | .owner = THIS_MODULE, |
| 1228 | }, |
| 1229 | .probe = tps65910_probe, |
| 1230 | .remove = __devexit_p(tps65910_remove), |
Laxman Dewangan | 1e0c66f | 2012-01-28 15:07:57 +0530 | [diff] [blame] | 1231 | .shutdown = tps65910_shutdown, |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 1232 | }; |
| 1233 | |
| 1234 | static int __init tps65910_init(void) |
| 1235 | { |
| 1236 | return platform_driver_register(&tps65910_driver); |
| 1237 | } |
| 1238 | subsys_initcall(tps65910_init); |
| 1239 | |
| 1240 | static void __exit tps65910_cleanup(void) |
| 1241 | { |
| 1242 | platform_driver_unregister(&tps65910_driver); |
| 1243 | } |
| 1244 | module_exit(tps65910_cleanup); |
| 1245 | |
| 1246 | MODULE_AUTHOR("Graeme Gregory <gg@slimlogic.co.uk>"); |
Axel Lin | ae0e654 | 2012-02-21 10:14:55 +0800 | [diff] [blame] | 1247 | MODULE_DESCRIPTION("TPS65910/TPS65911 voltage regulator driver"); |
Graeme Gregory | 518fb72 | 2011-05-02 16:20:08 -0500 | [diff] [blame] | 1248 | MODULE_LICENSE("GPL v2"); |
| 1249 | MODULE_ALIAS("platform:tps65910-pmic"); |