MyungJoo Ham | a3c98b8 | 2011-10-02 00:19:15 +0200 | [diff] [blame] | 1 | menuconfig PM_DEVFREQ |
| 2 | bool "Generic Dynamic Voltage and Frequency Scaling (DVFS) support" |
Pranith Kumar | 83fe27e | 2014-12-05 11:24:45 -0500 | [diff] [blame] | 3 | select SRCU |
MyungJoo Ham | a3c98b8 | 2011-10-02 00:19:15 +0200 | [diff] [blame] | 4 | help |
MyungJoo Ham | 6c81f90 | 2011-11-14 23:31:35 +0100 | [diff] [blame] | 5 | A device may have a list of frequencies and voltages available. |
| 6 | devfreq, a generic DVFS framework can be registered for a device |
| 7 | in order to let the governor provided to devfreq choose an |
| 8 | operating frequency based on the device driver's policy. |
MyungJoo Ham | a3c98b8 | 2011-10-02 00:19:15 +0200 | [diff] [blame] | 9 | |
MyungJoo Ham | 6c81f90 | 2011-11-14 23:31:35 +0100 | [diff] [blame] | 10 | Each device may have its own governor and policy. Devfreq can |
MyungJoo Ham | a3c98b8 | 2011-10-02 00:19:15 +0200 | [diff] [blame] | 11 | reevaluate the device state periodically and/or based on the |
MyungJoo Ham | 6c81f90 | 2011-11-14 23:31:35 +0100 | [diff] [blame] | 12 | notification to "nb", a notifier block, of devfreq. |
MyungJoo Ham | a3c98b8 | 2011-10-02 00:19:15 +0200 | [diff] [blame] | 13 | |
MyungJoo Ham | 6c81f90 | 2011-11-14 23:31:35 +0100 | [diff] [blame] | 14 | Like some CPUs with CPUfreq, a device may have multiple clocks. |
MyungJoo Ham | a3c98b8 | 2011-10-02 00:19:15 +0200 | [diff] [blame] | 15 | However, because the clock frequencies of a single device are |
MyungJoo Ham | 6c81f90 | 2011-11-14 23:31:35 +0100 | [diff] [blame] | 16 | determined by the single device's state, an instance of devfreq |
MyungJoo Ham | a3c98b8 | 2011-10-02 00:19:15 +0200 | [diff] [blame] | 17 | is attached to a single device and returns a "representative" |
MyungJoo Ham | 6c81f90 | 2011-11-14 23:31:35 +0100 | [diff] [blame] | 18 | clock frequency of the device, which is also attached |
| 19 | to a device by 1-to-1. The device registering devfreq takes the |
Masanari Iida | 6b2aac4 | 2012-04-14 00:14:11 +0900 | [diff] [blame] | 20 | responsibility to "interpret" the representative frequency and |
MyungJoo Ham | a3c98b8 | 2011-10-02 00:19:15 +0200 | [diff] [blame] | 21 | to set its every clock accordingly with the "target" callback |
MyungJoo Ham | 6c81f90 | 2011-11-14 23:31:35 +0100 | [diff] [blame] | 22 | given to devfreq. |
| 23 | |
| 24 | When OPP is used with the devfreq device, it is recommended to |
| 25 | register devfreq's nb to the OPP's notifier head. If OPP is |
| 26 | used with the devfreq device, you may use OPP helper |
| 27 | functions defined in devfreq.h. |
MyungJoo Ham | a3c98b8 | 2011-10-02 00:19:15 +0200 | [diff] [blame] | 28 | |
| 29 | if PM_DEVFREQ |
| 30 | |
MyungJoo Ham | ce26c5b | 2011-10-02 00:19:34 +0200 | [diff] [blame] | 31 | comment "DEVFREQ Governors" |
| 32 | |
| 33 | config DEVFREQ_GOV_SIMPLE_ONDEMAND |
Nishanth Menon | eff607f | 2012-10-29 15:01:46 -0500 | [diff] [blame] | 34 | tristate "Simple Ondemand" |
MyungJoo Ham | ce26c5b | 2011-10-02 00:19:34 +0200 | [diff] [blame] | 35 | help |
| 36 | Chooses frequency based on the recent load on the device. Works |
| 37 | similar as ONDEMAND governor of CPUFREQ does. A device with |
| 38 | Simple-Ondemand should be able to provide busy/total counter |
| 39 | values that imply the usage rate. A device may provide tuned |
| 40 | values to the governor with data field at devfreq_add_device(). |
| 41 | |
| 42 | config DEVFREQ_GOV_PERFORMANCE |
Nishanth Menon | eff607f | 2012-10-29 15:01:46 -0500 | [diff] [blame] | 43 | tristate "Performance" |
MyungJoo Ham | ce26c5b | 2011-10-02 00:19:34 +0200 | [diff] [blame] | 44 | help |
| 45 | Sets the frequency at the maximum available frequency. |
| 46 | This governor always returns UINT_MAX as frequency so that |
| 47 | the DEVFREQ framework returns the highest frequency available |
| 48 | at any time. |
| 49 | |
| 50 | config DEVFREQ_GOV_POWERSAVE |
Nishanth Menon | eff607f | 2012-10-29 15:01:46 -0500 | [diff] [blame] | 51 | tristate "Powersave" |
MyungJoo Ham | ce26c5b | 2011-10-02 00:19:34 +0200 | [diff] [blame] | 52 | help |
| 53 | Sets the frequency at the minimum available frequency. |
| 54 | This governor always returns 0 as frequency so that |
| 55 | the DEVFREQ framework returns the lowest frequency available |
| 56 | at any time. |
| 57 | |
| 58 | config DEVFREQ_GOV_USERSPACE |
Nishanth Menon | eff607f | 2012-10-29 15:01:46 -0500 | [diff] [blame] | 59 | tristate "Userspace" |
MyungJoo Ham | ce26c5b | 2011-10-02 00:19:34 +0200 | [diff] [blame] | 60 | help |
| 61 | Sets the frequency at the user specified one. |
| 62 | This governor returns the user configured frequency if there |
| 63 | has been an input to /sys/devices/.../power/devfreq_set_freq. |
Geert Uytterhoeven | 027b693 | 2016-03-14 16:29:02 +0100 | [diff] [blame] | 64 | Otherwise, the governor does not change the frequency |
MyungJoo Ham | ce26c5b | 2011-10-02 00:19:34 +0200 | [diff] [blame] | 65 | given at the initialization. |
| 66 | |
Chanwoo Choi | 9961331 | 2016-03-22 13:44:03 +0900 | [diff] [blame] | 67 | config DEVFREQ_GOV_PASSIVE |
| 68 | tristate "Passive" |
| 69 | help |
| 70 | Sets the frequency based on the frequency of its parent devfreq |
| 71 | device. This governor does not change the frequency by itself |
| 72 | through sysfs entries. The passive governor recommends that |
| 73 | devfreq device uses the OPP table to get the frequency/voltage. |
| 74 | |
Saravana Kannan | dbf2cae | 2014-04-11 18:48:38 -0700 | [diff] [blame] | 75 | config DEVFREQ_GOV_CPUFREQ |
| 76 | tristate "CPUfreq" |
| 77 | depends on CPU_FREQ |
| 78 | help |
| 79 | Chooses frequency based on the online CPUs' current frequency and a |
| 80 | CPU frequency to device frequency mapping table(s). This governor |
| 81 | can be useful for controlling devices such as DDR, cache, CCI, etc. |
| 82 | |
Saravana Kannan | ed84c52 | 2014-05-28 18:59:54 -0700 | [diff] [blame] | 83 | config QCOM_BIMC_BWMON |
| 84 | tristate "QCOM BIMC Bandwidth monitor hardware" |
| 85 | depends on ARCH_QCOM |
| 86 | help |
| 87 | The BIMC Bandwidth monitor hardware allows for monitoring the |
| 88 | traffic coming from each master port connected to the BIMC. It also |
| 89 | has the capability to raise an IRQ when the count exceeds a |
| 90 | programmable limit. |
| 91 | |
Rohit Gupta | 5e4358c | 2014-07-18 16:16:02 -0700 | [diff] [blame] | 92 | config ARM_MEMLAT_MON |
| 93 | tristate "ARM CPU Memory Latency monitor hardware" |
| 94 | depends on ARCH_QCOM |
| 95 | help |
| 96 | The PMU present on these ARM cores allow for the use of counters to |
| 97 | monitor the memory latency characteristics of an ARM CPU workload. |
| 98 | This driver uses these counters to implement the APIs needed by |
| 99 | the mem_latency devfreq governor. |
| 100 | |
Junjie Wu | 198779b | 2014-10-31 16:18:02 -0700 | [diff] [blame] | 101 | config QCOMCCI_HWMON |
Stephen Boyd | f5dc008 | 2017-04-03 16:46:24 -0700 | [diff] [blame] | 102 | tristate "QTI CCI Cache monitor hardware" |
Junjie Wu | 198779b | 2014-10-31 16:18:02 -0700 | [diff] [blame] | 103 | depends on ARCH_QCOM |
| 104 | help |
Stephen Boyd | f5dc008 | 2017-04-03 16:46:24 -0700 | [diff] [blame] | 105 | QTI CCI has additional PMU counters that can be used to monitor |
| 106 | cache requests. QTI CCI hardware monitor device configures these |
Junjie Wu | 198779b | 2014-10-31 16:18:02 -0700 | [diff] [blame] | 107 | registers to monitor cache and inform governor. It can also set an |
| 108 | IRQ when count exceeds a programmable limit. |
| 109 | |
Junjie Wu | 85817c2 | 2015-07-23 14:20:14 -0700 | [diff] [blame] | 110 | config QCOM_M4M_HWMON |
| 111 | tristate "QCOM M4M cache monitor hardware" |
| 112 | depends on ARCH_QCOM |
| 113 | help |
| 114 | QCOM M4M has counters that can be used to monitor requests coming to |
| 115 | M4M. QCOM M4M hardware monitor device programs corresponding registers |
| 116 | to monitor cache and inform governor. It can also set an IRQ when |
| 117 | count exceeds a programmable limit. |
| 118 | |
Saravana Kannan | edad301 | 2013-09-23 19:27:57 -0700 | [diff] [blame] | 119 | config DEVFREQ_GOV_QCOM_BW_HWMON |
| 120 | tristate "HW monitor based governor for device BW" |
| 121 | depends on QCOM_BIMC_BWMON |
| 122 | help |
| 123 | HW monitor based governor for device to DDR bandwidth voting. |
| 124 | This governor sets the CPU BW vote by using BIMC counters to monitor |
| 125 | the CPU's use of DDR. Since this uses target specific counters it |
| 126 | can conflict with existing profiling tools. This governor is unlikely |
| 127 | to be useful for non-QCOM devices. |
| 128 | |
Saravana Kannan | cedb32e | 2014-01-22 00:15:33 -0800 | [diff] [blame] | 129 | config DEVFREQ_GOV_QCOM_CACHE_HWMON |
| 130 | tristate "HW monitor based governor for cache frequency" |
| 131 | help |
| 132 | HW monitor based governor for cache frequency scaling. This |
| 133 | governor sets the cache frequency by using PM counters to monitor the |
| 134 | CPU's use of cache. Since this governor uses some of the PM counters |
| 135 | it can conflict with existing profiling tools. This governor is |
| 136 | unlikely to be useful for other devices. |
| 137 | |
Odelu Kukatla | 7382075 | 2017-10-30 13:27:16 +0530 | [diff] [blame] | 138 | config DEVFREQ_GOV_SPDM_HYP |
| 139 | bool "QTI SPDM Hypervisor Governor" |
| 140 | depends on ARCH_QCOM |
| 141 | help |
| 142 | Hypervisor based governor for CPU bandwidth voting |
| 143 | for QTI chipsets. |
| 144 | Sets the frequency using a "on-demand" algorithm. |
| 145 | This governor is unlikely to be useful for other devices. |
| 146 | |
Rohit Gupta | 5e4358c | 2014-07-18 16:16:02 -0700 | [diff] [blame] | 147 | config DEVFREQ_GOV_MEMLAT |
| 148 | tristate "HW monitor based governor for device BW" |
| 149 | depends on ARM_MEMLAT_MON |
| 150 | help |
| 151 | HW monitor based governor for device to DDR bandwidth voting. |
| 152 | This governor sets the CPU BW vote based on stats obtained from memalat |
| 153 | monitor if it determines that a workload is memory latency bound. Since |
| 154 | this uses target specific counters it can conflict with existing profiling |
| 155 | tools. |
| 156 | |
MyungJoo Ham | a3c98b8 | 2011-10-02 00:19:15 +0200 | [diff] [blame] | 157 | comment "DEVFREQ Drivers" |
| 158 | |
Oleg Perelet | b906a19 | 2017-01-04 09:50:02 -0800 | [diff] [blame] | 159 | config DEVFREQ_GOV_QCOM_ADRENO_TZ |
| 160 | tristate "Qualcomm Technologies Inc Adreno Trustzone" |
| 161 | depends on QCOM_KGSL && QCOM_SCM |
| 162 | help |
| 163 | Trustzone based governor for the Adreno GPU. Sets |
| 164 | the frequency using a "on-demand" algorithm. This |
| 165 | governor is unlikely to be useful for other |
| 166 | devices. |
| 167 | |
Oleg Perelet | 5d61210 | 2017-04-05 11:03:38 -0700 | [diff] [blame] | 168 | config DEVFREQ_GOV_QCOM_GPUBW_MON |
| 169 | tristate "GPU BW voting governor" |
| 170 | depends on DEVFREQ_GOV_QCOM_ADRENO_TZ |
| 171 | help |
| 172 | This governor works together with Adreno Trustzone governor, |
| 173 | and select bus frequency votes using an "on-demand" alorithm. |
| 174 | This governor is unlikely to be useful for non-Adreno |
| 175 | devices. |
| 176 | |
Chanwoo Choi | 0722249 | 2015-11-03 19:04:16 +0900 | [diff] [blame] | 177 | config ARM_EXYNOS_BUS_DEVFREQ |
Paul Gortmaker | 5b3c316 | 2016-06-26 03:43:49 +0900 | [diff] [blame] | 178 | tristate "ARM EXYNOS Generic Memory Bus DEVFREQ Driver" |
Krzysztof Kozlowski | 797da55 | 2016-08-19 08:36:55 +0200 | [diff] [blame] | 179 | depends on ARCH_EXYNOS || COMPILE_TEST |
Chanwoo Choi | 0722249 | 2015-11-03 19:04:16 +0900 | [diff] [blame] | 180 | select DEVFREQ_GOV_SIMPLE_ONDEMAND |
Chanwoo Choi | 403e068 | 2015-11-05 18:29:27 +0900 | [diff] [blame] | 181 | select DEVFREQ_GOV_PASSIVE |
Chanwoo Choi | 0722249 | 2015-11-03 19:04:16 +0900 | [diff] [blame] | 182 | select DEVFREQ_EVENT_EXYNOS_PPMU |
| 183 | select PM_DEVFREQ_EVENT |
| 184 | select PM_OPP |
| 185 | help |
| 186 | This adds the common DEVFREQ driver for Exynos Memory bus. Exynos |
| 187 | Memory bus has one more group of memory bus (e.g, MIF and INT block). |
| 188 | Each memory bus group could contain many memoby bus block. It reads |
| 189 | PPMU counters of memory controllers by using DEVFREQ-event device |
| 190 | and adjusts the operating frequencies and voltages with OPP support. |
| 191 | This does not yet operate with optimal voltages. |
| 192 | |
Tomeu Vizoso | 6234f38 | 2014-11-24 13:28:17 +0100 | [diff] [blame] | 193 | config ARM_TEGRA_DEVFREQ |
Jisheng Zhang | 989a0fc | 2016-08-25 20:06:14 +0800 | [diff] [blame] | 194 | tristate "Tegra DEVFREQ Driver" |
Stephen Rothwell | 290128a | 2016-09-14 14:22:25 +1000 | [diff] [blame] | 195 | depends on ARCH_TEGRA_124_SOC |
Jisheng Zhang | 989a0fc | 2016-08-25 20:06:14 +0800 | [diff] [blame] | 196 | select DEVFREQ_GOV_SIMPLE_ONDEMAND |
| 197 | select PM_OPP |
| 198 | help |
| 199 | This adds the DEVFREQ driver for the Tegra family of SoCs. |
| 200 | It reads ACTMON counters of memory controllers and adjusts the |
| 201 | operating frequencies and voltages with OPP support. |
Tomeu Vizoso | 6234f38 | 2014-11-24 13:28:17 +0100 | [diff] [blame] | 202 | |
Lin Huang | 5a893e3 | 2016-09-05 13:06:10 +0800 | [diff] [blame] | 203 | config ARM_RK3399_DMC_DEVFREQ |
| 204 | tristate "ARM RK3399 DMC DEVFREQ Driver" |
Chanwoo Choi | c673faa | 2019-12-12 11:20:30 +0900 | [diff] [blame] | 205 | depends on (ARCH_ROCKCHIP && HAVE_ARM_SMCCC) || \ |
| 206 | (COMPILE_TEST && HAVE_ARM_SMCCC) |
Lin Huang | 5a893e3 | 2016-09-05 13:06:10 +0800 | [diff] [blame] | 207 | select DEVFREQ_EVENT_ROCKCHIP_DFI |
| 208 | select DEVFREQ_GOV_SIMPLE_ONDEMAND |
Arnd Bergmann | 54dec69 | 2016-09-15 17:44:58 +0200 | [diff] [blame] | 209 | select PM_DEVFREQ_EVENT |
Lin Huang | 5a893e3 | 2016-09-05 13:06:10 +0800 | [diff] [blame] | 210 | select PM_OPP |
| 211 | help |
| 212 | This adds the DEVFREQ driver for the RK3399 DMC(Dynamic Memory Controller). |
| 213 | It sets the frequency for the memory controller and reads the usage counts |
| 214 | from hardware. |
| 215 | |
Saravana Kannan | d905e65 | 2014-01-21 18:49:37 -0800 | [diff] [blame] | 216 | config DEVFREQ_SIMPLE_DEV |
| 217 | tristate "Device driver for simple clock device with no status info" |
| 218 | select DEVFREQ_GOV_PERFORMANCE |
| 219 | select DEVFREQ_GOV_POWERSAVE |
| 220 | select DEVFREQ_GOV_USERSPACE |
| 221 | select DEVFREQ_GOV_CPUFREQ |
| 222 | help |
| 223 | Device driver for simple devices that control their frequency using |
| 224 | clock APIs and don't have any form of status reporting. |
| 225 | |
Saravana Kannan | 89445cf | 2013-11-22 16:46:16 -0800 | [diff] [blame] | 226 | config QCOM_DEVFREQ_DEVBW |
Stephen Boyd | f5dc008 | 2017-04-03 16:46:24 -0700 | [diff] [blame] | 227 | bool "Qualcomm Technologies Inc. DEVFREQ device for device master <-> slave IB/AB BW voting" |
Saravana Kannan | 89445cf | 2013-11-22 16:46:16 -0800 | [diff] [blame] | 228 | depends on ARCH_QCOM |
| 229 | select DEVFREQ_GOV_PERFORMANCE |
| 230 | select DEVFREQ_GOV_POWERSAVE |
| 231 | select DEVFREQ_GOV_USERSPACE |
| 232 | select DEVFREQ_GOV_CPUFREQ |
| 233 | default n |
| 234 | help |
| 235 | Different devfreq governors use this devfreq device to make CPU to |
| 236 | DDR IB/AB bandwidth votes. This driver provides a SoC topology |
| 237 | agnostic interface to so that some of the devfreq governors can be |
| 238 | shared across SoCs. |
| 239 | |
Odelu Kukatla | 7382075 | 2017-10-30 13:27:16 +0530 | [diff] [blame] | 240 | config SPDM_SCM |
| 241 | bool "QTI SPDM SCM based call support" |
| 242 | depends on DEVFREQ_SPDM |
| 243 | help |
| 244 | SPDM driver support the dcvs algorithm logic being accessed via |
| 245 | scm or hvc calls. This adds the support for SPDM interaction to |
| 246 | tz via SCM based call. If not selected then Hypervior interaction |
| 247 | will be activated. |
| 248 | |
| 249 | config DEVFREQ_SPDM |
| 250 | bool "QTI SPDM based bandwidth voting" |
| 251 | depends on ARCH_QCOM |
| 252 | select DEVFREQ_GOV_SPDM_HYP |
| 253 | help |
| 254 | This adds the support for SPDM based bandwidth voting on QTI chipsets. |
| 255 | This driver allows any SPDM based client to vote for bandwidth. |
| 256 | Used with the QTI SPDM Hypervisor Governor. |
| 257 | |
Chanwoo Choi | f262f28 | 2015-01-26 13:16:27 +0900 | [diff] [blame] | 258 | source "drivers/devfreq/event/Kconfig" |
| 259 | |
MyungJoo Ham | a3c98b8 | 2011-10-02 00:19:15 +0200 | [diff] [blame] | 260 | endif # PM_DEVFREQ |